diff options
| author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-11-03 01:14:51 +0000 |
|---|---|---|
| committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2010-11-03 01:14:51 +0000 |
| commit | 07d9dc83f469161153de8bfbdd1eb5504dd6f653 (patch) | |
| tree | 539a06ad4f61d57da7e254e5bef647fdbadb47f1 /MdeModulePkg/Core/PiSmmCore | |
| parent | a8c4464502aabcbda7032daddc772a1bc7386bdf (diff) | |
| download | edk2-platforms-07d9dc83f469161153de8bfbdd1eb5504dd6f653.tar.xz | |
Remove PI SMM IPL's dependency on CPU AP so that PI SMM IPL can be dispatched before the CPU AP is installed.
If PI SMM IPL will be dispatched before the CPU AP is installed for a platform, the platform developer is expected to set cache-ability of SMRAM to WB earlier to improve performance of SMM initialization.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10998 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdeModulePkg/Core/PiSmmCore')
| -rw-r--r-- | MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c | 27 | ||||
| -rw-r--r-- | MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf | 4 |
2 files changed, 19 insertions, 12 deletions
diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c index 61ed062d27..5cdb5bdeab 100644 --- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c @@ -20,6 +20,7 @@ #include <Protocol/SmmConfiguration.h>
#include <Protocol/SmmControl2.h>
#include <Protocol/DxeSmmReadyToLock.h>
+#include <Protocol/Cpu.h>
#include <Guid/EventGroup.h>
#include <Guid/EventLegacyBios.h>
@@ -963,8 +964,9 @@ SmmIplEntry ( EFI_SMM_RESERVED_SMRAM_REGION *SmramResRegion;
UINT64 MaxSize;
VOID *Registration;
- UINT64 SmmCodeSize;
+ UINT64 SmmCodeSize;
EFI_LOAD_FIXED_ADDRESS_CONFIGURATION_TABLE *LMFAConfigurationTable;
+ EFI_CPU_ARCH_PROTOCOL *CpuArch;
//
// Fill in the image handle of the SMM IPL so the SMM Core can use this as the
@@ -1063,16 +1065,21 @@ SmmIplEntry ( GetSmramCacheRange (mCurrentSmramRange, &mSmramCacheBase, &mSmramCacheSize);
//
- // Attempt to set SMRAM cacheability to WB
+ // If CPU AP is present, attempt to set SMRAM cacheability to WB
+ // Note that it is expected that cacheability of SMRAM has been set to WB if CPU AP
+ // is not available here.
//
- Status = gDS->SetMemorySpaceAttributes(
- mSmramCacheBase,
- mSmramCacheSize,
- EFI_MEMORY_WB
- );
- if (EFI_ERROR (Status)) {
- DEBUG ((DEBUG_WARN, "SMM IPL failed to set SMRAM window to EFI_MEMORY_WB\n"));
- }
+ Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&CpuArch);
+ if (!EFI_ERROR (Status)) {
+ Status = gDS->SetMemorySpaceAttributes(
+ mSmramCacheBase,
+ mSmramCacheSize,
+ EFI_MEMORY_WB
+ );
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_WARN, "SMM IPL failed to set SMRAM window to EFI_MEMORY_WB\n"));
+ }
+ }
//
// if Loading module at Fixed Address feature is enabled, save the SMRAM base to Load
// Modules At Fixed Address Configuration Table.
diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf index 8cbaf8d5d3..73507cd239 100644 --- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf @@ -56,7 +56,7 @@ gEfiSmmConfigurationProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEfiSmmControl2ProtocolGuid # PROTOCOL ALWAYS_CONSUMED
gEfiDxeSmmReadyToLockProtocolGuid # PROTOCOL ALWAYS_CONSUMED
- gEfiCpuArchProtocolGuid # PROTOCOL ALWAYS_CONSUMED
+ gEfiCpuArchProtocolGuid # PROTOCOL SIMETIMES_CONSUMED
[Guids]
gEfiEventDxeDispatchGuid # ALWAYS_CONSUMED
@@ -71,4 +71,4 @@ [Depex]
- gEfiSmmAccess2ProtocolGuid AND gEfiSmmControl2ProtocolGuid AND gEfiCpuArchProtocolGuid
+ gEfiSmmAccess2ProtocolGuid AND gEfiSmmControl2ProtocolGuid
|