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| author | Jaben Carsey <jaben.carsey@intel.com> | 2014-01-09 21:55:03 +0000 |
|---|---|---|
| committer | jcarsey <jcarsey@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-01-09 21:55:03 +0000 |
| commit | a1d20250e539b9b7d60d4887db8d5650fd4de2de (patch) | |
| tree | 4530a75f222b2aef42668574a0a27efd4490d84f /MdePkg/Include/IndustryStandard/PciExpress30.h | |
| parent | 5c5a34d485eb200c81f89ebc8553a77167ba2c44 (diff) | |
| download | edk2-platforms-a1d20250e539b9b7d60d4887db8d5650fd4de2de.tar.xz | |
MdePkg: Add PCI Express 2.1 and 3.0 structures
This adds PCI Express extended capabilities structures. These structures are required for enhancements to the shell.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jaben Carsey <jaben.carsey@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15076 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include/IndustryStandard/PciExpress30.h')
| -rw-r--r-- | MdePkg/Include/IndustryStandard/PciExpress30.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/MdePkg/Include/IndustryStandard/PciExpress30.h b/MdePkg/Include/IndustryStandard/PciExpress30.h new file mode 100644 index 0000000000..6e9e105da9 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/PciExpress30.h @@ -0,0 +1,32 @@ +/** @file
+ Support for the PCI Express 3.0 standard.
+
+ This header file may not define all structures. Please extend as required.
+
+ Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PCIEXPRESS30_H_
+#define _PCIEXPRESS30_H_
+
+#include "PciExpress21.h"
+
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID 0x0019
+#define PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_VER1 0x1
+
+typedef struct {
+ PCI_EXPRESS_EXTENDED_CAPABILITIES_HEADER Header;
+ UINT32 LinkControl3;
+ UINT32 LaneErrorStatus;
+ UINT16 EqualizationControl[2];
+} PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE;
+
+#endif
|