diff options
| author | qhuang8 <qhuang8@6f19259b-4bc3-4df7-8a09-765794883524> | 2008-12-15 15:51:43 +0000 |
|---|---|---|
| committer | qhuang8 <qhuang8@6f19259b-4bc3-4df7-8a09-765794883524> | 2008-12-15 15:51:43 +0000 |
| commit | 59e0bb0cbde3c2228ecf555071490399852c02c9 (patch) | |
| tree | 7b8dabdfc4d3e8eabfe585ad6d0d7bd43dec0253 /MdePkg/Include/Library | |
| parent | 43a99f081e9af6aef9c24d35540f1299441b2970 (diff) | |
| download | edk2-platforms-59e0bb0cbde3c2228ecf555071490399852c02c9.tar.xz | |
1. Simplify the implementation of AsmReadApplicationRegister() & AsmReadControlRegister() for IPF architecture.
2. Add AsmReadMsr() & AsmWriteMsr() for IPF architecture
3. update AsmCpuMisc.s to only support GCC tool chain to avoid symbol collision.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@7034 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include/Library')
| -rw-r--r-- | MdePkg/Include/Library/BaseLib.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index ca90c0323b..72ac6f47ed 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -4898,6 +4898,50 @@ AsmReadApplicationRegister ( /**
+ Reads the current value of a Machine Specific Register (MSR).
+
+ Reads and returns the current value of the Machine Specific Register specified by Index. No
+ parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
+ register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
+ Index is valid, or the caller must set up fault handlers to catch the faults. This function is
+ only available on IPF.
+
+ @param Index The 8-bit Machine Specific Register index to read.
+
+ @return The current value of the Machine Specific Register specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadMsr (
+ IN UINT8 Index
+ );
+
+
+/**
+ Writes the current value of a Machine Specific Register (MSR).
+
+ Writes Value to the Machine Specific Register specified by Index. Value is returned. No
+ parameter checking is performed on Index, and if the Index value is beyond the implemented MSR
+ register range, a Reserved Register/Field fault may occur. The caller must either guarantee that
+ Index is valid, or the caller must set up fault handlers to catch the faults. This function is
+ only available on IPF.
+
+ @param Index The 8-bit Machine Specific Register index to write.
+ @param Value The 64-bit value to write to the Machine Specific Register.
+
+ @return The 64-bit value to write to the Machine Specific Register.
+
+**/
+UINT64
+EFIAPI
+AsmWriteMsr (
+ IN UINT8 Index,
+ IN UINT64 Value
+ );
+
+
+/**
Determines if the CPU is currently executing in virtual, physical, or mixed mode.
Determines the current execution mode of the CPU.
|