diff options
| author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-29 22:16:28 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-08-29 22:16:28 +0000 |
| commit | fe69ac847a984abf0307ae8706dcabbb928a5a48 (patch) | |
| tree | d9a5e6fd3d69991819a7a1fc48852ffdc6aeaa8d /MdePkg/Include/Library | |
| parent | 8a96515e8852b9fd4180fc3fcfbbb72f0d93e031 (diff) | |
| download | edk2-platforms-fe69ac847a984abf0307ae8706dcabbb928a5a48.tar.xz | |
MdePkg: Add S3 library interfaces and base implementations
Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: rsun3
Reviewed-by: jyao1
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12222 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include/Library')
| -rw-r--r-- | MdePkg/Include/Library/S3BootScriptLib.h | 599 | ||||
| -rw-r--r-- | MdePkg/Include/Library/S3IoLib.h | 2637 | ||||
| -rw-r--r-- | MdePkg/Include/Library/S3PciLib.h | 1037 | ||||
| -rw-r--r-- | MdePkg/Include/Library/S3SmbusLib.h | 455 | ||||
| -rw-r--r-- | MdePkg/Include/Library/S3StallLib.h | 39 |
5 files changed, 4767 insertions, 0 deletions
diff --git a/MdePkg/Include/Library/S3BootScriptLib.h b/MdePkg/Include/Library/S3BootScriptLib.h new file mode 100644 index 0000000000..2fabaa9f89 --- /dev/null +++ b/MdePkg/Include/Library/S3BootScriptLib.h @@ -0,0 +1,599 @@ +/** @file
+ Defines library APIs used by modules to save EFI Boot Script Opcodes.
+ These OpCode will be restored by S3 related modules.
+ Note that some of the API defined in the Library class may not
+ be provided in the Framework version library instance, which means some of these
+ APIs cannot be used if the underlying firmware is Framework and not PI.
+
+ Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions
+ of the BSD License which accompanies this distribution. The
+ full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _S3_BOOT_SCRIPT_LIB_H_
+#define _S3_BOOT_SCRIPT_LIB_H_
+
+#include <Library/BaseLib.h>
+#include <IndustryStandard/SmBus.h>
+
+/**
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+ address that can be passed to the S3 Boot Script Library PCI functions.
+
+ @param Bus PCI Bus number. Range 0..255.
+ @param Device PCI Device number. Range 0..31.
+ @param Function PCI Function number. Range 0..7.
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095
+ for PCI Express.
+
+ @return The encoded PCI address.
+
+**/
+#define S3_BOOT_SCRIPT_LIB_PCI_ADDRESS(Bus,Device,Function,Register) \
+ (UINT64) ( \
+ (((UINTN) Bus) << 24) | \
+ (((UINTN) Device) << 16) | \
+ (((UINTN) Function) << 8) | \
+ (((UINTN) (Register)) < 256 ? ((UINTN) (Register)) : (UINT64) (LShiftU64 ((UINT64) (Register), 32))))
+
+///
+/// S3 Boot Script Width.
+///
+typedef enum {
+ S3BootScriptWidthUint8, ///< 8-bit operation.
+ S3BootScriptWidthUint16, ///< 16-bit operation.
+ S3BootScriptWidthUint32, ///< 32-bit operation.
+ S3BootScriptWidthUint64, ///< 64-bit operation.
+ S3BootScriptWidthFifoUint8, ///< 8-bit FIFO operation.
+ S3BootScriptWidthFifoUint16, ///< 16-bit FIFO operation.
+ S3BootScriptWidthFifoUint32, ///< 32-bit FIFO operation.
+ S3BootScriptWidthFifoUint64, ///< 64-bit FIFO operation.
+ S3BootScriptWidthFillUint8, ///< 8-bit Fill operation.
+ S3BootScriptWidthFillUint16, ///< 16-bit Fill operation.
+ S3BootScriptWidthFillUint32, ///< 32-bit Fill operation.
+ S3BootScriptWidthFillUint64, ///< 64-bit Fill operation.
+ S3BootScriptWidthMaximum
+} S3_BOOT_SCRIPT_LIB_WIDTH;
+
+/**
+ Save I/O write to boot script.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The base address of the I/O operations.
+ @param[in] Count The number of I/O operations to perform.
+ @param[in] Buffer The source buffer from which to write data.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveIoWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Adds a record for an I/O modify operation into a S3 boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The base address of the I/O operations.
+ @param[in] Data A pointer to the data to be OR-ed.
+ @param[in] DataMask A pointer to the data mask to be AND-ed with the data
+ read from the register.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveIoReadWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask
+ );
+
+/**
+ Adds a record for a memory write operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The base address of the memory operations
+ @param[in] Count The number of memory operations to perform.
+ @param[in] Buffer The source buffer from which to write the data.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveMemWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Adds a record for a memory modify operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The base address of the memory operations. Address needs
+ alignment, if required
+ @param[in] Data A pointer to the data to be OR-ed.
+ @param[in] DataMask A pointer to the data mask to be AND-ed with the data
+ read from the register.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveMemReadWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask
+ );
+
+/**
+ Adds a record for a PCI configuration space write operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The address within the PCI configuration space.
+ @param[in] Count The number of PCI operations to perform.
+ @param[in] Buffer The source buffer from which to write the data.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePciCfgWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Address The address within the PCI configuration space.
+ @param[in] Data A pointer to the data to be OR-ed.The size depends on Width.
+ @param[in] DataMask A pointer to the data mask to be AND-ed.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN__SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePciCfgReadWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask
+ );
+
+/**
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Segment The PCI segment number for Address.
+ @param[in] Address The address within the PCI configuration space.
+ @param[in] Count The number of PCI operations to perform.
+ @param[in] Buffer The source buffer from which to write the data.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePciCfg2Write (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT16 Segment,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN VOID *Buffer
+ );
+
+/**
+ Adds a record for a PCI configuration space modify operation into a specified boot script table.
+
+ @param[in] Width The width of the I/O operations.
+ @param[in] Segment The PCI segment number for Address.
+ @param[in] Address The address within the PCI configuration space.
+ @param[in] Data A pointer to the data to be OR-ed. The size depends on Width.
+ @param[in] DataMask A pointer to the data mask to be AND-ed.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePciCfg2ReadWrite (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT16 Segment,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask
+ );
+
+/**
+ Adds a record for an SMBus command execution into a specified boot script table.
+
+ @param[in] SmBusAddress Address that encodes the SMBUS Slave Address, SMBUS
+ Command, SMBUS Data Length, and PEC.
+ @param[in] Operation Indicates which particular SMBus protocol it will use
+ to execute the SMBus transactions.
+ @param[in] Length A pointer to signify the number of bytes that this
+ operation will do.
+ @param[in] Buffer Contains the value of data to execute to the SMBUS
+ slave device.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveSmbusExecute (
+ IN UINTN SmBusAddress,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN UINTN *Length,
+ IN VOID *Buffer
+ );
+
+/**
+ Adds a record for an execution stall on the processor into a specified boot script table.
+
+ @param[in] Duration The duration in microseconds of the stall.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveStall (
+ IN UINTN Duration
+ );
+
+/**
+ Adds a record for an execution stall on the processor into a specified boot script table.
+
+ @param[in] EntryPoint The entry point of the code to be dispatched.
+ @param[in] Context The argument to be passed into the EntryPoint of the code
+ to be dispatched.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveDispatch2 (
+ IN VOID *EntryPoint,
+ IN VOID *Context
+ );
+
+/**
+ Adds a record for dispatching specified arbitrary code into a specified boot script table.
+
+ @param[in] EntryPoint The entry point of the code to be dispatched.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveDispatch (
+ IN VOID *EntryPoint
+ );
+
+/**
+ Adds a record for memory reads of the memory location and continues when the exit
+ criteria is satisfied, or after a defined duration.
+
+ @param[in] Width The width of the memory operations.
+ @param[in] Address The base address of the memory operations.
+ @param[in] BitMask A pointer to the bit mask to be AND-ed with the data read
+ from the register.
+ @param[in] BitValue A pointer to the data value after to be Masked.
+ @param[in] Duration The duration in microseconds of the stall.
+ @param[in] LoopTimes The times of the register polling.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveMemPoll (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *BitMask,
+ IN VOID *BitValue,
+ IN UINTN Duration,
+ IN UINTN LoopTimes
+ );
+
+/**
+ Store arbitrary information in the boot script table. This opcode is a no-op on
+ dispatch and is only used for debugging script issues.
+
+ @param[in] InformationLength Length of the data in bytes
+ @param[in] Information Information to be logged in the boot scrpit
+
+ @retval RETURN_UNSUPPORTED In runtime, this method is not supported.
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveInformation (
+ IN UINT32 InformationLength,
+ IN VOID *Information
+ );
+/**
+ Adds a record for I/O reads the I/O location and continues when the exit criteria
+ is satisfied, or after a defined duration.
+
+ @param Width The width of the I/O operations.
+ @param Address The base address of the I/O operations.
+ @param Data The comparison value used for the polling exit criteria.
+ @param DataMask The mask used for the polling criteria. The bits in
+ the bytes below Width which are zero in Data are
+ ignored when polling the memory address.
+ @param Delay The number of 100ns units to poll. Note that timer
+ available may be of insufficient granularity, so the
+ delay may be longer.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the
+ operation.
+ @retval RETURN_SUCCESS The opcode was added.
+ @note The FRAMEWORK version implementation does not support this API
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveIoPoll (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask,
+ IN UINT64 Delay
+ );
+
+/**
+ Adds a record for PCI configuration space reads and continues when the exit
+ criteria is satisfied ,or after a defined duration.
+
+ @param Width The width of the I/O operations.
+ @param Address The address within the PCI configuration space.
+ @param Data The comparison value used for the polling exit
+ criteria.
+ @param DataMask Mask used for the polling criteria. The bits in
+ the bytes below Width which are zero in Data are
+ ignored when polling the memory address.
+ @param Delay The number of 100ns units to poll. Note that timer
+ available may be of insufficient granularity, so the
+ delay may be longer.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the
+ operation.
+ @retval RETURN_SUCCESS The opcode was added.
+ @note The FRAMEWORK version implementation does not support this API
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePciPoll (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask,
+ IN UINT64 Delay
+ );
+/**
+ Adds a record for PCI configuration space reads and continues when the exit criteria
+ is satisfied, or after a defined duration.
+
+ @param Width The width of the I/O operations.
+ @param Segment The PCI segment number for Address.
+ @param Address The address within the PCI configuration space.
+ @param Data The comparison value used for the polling exit
+ criteria.
+ @param DataMask Mask used for the polling criteria. The bits in
+ the bytes below Width which are zero
+ in Data are ignored when polling the memory address
+ @param Delay The number of 100ns units to poll. Note that timer
+ available may be of insufficient granularity so the delay
+ may be longer.
+
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform the
+ operation.
+ @retval RETURN_SUCCESS The opcode was added.
+ @note A known Limitations in the implementation: When interpreting the opcode
+ EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE, EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE
+ and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as
+ Zero, or else, assert.
+ The FRAMEWORK version implementation does not support this API.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSavePci2Poll (
+ IN S3_BOOT_SCRIPT_LIB_WIDTH Width,
+ IN UINT16 Segment,
+ IN UINT64 Address,
+ IN VOID *Data,
+ IN VOID *DataMask,
+ IN UINT64 Delay
+ );
+/**
+ Save ASCII string information specified by Buffer to boot script with opcode
+ EFI_BOOT_SCRIPT_INFORMATION_OPCODE.
+
+ @param[in] String The Null-terminated ASCII string to store into the S3 boot
+ script table.
+
+ @retval RETURN_UNSUPPORTED In runtime, this method is not supported.
+ @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table to perform
+ the operation.
+ @retval RETURN_SUCCESS The opcode was added.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptSaveInformationAsciiString (
+ IN CONST CHAR8 *String
+ );
+
+/**
+ This is an function to close the S3 boot script table. The function could only
+ be called in BOOT time phase. To comply with the Framework spec definition on
+ EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable(), this function will fulfill following things:
+ 1. Closes the specified boot script table
+ 2. It allocates a new memory pool to duplicate all the boot scripts in the specified table.
+ Once this function is called, the table maintained by the library will be destroyed
+ after it is copied into the allocated pool.
+ 3. Any attempts to add a script record after calling this function will cause a
+ new table to be created by the library.
+ 4. The base address of the allocated pool will be returned in Address. Note that
+ after using the boot script table, the CALLER is responsible for freeing the
+ pool that is allocated by this function.
+
+ In Spec PI1.1, this EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is retired. This
+ API is supplied here to meet the requirements of the Framework Spec.
+
+ If anyone does call CloseTable() on a real platform, then the caller is responsible
+ for figuring out how to get the script to run on an S3 resume because the boot script
+ maintained by the lib will be destroyed.
+
+ @return the base address of the new copy of the boot script tble.
+
+**/
+UINT8*
+EFIAPI
+S3BootScriptCloseTable (
+ VOID
+ );
+
+/**
+ Executes the S3 boot script table.
+
+ @retval RETURN_SUCCESS The boot script table was executed successfully.
+ @retval RETURN_UNSUPPORTED Invalid script table or opcode.
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptExecute (
+ VOID
+ );
+/**
+ Move the last boot script entry to the position
+
+ @param BeforeOrAfter Specifies whether the opcode is stored before
+ (TRUE) or after (FALSE) the positionin the boot
+ script table specified by Position. If Position
+ is NULL or points to NULL then the new opcode is
+ inserted at the beginning of the table (if TRUE)
+ or end of the table (if FALSE).
+ @param Position On entry, specifies the position in the boot script
+ table where the opcode will be inserted, either
+ before or after, depending on BeforeOrAfter. On
+ exit, specifies the position of the inserted opcode
+ in the boot script table.
+
+ @retval RETURN_OUT_OF_RESOURCES The table is not available.
+ @retval RETURN_INVALID_PARAMETER The Position is not a valid position in the
+ boot script table.
+ @retval RETURN_SUCCESS The opcode was inserted.
+ @note The FRAMEWORK version implementation does not support this API.
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptMoveLastOpcode (
+ IN BOOLEAN BeforeOrAfter,
+ IN OUT VOID **Position OPTIONAL
+ );
+/**
+ Find a label within the boot script table and, if not present, optionally create it.
+
+ @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE)
+ or after (FALSE) the position in the boot script table
+ specified by Position.
+ @param CreateIfNotFound Specifies whether the label will be created if the
+ label does not exists (TRUE) or not (FALSE).
+ @param Position On entry, specifies the position in the boot script
+ table where the opcode will be inserted, either
+ before or after, depending on BeforeOrAfter. On exit,
+ specifies the positionof the inserted opcode in
+ the boot script table.
+ @param Label Points to the label which will be inserted in the
+ boot script table.
+ @retval EFI_SUCCESS The operation succeeded. A record was added into
+ the specified script table.
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script
+ is not supported. If the opcode is unknow or not
+ supported because of the PCD Feature Flags.
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
+ @note The FRAMEWORK version implementation does not support this API
+
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptLabel (
+ IN BOOLEAN BeforeOrAfter,
+ IN BOOLEAN CreateIfNotFound,
+ IN OUT VOID **Position OPTIONAL,
+ IN CONST CHAR8 *Label
+ );
+/**
+ Compare two positions in the boot script table and return their relative position.
+ @param Position1 The positions in the boot script table to compare
+ @param Position2 The positions in the boot script table to compare
+ @param RelativePosition On return, points to the result of the comparison
+
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the
+ specified script table.
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script
+ is not supported. If the opcode is unknow or not s
+ upported because of the PCD Feature Flags.
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
+ @note The FRAMEWORK version implementation does not support this API
+**/
+RETURN_STATUS
+EFIAPI
+S3BootScriptCompare (
+ IN UINT8 *Position1,
+ IN UINT8 *Position2,
+ OUT UINTN *RelativePosition
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/S3IoLib.h b/MdePkg/Include/Library/S3IoLib.h new file mode 100644 index 0000000000..ab6e126ced --- /dev/null +++ b/MdePkg/Include/Library/S3IoLib.h @@ -0,0 +1,2637 @@ +/** @file
+ I/O and MMIO Library Services that do I/O and also enable the I/O operation
+ to be replayed during an S3 resume. This library class maps directly on top
+ of the IoLib class.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions
+ of the BSD License which accompanies this distribution. The
+ full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __S3_IO_LIB_H__
+#define __S3_IO_LIB_H__
+
+/**
+ Reads an 8-bit I/O port and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+S3IoRead8 (
+ IN UINTN Port
+ );
+
+/**
+ Writes an 8-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise OR, writes the
+ result back to the 8-bit I/O port, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, writes the result back
+ to the 8-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 8-bit I/O port, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+S3IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned.
+ Remaining bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, writes the
+ result back to the bit field in the 8-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, writes the
+ result back to the bit field in the 8-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise OR, writes the result back to the bit field in the
+ 8-bit port, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+S3IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+S3IoRead16 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 16-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise OR, writes the
+ result back to the 16-bit I/O port, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, writes the result back
+ to the 16-bit I/O port , and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 16-bit I/O port, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+S3IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, writes the
+ result back to the bit field in the 16-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, writes the
+ result back to the bit field in the 16-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise OR, writes the result back to the bit field in the
+ 16-bit port, and saves the value in the S3 script to be replayed on S3
+ resume.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+S3IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+S3IoRead32 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 32-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise OR, writes the
+ result back to the 32-bit I/O port, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, writes the result back
+ to the 32-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 32-bit I/O port, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+S3IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, writes the
+ result back to the bit field in the 32-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, writes the
+ result back to the bit field in the 32-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise OR, writes the result back to the bit field in the
+ 32-bit port, and saves the value in the S3 script to be replayed on S3
+ resume.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+S3IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+S3IoRead64 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 64-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] Value The value to write to the I/O port.
+
+ @return The value written to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise OR, writes the
+ result back to the 64-bit I/O port, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, writes the result back
+ to the 64-bit I/O port, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 64-bit I/O port, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+S3IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, writes the
+ result back to the bit field in the 64-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, writes the
+ result back to the bit field in the 64-bit port, and saves the value in the
+ S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise OR, writes the result back to the bit field in the
+ 64-bit port, and saves the value in the S3 script to be replayed on S3
+ resume.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Port The I/O port to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] AndData The value to AND with the read value from the I/O port.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+S3IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+S3MmioRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] Value The value to write to the MMIO register.
+
+ @return The value written the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise OR, writes the
+ result back to the 8-bit MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, writes the result
+ back to the 8-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 8-bit MMIO register, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address MMIO register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+S3MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an MMIO register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR,
+ writes the result back to the bit field in the 8-bit MMIO register, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, writes the result back to the bit field in the
+ 8-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+S3MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+S3MmioRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] Value The value to write to the MMIO register.
+
+ @return The value written the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise OR, writes the
+ result back to the 16-bit MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, writes the result
+ back to the 16-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 16-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address MMIO register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+S3MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR,
+ writes the result back to the bit field in the 16-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, writes the result back to the bit field in the
+ 16-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+S3MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+S3MmioRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] Value The value to write to the MMIO register.
+
+ @return The value written the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise OR, writes the
+ result back to the 32-bit MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, writes the result
+ back to the 32-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 32-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address MMIO register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+S3MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR,
+ writes the result back to the bit field in the 32-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, writes the result back to the bit field in the
+ 32-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+S3MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+S3MmioRead64 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 64-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] Value The value to write to the MMIO register.
+
+ @return The value written the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise OR, writes the
+ result back to the 64-bit MMIO register, and saves the value in the S3 script
+ to be replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, writes the result
+ back to the 64-bit MMIO register, and saves the value in the S3 script to be
+ replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, writes the result back to the 64-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address MMIO register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+S3MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register, and saves the value in the S3 script to
+ be replayed on S3 resume.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR,
+ writes the result back to the bit field in the 64-bit MMIO register, and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise OR, writes the result back to the bit field in the
+ 64-bit MMIO register, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The MMIO register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param[in] AndData The value to AND with the read value from the MMIO register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+S3MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Copies data from MMIO region to system memory by using 8-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 8-bit access. The total
+ number of bytes to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.
+ @param[in] Length Size in bytes of the copy.
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer.
+
+**/
+UINT8 *
+EFIAPI
+S3MmioReadBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Copies data from MMIO region to system memory by using 16-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 16-bit access. The total
+ number of bytes to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.
+ @param[in] Length Size in bytes of the copy.
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer.
+
+**/
+UINT16 *
+EFIAPI
+S3MmioReadBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT16 *Buffer
+ );
+
+/**
+ Copies data from MMIO region to system memory by using 32-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 32-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.
+ @param[in] Length Size in bytes of the copy.
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer.
+
+**/
+UINT32 *
+EFIAPI
+S3MmioReadBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT32 *Buffer
+ );
+
+/**
+ Copies data from MMIO region to system memory by using 64-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from MMIO region specified by starting address StartAddress
+ to system memory specified by Buffer by using 64-bit access. The total
+ number of byte to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied from.
+ @param[in] Length Size in bytes of the copy.
+ @param[out] Buffer Pointer to a system memory buffer receiving the data read.
+
+ @return Buffer.
+
+**/
+UINT64 *
+EFIAPI
+S3MmioReadBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ OUT UINT64 *Buffer
+ );
+
+/**
+ Copies data from system memory to MMIO region by using 8-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 8-bit access. The total number
+ of byte to be copied is specified by Length. Buffer is returned.
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.
+ @param[in] Length Size in bytes of the copy.
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer.
+
+**/
+UINT8 *
+EFIAPI
+S3MmioWriteBuffer8 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT8 *Buffer
+ );
+
+/**
+ Copies data from system memory to MMIO region by using 16-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 16-bit access. The total number
+ of bytes to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.
+ @param[in] Length Size in bytes of the copy.
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer.
+
+**/
+UINT16 *
+EFIAPI
+S3MmioWriteBuffer16 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT16 *Buffer
+ );
+
+/**
+ Copies data from system memory to MMIO region by using 32-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 32-bit access. The total number
+ of bytes to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.
+ @param[in] Length Size in bytes of the copy.
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer.
+
+**/
+UINT32 *
+EFIAPI
+S3MmioWriteBuffer32 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT32 *Buffer
+ );
+
+/**
+ Copies data from system memory to MMIO region by using 64-bit access,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Copy data from system memory specified by Buffer to MMIO region specified
+ by starting address StartAddress by using 64-bit access. The total number
+ of bytes to be copied is specified by Length. Buffer is returned.
+
+ If StartAddress is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS - StartAddress + 1), then ASSERT().
+ If Length is greater than (MAX_ADDRESS -Buffer + 1), then ASSERT().
+
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param[in] StartAddress Starting address for the MMIO region to be copied to.
+ @param[in] Length Size in bytes of the copy.
+ @param[in] Buffer Pointer to a system memory buffer containing the data to write.
+
+ @return Buffer.
+
+**/
+UINT64 *
+EFIAPI
+S3MmioWriteBuffer64 (
+ IN UINTN StartAddress,
+ IN UINTN Length,
+ IN CONST UINT64 *Buffer
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/S3PciLib.h b/MdePkg/Include/Library/S3PciLib.h new file mode 100644 index 0000000000..72b6e26e38 --- /dev/null +++ b/MdePkg/Include/Library/S3PciLib.h @@ -0,0 +1,1037 @@ +/** @file
+ The PCI configuration Library Services that carry out PCI configuration and enable
+ the PCI operations to be replayed during an S3 resume. This library class
+ maps directly on top of the PciLib class.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions
+ of the BSD License which accompanies this distribution. The
+ full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __S3_PCI_LIB_H__
+#define __S3_PCI_LIB_H__
+
+/**
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+ address that can be passed to the S3 PCI Library functions.
+
+ @param Bus The PCI Bus number. Range 0..255.
+ @param Device The PCI Device number. Range 0..31.
+ @param Function The PCI Function number. Range 0..7.
+ @param Register The PCI Register number. Range 0..255 for PCI. Range 0..4095
+ for PCI Express.
+
+ @return The encoded PCI address.
+
+**/
+#define S3_PCI_LIB_ADDRESS(Bus,Device,Function,Register) \
+ (((Register) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+
+/**
+
+ Reads and returns the 8-bit PCI configuration register specified by Address,
+ and saves the value in the S3 script to be replayed on S3 resume.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The value read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit PCI configuration register, and saves the value in the S3
+ script to be replayed on S3 resume.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
+
+/**
+ Performs a bitwise OR of an 8-bit PCI configuration register with
+ an 8-bit value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise OR with another 8-bit value, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port, and saves the value
+ in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit Address, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 8-bit port, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+S3PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit PCI configuration register, and saves the value in the S3
+ script to be replayed on S3 resume.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit PCI configuration register, and saves the value in the S3
+ script to be replayed on S3 resume.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Performs a bitwise OR of a 16-bit PCI configuration register with
+ a 16-bit value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise OR with another 16-bit value, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port, and saves the value
+ in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit Address, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 16-bit port, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+S3PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit PCI configuration register, and saves the value in the S3
+ script to be replayed on S3 resume.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit PCI configuration register, and saves the value in the S3
+ script to be replayed on S3 resume.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Performs a bitwise OR of a 32-bit PCI configuration register with
+ a 32-bit value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise OR with another 32-bit value, and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param[in] Address The address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to read.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register, and saves the value in
+ the S3 script to be replayed on S3 resume.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port, and saves the value
+ in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register and
+ saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit Address, performs a bitwise AND followed by a
+ bitwise OR, and writes the result back to the bit field in the
+ 32-bit port, and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than StartBit, then ASSERT().
+
+ @param[in] Address The PCI configuration register to write.
+ @param[in] StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param[in] EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param[in] AndData The value to AND with the PCI configuration register.
+ @param[in] OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+S3PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer,
+ and saves the value in the S3 script to be replayed on S3 resume.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param[in] StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param[in] Size Size in bytes of the transfer.
+ @param[out] Buffer The pointer to a buffer receiving the data read.
+
+ @return Size.
+
+**/
+UINTN
+EFIAPI
+S3PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ );
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space, and saves the value in the S3 script to be replayed on S3
+ resume.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If Size > 0 and Buffer is NULL, then ASSERT().
+
+ @param[in] StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param[in] Size Size in bytes of the transfer.
+ @param[in] Buffer The pointer to a buffer containing the data to write.
+
+ @return Size.
+
+**/
+UINTN
+EFIAPI
+S3PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/S3SmbusLib.h b/MdePkg/Include/Library/S3SmbusLib.h new file mode 100644 index 0000000000..f7a1e248f7 --- /dev/null +++ b/MdePkg/Include/Library/S3SmbusLib.h @@ -0,0 +1,455 @@ +/** @file
+ Smbus Library Services that conduct SMBus transactions and enable the operatation
+ to be replayed during an S3 resume. This library class maps directly on top
+ of the SmbusLib class.
+
+ Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions
+ of the BSD License which accompanies this distribution. The
+ full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __S3_SMBUS_LIB_H__
+#define __S3_SMBUS_LIB_H__
+
+/**
+ Executes an SMBUS quick read command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+**/
+VOID
+EFIAPI
+S3SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS quick write command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+**/
+VOID
+EFIAPI
+S3SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS receive byte command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ The byte received from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The byte received from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+S3SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS send byte command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
+ The byte specified by Value is sent.
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[in] Value The 8-bit value to send.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus errors (collisions).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+S3SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS read data byte command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 8-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+S3SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS write data byte command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
+ The 8-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[in] Value The 8-bit value to write.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+S3SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS read data word command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT16
+EFIAPI
+S3SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS write data word command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[in] Value The 16-bit value to write.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+S3SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS process call command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value returned by the process call command is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[in] Value The 16-bit value to write.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The 16-bit value returned by the process call command.
+
+**/
+UINT16
+EFIAPI
+S3SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS read block command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Bytes are read from the SMBUS and stored in Buffer.
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Buffer The pointer to the buffer to store the bytes read from the SMBUS.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_SUCCESS The SMBUS command was executed.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The number of bytes read.
+
+**/
+UINTN
+EFIAPI
+S3SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS write block command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from Buffer.
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[out] Buffer The pointer to the buffer to store the bytes read from the SMBUS.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+S3SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+/**
+ Executes an SMBUS block process call command, and saves the value in the S3 script to be replayed
+ on S3 resume.
+
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If WriteBuffer is NULL, then ASSERT().
+ If ReadBuffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param[in] SmBusAddress The address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param[in] WriteBuffer The pointer to the buffer of bytes to write to the SMBUS.
+ @param[out] ReadBuffer The pointer to the buffer of bytes to read from the SMBUS.
+ @param[out] Status The return status for the executed command.
+ This is an optional parameter and may be NULL.
+ RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ RETURN_DEVICE_ERROR The request was not completed because a failure
+ was recorded in the Host Status Register bit. Device errors are a result
+ of a transaction collision, illegal command field, unclaimed cycle
+ (host initiated), or bus error (collision).
+ RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect).
+ RETURN_UNSUPPORTED The SMBus operation is not supported.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+S3SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ IN VOID *WriteBuffer,
+ OUT VOID *ReadBuffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/S3StallLib.h b/MdePkg/Include/Library/S3StallLib.h new file mode 100644 index 0000000000..5fd55e16fe --- /dev/null +++ b/MdePkg/Include/Library/S3StallLib.h @@ -0,0 +1,39 @@ +/** @file
+ Stall Services that perform stalls and also enable the Stall operatation
+ to be replayed during an S3 resume. This library class maps directly on top
+ of the Timer class.
+
+ Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions
+ of the BSD License which accompanies this distribution. The
+ full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __S3_STALL_LIB_H__
+#define __S3_STALL_LIB_H__
+
+/**
+ Stalls the CPU for at least the given number of microseconds and saves
+ the value in the S3 script to be replayed on S3 resume.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param[in] MicroSeconds The minimum number of microseconds to delay.
+
+ @return MicroSeconds.
+
+**/
+UINTN
+EFIAPI
+S3Stall (
+ IN UINTN MicroSeconds
+ );
+
+#endif
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