Add comments for most of enum data type.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6924 6f19259b-4bc3-4df7-8a09-765794883524

1 files changed, 34 insertions, 0 deletions

diff --git a/MdePkg/Include/Protocol/PciRootBridgeIo.h b/MdePkg/Include/Protocol/PciRootBridgeIo.h
index 4435ae506f..a563f94aef 100644
--- a/MdePkg/Include/Protocol/PciRootBridgeIo.h
+++ b/MdePkg/Include/Protocol/PciRootBridgeIo.h
@@ -26,6 +26,11 @@
 

 typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;

 

+///

+/// *******************************************************

+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH

+/// *******************************************************

+///

 typedef enum {

   EfiPciWidthUint8,

   EfiPciWidthUint16,

@@ -42,12 +47,41 @@ typedef enum {
   EfiPciWidthMaximum

 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;

 

+///

+/// *******************************************************

+/// EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION

+/// *******************************************************

+///

 typedef enum {

+  ///

+  /// A read operation from system memory by a bus master that is not capable of producing

+  /// PCI dual address cycles.

+  ///

   EfiPciOperationBusMasterRead,

+  ///

+  /// A write operation from system memory by a bus master that is not capable of producing

+  /// PCI dual address cycles.

+  ///

   EfiPciOperationBusMasterWrite,

+  ///

+  /// Provides both read and write access to system memory by both the processor and a bus

+  /// master that is not capable of producing PCI dual address cycles.

+  ///

   EfiPciOperationBusMasterCommonBuffer,

+  ///

+  /// A read operation from system memory by a bus master that is capable of producing PCI

+  /// dual address cycles.

+  ///

   EfiPciOperationBusMasterRead64,

+  ///

+  /// A write operation to system memory by a bus master that is capable of producing PCI

+  /// dual address cycles.

+  ///

   EfiPciOperationBusMasterWrite64,

+  ///

+  /// Provides both read and write access to system memory by both the processor and a bus

+  /// master that is capable of producing PCI dual address cycles.

+  ///

   EfiPciOperationBusMasterCommonBuffer64,

   EfiPciOperationMaximum

 } EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;