diff options
| author | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
|---|---|---|
| committer | bbahnsen <bbahnsen@6f19259b-4bc3-4df7-8a09-765794883524> | 2006-04-21 22:54:32 +0000 |
| commit | 878ddf1fc3540a715f63594ed22b6929e881afb4 (patch) | |
| tree | c56c44dac138137b510e1fba7c3efe5e4d84bea2 /MdePkg/Include | |
| download | edk2-platforms-878ddf1fc3540a715f63594ed22b6929e881afb4.tar.xz | |
Initial import.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Include')
239 files changed, 60240 insertions, 0 deletions
diff --git a/MdePkg/Include/Base.h b/MdePkg/Include/Base.h new file mode 100644 index 0000000000..99ed686644 --- /dev/null +++ b/MdePkg/Include/Base.h @@ -0,0 +1,28 @@ +/** @file
+
+ Root include file for Mde Package Base type modules
+
+ This is the include file for any module of type base. Base modules only use
+ types defined via this include file and can be ported easily to any
+ environment. There are a set of base libraries in the Mde Package that can
+ be used to implement base modules.
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __BASE_H__
+#define __BASE_H__
+
+#include <Common/BaseTypes.h>
+#include <Common/EfiImage.h>
+
+#endif
diff --git a/MdePkg/Include/Common/BaseTypes.h b/MdePkg/Include/Common/BaseTypes.h new file mode 100644 index 0000000000..86c3c71fb3 --- /dev/null +++ b/MdePkg/Include/Common/BaseTypes.h @@ -0,0 +1,206 @@ +/** @file
+ Processor or Compiler specific defines for all supported processors.
+
+ This file is stand alone self consistent set of definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseTypes.h
+
+**/
+
+#ifndef __BASE_TYPES_H__
+#define __BASE_TYPES_H__
+
+//
+// Include processor specific binding
+//
+#include <ProcessorBind.h>
+
+#define MEMORY_FENCE() MemoryFence ()
+#define BREAKPOINT() CpuBreakpoint ()
+#define DEADLOOP() CpuDeadLoop ()
+
+typedef struct {
+ UINT32 Data1;
+ UINT16 Data2;
+ UINT16 Data3;
+ UINT8 Data4[8];
+} GUID;
+
+
+//
+// Modifiers to absract standard types to aid in debug of problems
+//
+#define CONST const
+#define STATIC static
+#define VOID void
+
+//
+// Modifiers for Data Types used to self document code.
+// This concept is borrowed for UEFI specification.
+//
+#ifndef IN
+//
+// Some other envirnments use this construct, so #ifndef to prevent
+// mulitple definition.
+//
+#define IN
+#define OUT
+#define OPTIONAL
+#endif
+
+//
+// Constants. They may exist in other build structures, so #ifndef them.
+//
+#ifndef TRUE
+//
+// BugBug: UEFI specification claims 1 and 0. We are concerned about the
+// complier portability so we did it this way.
+//
+#define TRUE ((BOOLEAN)(1==1))
+#endif
+
+#ifndef FALSE
+#define FALSE ((BOOLEAN)(0==1))
+#endif
+
+#ifndef NULL
+#define NULL ((VOID *) 0)
+#endif
+
+//
+// Support for variable length argument lists using the ANSI standard.
+//
+// Since we are using the ANSI standard we used the standard nameing and
+// did not folow the coding convention
+//
+// VA_LIST - typedef for argument list.
+// VA_START (VA_LIST Marker, argument before the ...) - Init Marker for use.
+// VA_END (VA_LIST Marker) - Clear Marker
+// VA_ARG (VA_LIST Marker, var arg size) - Use Marker to get an argumnet from
+// the ... list. You must know the size and pass it in this macro.
+//
+// example:
+//
+// UINTN
+// ExampleVarArg (
+// IN UINTN NumberOfArgs,
+// ...
+// )
+// {
+// VA_LIST Marker;
+// UINTN Index;
+// UINTN Result;
+//
+// //
+// // Initialize the Marker
+// //
+// VA_START (Marker, NumberOfArgs);
+// for (Index = 0, Result = 0; Index < NumberOfArgs; Index++) {
+// //
+// // The ... list is a series of UINTN values, so average them up.
+// //
+// Result += VA_ARG (Marker, UINTN);
+// }
+//
+// VA_END (Marker);
+// return Result
+// }
+//
+
+#define _INT_SIZE_OF(n) ((sizeof (n) + sizeof (UINTN) - 1) &~(sizeof (UINTN) - 1))
+
+//
+// Also support coding convention rules for var arg macros
+//
+#ifndef VA_START
+
+typedef CHAR8 *VA_LIST;
+#define VA_START(ap, v) (ap = (VA_LIST) & (v) + _INT_SIZE_OF (v))
+#define VA_ARG(ap, t) (*(t *) ((ap += _INT_SIZE_OF (t)) - _INT_SIZE_OF (t)))
+#define VA_END(ap) (ap = (VA_LIST) 0)
+
+#endif
+
+///
+/// CONTAINING_RECORD - returns a pointer to the structure
+/// from one of it's elements.
+///
+#define _CR(Record, TYPE, Field) ((TYPE *) ((CHAR8 *) (Record) - (CHAR8 *) &(((TYPE *) 0)->Field)))
+
+///
+/// ALIGN_POINTER - aligns a pointer to the lowest boundry
+///
+#define ALIGN_POINTER(p, s) ((VOID *) ((p) + (((s) - ((UINTN) (p))) & ((s) - 1))))
+
+///
+/// ALIGN_VARIABLE - aligns a variable up to the next natural boundry for int size of a processor
+///
+#define ALIGN_VARIABLE(Value, Adjustment) \
+ Adjustment = 0U; \
+ if ((UINTN) (Value) % sizeof (UINTN)) { \
+ (Adjustment) = (UINTN)(sizeof (UINTN) - ((UINTN) (Value) % sizeof (UINTN))); \
+ } \
+ (Value) = (UINTN)((UINTN) (Value) + (UINTN) (Adjustment))
+
+//
+// EFI Error Codes common to all execution phases
+//
+
+typedef INTN RETURN_STATUS;
+
+///
+/// Set the upper bit to indicate EFI Error.
+///
+#define ENCODE_ERROR(a) (MAX_BIT | (a))
+
+#define ENCODE_WARNING(a) (a)
+#define RETURN_ERROR(a) ((a) < 0)
+
+#define RETURN_SUCCESS 0
+#define RETURN_LOAD_ERROR ENCODE_ERROR (1)
+#define RETURN_INVALID_PARAMETER ENCODE_ERROR (2)
+#define RETURN_UNSUPPORTED ENCODE_ERROR (3)
+#define RETURN_BAD_BUFFER_SIZE ENCODE_ERROR (4)
+#define RETURN_BUFFER_TOO_SMALL ENCODE_ERROR (5)
+#define RETURN_NOT_READY ENCODE_ERROR (6)
+#define RETURN_DEVICE_ERROR ENCODE_ERROR (7)
+#define RETURN_WRITE_PROTECTED ENCODE_ERROR (8)
+#define RETURN_OUT_OF_RESOURCES ENCODE_ERROR (9)
+#define RETURN_VOLUME_CORRUPTED ENCODE_ERROR (10)
+#define RETURN_VOLUME_FULL ENCODE_ERROR (11)
+#define RETURN_NO_MEDIA ENCODE_ERROR (12)
+#define RETURN_MEDIA_CHANGED ENCODE_ERROR (13)
+#define RETURN_NOT_FOUND ENCODE_ERROR (14)
+#define RETURN_ACCESS_DENIED ENCODE_ERROR (15)
+#define RETURN_NO_RESPONSE ENCODE_ERROR (16)
+#define RETURN_NO_MAPPING ENCODE_ERROR (17)
+#define RETURN_TIMEOUT ENCODE_ERROR (18)
+#define RETURN_NOT_STARTED ENCODE_ERROR (19)
+#define RETURN_ALREADY_STARTED ENCODE_ERROR (20)
+#define RETURN_ABORTED ENCODE_ERROR (21)
+#define RETURN_ICMP_ERROR ENCODE_ERROR (22)
+#define RETURN_TFTP_ERROR ENCODE_ERROR (23)
+#define RETURN_PROTOCOL_ERROR ENCODE_ERROR (24)
+#define RETURN_INCOMPATIBLE_VERSION ENCODE_ERROR (25)
+#define RETURN_SECURITY_VIOLATION ENCODE_ERROR (26)
+#define RETURN_CRC_ERROR ENCODE_ERROR (27)
+#define RETURN_END_OF_MEDIA ENCODE_ERROR (28)
+#define RETURN_END_OF_FILE ENCODE_ERROR (31)
+
+#define RETURN_WARN_UNKNOWN_GLYPH ENCODE_WARNING (1)
+#define RETURN_WARN_DELETE_FAILURE ENCODE_WARNING (2)
+#define RETURN_WARN_WRITE_FAILURE ENCODE_WARNING (3)
+#define RETURN_WARN_BUFFER_TOO_SMALL ENCODE_WARNING (4)
+
+typedef UINT64 PHYSICAL_ADDRESS;
+
+#endif
diff --git a/MdePkg/Include/Common/BootMode.h b/MdePkg/Include/Common/BootMode.h new file mode 100644 index 0000000000..2f2c516d10 --- /dev/null +++ b/MdePkg/Include/Common/BootMode.h @@ -0,0 +1,37 @@ +/** @file
+ This includes for the Boot mode information.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootMode.h
+
+ @par Revision Reference:
+ These definitions are from PeiCis 0.91 spec.
+
+**/
+
+#ifndef __EFI_BOOT_MODE_H__
+#define __EFI_BOOT_MODE_H__
+
+#define BOOT_WITH_FULL_CONFIGURATION 0x00
+#define BOOT_WITH_MINIMAL_CONFIGURATION 0x01
+#define BOOT_ASSUMING_NO_CONFIGURATION_CHANGES 0x02
+#define BOOT_WITH_FULL_CONFIGURATION_PLUS_DIAGNOSTICS 0x03
+#define BOOT_WITH_DEFAULT_SETTINGS 0x04
+#define BOOT_ON_S4_RESUME 0x05
+#define BOOT_ON_S5_RESUME 0x06
+#define BOOT_ON_S2_RESUME 0x10
+#define BOOT_ON_S3_RESUME 0x11
+#define BOOT_ON_FLASH_UPDATE 0x12
+#define BOOT_IN_RECOVERY_MODE 0x20
+#define BOOT_IN_RECOVERY_MODE_MASK 0x40
+#define BOOT_SPECIAL_MASK 0x80
+
+#endif
diff --git a/MdePkg/Include/Common/BootScript.h b/MdePkg/Include/Common/BootScript.h new file mode 100644 index 0000000000..12bcc5bef7 --- /dev/null +++ b/MdePkg/Include/Common/BootScript.h @@ -0,0 +1,198 @@ +/** @file
+ This file declares the related BootScript definitions and some SMBus definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootScript.h
+
+ @par Revision Reference:
+ These definitions are defined in BootScript Spec 0.91 and SmBus PPI spec 0.9.
+
+**/
+
+#ifndef _EFI_SCRIPT_H_
+#define _EFI_SCRIPT_H_
+
+#define EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00
+
+//
+// Boot Script Opcode Definitions
+//
+
+#define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00
+#define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01
+#define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02
+#define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03
+#define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04
+#define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05
+#define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06
+#define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07
+#define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08
+
+#define EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA
+#define EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF
+
+//
+// EFI Boot Script Width
+//
+typedef enum {
+ EfiBootScriptWidthUint8,
+ EfiBootScriptWidthUint16,
+ EfiBootScriptWidthUint32,
+ EfiBootScriptWidthUint64,
+ EfiBootScriptWidthFifoUint8,
+ EfiBootScriptWidthFifoUint16,
+ EfiBootScriptWidthFifoUint32,
+ EfiBootScriptWidthFifoUint64,
+ EfiBootScriptWidthFillUint8,
+ EfiBootScriptWidthFillUint16,
+ EfiBootScriptWidthFillUint32,
+ EfiBootScriptWidthFillUint64,
+ EfiBootScriptWidthMaximum
+} EFI_BOOT_SCRIPT_WIDTH;
+
+//
+// EFI Smbus Device Address, Smbus Device Command, Smbus Operation
+//
+typedef struct {
+ UINTN SmbusDeviceAddress : 7;
+} EFI_SMBUS_DEVICE_ADDRESS;
+
+typedef UINTN EFI_SMBUS_DEVICE_COMMAND;
+
+typedef enum _EFI_SMBUS_OPERATION
+{
+ EfiSmbusQuickRead,
+ EfiSmbusQuickWrite,
+ EfiSmbusReceiveByte,
+ EfiSmbusSendByte,
+ EfiSmbusReadByte,
+ EfiSmbusWriteByte,
+ EfiSmbusReadWord,
+ EfiSmbusWriteWord,
+ EfiSmbusReadBlock,
+ EfiSmbusWriteBlock,
+ EfiSmbusProcessCall,
+ EfiSmbusBWBRProcessCall
+} EFI_SMBUS_OPERATION;
+
+//
+// Boot Script Opcode Header Structure Definitions
+//
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+} EFI_BOOT_SCRIPT_GENERIC_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ UINT16 Version;
+ UINT32 TableLength;
+ UINT16 Reserved[2];
+} EFI_BOOT_SCRIPT_TABLE_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+} EFI_BOOT_SCRIPT_COMMON_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINTN Count;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_IO_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_IO_READ_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINTN Count;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_MEM_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_MEM_READ_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINTN Count;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_BOOT_SCRIPT_WIDTH Width;
+ UINT64 Address;
+} EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
+ EFI_SMBUS_DEVICE_COMMAND Command;
+ EFI_SMBUS_OPERATION Operation;
+ BOOLEAN PecCheck;
+ UINTN DataSize;
+} EFI_BOOT_SCRIPT_SMBUS_EXECUTE;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ UINTN Duration;
+} EFI_BOOT_SCRIPT_STALL;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+ EFI_PHYSICAL_ADDRESS EntryPoint;
+} EFI_BOOT_SCRIPT_DISPATCH;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Length;
+} EFI_BOOT_SCRIPT_TERMINATE;
+
+typedef union {
+ EFI_BOOT_SCRIPT_GENERIC_HEADER *Header;
+ EFI_BOOT_SCRIPT_TABLE_HEADER *TableInfo;
+ EFI_BOOT_SCRIPT_IO_WRITE *IoWrite;
+ EFI_BOOT_SCRIPT_IO_READ_WRITE *IoReadWrite;
+ EFI_BOOT_SCRIPT_MEM_WRITE *MemWrite;
+ EFI_BOOT_SCRIPT_MEM_READ_WRITE *MemReadWrite;
+ EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE *PciWrite;
+ EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE *PciReadWrite;
+ EFI_BOOT_SCRIPT_SMBUS_EXECUTE *SmbusExecute;
+ EFI_BOOT_SCRIPT_STALL *Stall;
+ EFI_BOOT_SCRIPT_DISPATCH *Dispatch;
+ EFI_BOOT_SCRIPT_TERMINATE *Terminate;
+ EFI_BOOT_SCRIPT_COMMON_HEADER *CommonHeader;
+ UINT8 *Raw;
+} BOOT_SCRIPT_POINTERS;
+
+#endif
diff --git a/MdePkg/Include/Common/Capsule.h b/MdePkg/Include/Common/Capsule.h new file mode 100644 index 0000000000..0434fdf7f2 --- /dev/null +++ b/MdePkg/Include/Common/Capsule.h @@ -0,0 +1,67 @@ +/** @file
+ Defines for the EFI Capsule functionality.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Capsule.h
+
+ @par Revision Reference:
+ These definitions are from Capsule Spec Version 0.9.
+
+**/
+
+#ifndef _EFI_CAPSULE_H_
+#define _EFI_CAPSULE_H_
+
+//
+// Bits in the flags field of the capsule header
+//
+#define EFI_CAPSULE_HEADER_FLAG_SETUP 0x00000001 // supports setup changes
+
+
+#define CAPSULE_BLOCK_DESCRIPTOR_SIGNATURE EFI_SIGNATURE_32 ('C', 'B', 'D', 'S')
+
+//
+// An array of these describe the blocks that make up a capsule for
+// a capsule update.
+//
+typedef struct {
+ UINT64 Length; // length of the data block
+ EFI_PHYSICAL_ADDRESS Data; // physical address of the data block
+ UINT32 Signature; // CBDS
+ UINT32 CheckSum; // to sum this structure to 0
+} EFI_CAPSULE_BLOCK_DESCRIPTOR;
+
+typedef struct {
+ EFI_GUID OemGuid;
+ UINT32 HeaderSize;
+ //
+ // UINT8 OemHdrData[];
+ //
+} EFI_CAPSULE_OEM_HEADER;
+
+typedef struct {
+ EFI_GUID CapsuleGuid;
+ UINT32 HeaderSize;
+ UINT32 Flags;
+ UINT32 CapsuleImageSize;
+ UINT32 SequenceNumber;
+ EFI_GUID InstanceId;
+ UINT32 OffsetToSplitInformation;
+ UINT32 OffsetToCapsuleBody;
+ UINT32 OffsetToOemDefinedHeader;
+ UINT32 OffsetToAuthorInformation;
+ UINT32 OffsetToRevisionInformation;
+ UINT32 OffsetToShortDescription;
+ UINT32 OffsetToLongDescription;
+ UINT32 OffsetToApplicableDevices;
+} EFI_CAPSULE_HEADER;
+
+#endif // #ifndef _EFI_CAPSULE_H_
diff --git a/MdePkg/Include/Common/DataHubRecords.h b/MdePkg/Include/Common/DataHubRecords.h new file mode 100644 index 0000000000..0bc8f23d75 --- /dev/null +++ b/MdePkg/Include/Common/DataHubRecords.h @@ -0,0 +1,1847 @@ +/** @file
+ This file defines GUIDs and associated data structures for records
+ posted to the Data Hub.
+ The producers of these records use these definitions to construct
+ records.
+ The consumers of these records use these definitions to retrieve,
+ filter and parse records.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHubRecords.h
+
+ @par Revision Reference:
+ DataHubRecord.h include all data hub sub class defitions from Cache subclass
+ spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9, Processor
+ Subclass spec 0.9,Misc SubClass spec 0.9.
+
+**/
+
+#ifndef _DATAHUB_RECORDS_H_
+#define _DATAHUB_RECORDS_H_
+
+#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000
+
+
+#pragma pack(1)
+
+typedef struct _USB_PORT_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} USB_PORT_DEVICE_PATH;
+
+//
+// IDE
+//
+typedef struct _IDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} IDE_DEVICE_PATH;
+
+//
+// RMC Connector
+//
+typedef struct _RMC_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RMC_CONN_DEVICE_PATH;
+
+//
+// RIDE
+//
+typedef struct _RIDE_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} RIDE_DEVICE_PATH;
+
+//
+// Gigabit NIC
+//
+typedef struct _GB_NIC_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH PciBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBridgeDevicePath;
+ PCI_DEVICE_PATH PciXBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} GB_NIC_DEVICE_PATH;
+
+//
+// P/S2 Connector
+//
+typedef struct _PS2_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PS2_CONN_DEVICE_PATH;
+
+//
+// Serial Port Connector
+//
+typedef struct _SERIAL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} SERIAL_CONN_DEVICE_PATH;
+
+//
+// Parallel Port Connector
+//
+typedef struct _PARALLEL_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} PARALLEL_CONN_DEVICE_PATH;
+
+//
+// Floopy Connector
+//
+typedef struct _FLOOPY_CONN_DEVICE_PATH {
+ ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;
+ PCI_DEVICE_PATH LpcBridgeDevicePath;
+ ACPI_HID_DEVICE_PATH LpcBusDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL EndDevicePath;
+} FLOOPY_CONN_DEVICE_PATH;
+
+typedef union _EFI_MISC_PORT_DEVICE_PATH {
+ USB_PORT_DEVICE_PATH UsbDevicePath;
+ IDE_DEVICE_PATH IdeDevicePath;
+ RMC_CONN_DEVICE_PATH RmcConnDevicePath;
+ RIDE_DEVICE_PATH RideDevicePath;
+ GB_NIC_DEVICE_PATH GbNicDevicePath;
+ PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;
+ SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;
+ PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;
+ FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;
+} EFI_MISC_PORT_DEVICE_PATH;
+
+#pragma pack()
+
+//
+// String Token Definition
+//
+#define EFI_STRING_TOKEN UINT16
+
+typedef struct {
+ UINT32 Version;
+ UINT32 HeaderSize;
+ UINT16 Instance;
+ UINT16 SubInstance;
+ UINT32 RecordType;
+} EFI_SUBCLASS_TYPE1_HEADER;
+
+typedef struct {
+ EFI_GUID ProducerName;
+ UINT16 Instance;
+ UINT16 SubInstance;
+} EFI_INTER_LINK_DATA;
+
+
+//
+// EXP data
+//
+
+typedef struct {
+ UINT16 Value;
+ UINT16 Exponent;
+} EFI_EXP_BASE2_DATA;
+
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;
+
+typedef struct {
+ UINT32 ProcessorSteppingId:4;
+ UINT32 ProcessorModel: 4;
+ UINT32 ProcessorFamily: 4;
+ UINT32 ProcessorType: 2;
+ UINT32 ProcessorReserved1: 2;
+ UINT32 ProcessorXModel: 4;
+ UINT32 ProcessorXFamily: 8;
+ UINT32 ProcessorReserved2: 4;
+} EFI_PROCESSOR_SIGNATURE;
+
+typedef struct {
+ UINT32 ProcessorBrandIndex :8;
+ UINT32 ProcessorClflush :8;
+ UINT32 ProcessorReserved :8;
+ UINT32 ProcessorDfltApicId :8;
+} EFI_PROCESSOR_MISC_INFO;
+
+typedef struct {
+ UINT32 ProcessorFpu: 1;
+ UINT32 ProcessorVme: 1;
+ UINT32 ProcessorDe: 1;
+ UINT32 ProcessorPse: 1;
+ UINT32 ProcessorTsc: 1;
+ UINT32 ProcessorMsr: 1;
+ UINT32 ProcessorPae: 1;
+ UINT32 ProcessorMce: 1;
+ UINT32 ProcessorCx8: 1;
+ UINT32 ProcessorApic: 1;
+ UINT32 ProcessorReserved1: 1;
+ UINT32 ProcessorSep: 1;
+ UINT32 ProcessorMtrr: 1;
+ UINT32 ProcessorPge: 1;
+ UINT32 ProcessorMca: 1;
+ UINT32 ProcessorCmov: 1;
+ UINT32 ProcessorPat: 1;
+ UINT32 ProcessorPse36: 1;
+ UINT32 ProcessorPsn: 1;
+ UINT32 ProcessorClfsh: 1;
+ UINT32 ProcessorReserved2: 1;
+ UINT32 ProcessorDs: 1;
+ UINT32 ProcessorAcpi: 1;
+ UINT32 ProcessorMmx: 1;
+ UINT32 ProcessorFxsr: 1;
+ UINT32 ProcessorSse: 1;
+ UINT32 ProcessorSse2: 1;
+ UINT32 ProcessorSs: 1;
+ UINT32 ProcessorReserved3: 1;
+ UINT32 ProcessorTm: 1;
+ UINT32 ProcessorReserved4: 2;
+} EFI_PROCESSOR_FEATURE_FLAGS;
+
+typedef struct {
+ EFI_PROCESSOR_SIGNATURE Signature;
+ EFI_PROCESSOR_MISC_INFO MiscInfo;
+ UINT32 Reserved;
+ EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;
+} EFI_PROCESSOR_ID_DATA;
+
+typedef enum {
+ EfiProcessorOther = 1,
+ EfiProcessorUnknown = 2,
+ EfiCentralProcessor = 3,
+ EfiMathProcessor = 4,
+ EfiDspProcessor = 5,
+ EfiVideoProcessor = 6
+} EFI_PROCESSOR_TYPE_DATA;
+
+typedef enum {
+ EfiProcessorFamilyOther = 1,
+ EfiProcessorFamilyUnknown = 2,
+ EfiProcessorFamily8086 = 3,
+ EfiProcessorFamily80286 = 4,
+ EfiProcessorFamilyIntel386 = 5,
+ EfiProcessorFamilyIntel486 = 6,
+ EfiProcessorFamily8087 = 7,
+ EfiProcessorFamily80287 = 8,
+ EfiProcessorFamily80387 = 9,
+ EfiProcessorFamily80487 = 0x0A,
+ EfiProcessorFamilyPentium = 0x0B,
+ EfiProcessorFamilyPentiumPro = 0x0C,
+ EfiProcessorFamilyPentiumII = 0x0D,
+ EfiProcessorFamilyPentiumMMX = 0x0E,
+ EfiProcessorFamilyCeleron = 0x0F,
+ EfiProcessorFamilyPentiumIIXeon = 0x10,
+ EfiProcessorFamilyPentiumIII = 0x11,
+ EfiProcessorFamilyM1 = 0x12,
+ EfiProcessorFamilyM1Reserved1 = 0x13,
+ EfiProcessorFamilyM1Reserved2 = 0x14,
+ EfiProcessorFamilyM1Reserved3 = 0x15,
+ EfiProcessorFamilyM1Reserved4 = 0x16,
+ EfiProcessorFamilyM1Reserved5 = 0x17,
+ EfiProcessorFamilyM1Reserved6 = 0x18,
+ EfiProcessorFamilyK5 = 0x19,
+ EfiProcessorFamilyK5Reserved1 = 0x1A,
+ EfiProcessorFamilyK5Reserved2 = 0x1B,
+ EfiProcessorFamilyK5Reserved3 = 0x1C,
+ EfiProcessorFamilyK5Reserved4 = 0x1D,
+ EfiProcessorFamilyK5Reserved5 = 0x1E,
+ EfiProcessorFamilyK5Reserved6 = 0x1F,
+ EfiProcessorFamilyPowerPC = 0x20,
+ EfiProcessorFamilyPowerPC601 = 0x21,
+ EfiProcessorFamilyPowerPC603 = 0x22,
+ EfiProcessorFamilyPowerPC603Plus = 0x23,
+ EfiProcessorFamilyPowerPC604 = 0x24,
+ EfiProcessorFamilyAlpha2 = 0x30,
+ EfiProcessorFamilyMips = 0x40,
+ EfiProcessorFamilySparc = 0x50,
+ EfiProcessorFamily68040 = 0x60,
+ EfiProcessorFamily68xxx = 0x61,
+ EfiProcessorFamily68000 = 0x62,
+ EfiProcessorFamily68010 = 0x63,
+ EfiProcessorFamily68020 = 0x64,
+ EfiProcessorFamily68030 = 0x65,
+ EfiProcessorFamilyHobbit = 0x70,
+ EfiProcessorFamilyWeitek = 0x80,
+ EfiProcessorFamilyPARISC = 0x90,
+ EfiProcessorFamilyV30 = 0xA0,
+ EfiProcessorFamilyPentiumIIIXeon = 0xB0,
+ EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,
+ EfiProcessorFamilyPentium4 = 0xB2,
+ EfiProcessorFamilyIntelXeon = 0xB3,
+ EfiProcessorFamilyAS400 = 0xB4,
+ EfiProcessorFamilyIntelXeonMP = 0xB5,
+ EfiProcessorFamilyAMDAthlonXP = 0xB6,
+ EfiProcessorFamilyAMDAthlonMP = 0xB7,
+ EfiProcessorFamilyIBM390 = 0xC8,
+ EfiProcessorFamilyG4 = 0xC9,
+ EfiProcessorFamilyG5 = 0xCA,
+ EfiProcessorFamilyi860 = 0xFA,
+ EfiProcessorFamilyi960 = 0xFB
+} EFI_PROCESSOR_FAMILY_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;
+
+typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;
+
+typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;
+
+typedef enum {
+ EfiProcessorIa32Microcode = 1,
+ EfiProcessorIpfPalAMicrocode = 2,
+ EfiProcessorIpfPalBMicrocode = 3
+} EFI_PROCESSOR_MICROCODE_TYPE;
+
+typedef struct {
+ EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;
+ UINT32 ProcessorMicrocodeRevisionNumber;
+} EFI_PROCESSOR_MICROCODE_REVISION_DATA;
+
+typedef struct {
+ UINT32 CpuStatus :3;
+ UINT32 Reserved1 :3;
+ UINT32 SocketPopulated :1;
+ UINT32 Reserved2 :1;
+ UINT32 ApicEnable :1;
+ UINT32 BootApplicationProcessor :1;
+ UINT32 Reserved3 :22;
+} EFI_PROCESSOR_STATUS_DATA;
+
+typedef enum {
+ EfiCpuStatusUnknown = 0,
+ EfiCpuStatusEnabled = 1,
+ EfiCpuStatusDisabledByUser = 2,
+ EfiCpuStatusDisabledbyBios = 3,
+ EfiCpuStatusIdle = 4,
+ EfiCpuStatusOther = 7
+} EFI_CPU_STATUS;
+
+typedef enum {
+ EfiProcessorSocketOther = 1,
+ EfiProcessorSocketUnknown = 2,
+ EfiProcessorSocketDaughterBoard = 3,
+ EfiProcessorSocketZIF = 4,
+ EfiProcessorSocketReplacePiggyBack = 5,
+ EfiProcessorSocketNone = 6,
+ EfiProcessorSocketLIF = 7,
+ EfiProcessorSocketSlot1 = 8,
+ EfiProcessorSocketSlot2 = 9,
+ EfiProcessorSocket370Pin = 0xA,
+ EfiProcessorSocketSlotA = 0xB,
+ EfiProcessorSocketSlotM = 0xC,
+ EfiProcessorSocket423 = 0xD,
+ EfiProcessorSocketA462 = 0xE,
+ EfiProcessorSocket478 = 0xF,
+ EfiProcessorSocket754 = 0x10,
+ EfiProcessorSocket940 = 0x11,
+ EfiProcessorSocketLG775 = 0x12
+
+} EFI_PROCESSOR_SOCKET_TYPE_DATA;
+
+typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;
+
+typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;
+
+typedef enum {
+ EfiProcessorHealthy = 1,
+ EfiProcessorPerfRestricted = 2,
+ EfiProcessorFuncRestricted = 3
+} EFI_PROCESSOR_HEALTH_STATUS;
+
+typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;
+
+
+typedef enum {
+ ProcessorCoreFrequencyRecordType = 1,
+ ProcessorFsbFrequencyRecordType = 2,
+ ProcessorVersionRecordType = 3,
+ ProcessorManufacturerRecordType = 4,
+ ProcessorSerialNumberRecordType = 5,
+ ProcessorIdRecordType = 6,
+ ProcessorTypeRecordType = 7,
+ ProcessorFamilyRecordType = 8,
+ ProcessorVoltageRecordType = 9,
+ ProcessorApicBaseAddressRecordType = 10,
+ ProcessorApicIdRecordType = 11,
+ ProcessorApicVersionNumberRecordType = 12,
+ CpuUcodeRevisionDataRecordType = 13,
+ ProcessorStatusRecordType = 14,
+ ProcessorSocketTypeRecordType = 15,
+ ProcessorSocketNameRecordType = 16,
+ CacheAssociationRecordType = 17,
+ ProcessorMaxCoreFrequencyRecordType = 18,
+ ProcessorAssetTagRecordType = 19,
+ ProcessorMaxFsbFrequencyRecordType = 20,
+ ProcessorPackageNumberRecordType = 21,
+ ProcessorCoreFrequencyListRecordType = 22,
+ ProcessorFsbFrequencyListRecordType = 23,
+ ProcessorHealthStatusRecordType = 24
+} EFI_CPU_VARIABLE_RECORD_TYPE;
+
+typedef union {
+ EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;
+ EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;
+ EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;
+ EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;
+ EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;
+ EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;
+ EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;
+ EFI_PROCESSOR_VERSION_DATA ProcessorVersion;
+ EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;
+ EFI_PROCESSOR_ID_DATA ProcessorId;
+ EFI_PROCESSOR_TYPE_DATA ProcessorType;
+ EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;
+ EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;
+ EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;
+ EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;
+ EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;
+ EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;
+ EFI_PROCESSOR_STATUS_DATA ProcessorStatus;
+ EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;
+ EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;
+ EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;
+ EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;
+ EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;
+} EFI_CPU_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CPU_VARIABLE_RECORD VariableRecord;
+} EFI_CPU_DATA_RECORD;
+
+#define EFI_CACHE_SUBCLASS_VERSION 0x00010000
+
+
+typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;
+
+typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;
+
+typedef STRING_REF EFI_CACHE_SOCKET_DATA;
+
+typedef struct {
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 NonBurst :1;
+ UINT32 Burst :1;
+ UINT32 PipelineBurst :1;
+ UINT32 Asynchronous :1;
+ UINT32 Synchronous :1;
+ UINT32 Reserved :25;
+} EFI_CACHE_SRAM_TYPE_DATA;
+
+typedef enum {
+ EfiCacheErrorOther = 1,
+ EfiCacheErrorUnknown = 2,
+ EfiCacheErrorNone = 3,
+ EfiCacheErrorParity = 4,
+ EfiCacheErrorSingleBit = 5,
+ EfiCacheErrorMultiBit = 6
+} EFI_CACHE_ERROR_TYPE_DATA;
+
+typedef enum {
+ EfiCacheTypeOther = 1,
+ EfiCacheTypeUnknown = 2,
+ EfiCacheTypeInstruction = 3,
+ EfiCacheTypeData = 4,
+ EfiCacheTypeUnified = 5
+} EFI_CACHE_TYPE_DATA;
+
+typedef enum {
+ EfiCacheAssociativityOther = 1,
+ EfiCacheAssociativityUnknown = 2,
+ EfiCacheAssociativityDirectMapped = 3,
+ EfiCacheAssociativity2Way = 4,
+ EfiCacheAssociativity4Way = 5,
+ EfiCacheAssociativityFully = 6,
+ EfiCacheAssociativity8Way = 7,
+ EfiCacheAssociativity16Way = 8
+} EFI_CACHE_ASSOCIATIVITY_DATA;
+
+typedef struct {
+ UINT32 Level :3;
+ UINT32 Socketed :1;
+ UINT32 Reserved2 :1;
+ UINT32 Location :2;
+ UINT32 Enable :1;
+ UINT32 OperationalMode :2;
+ UINT32 Reserved1 :22;
+} EFI_CACHE_CONFIGURATION_DATA;
+
+#define EFI_CACHE_L1 1
+#define EFI_CACHE_L2 2
+#define EFI_CACHE_L3 3
+#define EFI_CACHE_L4 4
+#define EFI_CACHE_LMAX EFI_CACHE_L4
+
+#define EFI_CACHE_SOCKETED 1
+#define EFI_CACHE_NOT_SOCKETED 0
+
+typedef enum {
+ EfiCacheInternal = 0,
+ EfiCacheExternal = 1,
+ EfiCacheReserved = 2,
+ EfiCacheUnknown = 3
+} EFI_CACHE_LOCATION;
+
+#define EFI_CACHE_ENABLED 1
+#define EFI_CACHE_DISABLED 0
+
+typedef enum {
+ EfiCacheWriteThrough = 0,
+ EfiCacheWriteBack = 1,
+ EfiCacheDynamicMode = 2,
+ EfiCacheUnknownMode = 3
+} EFI_CACHE_OPERATIONAL_MODE;
+
+
+
+typedef enum {
+ CacheSizeRecordType = 1,
+ MaximumSizeCacheRecordType = 2,
+ CacheSpeedRecordType = 3,
+ CacheSocketRecordType = 4,
+ CacheSramTypeRecordType = 5,
+ CacheInstalledSramTypeRecordType = 6,
+ CacheErrorTypeRecordType = 7,
+ CacheTypeRecordType = 8,
+ CacheAssociativityRecordType = 9,
+ CacheConfigRecordType = 10
+} EFI_CACHE_VARIABLE_RECORD_TYPE;
+
+
+typedef union {
+ EFI_CACHE_SIZE_DATA CacheSize;
+ EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;
+ EFI_CACHE_SPEED_DATA CacheSpeed;
+ EFI_CACHE_SOCKET_DATA CacheSocket;
+ EFI_CACHE_SRAM_TYPE_DATA CacheSramType;
+ EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;
+ EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;
+ EFI_CACHE_TYPE_DATA CacheType;
+ EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;
+ EFI_CACHE_CONFIGURATION_DATA CacheConfig;
+ EFI_CACHE_ASSOCIATION_DATA CacheAssociation;
+} EFI_CACHE_VARIABLE_RECORD;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;
+ EFI_CACHE_VARIABLE_RECORD VariableRecord;
+} EFI_CACHE_DATA_RECORD;
+
+#define EFI_MEMORY_SUBCLASS_VERSION 0x0100
+
+
+#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001
+
+typedef enum _EFI_MEMORY_REGION_TYPE {
+ EfiMemoryRegionMemory = 0x01,
+ EfiMemoryRegionReserved = 0x02,
+ EfiMemoryRegionAcpi = 0x03,
+ EfiMemoryRegionNvs = 0x04
+} EFI_MEMORY_REGION_TYPE;
+
+typedef struct {
+ UINT32 ProcessorNumber;
+ UINT16 StartBusNumber;
+ UINT16 EndBusNumber;
+ EFI_MEMORY_REGION_TYPE MemoryRegionType;
+ EFI_EXP_BASE2_DATA MemorySize;
+ EFI_PHYSICAL_ADDRESS MemoryStartAddress;
+} EFI_MEMORY_SIZE_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002
+
+typedef enum _EFI_MEMORY_ARRAY_LOCATION {
+ EfiMemoryArrayLocationOther = 0x01,
+ EfiMemoryArrayLocationUnknown = 0x02,
+ EfiMemoryArrayLocationSystemBoard = 0x03,
+ EfiMemoryArrayLocationIsaAddonCard = 0x04,
+ EfiMemoryArrayLocationEisaAddonCard = 0x05,
+ EfiMemoryArrayLocationPciAddonCard = 0x06,
+ EfiMemoryArrayLocationMcaAddonCard = 0x07,
+ EfiMemoryArrayLocationPcmciaAddonCard = 0x08,
+ EfiMemoryArrayLocationProprietaryAddonCard = 0x09,
+ EfiMemoryArrayLocationNuBus = 0x0A,
+ EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,
+ EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,
+ EfiMemoryArrayLocationPc98EAddonCard = 0xA2,
+ EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3
+} EFI_MEMORY_ARRAY_LOCATION;
+
+typedef enum _EFI_MEMORY_ARRAY_USE {
+ EfiMemoryArrayUseOther = 0x01,
+ EfiMemoryArrayUseUnknown = 0x02,
+ EfiMemoryArrayUseSystemMemory = 0x03,
+ EfiMemoryArrayUseVideoMemory = 0x04,
+ EfiMemoryArrayUseFlashMemory = 0x05,
+ EfiMemoryArrayUseNonVolatileRam = 0x06,
+ EfiMemoryArrayUseCacheMemory = 0x07,
+} EFI_MEMORY_ARRAY_USE;
+
+typedef enum _EFI_MEMORY_ERROR_CORRECTION {
+ EfiMemoryErrorCorrectionOther = 0x01,
+ EfiMemoryErrorCorrectionUnknown = 0x02,
+ EfiMemoryErrorCorrectionNone = 0x03,
+ EfiMemoryErrorCorrectionParity = 0x04,
+ EfiMemoryErrorCorrectionSingleBitEcc = 0x05,
+ EfiMemoryErrorCorrectionMultiBitEcc = 0x06,
+ EfiMemoryErrorCorrectionCrc = 0x07,
+} EFI_MEMORY_ERROR_CORRECTION;
+
+typedef struct {
+ EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;
+ EFI_MEMORY_ARRAY_USE MemoryArrayUse;
+ EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;
+ EFI_EXP_BASE2_DATA MaximumMemoryCapacity;
+ UINT16 NumberMemoryDevices;
+} EFI_MEMORY_ARRAY_LOCATION_DATA;
+
+
+#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003
+
+typedef enum _EFI_MEMORY_FORM_FACTOR {
+ EfiMemoryFormFactorOther = 0x01,
+ EfiMemoryFormFactorUnknown = 0x02,
+ EfiMemoryFormFactorSimm = 0x03,
+ EfiMemoryFormFactorSip = 0x04,
+ EfiMemoryFormFactorChip = 0x05,
+ EfiMemoryFormFactorDip = 0x06,
+ EfiMemoryFormFactorZip = 0x07,
+ EfiMemoryFormFactorProprietaryCard = 0x08,
+ EfiMemoryFormFactorDimm = 0x09,
+ EfiMemoryFormFactorTsop = 0x0A,
+ EfiMemoryFormFactorRowOfChips = 0x0B,
+ EfiMemoryFormFactorRimm = 0x0C,
+ EfiMemoryFormFactorSodimm = 0x0D,
+ EfiMemoryFormFactorSrimm = 0x0E
+} EFI_MEMORY_FORM_FACTOR;
+
+typedef enum _EFI_MEMORY_ARRAY_TYPE {
+ EfiMemoryTypeOther = 0x01,
+ EfiMemoryTypeUnknown = 0x02,
+ EfiMemoryTypeDram = 0x03,
+ EfiMemoryTypeEdram = 0x04,
+ EfiMemoryTypeVram = 0x05,
+ EfiMemoryTypeSram = 0x06,
+ EfiMemoryTypeRam = 0x07,
+ EfiMemoryTypeRom = 0x08,
+ EfiMemoryTypeFlash = 0x09,
+ EfiMemoryTypeEeprom = 0x0A,
+ EfiMemoryTypeFeprom = 0x0B,
+ EfiMemoryTypeEprom = 0x0C,
+ EfiMemoryTypeCdram = 0x0D,
+ EfiMemoryType3Dram = 0x0E,
+ EfiMemoryTypeSdram = 0x0F,
+ EfiMemoryTypeSgram = 0x10,
+ EfiMemoryTypeRdram = 0x11,
+ EfiMemoryTypeDdr = 0x12
+} EFI_MEMORY_ARRAY_TYPE;
+
+typedef struct {
+ UINT32 Reserved :1;
+ UINT32 Other :1;
+ UINT32 Unknown :1;
+ UINT32 FastPaged :1;
+ UINT32 StaticColumn :1;
+ UINT32 PseudoStatic :1;
+ UINT32 Rambus :1;
+ UINT32 Synchronous :1;
+ UINT32 Cmos :1;
+ UINT32 Edo :1;
+ UINT32 WindowDram :1;
+ UINT32 CacheDram :1;
+ UINT32 Nonvolatile :1;
+ UINT32 Reserved1 :19;
+} EFI_MEMORY_TYPE_DETAIL;
+
+typedef enum {
+ EfiMemoryStateEnabled = 0,
+ EfiMemoryStateUnknown = 1,
+ EfiMemoryStateUnsupported = 2,
+ EfiMemoryStateError = 3,
+ EfiMemoryStateAbsent = 4,
+ EfiMemoryStateDisabled = 5,
+ EfiMemoryStatePartial = 6
+} EFI_MEMORY_STATE;
+
+typedef struct {
+ STRING_REF MemoryDeviceLocator;
+ STRING_REF MemoryBankLocator;
+ STRING_REF MemoryManufacturer;
+ STRING_REF MemorySerialNumber;
+ STRING_REF MemoryAssetTag;
+ STRING_REF MemoryPartNumber;
+ EFI_INTER_LINK_DATA MemoryArrayLink;
+ EFI_INTER_LINK_DATA MemorySubArrayLink;
+ UINT16 MemoryTotalWidth;
+ UINT16 MemoryDataWidth;
+ EFI_EXP_BASE2_DATA MemoryDeviceSize;
+ EFI_MEMORY_FORM_FACTOR MemoryFormFactor;
+ UINT8 MemoryDeviceSet;
+ EFI_MEMORY_ARRAY_TYPE MemoryType;
+ EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;
+ EFI_EXP_BASE10_DATA MemorySpeed;
+ EFI_MEMORY_STATE MemoryState;
+} EFI_MEMORY_ARRAY_LINK_DATA;
+
+
+#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT16 MemoryArrayPartitionWidth;
+} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;
+
+
+#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;
+ EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;
+ EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;
+ EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;
+ UINT8 MemoryDevicePartitionRowPosition;
+ UINT8 MemoryDeviceInterleavePosition;
+ UINT8 MemoryDeviceInterleaveDataDepth;
+} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;
+
+
+//
+// Memory. Channel Device Type - SMBIOS Type 37
+//
+
+#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006
+
+typedef enum _EFI_MEMORY_CHANNEL_TYPE {
+ EfiMemoryChannelTypeOther = 1,
+ EfiMemoryChannelTypeUnknown = 2,
+ EfiMemoryChannelTypeRambus = 3,
+ EfiMemoryChannelTypeSyncLink = 4
+} EFI_MEMORY_CHANNEL_TYPE;
+
+typedef struct {
+ EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;
+ UINT8 MemoryChannelMaximumLoad;
+ UINT8 MemoryChannelDeviceCount;
+} EFI_MEMORY_CHANNEL_TYPE_DATA;
+
+#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007
+
+typedef struct {
+ UINT8 DeviceId;
+ EFI_INTER_LINK_DATA DeviceLink;
+ UINT8 MemoryChannelDeviceLoad;
+} EFI_MEMORY_CHANNEL_DEVICE_DATA;
+
+
+
+typedef union _EFI_MEMORY_SUBCLASS_RECORDS {
+ EFI_MEMORY_SIZE_DATA SizeData;
+ EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;
+ EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;
+ EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;
+ EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;
+ EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;
+ EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;
+} EFI_MEMORY_SUBCLASS_RECORDS;
+
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MEMORY_SUBCLASS_RECORDS Record;
+} EFI_MEMORY_SUBCLASS_DRIVER_DATA;
+
+#define EFI_MISC_SUBCLASS_VERSION 0x0100
+
+#pragma pack(1)
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Last PCI Bus Number
+//
+#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001
+
+typedef struct {
+ UINT8 LastPciBus;
+} EFI_MISC_LAST_PCI_BUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Vendor - SMBIOS Type 0
+//
+#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002
+
+typedef struct {
+ UINT32 Reserved1 :2;
+ UINT32 Unknown :1;
+ UINT32 BiosCharacteristicsNotSupported :1;
+ UINT32 IsaIsSupported :1;
+ UINT32 McaIsSupported :1;
+ UINT32 EisaIsSupported :1;
+ UINT32 PciIsSupported :1;
+ UINT32 PcmciaIsSupported :1;
+ UINT32 PlugAndPlayIsSupported :1;
+ UINT32 ApmIsSupported :1;
+ UINT32 BiosIsUpgradable :1;
+ UINT32 BiosShadowingAllowed :1;
+ UINT32 VlVesaIsSupported :1;
+ UINT32 EscdSupportIsAvailable :1;
+ UINT32 BootFromCdIsSupported :1;
+ UINT32 SelectableBootIsSupported :1;
+ UINT32 RomBiosIsSocketed :1;
+ UINT32 BootFromPcmciaIsSupported :1;
+ UINT32 EDDSpecificationIsSupported :1;
+ UINT32 JapaneseNecFloppyIsSupported :1;
+ UINT32 JapaneseToshibaFloppyIsSupported :1;
+ UINT32 Floppy525_360IsSupported :1;
+ UINT32 Floppy525_12IsSupported :1;
+ UINT32 Floppy35_720IsSupported :1;
+ UINT32 Floppy35_288IsSupported :1;
+ UINT32 PrintScreenIsSupported :1;
+ UINT32 Keyboard8042IsSupported :1;
+ UINT32 SerialIsSupported :1;
+ UINT32 PrinterIsSupported :1;
+ UINT32 CgaMonoIsSupported :1;
+ UINT32 NecPc98 :1;
+ UINT32 AcpiIsSupported :1;
+ UINT32 UsbLegacyIsSupported :1;
+ UINT32 AgpIsSupported :1;
+ UINT32 I20BootIsSupported :1;
+ UINT32 Ls120BootIsSupported :1;
+ UINT32 AtapiZipDriveBootIsSupported :1;
+ UINT32 Boot1394IsSupported :1;
+ UINT32 SmartBatteryIsSupported :1;
+ UINT32 BiosBootSpecIsSupported :1;
+ UINT32 FunctionKeyNetworkBootIsSupported :1;
+ UINT32 Reserved :22;
+} EFI_MISC_BIOS_CHARACTERISTICS;
+
+typedef struct {
+ UINT32 BiosReserved :16;
+ UINT32 SystemReserved :16;
+ UINT32 Reserved :32;
+} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;
+
+typedef struct {
+ STRING_REF BiosVendor;
+ STRING_REF BiosVersion;
+ STRING_REF BiosReleaseDate;
+ EFI_PHYSICAL_ADDRESS BiosStartingAddress;
+ EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;
+ EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;
+ EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION BiosCharacteristics2;
+} EFI_MISC_BIOS_VENDOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Manufacturer - SMBIOS Type 1
+//
+#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003
+
+typedef enum {
+ EfiSystemWakeupTypeReserved = 0,
+ EfiSystemWakeupTypeOther = 1,
+ EfiSystemWakeupTypeUnknown = 2,
+ EfiSystemWakeupTypeApmTimer = 3,
+ EfiSystemWakeupTypeModemRing = 4,
+ EfiSystemWakeupTypeLanRemote = 5,
+ EfiSystemWakeupTypePowerSwitch = 6,
+ EfiSystemWakeupTypePciPme = 7,
+ EfiSystemWakeupTypeAcPowerRestored = 8,
+} EFI_MISC_SYSTEM_WAKEUP_TYPE;
+
+typedef struct {
+ STRING_REF SystemManufacturer;
+ STRING_REF SystemProductName;
+ STRING_REF SystemVersion;
+ STRING_REF SystemSerialNumber;
+ EFI_GUID SystemUuid;
+ EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;
+} EFI_MISC_SYSTEM_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Base Board Manufacturer - SMBIOS Type 2
+//
+#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004
+
+typedef struct {
+ UINT32 Motherboard :1;
+ UINT32 RequiresDaughterCard :1;
+ UINT32 Removable :1;
+ UINT32 Replaceable :1;
+ UINT32 HotSwappable :1;
+ UINT32 Reserved :27;
+} EFI_BASE_BOARD_FEATURE_FLAGS;
+
+typedef enum {
+ EfiBaseBoardTypeUnknown = 1,
+ EfiBaseBoardTypeOther = 2,
+ EfiBaseBoardTypeServerBlade = 3,
+ EfiBaseBoardTypeConnectivitySwitch = 4,
+ EfiBaseBoardTypeSystemManagementModule = 5,
+ EfiBaseBoardTypeProcessorModule = 6,
+ EfiBaseBoardTypeIOModule = 7,
+ EfiBaseBoardTypeMemoryModule = 8,
+ EfiBaseBoardTypeDaughterBoard = 9,
+ EfiBaseBoardTypeMotherBoard = 0xA,
+ EfiBaseBoardTypeProcessorMemoryModule = 0xB,
+ EfiBaseBoardTypeProcessorIOModule = 0xC,
+ EfiBaseBoardTypeInterconnectBoard = 0xD,
+} EFI_BASE_BOARD_TYPE;
+
+typedef struct {
+ STRING_REF BaseBoardManufacturer;
+ STRING_REF BaseBoardProductName;
+ STRING_REF BaseBoardVersion;
+ STRING_REF BaseBoardSerialNumber;
+ STRING_REF BaseBoardAssetTag;
+ STRING_REF BaseBoardChassisLocation;
+ EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;
+ EFI_BASE_BOARD_TYPE BaseBoardType;
+ EFI_INTER_LINK_DATA BaseBoardChassisLink;
+ UINT32 BaseBoardNumberLinks;
+ EFI_INTER_LINK_DATA LinkN;
+} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System/Chassis Enclosure - SMBIOS Type 3
+//
+#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005
+
+typedef enum {
+ EfiMiscChassisTypeOther = 0x1,
+ EfiMiscChassisTypeUnknown = 0x2,
+ EfiMiscChassisTypeDeskTop = 0x3,
+ EfiMiscChassisTypeLowProfileDesktop = 0x4,
+ EfiMiscChassisTypePizzaBox = 0x5,
+ EfiMiscChassisTypeMiniTower = 0x6,
+ EfiMiscChassisTypeTower = 0x7,
+ EfiMiscChassisTypePortable = 0x8,
+ EfiMiscChassisTypeLapTop = 0x9,
+ EfiMiscChassisTypeNotebook = 0xA,
+ EfiMiscChassisTypeHandHeld = 0xB,
+ EfiMiscChassisTypeDockingStation = 0xC,
+ EfiMiscChassisTypeAllInOne = 0xD,
+ EfiMiscChassisTypeSubNotebook = 0xE,
+ EfiMiscChassisTypeSpaceSaving = 0xF,
+ EfiMiscChassisTypeLunchBox = 0x10,
+ EfiMiscChassisTypeMainServerChassis = 0x11,
+ EfiMiscChassisTypeExpansionChassis = 0x12,
+ EfiMiscChassisTypeSubChassis = 0x13,
+ EfiMiscChassisTypeBusExpansionChassis = 0x14,
+ EfiMiscChassisTypePeripheralChassis = 0x15,
+ EfiMiscChassisTypeRaidChassis = 0x16,
+ EfiMiscChassisTypeRackMountChassis = 0x17,
+ EfiMiscChassisTypeSealedCasePc = 0x18,
+ EfiMiscChassisMultiSystemChassis = 0x19,
+} EFI_MISC_CHASSIS_TYPE;
+
+typedef struct {
+ UINT32 ChassisType :16;
+ UINT32 ChassisLockPresent:1;
+ UINT32 Reserved :15;
+} EFI_MISC_CHASSIS_STATUS;
+
+typedef enum {
+ EfiChassisStateOther = 0x01,
+ EfiChassisStateUnknown = 0x02,
+ EfiChassisStateSafe = 0x03,
+ EfiChassisStateWarning = 0x04,
+ EfiChassisStateCritical = 0x05,
+ EfiChassisStateNonRecoverable = 0x06,
+} EFI_MISC_CHASSIS_STATE;
+
+typedef enum {
+ EfiChassisSecurityStatusOther = 0x01,
+ EfiChassisSecurityStatusUnknown = 0x02,
+ EfiChassisSecurityStatusNone = 0x03,
+ EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,
+ EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05,
+} EFI_MISC_CHASSIS_SECURITY_STATE;
+
+typedef struct {
+ UINT32 RecordType :1;
+ UINT32 Reserved :24;
+} EFI_MISC_ELEMENT_TYPE;
+
+typedef struct {
+ EFI_MISC_ELEMENT_TYPE ChassisElementType;
+ EFI_INTER_LINK_DATA ChassisElementStructure;
+ EFI_BASE_BOARD_TYPE ChassisBaseBoard;
+ UINT32 ChassisElementMinimum;
+ UINT32 ChassisElementMaximum;
+} EFI_MISC_ELEMENTS;
+
+typedef struct {
+ STRING_REF ChassisManufacturer;
+ STRING_REF ChassisVersion;
+ STRING_REF ChassisSerialNumber;
+ STRING_REF ChassisAssetTag;
+ EFI_MISC_CHASSIS_STATUS ChassisType;
+ EFI_MISC_CHASSIS_STATE ChassisBootupState;
+ EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;
+ EFI_MISC_CHASSIS_STATE ChassisThermalState;
+ EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;
+ UINT32 ChassisOemDefined;
+ UINT32 ChassisHeight;
+ UINT32 ChassisNumberPowerCords;
+ UINT32 ChassisElementCount;
+ UINT32 ChassisElementRecordLength;//
+ EFI_MISC_ELEMENTS ChassisElements;
+} EFI_MISC_CHASSIS_MANUFACTURER_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Port Connector Information - SMBIOS Type 8
+//
+#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006
+
+typedef enum {
+ EfiPortConnectorTypeNone = 0x00,
+ EfiPortConnectorTypeCentronics = 0x01,
+ EfiPortConnectorTypeMiniCentronics = 0x02,
+ EfiPortConnectorTypeProprietary = 0x03,
+ EfiPortConnectorTypeDB25Male = 0x04,
+ EfiPortConnectorTypeDB25Female = 0x05,
+ EfiPortConnectorTypeDB15Male = 0x06,
+ EfiPortConnectorTypeDB15Female = 0x07,
+ EfiPortConnectorTypeDB9Male = 0x08,
+ EfiPortConnectorTypeDB9Female = 0x09,
+ EfiPortConnectorTypeRJ11 = 0x0A,
+ EfiPortConnectorTypeRJ45 = 0x0B,
+ EfiPortConnectorType50PinMiniScsi = 0x0C,
+ EfiPortConnectorTypeMiniDin = 0x0D,
+ EfiPortConnectorTypeMicriDin = 0x0E,
+ EfiPortConnectorTypePS2 = 0x0F,
+ EfiPortConnectorTypeInfrared = 0x10,
+ EfiPortConnectorTypeHpHil = 0x11,
+ EfiPortConnectorTypeUsb = 0x12,
+ EfiPortConnectorTypeSsaScsi = 0x13,
+ EfiPortConnectorTypeCircularDin8Male = 0x14,
+ EfiPortConnectorTypeCircularDin8Female = 0x15,
+ EfiPortConnectorTypeOnboardIde = 0x16,
+ EfiPortConnectorTypeOnboardFloppy = 0x17,
+ EfiPortConnectorType9PinDualInline = 0x18,
+ EfiPortConnectorType25PinDualInline = 0x19,
+ EfiPortConnectorType50PinDualInline = 0x1A,
+ EfiPortConnectorType68PinDualInline = 0x1B,
+ EfiPortConnectorTypeOnboardSoundInput = 0x1C,
+ EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,
+ EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,
+ EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,
+ EfiPortConnectorTypeBNC = 0x20,
+ EfiPortConnectorType1394 = 0x21,
+ EfiPortConnectorTypePC98 = 0xA0,
+ EfiPortConnectorTypePC98Hireso = 0xA1,
+ EfiPortConnectorTypePCH98 = 0xA2,
+ EfiPortConnectorTypePC98Note = 0xA3,
+ EfiPortConnectorTypePC98Full = 0xA4,
+ EfiPortConnectorTypeOther = 0xFF,
+} EFI_MISC_PORT_CONNECTOR_TYPE;
+
+typedef enum {
+ EfiPortTypeNone = 0x00,
+ EfiPortTypeParallelXtAtCompatible = 0x01,
+ EfiPortTypeParallelPortPs2 = 0x02,
+ EfiPortTypeParallelPortEcp = 0x03,
+ EfiPortTypeParallelPortEpp = 0x04,
+ EfiPortTypeParallelPortEcpEpp = 0x05,
+ EfiPortTypeSerialXtAtCompatible = 0x06,
+ EfiPortTypeSerial16450Compatible = 0x07,
+ EfiPortTypeSerial16550Compatible = 0x08,
+ EfiPortTypeSerial16550ACompatible = 0x09,
+ EfiPortTypeScsi = 0x0A,
+ EfiPortTypeMidi = 0x0B,
+ EfiPortTypeJoyStick = 0x0C,
+ EfiPortTypeKeyboard = 0x0D,
+ EfiPortTypeMouse = 0x0E,
+ EfiPortTypeSsaScsi = 0x0F,
+ EfiPortTypeUsb = 0x10,
+ EfiPortTypeFireWire = 0x11,
+ EfiPortTypePcmciaTypeI = 0x12,
+ EfiPortTypePcmciaTypeII = 0x13,
+ EfiPortTypePcmciaTypeIII = 0x14,
+ EfiPortTypeCardBus = 0x15,
+ EfiPortTypeAccessBusPort = 0x16,
+ EfiPortTypeScsiII = 0x17,
+ EfiPortTypeScsiWide = 0x18,
+ EfiPortTypePC98 = 0x19,
+ EfiPortTypePC98Hireso = 0x1A,
+ EfiPortTypePCH98 = 0x1B,
+ EfiPortTypeVideoPort = 0x1C,
+ EfiPortTypeAudioPort = 0x1D,
+ EfiPortTypeModemPort = 0x1E,
+ EfiPortTypeNetworkPort = 0x1F,
+ EfiPortType8251Compatible = 0xA0,
+ EfiPortType8251FifoCompatible = 0xA1,
+ EfiPortTypeOther = 0xFF,
+} EFI_MISC_PORT_TYPE;
+
+typedef struct {
+ STRING_REF PortInternalConnectorDesignator;
+ STRING_REF PortExternalConnectorDesignator;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;
+ EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;
+ EFI_MISC_PORT_TYPE PortType;
+ EFI_MISC_PORT_DEVICE_PATH PortPath;
+} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Slots - SMBIOS Type 9
+//
+#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007
+
+typedef enum {
+ EfiSlotTypeOther = 0x01,
+ EfiSlotTypeUnknown = 0x02,
+ EfiSlotTypeIsa = 0x03,
+ EfiSlotTypeMca = 0x04,
+ EfiSlotTypeEisa = 0x05,
+ EfiSlotTypePci = 0x06,
+ EfiSlotTypePcmcia = 0x07,
+ EfiSlotTypeVlVesa = 0x08,
+ EfiSlotTypeProprietary = 0x09,
+ EfiSlotTypeProcessorCardSlot = 0x0A,
+ EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,
+ EfiSlotTypeIORiserCardSlot = 0x0C,
+ EfiSlotTypeNuBus = 0x0D,
+ EfiSlotTypePci66MhzCapable = 0x0E,
+ EfiSlotTypeAgp = 0x0F,
+ EfiSlotTypeApg2X = 0x10,
+ EfiSlotTypeAgp4X = 0x11,
+ EfiSlotTypePciX = 0x12,
+ EfiSlotTypeAgp4x = 0x13,
+ EfiSlotTypePC98C20 = 0xA0,
+ EfiSlotTypePC98C24 = 0xA1,
+ EfiSlotTypePC98E = 0xA2,
+ EfiSlotTypePC98LocalBus = 0xA3,
+ EfiSlotTypePC98Card = 0xA4,
+} EFI_MISC_SLOT_TYPE;
+
+typedef enum {
+ EfiSlotDataBusWidthOther = 0x01,
+ EfiSlotDataBusWidthUnknown = 0x02,
+ EfiSlotDataBusWidth8Bit = 0x03,
+ EfiSlotDataBusWidth16Bit = 0x04,
+ EfiSlotDataBusWidth32Bit = 0x05,
+ EfiSlotDataBusWidth64Bit = 0x06,
+ EfiSlotDataBusWidth128Bit = 0x07,
+} EFI_MISC_SLOT_DATA_BUS_WIDTH;
+
+typedef enum {
+ EfiSlotUsageOther = 1,
+ EfiSlotUsageUnknown = 2,
+ EfiSlotUsageAvailable = 3,
+ EfiSlotUsageInUse = 4,
+} EFI_MISC_SLOT_USAGE;
+
+typedef enum {
+ EfiSlotLengthOther = 1,
+ EfiSlotLengthUnknown = 2,
+ EfiSlotLengthShort = 3,
+ EfiSlotLengthLong = 4
+} EFI_MISC_SLOT_LENGTH;
+
+typedef struct {
+ UINT32 CharacteristicsUnknown :1;
+ UINT32 Provides50Volts :1;
+ UINT32 Provides33Volts :1;
+ UINT32 SharedSlot :1;
+ UINT32 PcCard16Supported :1;
+ UINT32 CardBusSupported :1;
+ UINT32 ZoomVideoSupported :1;
+ UINT32 ModemRingResumeSupported:1;
+ UINT32 PmeSignalSupported :1;
+ UINT32 HotPlugDevicesSupported :1;
+ UINT32 SmbusSignalSupported :1;
+ UINT32 Reserved :21;
+} EFI_MISC_SLOT_CHARACTERISTICS;
+
+typedef struct {
+ STRING_REF SlotDesignation;
+ EFI_MISC_SLOT_TYPE SlotType;
+ EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;
+ EFI_MISC_SLOT_USAGE SlotUsage;
+ EFI_MISC_SLOT_LENGTH SlotLength;
+ UINT16 SlotId;
+ EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;
+ EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;
+} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Onboard Device - SMBIOS Type 10
+//
+#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008
+
+typedef enum {
+ EfiOnBoardDeviceTypeOther = 1,
+ EfiOnBoardDeviceTypeUnknown = 2,
+ EfiOnBoardDeviceTypeVideo = 3,
+ EfiOnBoardDeviceTypeScsiController = 4,
+ EfiOnBoardDeviceTypeEthernet = 5,
+ EfiOnBoardDeviceTypeTokenRing = 6,
+ EfiOnBoardDeviceTypeSound = 7,
+} EFI_MISC_ONBOARD_DEVICE_TYPE;
+
+typedef struct {
+ UINT32 DeviceType :16;
+ UINT32 DeviceEnabled :1;
+ UINT32 Reserved :15;
+} EFI_MISC_ONBOARD_DEVICE_STATUS;
+
+typedef struct {
+ STRING_REF OnBoardDeviceDescription;
+ EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;
+ EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;
+} EFI_MISC_ONBOARD_DEVICE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIOS Language Information - SMBIOS Type 11
+//
+#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009
+
+typedef struct {
+ STRING_REF OemStringRef[1];
+} EFI_MISC_OEM_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Options - SMBIOS Type 12
+//
+typedef struct {
+ STRING_REF SystemOptionStringRef[1];
+} EFI_MISC_SYSTEM_OPTION_STRING_DATA;
+
+#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Number of Installable Languages - SMBIOS Type 13
+//
+#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B
+
+typedef struct {
+ UINT32 AbbreviatedLanguageFormat :1;
+ UINT32 Reserved :31;
+} EFI_MISC_LANGUAGE_FLAGS;
+
+typedef struct {
+ UINT16 NumberOfInstallableLanguages;
+ EFI_MISC_LANGUAGE_FLAGS LanguageFlags;
+ UINT16 CurrentLanguageNumber;
+} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. System Language String
+//
+#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C
+
+typedef struct {
+ UINT16 LanguageId;
+ STRING_REF SystemLanguageString;
+} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Associations - SMBIOS Type 14
+//
+#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D
+
+typedef struct {
+ STRING_REF GroupName;
+ UINT16 NumberGroupItems;
+ UINT16 GroupId;
+} EFI_MISC_GROUP_NAME_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Group Item Set Element
+//
+#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E
+
+typedef struct {
+ EFI_GUID SubClass;
+ EFI_INTER_LINK_DATA GroupLink;
+ UINT16 GroupId;
+ UINT16 GroupElementId;
+} EFI_MISC_GROUP_ITEM_SET_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Pointing Device Type - SMBIOS Type 21
+//
+#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F
+
+typedef enum {
+ EfiPointingDeviceTypeOther = 0x01,
+ EfiPointingDeviceTypeUnknown = 0x02,
+ EfiPointingDeviceTypeMouse = 0x03,
+ EfiPointingDeviceTypeTrackBall = 0x04,
+ EfiPointingDeviceTypeTrackPoint = 0x05,
+ EfiPointingDeviceTypeGlidePoint = 0x06,
+ EfiPointingDeviceTouchPad = 0x07,
+ EfiPointingDeviceTouchScreen = 0x08,
+ EfiPointingDeviceOpticalSensor = 0x09,
+} EFI_MISC_POINTING_DEVICE_TYPE;
+
+typedef enum {
+ EfiPointingDeviceInterfaceOther = 0x01,
+ EfiPointingDeviceInterfaceUnknown = 0x02,
+ EfiPointingDeviceInterfaceSerial = 0x03,
+ EfiPointingDeviceInterfacePs2 = 0x04,
+ EfiPointingDeviceInterfaceInfrared = 0x05,
+ EfiPointingDeviceInterfaceHpHil = 0x06,
+ EfiPointingDeviceInterfaceBusMouse = 0x07,
+ EfiPointingDeviceInterfaceADB = 0x08,
+ EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,
+ EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,
+ EfiPointingDeviceInterfaceUsb = 0xA2,
+} EFI_MISC_POINTING_DEVICE_INTERFACE;
+
+typedef struct {
+ EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;
+ EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;
+ UINT16 NumberPointingDeviceButtons;
+ EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;
+} EFI_MISC_PORTING_DEVICE_TYPE_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Portable Battery - SMBIOS Type 22
+//
+#define EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER 0x00000010
+
+typedef enum {
+ EfiBatteryDeviceChemistryTypeOther = 0x01,
+ EfiBatteryDeviceChemistryTypeUnknown = 0x02,
+ EfiBatteryDeviceChemistryTypeLeadAcid = 0x03,
+ EfiBatteryDeviceChemistryTypeNickelCadmium = 0x04,
+ EfiBatteryDeviceChemistryTypeNickelMetalHydride = 0x05,
+ EfiBatteryDeviceChemistryTypeLithiumIon = 0x06,
+ EfiBatteryDeviceChemistryTypeZincAir = 0x07,
+ EfiBatteryDeviceChemistryTypeLithiumPolymer = 0x08,
+} EFI_MISC_BATTERY_DEVICE_CHEMISTRY;
+
+typedef struct {
+ UINT32 Date :5;
+ UINT32 Month :4;
+ UINT32 Year :7;
+ UINT32 Reserved :16;
+} EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE;
+
+typedef struct {
+ STRING_REF BatteryLocation;
+ STRING_REF BatteryManufacturer;
+ STRING_REF BatteryManufactureDate;
+ STRING_REF BatterySerialNumber;
+ STRING_REF BatteryDeviceName;
+ STRING_REF BatterySbdsVersionNumber;
+ STRING_REF BatterySbdsDeviceChemistry;
+ EFI_MISC_BATTERY_DEVICE_CHEMISTRY BatteryDeviceChemistry;
+ EFI_EXP_BASE10_DATA BatteryDesignCapacity;
+ EFI_EXP_BASE10_DATA BatteryDesignVoltage;
+ UINT16 BatteryMaximumError;
+ UINT16 BatterySbdsSerialNumber;
+ EFI_MISC_BATTERY_SBDS_MANUFACTURE_DATE
+ BatterySbdsManufacturingDate;
+ UINT32 BatteryOemSpecific;
+} EFI_MISC_BATTERY_LOCATION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Reset Capabilities - SMBIOS Type 23
+//
+#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011
+
+typedef struct {
+ UINT32 Status :1;
+ UINT32 BootOption :2;
+ UINT32 BootOptionOnLimit :2;
+ UINT32 WatchdogTimerPresent:1;
+ UINT32 Reserved :26;
+} EFI_MISC_RESET_CAPABILITIES_TYPE;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES;
+
+typedef struct {
+ EFI_MISC_RESET_CAPABILITIES ResetCapabilities;
+ UINT16 ResetCount;
+ UINT16 ResetLimit;
+ UINT16 ResetTimerInterval;
+ UINT16 ResetTimeout;
+} EFI_MISC_RESET_CAPABILITIES_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Hardware Security - SMBIOS Type 24
+//
+#define EFI_MISC_HARDWARE_SECURITY_RECORD_NUMBER 0x00000012
+
+typedef enum {
+ EfiHardwareSecurityStatusDisabled = 0,
+ EfiHardwareSecurityStatusEnabled = 1,
+ EfiHardwareSecurityStatusNotImplemented = 2,
+ EfiHardwareSecurityStatusUnknown = 3
+} EFI_MISC_HARDWARE_SECURITY_STATUS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_STATUS FrontPanelResetStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS AdministratorPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS KeyboardPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS PowerOnPasswordStatus :2;
+ EFI_MISC_HARDWARE_SECURITY_STATUS Reserved :24;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS;
+
+typedef struct {
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;
+} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// System Power Controls - SMBIOS Type 25
+//
+#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013
+
+typedef struct {
+ UINT16 ScheduledPoweronMonth;
+ UINT16 ScheduledPoweronDayOfMonth;
+ UINT16 ScheduledPoweronHour;
+ UINT16 ScheduledPoweronMinute;
+ UINT16 ScheduledPoweronSecond;
+} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Voltage Probe - SMBIOS Type 26
+//
+#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014
+
+typedef struct {
+ UINT32 VoltageProbeSite :5;
+ UINT32 VoltageProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_VOLTAGE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF VoltageProbeDescription;
+ EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;
+ EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;
+ EFI_EXP_BASE10_DATA VoltageProbeResolution;
+ EFI_EXP_BASE10_DATA VoltageProbeTolerance;
+ EFI_EXP_BASE10_DATA VoltageProbeAccuracy;
+ EFI_EXP_BASE10_DATA VoltageProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 VoltageProbeOemDefined;
+} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Cooling Device - SMBIOS Type 27
+//
+#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015
+
+typedef struct {
+ UINT32 CoolingDevice :5;
+ UINT32 CoolingDeviceStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_COOLING_DEVICE_TYPE;
+
+typedef struct {
+ EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;
+ EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;
+ UINT16 CoolingDeviceUnitGroup;
+ EFI_EXP_BASE10_DATA CoolingDeviceNominalSpeed;
+ UINT32 CoolingDeviceOemDefined;
+} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Temperature Probe - SMBIOS Type 28
+//
+#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016
+
+typedef struct {
+ UINT32 TemperatureProbeSite :5;
+ UINT32 TemperatureProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_TEMPERATURE_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF TemperatureProbeDescription;
+ EFI_MISC_TEMPERATURE_PROBE_LOCATION
+ TemperatureProbeLocation;
+ EFI_EXP_BASE10_DATA TemperatureProbeMaximumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeMinimumValue;
+ EFI_EXP_BASE10_DATA TemperatureProbeResolution;
+ EFI_EXP_BASE10_DATA TemperatureProbeTolerance;
+ EFI_EXP_BASE10_DATA TemperatureProbeAccuracy;
+ EFI_EXP_BASE10_DATA TemperatureProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 TemperatureProbeOemDefined;
+} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Electrical Current Probe - SMBIOS Type 29
+//
+
+#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017
+
+typedef struct {
+ UINT32 ElectricalCurrentProbeSite :5;
+ UINT32 ElectricalCurrentProbeStatus :3;
+ UINT32 Reserved :24;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;
+
+typedef struct {
+ STRING_REF ElectricalCurrentProbeDescription;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION
+ ElectricalCurrentProbeLocation;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;
+ EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;
+ EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;
+ EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;
+ EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;
+ UINT32 ElectricalCurrentProbeOemDefined;
+} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Out-of-Band Remote Access - SMBIOS Type 30
+//
+
+#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018
+
+typedef struct {
+ UINT32 InboundConnectionEnabled :1;
+ UINT32 OutboundConnectionEnabled :1;
+ UINT32 Reserved :30;
+} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;
+
+typedef struct {
+ STRING_REF RemoteAccessManufacturerNameDescription;
+ EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;
+} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. BIS Entry Point - SMBIOS Type 31
+//
+#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BisEntryPoint;
+} EFI_MISC_BIS_ENTRY_POINT_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Misc. Boot Information - SMBIOS Type 32
+//
+#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A
+
+typedef enum {
+ EfiBootInformationStatusNoError = 0x00,
+ EfiBootInformationStatusNoBootableMedia = 0x01,
+ EfiBootInformationStatusNormalOSFailedLoading = 0x02,
+ EfiBootInformationStatusFirmwareDetectedFailure = 0x03,
+ EfiBootInformationStatusOSDetectedFailure = 0x04,
+ EfiBootInformationStatusUserRequestedBoot = 0x05,
+ EfiBootInformationStatusSystemSecurityViolation = 0x06,
+ EfiBootInformationStatusPreviousRequestedImage = 0x07,
+ EfiBootInformationStatusWatchdogTimerExpired = 0x08,
+ EfiBootInformationStatusStartReserved = 0x09,
+ EfiBootInformationStatusStartOemSpecific = 0x80,
+ EfiBootInformationStatusStartProductSpecific = 0xC0,
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;
+
+typedef struct {
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;
+ UINT8 BootInformationData[9];
+} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device - SMBIOS Type 34
+//
+#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B
+
+typedef enum {
+ EfiManagementDeviceTypeOther = 0x01,
+ EfiManagementDeviceTypeUnknown = 0x02,
+ EfiManagementDeviceTypeLm75 = 0x03,
+ EfiManagementDeviceTypeLm78 = 0x04,
+ EfiManagementDeviceTypeLm79 = 0x05,
+ EfiManagementDeviceTypeLm80 = 0x06,
+ EfiManagementDeviceTypeLm81 = 0x07,
+ EfiManagementDeviceTypeAdm9240 = 0x08,
+ EfiManagementDeviceTypeDs1780 = 0x09,
+ EfiManagementDeviceTypeMaxim1617 = 0x0A,
+ EfiManagementDeviceTypeGl518Sm = 0x0B,
+ EfiManagementDeviceTypeW83781D = 0x0C,
+ EfiManagementDeviceTypeHt82H791 = 0x0D,
+} EFI_MISC_MANAGEMENT_DEVICE_TYPE;
+
+typedef enum {
+ EfiManagementDeviceAddressTypeOther = 1,
+ EfiManagementDeviceAddressTypeUnknown = 2,
+ EfiManagementDeviceAddressTypeIOPort = 3,
+ EfiManagementDeviceAddressTypeMemory = 4,
+ EfiManagementDeviceAddressTypeSmbus = 5
+} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;
+
+typedef struct {
+ STRING_REF ManagementDeviceDescription;
+ EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;
+ UINTN ManagementDeviceAddress;
+ EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE
+ ManagementDeviceAddressType;
+} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// Management Device Component - SMBIOS Type 35
+//
+
+#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C
+
+typedef struct {
+ STRING_REF ManagementDeviceComponentDescription;
+ EFI_INTER_LINK_DATA ManagementDeviceLink;
+ EFI_INTER_LINK_DATA ManagementDeviceComponentLink;
+} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// IPMI Data Record - SMBIOS Type 38
+//
+typedef enum {
+ EfiIpmiOther = 0,
+ EfiIpmiKcs = 1,
+ EfiIpmiSmic = 2,
+ EfiIpmiBt = 3,
+} EFI_MISC_IPMI_INTERFACE_TYPE;
+
+typedef struct {
+ UINT16 IpmiSpecLeastSignificantDigit:4;
+ UINT16 IpmiSpecMostSignificantDigit: 4;
+ UINT16 Reserved: 8;
+} EFI_MISC_IPMI_SPECIFICATION_REVISION;
+
+typedef struct {
+ EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;
+ EFI_MISC_IPMI_SPECIFICATION_REVISION IpmiSpecificationRevision;
+ UINT16 IpmiI2CSlaveAddress;
+ UINT16 IpmiNvDeviceAddress;
+ UINT64 IpmiBaseAddress;
+ EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;
+} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;
+
+#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+//System Power supply Record - SMBIOS Type 39
+//
+typedef struct {
+ UINT16 PowerSupplyHotReplaceable :1;
+ UINT16 PowerSupplyPresent :1;
+ UINT16 PowerSupplyUnplugged :1;
+ UINT16 InputVoltageRangeSwitch :4;
+ UINT16 PowerSupplyStatus :3;
+ UINT16 PowerSupplyType :4;
+ UINT16 Reserved :2;
+} POWER_SUPPLY_CHARACTERISTICS;
+
+typedef struct {
+ UINT16 PowerUnitGroup;
+ STRING_REF PowerSupplyLocation;
+ STRING_REF PowerSupplyDeviceName;
+ STRING_REF PowerSupplyManufacturer;
+ STRING_REF PowerSupplySerialNumber;
+ STRING_REF PowerSupplyAssetTagNumber;
+ STRING_REF PowerSupplyModelPartNumber;
+ STRING_REF PowerSupplyRevisionLevel;
+ UINT16 PowerSupplyMaxPowerCapacity;
+ POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;
+ EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;
+ EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;
+ EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;
+} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;
+
+#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+// OEM Data Record - SMBIOS Type 0x80-0xFF
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE_HDR;
+
+typedef struct {
+ SMBIOS_STRUCTURE_HDR Header;
+ UINT8 RawData[1];
+} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;
+
+#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F
+
+//
+//////////////////////////////////////////////////////////////////////////////
+//
+typedef union {
+ EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;
+ EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;
+ EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;
+ EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;
+ EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;
+ EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;
+ EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;
+ EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;
+ EFI_MISC_OEM_STRING_DATA MiscOemString;
+ EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;
+ EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;
+ EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;
+ EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;
+ EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;
+ EFI_MISC_PORTING_DEVICE_TYPE_DATA MiscPortingDeviceTypeData;
+ EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;
+ EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;
+ EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;
+ EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;
+ EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;
+ EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;
+ EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;
+ EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA
+ MiscRemoteAccessManufacturerDescriptionData;
+ EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;
+ EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;
+ EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;
+ EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA
+ MiscmangementDeviceComponentDescriptionData;
+ EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;
+ EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;
+ EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;
+} EFI_MISC_SUBCLASS_RECORDS;
+
+//
+//
+//
+typedef struct {
+ EFI_SUBCLASS_TYPE1_HEADER Header;
+ EFI_MISC_SUBCLASS_RECORDS Record;
+} EFI_MISC_SUBCLASS_DRIVER_DATA;
+
+#pragma pack()
+
+//
+// Sub Class Header type1
+//
+
+#define EFI_SUBCLASS_INSTANCE_RESERVED 0
+#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF //16 bit
+
+#endif
+
diff --git a/MdePkg/Include/Common/Dependency.h b/MdePkg/Include/Common/Dependency.h new file mode 100644 index 0000000000..744027d2f3 --- /dev/null +++ b/MdePkg/Include/Common/Dependency.h @@ -0,0 +1,50 @@ +/** @file
+ This module contains data specific to dependency expressions
+ and local function prototypes.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Dependency.h
+
+**/
+
+#ifndef __DEPENDENCY_H__
+#define __DEPENDENCY_H__
+
+/// EFI_DEP_BEFORE - If present, this must be the first and only opcode
+#define EFI_DEP_BEFORE 0x00
+
+/// EFI_DEP_AFTER - If present, this must be the first and only opcode
+#define EFI_DEP_AFTER 0x01
+
+#define EFI_DEP_PUSH 0x02
+#define EFI_DEP_AND 0x03
+#define EFI_DEP_OR 0x04
+#define EFI_DEP_NOT 0x05
+#define EFI_DEP_TRUE 0x06
+#define EFI_DEP_FALSE 0x07
+#define EFI_DEP_END 0x08
+
+/// EFI_DEP_SOR - If present, this must be the first opcode
+#define EFI_DEP_SOR 0x09
+
+///
+/// EFI_DEP_REPLACE_TRUE - Used to dynamically patch the dependecy expression
+/// to save time. A EFI_DEP_PUSH is evauated one an
+/// replaced with EFI_DEP_REPLACE_TRUE
+///
+#define EFI_DEP_REPLACE_TRUE 0xff
+
+///
+/// Define the initial size of the dependency expression evaluation stack
+///
+#define DEPEX_STACK_SIZE_INCREMENT 0x1000
+
+#endif
diff --git a/MdePkg/Include/Common/EfiImage.h b/MdePkg/Include/Common/EfiImage.h new file mode 100644 index 0000000000..ebe251e479 --- /dev/null +++ b/MdePkg/Include/Common/EfiImage.h @@ -0,0 +1,698 @@ +/** @file
+ EFI image format for PE32+. Please note some data structures are different
+ for IA-32 and Itanium-based images, look for UINTN and the #ifdef EFI_IA64
+
+ @bug Fix text - doc as defined in MSFT EFI specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EfiImage.h
+
+**/
+
+#ifndef __EFI_IMAGE_H__
+#define __EFI_IMAGE_H__
+
+//
+// PE32+ Subsystem type for EFI images
+//
+#define EFI_IMAGE_SUBSYSTEM_EFI_APPLICATION 10
+#define EFI_IMAGE_SUBSYSTEM_EFI_BOOT_SERVICE_DRIVER 11
+#define EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER 12
+#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13
+
+//
+// BugBug: Need to get a real answer for this problem. This is not in the
+// PE specification.
+//
+// A SAL runtime driver does not get fixed up when a transition to
+// virtual mode is made. In all other cases it should be treated
+// like a EFI_IMAGE_SUBSYSTEM_EFI_RUNTIME_DRIVER image
+//
+#define EFI_IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER 13
+
+//
+// PE32+ Machine type for EFI images
+//
+#define IMAGE_FILE_MACHINE_I386 0x014c
+#define IMAGE_FILE_MACHINE_IA64 0x0200
+#define IMAGE_FILE_MACHINE_EBC 0x0EBC
+#define IMAGE_FILE_MACHINE_X64 0x8664
+//
+// Support old names for backward compatible
+//
+#define EFI_IMAGE_MACHINE_IA32 IMAGE_FILE_MACHINE_I386
+#define EFI_IMAGE_MACHINE_IA64 IMAGE_FILE_MACHINE_IA64
+#define EFI_IMAGE_MACHINE_IPF IMAGE_FILE_MACHINE_IA64
+#define EFI_IMAGE_MACHINE_EBC IMAGE_FILE_MACHINE_EBC
+#define EFI_IMAGE_MACHINE_X64 IMAGE_FILE_MACHINE_X64
+
+#define EFI_IMAGE_DOS_SIGNATURE 0x5A4D // MZ
+#define EFI_IMAGE_OS2_SIGNATURE 0x454E // NE
+#define EFI_IMAGE_OS2_SIGNATURE_LE 0x454C // LE
+#define EFI_IMAGE_NT_SIGNATURE 0x00004550 // PE00
+#define EFI_IMAGE_EDOS_SIGNATURE 0x44454550 // PEED
+
+///
+/// PE images can start with an optional DOS header, so if an image is run
+/// under DOS it can print an error message.
+///
+typedef struct {
+ UINT16 e_magic; // Magic number
+ UINT16 e_cblp; // Bytes on last page of file
+ UINT16 e_cp; // Pages in file
+ UINT16 e_crlc; // Relocations
+ UINT16 e_cparhdr; // Size of header in paragraphs
+ UINT16 e_minalloc; // Minimum extra paragraphs needed
+ UINT16 e_maxalloc; // Maximum extra paragraphs needed
+ UINT16 e_ss; // Initial (relative) SS value
+ UINT16 e_sp; // Initial SP value
+ UINT16 e_csum; // Checksum
+ UINT16 e_ip; // Initial IP value
+ UINT16 e_cs; // Initial (relative) CS value
+ UINT16 e_lfarlc; // File address of relocation table
+ UINT16 e_ovno; // Overlay number
+ UINT16 e_res[4]; // Reserved words
+ UINT16 e_oemid; // OEM identifier (for e_oeminfo)
+ UINT16 e_oeminfo; // OEM information; e_oemid specific
+ UINT16 e_res2[10]; // Reserved words
+ UINT32 e_lfanew; // File address of new exe header
+} EFI_IMAGE_DOS_HEADER;
+
+///
+/// File header format.
+///
+typedef struct {
+ UINT16 Machine;
+ UINT16 NumberOfSections;
+ UINT32 TimeDateStamp;
+ UINT32 PointerToSymbolTable;
+ UINT32 NumberOfSymbols;
+ UINT16 SizeOfOptionalHeader;
+ UINT16 Characteristics;
+} EFI_IMAGE_FILE_HEADER;
+
+#define EFI_IMAGE_SIZEOF_FILE_HEADER 20
+
+#define EFI_IMAGE_FILE_RELOCS_STRIPPED 0x0001 // Relocation info stripped from file.
+#define EFI_IMAGE_FILE_EXECUTABLE_IMAGE 0x0002 // File is executable (i.e. no unresolved externel references).
+#define EFI_IMAGE_FILE_LINE_NUMS_STRIPPED 0x0004 // Line nunbers stripped from file.
+#define EFI_IMAGE_FILE_LOCAL_SYMS_STRIPPED 0x0008 // Local symbols stripped from file.
+#define EFI_IMAGE_FILE_BYTES_REVERSED_LO 0x0080 // Bytes of machine word are reversed.
+#define EFI_IMAGE_FILE_32BIT_MACHINE 0x0100 // 32 bit word machine.
+#define EFI_IMAGE_FILE_DEBUG_STRIPPED 0x0200 // Debugging info stripped from file in .DBG file
+#define EFI_IMAGE_FILE_SYSTEM 0x1000 // System File.
+#define EFI_IMAGE_FILE_DLL 0x2000 // File is a DLL.
+#define EFI_IMAGE_FILE_BYTES_REVERSED_HI 0x8000 // Bytes of machine word are reversed.
+#define EFI_IMAGE_FILE_MACHINE_UNKNOWN 0
+#define EFI_IMAGE_FILE_MACHINE_I386 0x14c // Intel 386.
+#define EFI_IMAGE_FILE_MACHINE_R3000 0x162 // MIPS* little-endian, 0540 big-endian
+#define EFI_IMAGE_FILE_MACHINE_R4000 0x166 // MIPS* little-endian
+#define EFI_IMAGE_FILE_MACHINE_ALPHA 0x184 // Alpha_AXP*
+#define EFI_IMAGE_FILE_MACHINE_POWERPC 0x1F0 // IBM* PowerPC Little-Endian
+#define EFI_IMAGE_FILE_MACHINE_TAHOE 0x7cc // Intel EM machine
+//
+// * Other names and brands may be claimed as the property of others.
+//
+
+///
+/// Directory format.
+///
+typedef struct {
+ UINT32 VirtualAddress;
+ UINT32 Size;
+} EFI_IMAGE_DATA_DIRECTORY;
+
+#define EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES 16
+
+typedef struct {
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
+ UINT32 BaseOfData;
+ UINT32 BaseOfBss;
+ UINT32 GprMask;
+ UINT32 CprMask[4];
+ UINT32 GpValue;
+} EFI_IMAGE_ROM_OPTIONAL_HEADER;
+
+#define EFI_IMAGE_ROM_OPTIONAL_HDR_MAGIC 0x107
+#define EFI_IMAGE_SIZEOF_ROM_OPTIONAL_HEADER sizeof (EFI_IMAGE_ROM_OPTIONAL_HEADER)
+
+typedef struct {
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_ROM_OPTIONAL_HEADER OptionalHeader;
+} EFI_IMAGE_ROM_HEADERS;
+
+///
+/// @attention
+/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
+/// are for use ONLY by tools. All proper EFI code MUST use
+/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
+///
+#define EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC 0x10b
+
+typedef struct {
+ //
+ // Standard fields.
+ //
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
+ UINT32 BaseOfData;
+ //
+ // NT additional fields.
+ //
+ UINT32 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT32 SizeOfStackReserve;
+ UINT32 SizeOfStackCommit;
+ UINT32 SizeOfHeapReserve;
+ UINT32 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+} EFI_IMAGE_OPTIONAL_HEADER32;
+
+///
+/// @attention
+/// EFI_IMAGE_OPTIONAL_HEADER32 and EFI_IMAGE_OPTIONAL_HEADER64
+/// are for use ONLY by tools. All proper EFI code MUST use
+/// EFI_IMAGE_OPTIONAL_HEADER ONLY!!!
+///
+#define EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC 0x20b
+
+typedef struct {
+ //
+ // Standard fields.
+ //
+ UINT16 Magic;
+ UINT8 MajorLinkerVersion;
+ UINT8 MinorLinkerVersion;
+ UINT32 SizeOfCode;
+ UINT32 SizeOfInitializedData;
+ UINT32 SizeOfUninitializedData;
+ UINT32 AddressOfEntryPoint;
+ UINT32 BaseOfCode;
+ //
+ // NT additional fields.
+ //
+ UINT64 ImageBase;
+ UINT32 SectionAlignment;
+ UINT32 FileAlignment;
+ UINT16 MajorOperatingSystemVersion;
+ UINT16 MinorOperatingSystemVersion;
+ UINT16 MajorImageVersion;
+ UINT16 MinorImageVersion;
+ UINT16 MajorSubsystemVersion;
+ UINT16 MinorSubsystemVersion;
+ UINT32 Win32VersionValue;
+ UINT32 SizeOfImage;
+ UINT32 SizeOfHeaders;
+ UINT32 CheckSum;
+ UINT16 Subsystem;
+ UINT16 DllCharacteristics;
+ UINT64 SizeOfStackReserve;
+ UINT64 SizeOfStackCommit;
+ UINT64 SizeOfHeapReserve;
+ UINT64 SizeOfHeapCommit;
+ UINT32 LoaderFlags;
+ UINT32 NumberOfRvaAndSizes;
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[EFI_IMAGE_NUMBER_OF_DIRECTORY_ENTRIES];
+} EFI_IMAGE_OPTIONAL_HEADER64;
+
+///
+/// @attention
+/// EFI_IMAGE_NT_HEADERS32 and EFI_IMAGE_HEADERS64 are for use ONLY
+/// by tools. All proper EFI code MUST use EFI_IMAGE_NT_HEADERS ONLY!!!
+///
+typedef struct {
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER32 OptionalHeader;
+} EFI_IMAGE_NT_HEADERS32;
+
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL32_HEADER sizeof (EFI_IMAGE_NT_HEADERS32)
+
+typedef struct {
+ UINT32 Signature;
+ EFI_IMAGE_FILE_HEADER FileHeader;
+ EFI_IMAGE_OPTIONAL_HEADER64 OptionalHeader;
+} EFI_IMAGE_NT_HEADERS64;
+
+#define EFI_IMAGE_SIZEOF_NT_OPTIONAL64_HEADER sizeof (EFI_IMAGE_NT_HEADERS64)
+
+//
+// Processor specific definition of EFI_IMAGE_OPTIONAL_HEADER so the
+// type name EFI_IMAGE_OPTIONAL_HEADER is appropriate to the build. Same for
+// EFI_IMAGE_NT_HEADERS. These definitions MUST be used by ALL EFI code.
+//
+#if defined (MDE_CPU_IA32)
+
+typedef EFI_IMAGE_OPTIONAL_HEADER32 EFI_IMAGE_OPTIONAL_HEADER;
+typedef EFI_IMAGE_NT_HEADERS32 EFI_IMAGE_NT_HEADERS;
+
+#define EFI_IMAGE_NT_OPTIONAL_HDR_MAGIC EFI_IMAGE_NT_OPTIONAL_HDR32_MAGIC
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
+ (((Machine) == EFI_IMAGE_MACHINE_IA32) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+
+#elif defined (MDE_CPU_IPF)
+
+typedef EFI_IMAGE_OPTIONAL_HEADER64 EFI_IMAGE_OPTIONAL_HEADER;
+typedef EFI_IMAGE_NT_HEADERS64 EFI_IMAGE_NT_HEADERS;
+
+#define EFI_IMAGE_NT_OPTIONAL_HDR_MAGIC EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
+ (((Machine) == EFI_IMAGE_MACHINE_IPF) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+
+#elif defined (MDE_CPU_X64)
+
+typedef EFI_IMAGE_OPTIONAL_HEADER64 EFI_IMAGE_OPTIONAL_HEADER;
+typedef EFI_IMAGE_NT_HEADERS64 EFI_IMAGE_NT_HEADERS;
+
+#define EFI_IMAGE_NT_OPTIONAL_HDR_MAGIC EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) \
+ (((Machine) == EFI_IMAGE_MACHINE_X64) || ((Machine) == EFI_IMAGE_MACHINE_EBC))
+
+#elif defined (MDE_CPU_EBC)
+
+//
+// This is just to make sure you can cross compile with the EBC compiiler.
+// It does not make sense to have a PE loader coded in EBC. You need to
+// understand the basic
+//
+typedef EFI_IMAGE_OPTIONAL_HEADER64 EFI_IMAGE_OPTIONAL_HEADER;
+typedef EFI_IMAGE_NT_HEADERS64 EFI_IMAGE_NT_HEADERS;
+
+#define EFI_IMAGE_NT_OPTIONAL_HDR_MAGIC EFI_IMAGE_NT_OPTIONAL_HDR64_MAGIC
+#define EFI_IMAGE_MACHINE_TYPE_SUPPORTED(Machine) ((Machine) == EFI_IMAGE_MACHINE_EBC)
+
+#else
+#error Unknown Processor Type
+#endif
+
+
+#define EFI_IMAGE_FIRST_SECTION(ntheader) \
+ ( \
+ (EFI_IMAGE_SECTION_HEADER *) \
+ ( \
+ (UINT32) ntheader + \
+ FIELD_OFFSET (EFI_IMAGE_NT_HEADERS, OptionalHeader) + \
+ ((EFI_IMAGE_NT_HEADERS *) (ntheader))->FileHeader.SizeOfOptionalHeader \
+ ) \
+ )
+
+//
+// Subsystem Values
+//
+#define EFI_IMAGE_SUBSYSTEM_UNKNOWN 0
+#define EFI_IMAGE_SUBSYSTEM_NATIVE 1
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_GUI 2
+#define EFI_IMAGE_SUBSYSTEM_WINDOWS_CUI 3.
+#define EFI_IMAGE_SUBSYSTEM_OS2_CUI 5
+#define EFI_IMAGE_SUBSYSTEM_POSIX_CUI 7
+
+//
+// Directory Entries
+//
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXPORT 0
+#define EFI_IMAGE_DIRECTORY_ENTRY_IMPORT 1
+#define EFI_IMAGE_DIRECTORY_ENTRY_RESOURCE 2
+#define EFI_IMAGE_DIRECTORY_ENTRY_EXCEPTION 3
+#define EFI_IMAGE_DIRECTORY_ENTRY_SECURITY 4
+#define EFI_IMAGE_DIRECTORY_ENTRY_BASERELOC 5
+#define EFI_IMAGE_DIRECTORY_ENTRY_DEBUG 6
+#define EFI_IMAGE_DIRECTORY_ENTRY_COPYRIGHT 7
+#define EFI_IMAGE_DIRECTORY_ENTRY_GLOBALPTR 8
+#define EFI_IMAGE_DIRECTORY_ENTRY_TLS 9
+#define EFI_IMAGE_DIRECTORY_ENTRY_LOAD_CONFIG 10
+
+//
+// Section header format.
+//
+#define EFI_IMAGE_SIZEOF_SHORT_NAME 8
+
+typedef struct {
+ UINT8 Name[EFI_IMAGE_SIZEOF_SHORT_NAME];
+ union {
+ UINT32 PhysicalAddress;
+ UINT32 VirtualSize;
+ } Misc;
+ UINT32 VirtualAddress;
+ UINT32 SizeOfRawData;
+ UINT32 PointerToRawData;
+ UINT32 PointerToRelocations;
+ UINT32 PointerToLinenumbers;
+ UINT16 NumberOfRelocations;
+ UINT16 NumberOfLinenumbers;
+ UINT32 Characteristics;
+} EFI_IMAGE_SECTION_HEADER;
+
+#define EFI_IMAGE_SIZEOF_SECTION_HEADER 40
+
+#define EFI_IMAGE_SCN_TYPE_NO_PAD 0x00000008 // Reserved.
+#define EFI_IMAGE_SCN_CNT_CODE 0x00000020
+#define EFI_IMAGE_SCN_CNT_INITIALIZED_DATA 0x00000040
+#define EFI_IMAGE_SCN_CNT_UNINITIALIZED_DATA 0x00000080
+
+#define EFI_IMAGE_SCN_LNK_OTHER 0x00000100 // Reserved.
+#define EFI_IMAGE_SCN_LNK_INFO 0x00000200 // Section contains comments or some other type of information.
+#define EFI_IMAGE_SCN_LNK_REMOVE 0x00000800 // Section contents will not become part of image.
+#define EFI_IMAGE_SCN_LNK_COMDAT 0x00001000
+
+#define EFI_IMAGE_SCN_ALIGN_1BYTES 0x00100000
+#define EFI_IMAGE_SCN_ALIGN_2BYTES 0x00200000
+#define EFI_IMAGE_SCN_ALIGN_4BYTES 0x00300000
+#define EFI_IMAGE_SCN_ALIGN_8BYTES 0x00400000
+#define EFI_IMAGE_SCN_ALIGN_16BYTES 0x00500000
+#define EFI_IMAGE_SCN_ALIGN_32BYTES 0x00600000
+#define EFI_IMAGE_SCN_ALIGN_64BYTES 0x00700000
+
+#define EFI_IMAGE_SCN_MEM_DISCARDABLE 0x02000000
+#define EFI_IMAGE_SCN_MEM_NOT_CACHED 0x04000000
+#define EFI_IMAGE_SCN_MEM_NOT_PAGED 0x08000000
+#define EFI_IMAGE_SCN_MEM_SHARED 0x10000000
+#define EFI_IMAGE_SCN_MEM_EXECUTE 0x20000000
+#define EFI_IMAGE_SCN_MEM_READ 0x40000000
+#define EFI_IMAGE_SCN_MEM_WRITE 0x80000000
+
+///
+/// Symbol format.
+///
+#define EFI_IMAGE_SIZEOF_SYMBOL 18
+
+//
+// Section values.
+//
+// Symbols have a section number of the section in which they are
+// defined. Otherwise, section numbers have the following meanings:
+//
+#define EFI_IMAGE_SYM_UNDEFINED (UINT16) 0 // Symbol is undefined or is common.
+#define EFI_IMAGE_SYM_ABSOLUTE (UINT16) -1 // Symbol is an absolute value.
+#define EFI_IMAGE_SYM_DEBUG (UINT16) -2 // Symbol is a special debug item.
+//
+// Type (fundamental) values.
+//
+#define EFI_IMAGE_SYM_TYPE_NULL 0 // no type.
+#define EFI_IMAGE_SYM_TYPE_VOID 1 //
+#define EFI_IMAGE_SYM_TYPE_CHAR 2 // type character.
+#define EFI_IMAGE_SYM_TYPE_SHORT 3 // type short integer.
+#define EFI_IMAGE_SYM_TYPE_INT 4
+#define EFI_IMAGE_SYM_TYPE_LONG 5
+#define EFI_IMAGE_SYM_TYPE_FLOAT 6
+#define EFI_IMAGE_SYM_TYPE_DOUBLE 7
+#define EFI_IMAGE_SYM_TYPE_STRUCT 8
+#define EFI_IMAGE_SYM_TYPE_UNION 9
+#define EFI_IMAGE_SYM_TYPE_ENUM 10 // enumeration.
+#define EFI_IMAGE_SYM_TYPE_MOE 11 // member of enumeration.
+#define EFI_IMAGE_SYM_TYPE_BYTE 12
+#define EFI_IMAGE_SYM_TYPE_WORD 13
+#define EFI_IMAGE_SYM_TYPE_UINT 14
+#define EFI_IMAGE_SYM_TYPE_DWORD 15
+
+//
+// Type (derived) values.
+//
+#define EFI_IMAGE_SYM_DTYPE_NULL 0 // no derived type.
+#define EFI_IMAGE_SYM_DTYPE_POINTER 1
+#define EFI_IMAGE_SYM_DTYPE_FUNCTION 2
+#define EFI_IMAGE_SYM_DTYPE_ARRAY 3
+
+//
+// Storage classes.
+//
+#define EFI_IMAGE_SYM_CLASS_END_OF_FUNCTION (UINT8) -1
+#define EFI_IMAGE_SYM_CLASS_NULL 0
+#define EFI_IMAGE_SYM_CLASS_AUTOMATIC 1
+#define EFI_IMAGE_SYM_CLASS_EXTERNAL 2
+#define EFI_IMAGE_SYM_CLASS_STATIC 3
+#define EFI_IMAGE_SYM_CLASS_REGISTER 4
+#define EFI_IMAGE_SYM_CLASS_EXTERNAL_DEF 5
+#define EFI_IMAGE_SYM_CLASS_LABEL 6
+#define EFI_IMAGE_SYM_CLASS_UNDEFINED_LABEL 7
+#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_STRUCT 8
+#define EFI_IMAGE_SYM_CLASS_ARGUMENT 9
+#define EFI_IMAGE_SYM_CLASS_STRUCT_TAG 10
+#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_UNION 11
+#define EFI_IMAGE_SYM_CLASS_UNION_TAG 12
+#define EFI_IMAGE_SYM_CLASS_TYPE_DEFINITION 13
+#define EFI_IMAGE_SYM_CLASS_UNDEFINED_STATIC 14
+#define EFI_IMAGE_SYM_CLASS_ENUM_TAG 15
+#define EFI_IMAGE_SYM_CLASS_MEMBER_OF_ENUM 16
+#define EFI_IMAGE_SYM_CLASS_REGISTER_PARAM 17
+#define EFI_IMAGE_SYM_CLASS_BIT_FIELD 18
+#define EFI_IMAGE_SYM_CLASS_BLOCK 100
+#define EFI_IMAGE_SYM_CLASS_FUNCTION 101
+#define EFI_IMAGE_SYM_CLASS_END_OF_STRUCT 102
+#define EFI_IMAGE_SYM_CLASS_FILE 103
+#define EFI_IMAGE_SYM_CLASS_SECTION 104
+#define EFI_IMAGE_SYM_CLASS_WEAK_EXTERNAL 105
+
+//
+// type packing constants
+//
+#define EFI_IMAGE_N_BTMASK 017
+#define EFI_IMAGE_N_TMASK 060
+#define EFI_IMAGE_N_TMASK1 0300
+#define EFI_IMAGE_N_TMASK2 0360
+#define EFI_IMAGE_N_BTSHFT 4
+#define EFI_IMAGE_N_TSHIFT 2
+
+//
+// Communal selection types.
+//
+#define EFI_IMAGE_COMDAT_SELECT_NODUPLICATES 1
+#define EFI_IMAGE_COMDAT_SELECT_ANY 2
+#define EFI_IMAGE_COMDAT_SELECT_SAME_SIZE 3
+#define EFI_IMAGE_COMDAT_SELECT_EXACT_MATCH 4
+#define EFI_IMAGE_COMDAT_SELECT_ASSOCIATIVE 5
+
+#define EFI_IMAGE_WEAK_EXTERN_SEARCH_NOLIBRARY 1
+#define EFI_IMAGE_WEAK_EXTERN_SEARCH_LIBRARY 2
+#define EFI_IMAGE_WEAK_EXTERN_SEARCH_ALIAS 3
+
+///
+/// Relocation format.
+///
+typedef struct {
+ UINT32 VirtualAddress;
+ UINT32 SymbolTableIndex;
+ UINT16 Type;
+} EFI_IMAGE_RELOCATION;
+
+#define EFI_IMAGE_SIZEOF_RELOCATION 10
+
+//
+// I386 relocation types.
+//
+#define EFI_IMAGE_REL_I386_ABSOLUTE 0 // Reference is absolute, no relocation is necessary
+#define EFI_IMAGE_REL_I386_DIR16 01 // Direct 16-bit reference to the symbols virtual address
+#define EFI_IMAGE_REL_I386_REL16 02 // PC-relative 16-bit reference to the symbols virtual address
+#define EFI_IMAGE_REL_I386_DIR32 06 // Direct 32-bit reference to the symbols virtual address
+#define EFI_IMAGE_REL_I386_DIR32NB 07 // Direct 32-bit reference to the symbols virtual address, base not included
+#define EFI_IMAGE_REL_I386_SEG12 011 // Direct 16-bit reference to the segment-selector bits of a 32-bit virtual address
+#define EFI_IMAGE_REL_I386_SECTION 012
+#define EFI_IMAGE_REL_I386_SECREL 013
+#define EFI_IMAGE_REL_I386_REL32 024 // PC-relative 32-bit reference to the symbols virtual address
+
+///
+/// Based relocation format.
+///
+typedef struct {
+ UINT32 VirtualAddress;
+ UINT32 SizeOfBlock;
+} EFI_IMAGE_BASE_RELOCATION;
+
+#define EFI_IMAGE_SIZEOF_BASE_RELOCATION 8
+
+//
+// Based relocation types.
+//
+#define EFI_IMAGE_REL_BASED_ABSOLUTE 0
+#define EFI_IMAGE_REL_BASED_HIGH 1
+#define EFI_IMAGE_REL_BASED_LOW 2
+#define EFI_IMAGE_REL_BASED_HIGHLOW 3
+#define EFI_IMAGE_REL_BASED_HIGHADJ 4
+#define EFI_IMAGE_REL_BASED_MIPS_JMPADDR 5
+#define EFI_IMAGE_REL_BASED_IA64_IMM64 9
+#define EFI_IMAGE_REL_BASED_DIR64 10
+
+///
+/// Line number format.
+///
+typedef struct {
+ union {
+ UINT32 SymbolTableIndex; // Symbol table index of function name if Linenumber is 0.
+ UINT32 VirtualAddress; // Virtual address of line number.
+ } Type;
+ UINT16 Linenumber; // Line number.
+} EFI_IMAGE_LINENUMBER;
+
+#define EFI_IMAGE_SIZEOF_LINENUMBER 6
+
+//
+// Archive format.
+//
+#define EFI_IMAGE_ARCHIVE_START_SIZE 8
+#define EFI_IMAGE_ARCHIVE_START "!<arch>\n"
+#define EFI_IMAGE_ARCHIVE_END "`\n"
+#define EFI_IMAGE_ARCHIVE_PAD "\n"
+#define EFI_IMAGE_ARCHIVE_LINKER_MEMBER "/ "
+#define EFI_IMAGE_ARCHIVE_LONGNAMES_MEMBER "// "
+
+typedef struct {
+ UINT8 Name[16]; // File member name - `/' terminated.
+ UINT8 Date[12]; // File member date - decimal.
+ UINT8 UserID[6]; // File member user id - decimal.
+ UINT8 GroupID[6]; // File member group id - decimal.
+ UINT8 Mode[8]; // File member mode - octal.
+ UINT8 Size[10]; // File member size - decimal.
+ UINT8 EndHeader[2]; // String to end header.
+} EFI_IMAGE_ARCHIVE_MEMBER_HEADER;
+
+#define EFI_IMAGE_SIZEOF_ARCHIVE_MEMBER_HDR 60
+
+//
+// DLL support.
+//
+
+///
+/// DLL Export Format
+///
+typedef struct {
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Name;
+ UINT32 Base;
+ UINT32 NumberOfFunctions;
+ UINT32 NumberOfNames;
+ UINT32 AddressOfFunctions;
+ UINT32 AddressOfNames;
+ UINT32 AddressOfNameOrdinals;
+} EFI_IMAGE_EXPORT_DIRECTORY;
+
+///
+/// DLL support.
+/// Import Format
+///
+typedef struct {
+ UINT16 Hint;
+ UINT8 Name[1];
+} EFI_IMAGE_IMPORT_BY_NAME;
+
+typedef struct {
+ union {
+ UINT32 Function;
+ UINT32 Ordinal;
+ EFI_IMAGE_IMPORT_BY_NAME *AddressOfData;
+ } u1;
+} EFI_IMAGE_THUNK_DATA;
+
+#define EFI_IMAGE_ORDINAL_FLAG 0x80000000
+#define EFI_IMAGE_SNAP_BY_ORDINAL(Ordinal) ((Ordinal & EFI_IMAGE_ORDINAL_FLAG) != 0)
+#define EFI_IMAGE_ORDINAL(Ordinal) (Ordinal & 0xffff)
+
+typedef struct {
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT32 ForwarderChain;
+ UINT32 Name;
+ EFI_IMAGE_THUNK_DATA *FirstThunk;
+} EFI_IMAGE_IMPORT_DESCRIPTOR;
+
+///
+/// Debug Format
+///
+#define EFI_IMAGE_DEBUG_TYPE_CODEVIEW 2
+
+typedef struct {
+ UINT32 Characteristics;
+ UINT32 TimeDateStamp;
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+ UINT32 Type;
+ UINT32 SizeOfData;
+ UINT32 RVA;
+ UINT32 FileOffset;
+} EFI_IMAGE_DEBUG_DIRECTORY_ENTRY;
+
+#define CODEVIEW_SIGNATURE_NB10 0x3031424E // "NB10"
+typedef struct {
+ UINT32 Signature; // "NB10"
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
+ //
+ // Filename of .PDB goes here
+ //
+} EFI_IMAGE_DEBUG_CODEVIEW_NB10_ENTRY;
+
+#define CODEVIEW_SIGNATURE_RSDS 0x53445352 // "RSDS"
+typedef struct {
+ UINT32 Signature; // "RSDS"
+ UINT32 Unknown;
+ UINT32 Unknown2;
+ UINT32 Unknown3;
+ UINT32 Unknown4;
+ UINT32 Unknown5;
+ //
+ // Filename of .PDB goes here
+ //
+} EFI_IMAGE_DEBUG_CODEVIEW_RSDS_ENTRY;
+
+///
+/// Header format for TE images
+///
+typedef struct {
+ UINT16 Signature; // signature for TE format = "VZ"
+ UINT16 Machine; // from the original file header
+ UINT8 NumberOfSections; // from the original file header
+ UINT8 Subsystem; // from original optional header
+ UINT16 StrippedSize; // how many bytes we removed from the header
+ UINT32 AddressOfEntryPoint; // offset to entry point -- from original optional header
+ UINT32 BaseOfCode; // from original image -- required for ITP debug
+ UINT64 ImageBase; // from original file header
+ EFI_IMAGE_DATA_DIRECTORY DataDirectory[2]; // only base relocation and debug directory
+} EFI_TE_IMAGE_HEADER;
+
+#define EFI_TE_IMAGE_HEADER_SIGNATURE 0x5A56 // "VZ"
+
+//
+// Data directory indexes in our TE image header
+//
+#define EFI_TE_IMAGE_DIRECTORY_ENTRY_BASERELOC 0
+#define EFI_TE_IMAGE_DIRECTORY_ENTRY_DEBUG 1
+
+#endif
diff --git a/MdePkg/Include/Common/FirmwareFileSystem.h b/MdePkg/Include/Common/FirmwareFileSystem.h new file mode 100644 index 0000000000..5678a95524 --- /dev/null +++ b/MdePkg/Include/Common/FirmwareFileSystem.h @@ -0,0 +1,98 @@ +/** @file
+ This file defines the data structures that comprise the FFS file system.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareFileSystem.h
+
+ @par Revision Reference:
+ These definitions are from Firmware File System Spec 0.9.
+
+**/
+
+#ifndef __EFI_FFS_FILE_SYSTEM_H__
+#define __EFI_FFS_FILE_SYSTEM_H__
+
+///
+/// FFS specific file types
+///
+#define EFI_FV_FILETYPE_FFS_PAD 0xF0
+
+//
+// FFS File Attributes
+//
+#define FFS_ATTRIB_TAIL_PRESENT 0x01
+#define FFS_ATTRIB_RECOVERY 0x02
+#define FFS_ATTRIB_HEADER_EXTENSION 0x04
+#define FFS_ATTRIB_DATA_ALIGNMENT 0x38
+#define FFS_ATTRIB_CHECKSUM 0x40
+
+///
+/// FFS_FIXED_CHECKSUM is the default checksum value used when the
+/// FFS_ATTRIB_CHECKSUM attribute bit is clear
+/// note this is NOT an architecturally defined value, but is in this file for
+/// implementation convenience
+///
+#define FFS_FIXED_CHECKSUM 0x5A
+
+//
+// File state definitions
+//
+#define EFI_FILE_HEADER_CONSTRUCTION 0x01
+#define EFI_FILE_HEADER_VALID 0x02
+#define EFI_FILE_DATA_VALID 0x04
+#define EFI_FILE_MARKED_FOR_UPDATE 0x08
+#define EFI_FILE_DELETED 0x10
+#define EFI_FILE_HEADER_INVALID 0x20
+
+#define EFI_FILE_ALL_STATE_BITS (EFI_FILE_HEADER_CONSTRUCTION | \
+ EFI_FILE_HEADER_VALID | \
+ EFI_FILE_DATA_VALID | \
+ EFI_FILE_MARKED_FOR_UPDATE | \
+ EFI_FILE_DELETED | \
+ EFI_FILE_HEADER_INVALID \
+ )
+
+#define EFI_TEST_FFS_ATTRIBUTES_BIT(FvbAttributes, TestAttributes, Bit) \
+ ( \
+ (BOOLEAN) ( \
+ (FvbAttributes & EFI_FVB_ERASE_POLARITY) ? (((~TestAttributes) & Bit) == Bit) : ((TestAttributes & Bit) == Bit) \
+ ) \
+ )
+
+typedef UINT16 EFI_FFS_FILE_TAIL;
+
+///
+/// FFS file integrity check structure
+///
+typedef union {
+ struct {
+ UINT8 Header;
+ UINT8 File;
+ } Checksum;
+ UINT16 TailReference;
+} EFI_FFS_INTEGRITY_CHECK;
+
+//
+// FFS file header definition
+//
+typedef UINT8 EFI_FFS_FILE_ATTRIBUTES;
+typedef UINT8 EFI_FFS_FILE_STATE;
+
+typedef struct {
+ EFI_GUID Name;
+ EFI_FFS_INTEGRITY_CHECK IntegrityCheck;
+ EFI_FV_FILETYPE Type;
+ EFI_FFS_FILE_ATTRIBUTES Attributes;
+ UINT8 Size[3];
+ EFI_FFS_FILE_STATE State;
+} EFI_FFS_FILE_HEADER;
+
+#endif
diff --git a/MdePkg/Include/Common/FirmwareVolumeHeader.h b/MdePkg/Include/Common/FirmwareVolumeHeader.h new file mode 100644 index 0000000000..038dce6f7f --- /dev/null +++ b/MdePkg/Include/Common/FirmwareVolumeHeader.h @@ -0,0 +1,109 @@ +/** @file
+ Defines data structure that is the volume header found at the beginning of
+ all firmware volumes that are either memory mapped, or have an
+ associated FirmwareVolumeBlock protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolumeHeader.h
+
+ @par Revision Reference:
+ These definitions are from Firmware Volume Block Spec 0.9.
+
+**/
+
+#ifndef __EFI_FIRMWARE_VOLUME_HEADER_H__
+#define __EFI_FIRMWARE_VOLUME_HEADER_H__
+
+//
+// Firmware Volume Block Attributes definition
+//
+typedef UINT32 EFI_FVB_ATTRIBUTES;
+
+//
+// Firmware Volume Block Attributes bit definitions
+//
+#define EFI_FVB_READ_DISABLED_CAP 0x00000001
+#define EFI_FVB_READ_ENABLED_CAP 0x00000002
+#define EFI_FVB_READ_STATUS 0x00000004
+
+#define EFI_FVB_WRITE_DISABLED_CAP 0x00000008
+#define EFI_FVB_WRITE_ENABLED_CAP 0x00000010
+#define EFI_FVB_WRITE_STATUS 0x00000020
+
+#define EFI_FVB_LOCK_CAP 0x00000040
+#define EFI_FVB_LOCK_STATUS 0x00000080
+
+#define EFI_FVB_STICKY_WRITE 0x00000200
+#define EFI_FVB_MEMORY_MAPPED 0x00000400
+#define EFI_FVB_ERASE_POLARITY 0x00000800
+
+#define EFI_FVB_ALIGNMENT_CAP 0x00008000
+#define EFI_FVB_ALIGNMENT_2 0x00010000
+#define EFI_FVB_ALIGNMENT_4 0x00020000
+#define EFI_FVB_ALIGNMENT_8 0x00040000
+#define EFI_FVB_ALIGNMENT_16 0x00080000
+#define EFI_FVB_ALIGNMENT_32 0x00100000
+#define EFI_FVB_ALIGNMENT_64 0x00200000
+#define EFI_FVB_ALIGNMENT_128 0x00400000
+#define EFI_FVB_ALIGNMENT_256 0x00800000
+#define EFI_FVB_ALIGNMENT_512 0x01000000
+#define EFI_FVB_ALIGNMENT_1K 0x02000000
+#define EFI_FVB_ALIGNMENT_2K 0x04000000
+#define EFI_FVB_ALIGNMENT_4K 0x08000000
+#define EFI_FVB_ALIGNMENT_8K 0x10000000
+#define EFI_FVB_ALIGNMENT_16K 0x20000000
+#define EFI_FVB_ALIGNMENT_32K 0x40000000
+#define EFI_FVB_ALIGNMENT_64K 0x80000000
+
+#define EFI_FVB_CAPABILITIES (EFI_FVB_READ_DISABLED_CAP | \
+ EFI_FVB_READ_ENABLED_CAP | \
+ EFI_FVB_WRITE_DISABLED_CAP | \
+ EFI_FVB_WRITE_ENABLED_CAP | \
+ EFI_FVB_LOCK_CAP \
+ )
+
+#define EFI_FVB_STATUS (EFI_FVB_READ_STATUS | EFI_FVB_WRITE_STATUS | EFI_FVB_LOCK_STATUS)
+
+///
+/// Firmware Volume Header Revision definition
+///
+#define EFI_FVH_REVISION 0x01
+
+///
+/// Firmware Volume Header Signature definition
+///
+#define EFI_FVH_SIGNATURE EFI_SIGNATURE_32 ('_', 'F', 'V', 'H')
+
+///
+/// Firmware Volume Header Block Map Entry definition
+///
+typedef struct {
+ UINT32 NumBlocks;
+ UINT32 BlockLength;
+} EFI_FV_BLOCK_MAP_ENTRY;
+
+///
+/// Firmware Volume Header definition
+///
+typedef struct {
+ UINT8 ZeroVector[16];
+ EFI_GUID FileSystemGuid;
+ UINT64 FvLength;
+ UINT32 Signature;
+ EFI_FVB_ATTRIBUTES Attributes;
+ UINT16 HeaderLength;
+ UINT16 Checksum;
+ UINT8 Reserved[3];
+ UINT8 Revision;
+ EFI_FV_BLOCK_MAP_ENTRY FvBlockMap[1];
+} EFI_FIRMWARE_VOLUME_HEADER;
+
+#endif
diff --git a/MdePkg/Include/Common/FirmwareVolumeImageFormat.h b/MdePkg/Include/Common/FirmwareVolumeImageFormat.h new file mode 100644 index 0000000000..14fa41bf26 --- /dev/null +++ b/MdePkg/Include/Common/FirmwareVolumeImageFormat.h @@ -0,0 +1,277 @@ +/** @file
+ This file defines the data structures that are architecturally defined for file
+ images loaded via the FirmwareVolume protocol. The Firmware Volume specification
+ is the basis for these definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FimrwareVolumeImageFormat.h
+
+ @par Revision Reference:
+ These definitions are from Firmware Volume Spec 0.9.
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+#define __FIRMWARE_VOLUME_IMAGE_FORMAT_H__
+
+//
+// pack all data structures since this is actually a binary format and we cannot
+// allow internal padding in the data structures because of some compilerism..
+//
+#pragma pack(1)
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Architectural file types
+//
+typedef UINT8 EFI_FV_FILETYPE;
+
+#define EFI_FV_FILETYPE_ALL 0x00
+#define EFI_FV_FILETYPE_RAW 0x01
+#define EFI_FV_FILETYPE_FREEFORM 0x02
+#define EFI_FV_FILETYPE_SECURITY_CORE 0x03
+#define EFI_FV_FILETYPE_PEI_CORE 0x04
+#define EFI_FV_FILETYPE_DXE_CORE 0x05
+#define EFI_FV_FILETYPE_PEIM 0x06
+#define EFI_FV_FILETYPE_DRIVER 0x07
+#define EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER 0x08
+#define EFI_FV_FILETYPE_APPLICATION 0x09
+//
+// File type 0x0A is reserved and should not be used
+//
+#define EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE 0x0B
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Section types
+//
+typedef UINT8 EFI_SECTION_TYPE;
+
+//
+// ************************************************************
+// The section type EFI_SECTION_ALL is a psuedo type. It is
+// used as a wildcard when retrieving sections. The section
+// type EFI_SECTION_ALL matches all section types.
+// ************************************************************
+//
+#define EFI_SECTION_ALL 0x00
+
+//
+// ************************************************************
+// Encapsulation section Type values
+// ************************************************************
+//
+#define EFI_SECTION_COMPRESSION 0x01
+#define EFI_SECTION_GUID_DEFINED 0x02
+
+//
+// ************************************************************
+// Leaf section Type values
+// ************************************************************
+//
+#define EFI_SECTION_FIRST_LEAF_SECTION_TYPE 0x10
+
+#define EFI_SECTION_PE32 0x10
+#define EFI_SECTION_PIC 0x11
+#define EFI_SECTION_TE 0x12
+#define EFI_SECTION_DXE_DEPEX 0x13
+#define EFI_SECTION_VERSION 0x14
+#define EFI_SECTION_USER_INTERFACE 0x15
+#define EFI_SECTION_COMPATIBILITY16 0x16
+#define EFI_SECTION_FIRMWARE_VOLUME_IMAGE 0x17
+#define EFI_SECTION_FREEFORM_SUBTYPE_GUID 0x18
+#define EFI_SECTION_RAW 0x19
+#define EFI_SECTION_PEI_DEPEX 0x1B
+
+#define EFI_SECTION_LAST_LEAF_SECTION_TYPE 0x1B
+#define EFI_SECTION_LAST_SECTION_TYPE 0x1B
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Common section header
+//
+typedef struct {
+ UINT8 Size[3];
+ UINT8 Type;
+} EFI_COMMON_SECTION_HEADER;
+
+#define SECTION_SIZE(SectionHeaderPtr) \
+ ((UINT32) (*((UINT32 *) ((EFI_COMMON_SECTION_HEADER *) SectionHeaderPtr)->Size) & 0x00ffffff))
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Compression section
+//
+//
+// CompressionType values
+//
+#define EFI_NOT_COMPRESSED 0x00
+#define EFI_STANDARD_COMPRESSION 0x01
+#define EFI_CUSTOMIZED_COMPRESSION 0x02
+
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT32 UncompressedLength;
+ UINT8 CompressionType;
+} EFI_COMPRESSION_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// GUID defined section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_GUID SectionDefinitionGuid;
+ UINT16 DataOffset;
+ UINT16 Attributes;
+} EFI_GUID_DEFINED_SECTION;
+
+//
+// Bit values for Attributes
+//
+#define EFI_GUIDED_SECTION_PROCESSING_REQUIRED 0x01
+#define EFI_GUIDED_SECTION_AUTH_STATUS_VALID 0x02
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_AGGREGATE_AUTH_STATUS_PLATFORM_OVERRIDE 0x000001
+#define EFI_AGGREGATE_AUTH_STATUS_IMAGE_SIGNED 0x000002
+#define EFI_AGGREGATE_AUTH_STATUS_NOT_TESTED 0x000004
+#define EFI_AGGREGATE_AUTH_STATUS_TEST_FAILED 0x000008
+#define EFI_AGGREGATE_AUTH_STATUS_ALL 0x00000f
+
+#define EFI_LOCAL_AUTH_STATUS_PLATFORM_OVERRIDE 0x010000
+#define EFI_LOCAL_AUTH_STATUS_IMAGE_SIGNED 0x020000
+#define EFI_LOCAL_AUTH_STATUS_NOT_TESTED 0x040000
+#define EFI_LOCAL_AUTH_STATUS_TEST_FAILED 0x080000
+#define EFI_LOCAL_AUTH_STATUS_ALL 0x0f0000
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// PE32+ section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_PE32_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// PIC section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_PIC_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// PEIM header section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_PEIM_HEADER_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// DEPEX section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_DEPEX_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Version section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ UINT16 BuildNumber;
+ INT16 VersionString[1];
+} EFI_VERSION_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// User interface section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ INT16 FileNameString[1];
+} EFI_USER_INTERFACE_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Code16 section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_CODE16_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Firmware Volume Image section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_FIRMWARE_VOLUME_IMAGE_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Freeform subtype GUID section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+ EFI_GUID SubTypeGuid;
+} EFI_FREEFORM_SUBTYPE_GUID_SECTION;
+
+//
+// ////////////////////////////////////////////////////////////////////////////
+//
+// Raw section
+//
+typedef struct {
+ EFI_COMMON_SECTION_HEADER CommonHeader;
+} EFI_RAW_SECTION;
+
+//
+// undo the pragma from the beginning...
+//
+#pragma pack()
+
+typedef union {
+ EFI_COMMON_SECTION_HEADER *CommonHeader;
+ EFI_COMPRESSION_SECTION *CompressionSection;
+ EFI_GUID_DEFINED_SECTION *GuidDefinedSection;
+ EFI_PE32_SECTION *Pe32Section;
+ EFI_PIC_SECTION *PicSection;
+ EFI_PEIM_HEADER_SECTION *PeimHeaderSection;
+ EFI_DEPEX_SECTION *DependencySection;
+ EFI_VERSION_SECTION *VersionSection;
+ EFI_USER_INTERFACE_SECTION *UISection;
+ EFI_CODE16_SECTION *Code16Section;
+ EFI_FIRMWARE_VOLUME_IMAGE_SECTION *FVImageSection;
+ EFI_FREEFORM_SUBTYPE_GUID_SECTION *FreeformSubtypeSection;
+ EFI_RAW_SECTION *RawSection;
+} EFI_FILE_SECTION_POINTER;
+
+#endif
diff --git a/MdePkg/Include/Common/Hob.h b/MdePkg/Include/Common/Hob.h new file mode 100644 index 0000000000..b6ae6de009 --- /dev/null +++ b/MdePkg/Include/Common/Hob.h @@ -0,0 +1,235 @@ +/** @file
+ Hand Off Block (HOB) definition.
+
+ The HOB is a memory data structure used to hand-off system information from
+ PEI to DXE (the next phase).
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Hob.h
+
+ @par Revision Reference:
+ These definitions are from Hand Off Block (HOB) Spec Version 0.9.
+
+**/
+
+#ifndef __HOB_H__
+#define __HOB_H__
+
+
+//
+// Every Hob must start with this data structure.
+//
+typedef struct {
+ UINT16 HobType;
+ UINT16 HobLength;
+ UINT32 Reserved;
+} EFI_HOB_GENERIC_HEADER;
+
+//
+// End of HOB List HOB
+//
+#define EFI_HOB_TYPE_END_OF_HOB_LIST 0xffff
+
+//
+// Handoff Information Table HOB
+//
+#define EFI_HOB_TYPE_HANDOFF 0x0001
+
+#define EFI_HOB_HANDOFF_TABLE_VERSION 0x0009
+
+typedef UINT32 EFI_BOOT_MODE;
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ UINT32 Version;
+ EFI_BOOT_MODE BootMode;
+ EFI_PHYSICAL_ADDRESS EfiMemoryTop;
+ EFI_PHYSICAL_ADDRESS EfiMemoryBottom;
+ EFI_PHYSICAL_ADDRESS EfiFreeMemoryTop;
+ EFI_PHYSICAL_ADDRESS EfiFreeMemoryBottom;
+ EFI_PHYSICAL_ADDRESS EfiEndOfHobList;
+} EFI_HOB_HANDOFF_INFO_TABLE;
+
+//
+// Memory Descriptor HOB
+//
+#define EFI_HOB_TYPE_MEMORY_ALLOCATION 0x0002
+
+typedef struct {
+ EFI_GUID Name;
+ EFI_PHYSICAL_ADDRESS MemoryBaseAddress;
+ UINT64 MemoryLength;
+ EFI_MEMORY_TYPE MemoryType;
+ UINT8 Reserved[4];
+} EFI_HOB_MEMORY_ALLOCATION_HEADER;
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+ //
+ // Additional data pertaining to the "Name" Guid memory
+ // may go here.
+ //
+} EFI_HOB_MEMORY_ALLOCATION;
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+} EFI_HOB_MEMORY_ALLOCATION_BSP_STORE;
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER AllocDescriptor;
+} EFI_HOB_MEMORY_ALLOCATION_STACK;
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_HOB_MEMORY_ALLOCATION_HEADER MemoryAllocationHeader;
+ EFI_GUID ModuleName;
+ EFI_PHYSICAL_ADDRESS EntryPoint;
+} EFI_HOB_MEMORY_ALLOCATION_MODULE;
+
+#define EFI_HOB_TYPE_RESOURCE_DESCRIPTOR 0x0003
+
+typedef UINT32 EFI_RESOURCE_TYPE;
+
+#define EFI_RESOURCE_SYSTEM_MEMORY 0
+#define EFI_RESOURCE_MEMORY_MAPPED_IO 1
+#define EFI_RESOURCE_IO 2
+#define EFI_RESOURCE_FIRMWARE_DEVICE 3
+#define EFI_RESOURCE_MEMORY_MAPPED_IO_PORT 4
+#define EFI_RESOURCE_MEMORY_RESERVED 5
+#define EFI_RESOURCE_IO_RESERVED 6
+#define EFI_RESOURCE_MAX_MEMORY_TYPE 7
+
+typedef UINT32 EFI_RESOURCE_ATTRIBUTE_TYPE;
+
+#define EFI_RESOURCE_ATTRIBUTE_PRESENT 0x00000001
+#define EFI_RESOURCE_ATTRIBUTE_INITIALIZED 0x00000002
+#define EFI_RESOURCE_ATTRIBUTE_TESTED 0x00000004
+#define EFI_RESOURCE_ATTRIBUTE_SINGLE_BIT_ECC 0x00000008
+#define EFI_RESOURCE_ATTRIBUTE_MULTIPLE_BIT_ECC 0x00000010
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_1 0x00000020
+#define EFI_RESOURCE_ATTRIBUTE_ECC_RESERVED_2 0x00000040
+#define EFI_RESOURCE_ATTRIBUTE_READ_PROTECTED 0x00000080
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_PROTECTED 0x00000100
+#define EFI_RESOURCE_ATTRIBUTE_EXECUTION_PROTECTED 0x00000200
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE 0x00000400
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE 0x00000800
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE 0x00001000
+#define EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE 0x00002000
+#define EFI_RESOURCE_ATTRIBUTE_16_BIT_IO 0x00004000
+#define EFI_RESOURCE_ATTRIBUTE_32_BIT_IO 0x00008000
+#define EFI_RESOURCE_ATTRIBUTE_64_BIT_IO 0x00010000
+#define EFI_RESOURCE_ATTRIBUTE_UNCACHED_EXPORTED 0x00020000
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_GUID Owner;
+ EFI_RESOURCE_TYPE ResourceType;
+ EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute;
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ UINT64 ResourceLength;
+} EFI_HOB_RESOURCE_DESCRIPTOR;
+
+//
+// GUID Extension HOB
+// The HobLength is variable as it includes the GUID specific data.
+//
+#define EFI_HOB_TYPE_GUID_EXTENSION 0x0004
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_GUID Name;
+
+ //
+ // Guid specific data goes here
+ //
+} EFI_HOB_GUID_TYPE;
+
+//
+// Firmware Volume HOB
+//
+#define EFI_HOB_TYPE_FV 0x0005
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_FIRMWARE_VOLUME;
+
+//
+// CPU HOB
+//
+#define EFI_HOB_TYPE_CPU 0x0006
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ UINT8 SizeOfMemorySpace;
+ UINT8 SizeOfIoSpace;
+ UINT8 Reserved[6];
+} EFI_HOB_CPU;
+
+//
+// PEI Core Memory Pool HOB
+// The HobLength is variable as the HOB contains pool allocations by
+// the PeiServices AllocatePool function
+//
+#define EFI_HOB_TYPE_PEI_MEMORY_POOL 0x0007
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+} EFI_HOB_MEMORY_POOL;
+
+//
+// Capsule volume HOB -- identical to a firmware volume
+//
+#define EFI_HOB_TYPE_CV 0x0008
+
+typedef struct {
+ EFI_HOB_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+} EFI_HOB_CAPSULE_VOLUME;
+
+#define EFI_HOB_TYPE_UNUSED 0xFFFE
+
+//
+// Union of all the possible HOB Types
+//
+typedef union {
+ EFI_HOB_GENERIC_HEADER *Header;
+ EFI_HOB_HANDOFF_INFO_TABLE *HandoffInformationTable;
+ EFI_HOB_MEMORY_ALLOCATION *MemoryAllocation;
+ EFI_HOB_MEMORY_ALLOCATION_BSP_STORE *MemoryAllocationBspStore;
+ EFI_HOB_MEMORY_ALLOCATION_STACK *MemoryAllocationStack;
+ EFI_HOB_MEMORY_ALLOCATION_MODULE *MemoryAllocationModule;
+ EFI_HOB_RESOURCE_DESCRIPTOR *ResourceDescriptor;
+ EFI_HOB_GUID_TYPE *Guid;
+ EFI_HOB_FIRMWARE_VOLUME *FirmwareVolume;
+ EFI_HOB_CPU *Cpu;
+ EFI_HOB_MEMORY_POOL *Pool;
+ EFI_HOB_CAPSULE_VOLUME *CapsuleVolume;
+ UINT8 *Raw;
+} EFI_PEI_HOB_POINTERS;
+
+#define GET_HOB_TYPE(Hob) ((Hob).Header->HobType)
+#define GET_HOB_LENGTH(Hob) ((Hob).Header->HobLength)
+#define GET_NEXT_HOB(Hob) ((Hob).Raw + GET_HOB_LENGTH (Hob))
+#define END_OF_HOB_LIST(Hob) (GET_HOB_TYPE (Hob) == EFI_HOB_TYPE_END_OF_HOB_LIST)
+
+//
+// Get the data and data size field of GUID
+//
+#define GET_GUID_HOB_DATA(GuidHob) ((VOID *) (((UINT8 *) &((GuidHob)->Name)) + sizeof (EFI_GUID)))
+#define GET_GUID_HOB_DATA_SIZE(GuidHob) (((GuidHob)->Header).HobLength - sizeof (EFI_HOB_GUID_TYPE))
+
+#endif
diff --git a/MdePkg/Include/Common/InternalFormRepresentation.h b/MdePkg/Include/Common/InternalFormRepresentation.h new file mode 100644 index 0000000000..bf3d824fbd --- /dev/null +++ b/MdePkg/Include/Common/InternalFormRepresentation.h @@ -0,0 +1,422 @@ +/** @file
+ This file defines the encoding for the VFR (Visual Form Representation) language.
+ IFR is primarily consumed by the EFI presentation engine, and produced by EFI
+ internal application and drivers as well as all add-in card option-ROM drivers
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: InternalFormRepresentation.h
+
+ @par Revision Reference:
+ These definitions are from Human Interface Infrastructure Spec Version 0.92.
+
+**/
+
+#ifndef __EFI_INTERNAL_FORM_REPRESENTATION_H__
+#define __EFI_INTERNAL_FORM_REPRESENTATION_H__
+
+//
+// The following types are currently defined:
+//
+typedef UINT32 RELOFST;
+typedef CHAR16 *EFI_STRING;
+
+//
+// IFR Op codes
+//
+#define EFI_IFR_FORM_OP 0x01
+#define EFI_IFR_SUBTITLE_OP 0x02
+#define EFI_IFR_TEXT_OP 0x03
+#define EFI_IFR_GRAPHIC_OP 0x04
+#define EFI_IFR_ONE_OF_OP 0x05
+#define EFI_IFR_CHECKBOX_OP 0x06
+#define EFI_IFR_NUMERIC_OP 0x07
+#define EFI_IFR_PASSWORD_OP 0x08
+#define EFI_IFR_ONE_OF_OPTION_OP 0x09 // ONEOF OPTION field
+#define EFI_IFR_SUPPRESS_IF_OP 0x0A
+#define EFI_IFR_END_FORM_OP 0x0B
+#define EFI_IFR_HIDDEN_OP 0x0C
+#define EFI_IFR_END_FORM_SET_OP 0x0D
+#define EFI_IFR_FORM_SET_OP 0x0E
+#define EFI_IFR_REF_OP 0x0F
+#define EFI_IFR_END_ONE_OF_OP 0x10
+#define EFI_IFR_END_OP EFI_IFR_END_ONE_OF_OP
+#define EFI_IFR_INCONSISTENT_IF_OP 0x11
+#define EFI_IFR_EQ_ID_VAL_OP 0x12
+#define EFI_IFR_EQ_ID_ID_OP 0x13
+#define EFI_IFR_EQ_ID_LIST_OP 0x14
+#define EFI_IFR_AND_OP 0x15
+#define EFI_IFR_OR_OP 0x16
+#define EFI_IFR_NOT_OP 0x17
+#define EFI_IFR_END_IF_OP 0x18 // for endif of inconsistentif, suppressif, grayoutif
+#define EFI_IFR_GRAYOUT_IF_OP 0x19
+#define EFI_IFR_DATE_OP 0x1A
+#define EFI_IFR_TIME_OP 0x1B
+#define EFI_IFR_STRING_OP 0x1C
+#define EFI_IFR_LABEL_OP 0x1D
+#define EFI_IFR_SAVE_DEFAULTS_OP 0x1E
+#define EFI_IFR_RESTORE_DEFAULTS_OP 0x1F
+#define EFI_IFR_BANNER_OP 0x20
+#define EFI_IFR_INVENTORY_OP 0x21
+#define EFI_IFR_EQ_VAR_VAL_OP 0x22
+#define EFI_IFR_ORDERED_LIST_OP 0x23
+#define EFI_IFR_VARSTORE_OP 0x24
+#define EFI_IFR_VARSTORE_SELECT_OP 0x25
+#define EFI_IFR_VARSTORE_SELECT_PAIR_OP 0x26
+#define EFI_IFR_TRUE_OP 0x27
+#define EFI_IFR_FALSE_OP 0x28
+#define EFI_IFR_GT_OP 0x29
+#define EFI_IFR_GE_OP 0x2A
+#define EFI_IFR_OEM_DEFINED_OP 0x2B
+#define EFI_IFR_LAST_OPCODE EFI_IFR_OEM_DEFINED_OP
+#define EFI_IFR_OEM_OP 0xFE
+#define EFI_IFR_NV_ACCESS_COMMAND 0xFF
+
+//
+// Define values for the flags fields in some VFR opcodes. These are
+// bitmasks.
+//
+#define EFI_IFR_FLAG_DEFAULT 0x01
+#define EFI_IFR_FLAG_MANUFACTURING 0x02
+#define EFI_IFR_FLAG_INTERACTIVE 0x04
+#define EFI_IFR_FLAG_NV_ACCESS 0x08
+#define EFI_IFR_FLAG_RESET_REQUIRED 0x10
+#define EFI_IFR_FLAG_LATE_CHECK 0x20
+
+#define EFI_NON_DEVICE_CLASS 0x00 // Useful when you do not want something in the Device Manager
+#define EFI_DISK_DEVICE_CLASS 0x01
+#define EFI_VIDEO_DEVICE_CLASS 0x02
+#define EFI_NETWORK_DEVICE_CLASS 0x04
+#define EFI_INPUT_DEVICE_CLASS 0x08
+#define EFI_ON_BOARD_DEVICE_CLASS 0x10
+#define EFI_OTHER_DEVICE_CLASS 0x20
+
+#define EFI_SETUP_APPLICATION_SUBCLASS 0x00
+#define EFI_GENERAL_APPLICATION_SUBCLASS 0x01
+#define EFI_FRONT_PAGE_SUBCLASS 0x02
+#define EFI_SINGLE_USE_SUBCLASS 0x03 // Used to display a single entity and then exit
+
+//
+// Used to flag dynamically created op-codes. This is meaningful to the IFR Library set
+// and the browser since we need to distinguish between compiled NV map data and created data.
+// We do not allow new entries to be created in the NV map dynamically however we still need
+// to display this information correctly. To dynamically create op-codes and assume that their
+// data will be saved, ensure that the NV starting location they refer to is pre-defined in the
+// NV map.
+//
+#define EFI_IFR_FLAG_CREATED 128
+
+#pragma pack(1)
+//
+// IFR Structure definitions
+//
+typedef struct {
+ UINT8 OpCode;
+ UINT8 Length;
+} EFI_IFR_OP_HEADER;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid;
+ STRING_REF FormSetTitle;
+ STRING_REF Help;
+ EFI_PHYSICAL_ADDRESS CallbackHandle;
+ UINT16 Class;
+ UINT16 SubClass;
+ UINT16 NvDataSize; // set once, size of the NV data as defined in the script
+} EFI_IFR_FORM_SET;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF FormTitle;
+} EFI_IFR_FORM;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 LabelId;
+} EFI_IFR_LABEL;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF SubTitle;
+} EFI_IFR_SUBTITLE;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo;
+ UINT8 Flags; // This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+} EFI_IFR_TEXT;
+
+//
+// goto
+//
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help; // The string Token for the context-help
+ UINT8 Flags; // This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+} EFI_IFR_REF;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_FORM_SET;
+
+//
+// Also notice that the IFR_ONE_OF and IFR_CHECK_BOX are identical in structure......code assumes this to be true, if this ever
+// changes we need to revisit the InitializeTagStructures code
+//
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name
+ UINT8 Width; // The Size of the Data being saved
+ STRING_REF Prompt; // The String Token for the Prompt
+ STRING_REF Help; // The string Token for the context-help
+} EFI_IFR_ONE_OF;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The offset in NV for storage of the data
+ UINT8 MaxEntries; // The maximum number of options in the ordered list (=size of NVStore)
+ STRING_REF Prompt; // The string token for the prompt
+ STRING_REF Help; // The string token for the context-help
+} EFI_IFR_ORDERED_LIST;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name
+ UINT8 Width; // The Size of the Data being saved
+ STRING_REF Prompt; // The String Token for the Prompt
+ STRING_REF Help; // The string Token for the context-help
+ UINT8 Flags; // For now, if non-zero, means that it is the default option, - further definition likely
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+} EFI_IFR_CHECKBOX, EFI_IFR_CHECK_BOX;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF Option; // The string token describing the option
+ UINT16 Value; // The value associated with this option that is stored in the NVRAM if chosen
+ UINT8 Flags; // For now, if non-zero, means that it is the default option, - further definition likely above
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+} EFI_IFR_ONE_OF_OPTION;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name
+ UINT8 Width; // The Size of the Data being saved
+ STRING_REF Prompt; // The String Token for the Prompt
+ STRING_REF Help; // The string Token for the context-help
+ UINT8 Flags; // This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+ UINT16 Minimum;
+ UINT16 Maximum;
+ UINT16 Step; // If step is 0, then manual input is specified, otherwise, left/right arrow selection is called for
+ UINT16 Default;
+} EFI_IFR_NUMERIC;
+
+//
+// There is an interesting twist with regards to Time and Date. This is one of the few items which can accept input from
+// a user, however may or may not need to use storage in the NVRAM space. The decided method for determining if NVRAM space
+// will be used (only for a TimeOp or DateOp) is: If .QuestionId == 0 && .Width == 0 (normally an impossibility) then use system
+// resources to store the data away and not NV resources. In other words, the setup engine will call gRT->SetTime, and gRT->SetDate
+// for the saving of data, and the values displayed will be from the gRT->GetXXXX series of calls.
+//
+typedef struct {
+ EFI_IFR_NUMERIC Hour;
+ EFI_IFR_NUMERIC Minute;
+ EFI_IFR_NUMERIC Second;
+} EFI_IFR_TIME;
+
+typedef struct {
+ EFI_IFR_NUMERIC Year;
+ EFI_IFR_NUMERIC Month;
+ EFI_IFR_NUMERIC Day;
+} EFI_IFR_DATE;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name
+ UINT8 Width; // The Size of the Data being saved -- BUGBUG -- remove someday
+ STRING_REF Prompt; // The String Token for the Prompt
+ STRING_REF Help; // The string Token for the context-help
+ UINT8 Flags; // This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+ UINT8 MinSize; // Minimum allowable sized password
+ UINT8 MaxSize; // Maximum allowable sized password
+ UINT16 Encoding;
+} EFI_IFR_PASSWORD;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // The ID designating what the question is about...sucked in from a #define, likely in the form of a variable name
+ UINT8 Width; // The Size of the Data being saved -- BUGBUG -- remove someday
+ STRING_REF Prompt; // The String Token for the Prompt
+ STRING_REF Help; // The string Token for the context-help
+ UINT8 Flags; // This is included solely for purposes of interactive/dynamic support.
+ UINT16 Key; // Value to be passed to caller to identify this particular op-code
+ UINT8 MinSize; // Minimum allowable sized password
+ UINT8 MaxSize; // Maximum allowable sized password
+} EFI_IFR_STRING;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_ONE_OF;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 Value;
+ UINT16 Key;
+} EFI_IFR_HIDDEN;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_SUPPRESS;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT8 Flags;
+} EFI_IFR_GRAY_OUT;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF Popup;
+ UINT8 Flags;
+} EFI_IFR_INCONSISTENT;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // offset into variable storage
+ UINT8 Width; // size of variable storage
+ UINT16 Value; // value to compare against
+} EFI_IFR_EQ_ID_VAL;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // offset into variable storage
+ UINT8 Width; // size of variable storage
+ UINT16 ListLength;
+ UINT16 ValueList[1];
+} EFI_IFR_EQ_ID_LIST;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId1; // offset into variable storage for first value to compare
+ UINT8 Width; // size of variable storage (must be same for both)
+ UINT16 QuestionId2; // offset into variable storage for second value to compare
+} EFI_IFR_EQ_ID_ID;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 VariableId; // offset into variable storage
+ UINT16 Value; // value to compare against
+} EFI_IFR_EQ_VAR_VAL;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_AND;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_OR;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_NOT;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_END_EXPR, EFI_IFR_END_IF;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 FormId;
+ STRING_REF Prompt;
+ STRING_REF Help;
+ UINT8 Flags;
+ UINT16 Key;
+} EFI_IFR_SAVE_DEFAULTS;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF Help;
+ STRING_REF Text;
+ STRING_REF TextTwo; // optional text
+} EFI_IFR_INVENTORY;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ EFI_GUID Guid; // GUID for the variable
+ UINT16 VarId; // variable store ID, as referenced elsewhere in the form
+ UINT16 Size; // size of the variable storage
+} EFI_IFR_VARSTORE;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; // variable store ID, as referenced elsewhere in the form
+} EFI_IFR_VARSTORE_SELECT;
+
+//
+// Used for the ideqid VFR statement where two variable stores may be referenced in the
+// same VFR statement.
+// A browser should treat this as an EFI_IFR_VARSTORE_SELECT statement and assume that all following
+// IFR opcodes use the VarId as defined here.
+//
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 VarId; // variable store ID, as referenced elsewhere in the form
+ UINT16 SecondaryVarId; // variable store ID, as referenced elsewhere in the form
+} EFI_IFR_VARSTORE_SELECT_PAIR;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_TRUE;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_FALSE;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_GT;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+} EFI_IFR_GE;
+
+//
+// Save defaults and restore defaults have same structure
+//
+#define EFI_IFR_RESTORE_DEFAULTS EFI_IFR_SAVE_DEFAULTS
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ STRING_REF Title; // The string token for the banner title
+ UINT16 LineNumber; // 1-based line number
+ UINT8 Alignment; // left, center, or right-aligned
+} EFI_IFR_BANNER;
+
+#define EFI_IFR_BANNER_ALIGN_LEFT 0
+#define EFI_IFR_BANNER_ALIGN_CENTER 1
+#define EFI_IFR_BANNER_ALIGN_RIGHT 2
+#define EFI_IFR_BANNER_TIMEOUT 0xFF
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/Common/Legacy16.h b/MdePkg/Include/Common/Legacy16.h new file mode 100644 index 0000000000..1f8b9bf324 --- /dev/null +++ b/MdePkg/Include/Common/Legacy16.h @@ -0,0 +1,310 @@ +/** @file
+ API between 16-bit Legacy BIOS and EFI
+
+ We need to figure out what the 16-bit code is going to use to
+ represent these data structures. Is a pointer SEG:OFF or 32-bit...
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Legacy16.h
+
+ @par Revision Reference:
+ These definitions are from Compatibility Support Module Spec Version 0.96.
+
+**/
+
+#ifndef LEGACY_16_H_
+#define LEGACY_16_H_
+
+#define EFI_TO_LEGACY_MAJOR_VERSION 0x02
+#define EFI_TO_LEGACY_MINOR_VERSION 0x00
+
+#pragma pack(1)
+//
+// EFI Legacy to Legacy16 data
+// EFI_COMPATIBILITY16_TABLE has been moved to LegacyBios protocol defn file.
+//
+typedef struct {
+ //
+ // Memory map used to start up Legacy16 code
+ //
+ UINT32 BiosLessThan1MB;
+ UINT32 HiPmmMemory;
+ UINT32 PmmMemorySizeInBytes;
+
+ UINT16 ReverseThunkCallSegment;
+ UINT16 ReverseThunkCallOffset;
+ UINT32 NumberE820Entries;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 ThunkStart;
+ UINT32 ThunkSizeInBytes;
+ UINT32 LowPmmMemory;
+ UINT32 LowPmmMemorySizeInBytes;
+} EFI_TO_COMPATIBILITY16_INIT_TABLE;
+
+#pragma pack()
+//
+// Legacy16 Call types
+//
+typedef enum {
+ Legacy16InitializeYourself = 0x0000,
+ Legacy16UpdateBbs = 0x0001,
+ Legacy16PrepareToBoot = 0x0002,
+ Legacy16Boot = 0x0003,
+ Legacy16RetrieveLastBootDevice= 0x0004,
+ Legacy16DispatchOprom = 0x0005,
+ Legacy16GetTableAddress = 0x0006,
+ Legacy16SetKeyboardLeds = 0x0007,
+ Legacy16InstallPciHandler = 0x0008,
+} EFI_COMPATIBILITY_FUNCTIONS;
+
+#define F0000Region 0x01
+#define E0000Region 0x02
+//
+// Legacy16 call prototypes
+// Input: AX = EFI_COMPATIBILITY16_FUNCTIONS for all functions.
+// Output: AX = Return status for all functions. It follows EFI error
+// codes.
+//
+// Legacy16InitializeYourself
+// Description: This is the first call to 16-bit code. It allows the
+// 16-bit to perform any internal initialization.
+// Input: ES:BX pointer to EFI_TO_LEGACY16_INIT_TABLE
+// Output:
+// Legacy16UpdateBbs
+// Description: The 16-bit code updates the BBS table for non-compliant
+// devices.
+// Input: ES:BX pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
+// Output:
+// Legacy16PrepareToBoot
+// Description: This is the last call to 16-bit code where 0xE0000 -0xFFFFF
+// is read/write. 16-bit code does any final clean up.
+// Input: ES:BX pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
+// Output:
+// Legacy16Boot
+// Description: Do INT19.
+// Input:
+// Output:
+// Legacy16RetrieveLastBootDevice
+// Description: Return the priority number of the device that booted.
+// Input:
+// Output: BX = priority number of the last attempted boot device.
+// Legacy16DispatchOprom
+// Description: Pass control to the specified OPROM. Allows the 16-bit
+// code to rehook INT 13,18 and/or 19 from non-BBS
+// compliant devices.
+// Input: ES:DI = Segment:Offset of PnPInstallationCheck
+// SI = OPROM segment. Offset assumed to be 3.
+// BH = PCI bus number.
+// BL = PCI device * 8 | PCI function.
+// Output: BX = Number of BBS non-compliant drives detected. Return
+// zero for BBS compliant devices.
+// Legacy16GetTableAddress
+// Description: Allocate an area in the 0xE0000-0xFFFFF region.
+// Input: BX = Allocation region.
+// 0x0 = Any region
+// Bit 0 = 0xF0000 region
+// Bit 1 = 0xE0000 region
+// Multiple bits can be set.
+// CX = Length in bytes requested
+// DX = Required address alignment
+// Bit mapped. First non-zero bit from right to left is
+// alignment.
+// Output: DS:BX is assigned region.
+// AX = EFI_OUT_OF_RESOURCES if request cannot be granted.
+// Legacy16SetKeyboardLeds
+// Description: Perform any special action when keyboard LEDS change.
+// Other code performs the LED change and updates standard
+// BDA locations. This is for non-standard operations.
+// Input: CL = LED status. 1 = set.
+// Bit 0 = Scroll lock
+// Bit 1 = Num lock
+// Bit 2 = Caps lock
+// Output:
+// Legacy16InstallPciHandler
+// Description: Provides 16-bit code a hook to establish an interrupt
+// handler for any PCI device requiring a PCI interrupt
+// but having no OPROM. This is called before interrupt
+// is assigned. 8259 will be disabled(even if sharded)
+// and PCI Interrupt Line unprogrammed. Other code will
+// program 8259 and PCI Interrupt Line.
+// Input: ES:BX Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER strcture
+// Output:
+//
+typedef UINT8 SERIAL_MODE;
+typedef UINT8 PARALLEL_MODE;
+
+#pragma pack(1)
+
+#define DEVICE_SERIAL_MODE_NORMAL 0x00
+#define DEVICE_SERIAL_MODE_IRDA 0x01
+#define DEVICE_SERIAL_MODE_ASK_IR 0x02
+#define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
+#define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
+
+#define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
+#define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
+#define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
+#define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
+
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ SERIAL_MODE Mode;
+} DEVICE_PRODUCER_SERIAL;
+
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ PARALLEL_MODE Mode;
+} DEVICE_PRODUCER_PARALLEL;
+
+typedef struct {
+ UINT16 Address;
+ UINT8 Irq;
+ UINT8 Dma;
+ UINT8 NumberOfFloppy;
+} DEVICE_PRODUCER_FLOPPY;
+
+typedef struct {
+ UINT32 A20Kybd : 1;
+ UINT32 A20Port90 : 1;
+ UINT32 Reserved : 30;
+} LEGACY_DEVICE_FLAGS;
+
+typedef struct {
+ DEVICE_PRODUCER_SERIAL Serial[4];
+ DEVICE_PRODUCER_PARALLEL Parallel[3];
+ DEVICE_PRODUCER_FLOPPY Floppy;
+ UINT8 MousePresent;
+ LEGACY_DEVICE_FLAGS Flags;
+} DEVICE_PRODUCER_DATA_HEADER;
+//
+// SMM Table definitions
+// SMM table has a header that provides the number of entries. Following
+// the header is a variable length amount of data.
+//
+
+#define STANDARD_IO 0x00
+#define STANDARD_MEMORY 0x01
+
+#define PORT_SIZE_8 0x00
+#define PORT_SIZE_16 0x01
+#define PORT_SIZE_32 0x02
+#define PORT_SIZE_64 0x03
+
+#define DATA_SIZE_8 0x00
+#define DATA_SIZE_16 0x01
+#define DATA_SIZE_32 0x02
+#define DATA_SIZE_64 0x03
+
+typedef struct {
+ UINT16 Type : 3;
+ UINT16 PortGranularity : 3;
+ UINT16 DataGranularity : 3;
+ UINT16 Reserved : 7;
+} SMM_ATTRIBUTES;
+
+#define INT15_D042 0x0000
+#define GET_USB_BOOT_INFO 0x0001
+#define DMI_PNP_50_57 0x0002
+
+#define STANDARD_OWNER 0x0
+#define OEM_OWNER 0x1
+
+typedef struct {
+ UINT16 Function : 15;
+ UINT16 Owner : 1;
+} SMM_FUNCTION;
+
+typedef struct {
+ SMM_ATTRIBUTES SmmAttributes;
+ SMM_FUNCTION SmmFunction;
+ //
+ // Data size depends upon SmmAttributes and ranges from 2 bytes to
+ // 16 bytes
+ //
+ // bugbug how to do variable length Data
+ //
+ UINT8 SmmPort;
+ UINT8 SmmData;
+} SMM_ENTRY;
+
+typedef struct {
+ UINT16 NumSmmEntries;
+ SMM_ENTRY SmmEntry;
+} SMM_TABLE;
+
+//
+// If MAX_IDE_CONTROLLER changes value 16-bit legacy code needs to change
+//
+#define MAX_IDE_CONTROLLER 8
+
+typedef struct {
+ UINT16 MajorVersion;
+ UINT16 MinorVersion;
+
+ UINT32 AcpiTable; // 4 GB range
+ UINT32 SmbiosTable; // 4 GB range
+ UINT32 SmbiosTableLength;
+
+ //
+ // Legacy SIO state
+ //
+ DEVICE_PRODUCER_DATA_HEADER SioData;
+
+ UINT16 DevicePathType;
+ UINT16 PciIrqMask;
+ UINT32 NumberE820Entries;
+ //
+ // Controller & Drive Identify[2] per controller information
+ //
+ HDD_INFO HddInfo[MAX_IDE_CONTROLLER];
+ UINT32 NumberBbsEntries;
+ UINT32 BbsTable;
+ UINT32 SmmTable;
+ UINT32 OsMemoryAbove1Mb;
+ UINT32 UnconventionalDeviceTable;
+} EFI_TO_COMPATIBILITY16_BOOT_TABLE;
+
+typedef struct {
+ UINT8 PciBus;
+ UINT8 PciDeviceFun;
+ UINT8 PciSegment;
+ UINT8 PciClass;
+ UINT8 PciSubclass;
+ UINT8 PciInterface;
+ UINT8 PrimaryIrq;
+ UINT8 PrimaryReserved;
+ UINT16 PrimaryControl;
+ UINT16 PrimaryBase;
+ UINT16 PrimaryBusMaster;
+ UINT8 SecondaryIrq;
+ UINT8 SecondaryReserved;
+ UINT16 SecondaryControl;
+ UINT16 SecondaryBase;
+ UINT16 SecondaryBusMaster;
+} EFI_LEGACY_INSTALL_PCI_HANDLER;
+
+typedef struct {
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+ UINT16 OpromSegment;
+ UINT8 PciBus;
+ UINT8 PciDeviceFunction;
+ UINT8 NumberBbsEntries;
+ VOID *BbsTablePointer;
+
+} EFI_DISPATCH_OPROM_TABLE;
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/Common/MultiPhase.h b/MdePkg/Include/Common/MultiPhase.h new file mode 100644 index 0000000000..93867a5e8a --- /dev/null +++ b/MdePkg/Include/Common/MultiPhase.h @@ -0,0 +1,84 @@ +/** @file
+ This includes some definitions that will be used in both PEI and DXE phases.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MultiPhase.h
+
+**/
+
+#ifndef __MULTI_PHASE_H__
+#define __MULTI_PHASE_H__
+
+//
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+//
+// Needed EFI defines for PEI
+//
+typedef UINT64 EFI_PHYSICAL_ADDRESS;
+
+typedef enum {
+ EfiReservedMemoryType,
+ EfiLoaderCode,
+ EfiLoaderData,
+ EfiBootServicesCode,
+ EfiBootServicesData,
+ EfiRuntimeServicesCode,
+ EfiRuntimeServicesData,
+ EfiConventionalMemory,
+ EfiUnusableMemory,
+ EfiACPIReclaimMemory,
+ EfiACPIMemoryNVS,
+ EfiMemoryMappedIO,
+ EfiMemoryMappedIOPortSpace,
+ EfiPalCode,
+ EfiMaxMemoryType
+} EFI_MEMORY_TYPE;
+
+typedef UINT32 EFI_STATUS_CODE_TYPE;
+typedef UINT32 EFI_STATUS_CODE_VALUE;
+
+typedef struct {
+ UINT16 HeaderSize;
+ UINT16 Size;
+ EFI_GUID Type;
+} EFI_STATUS_CODE_DATA;
+
+typedef struct {
+ UINT64 Signature;
+ UINT32 Revision;
+ UINT32 HeaderSize;
+ UINT32 CRC32;
+ UINT32 Reserved;
+} EFI_TABLE_HEADER;
+
+#define EFI_PAGE_SIZE 4096
+
+
+typedef VOID *EFI_HANDLE;
+typedef UINT16 EFI_HII_HANDLE;
+typedef UINT16 STRING_REF;
+typedef struct {
+ INT16 Value;
+ INT16 Exponent;
+} EFI_EXP_BASE10_DATA;
+
+//
+// Define macros to build data structure signatures from characters.
+//
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define EFI_SIGNATURE_64(A, B, C, D, E, F, G, H) \
+ (EFI_SIGNATURE_32 (A, B, C, D) | ((UINT64) (EFI_SIGNATURE_32 (E, F, G, H)) << 32))
+
+
+#include <Protocol/DevicePath.h>
+
+#endif
diff --git a/MdePkg/Include/Common/Pcd.h b/MdePkg/Include/Common/Pcd.h new file mode 100644 index 0000000000..7d1362ccf3 --- /dev/null +++ b/MdePkg/Include/Common/Pcd.h @@ -0,0 +1,33 @@ +/** @file
+ This file defines the common macro and data structure shared between PCD PEIM and
+ PCD DXE driver.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Pcd.h
+
+**/
+#ifndef _COMMON_PCD_H
+#define _COMMON_PCD_H
+
+typedef UINT32 PCD_TOKEN_NUMBER;
+typedef UINT8 SKU_ID;
+
+#define PCD_INVALID_TOKEN ((PCD_TOKEN_NUMBER)(-1))
+
+typedef
+VOID
+(EFIAPI *PCD_PROTOCOL_CALLBACK) (
+ IN UINT32 CallBackToken,
+ IN VOID *TokenData,
+ IN UINTN TokenDataSize
+ );
+
+#endif
diff --git a/MdePkg/Include/Common/PcdTemp.h b/MdePkg/Include/Common/PcdTemp.h new file mode 100644 index 0000000000..3428b4f6fe --- /dev/null +++ b/MdePkg/Include/Common/PcdTemp.h @@ -0,0 +1,91 @@ +/** @file
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PCD_TEMP_H__
+#define __PCD_TEMP_H__
+
+#define PCD_INVALID_TOKEN ((UINTN)(-1))
+
+/*
+ * The following structure will be removed soon after the real
+ * PCD service PEIM and DXE driver are implmented.
+ */
+
+///
+/// I have rearranged the data so that the variable length items are at the end of the structure
+/// and we have a reasonable change of interpreting the other stuff properly.
+///
+typedef struct {
+ UINTN Token;
+
+ //
+ // HII Knowledge - non optimized for now
+ //
+ UINT8 HiiData; // If TRUE, use Variable Data
+ UINT8 SKUEnabled; // If TRUE, there might be various SKU data entries for this Token
+ UINT8 MaxSKUCount; // Up to 256 entries - limits the search space
+ UINT8 SKUId; // ID of the SKU
+
+ GUID VariableGuid; // Variable GUID
+ UINT32 DatumSize;
+ UINT64 Datum;
+ CHAR16 *VariableName; // Null-terminated Variable Name (remember to calculate size)
+ // We still need Offset information for the variable
+ // So naturally we can use DatumSize as the Length Field
+ // And we can overload the use of Datum for the Offset information
+ VOID *ExtendedData; // VOID* data of size DatumSize
+} EMULATED_PCD_ENTRY;
+
+typedef
+VOID
+(EFIAPI *PCD_TEMP_CALLBACK) (
+ IN CONST EFI_GUID *CallBackGuid, OPTIONAL
+ IN UINTN CallBackToken,
+ IN VOID *TokenData,
+ IN UINTN TokenDataSize
+ );
+
+///
+/// Used by the PCD Database - never contained in an FFS file
+///
+typedef struct {
+ UINTN Token;
+
+ //
+ // HII Knowledge - non optimized for now
+ //
+ UINT8 HiiData; // If TRUE, use Variable Data
+ UINT8 SKUEnabled; // If TRUE, there might be various SKU data entries for this Token
+ UINT8 MaxSKUCount; // Up to 256 entries - limits the search space
+ UINT8 SKUId; // ID of the SKU
+
+ GUID VariableGuid; // Variable GUID
+ UINT32 DatumSize;
+ UINT64 Datum;
+ CHAR16 *VariableName; // Null-terminated Variable Name (remember to calculate size)
+ // We still need Offset information for the variable
+ // So naturally we can use DatumSize as the Length Field
+ // And we can overload the use of Datum for the Offset information
+ VOID *ExtendedData; // VOID* data of size DatumSize
+
+ PCD_TEMP_CALLBACK *CallBackList;
+ UINT32 CallBackEntries;
+ UINT32 CallBackListSize;
+} EMULATED_PCD_ENTRY_EX; // This exists to facilitate PCD Database implementation only
+
+typedef struct {
+ UINTN Count;
+ EMULATED_PCD_ENTRY_EX Entry[1]; // This exists to facilitate PCD Database implementation only
+} EMULATED_PCD_DATABASE_EX;
+
+#endif
diff --git a/MdePkg/Include/Common/StatusCode.h b/MdePkg/Include/Common/StatusCode.h new file mode 100644 index 0000000000..474ed106f8 --- /dev/null +++ b/MdePkg/Include/Common/StatusCode.h @@ -0,0 +1,912 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+
+ The file is divided into sections for ease of use.
+
+<pre>
+ Section: Contents:
+ 1 General Status Code Definitions
+ 2 Class definitions
+ 3 Computing Unit Subclasses, Progress and Error Codes
+ 4 Peripheral Subclasses, Progress and Error Codes.
+ 5 IO Bus Subclasses, Progress and Error Codes.
+ 6 Software Subclasses, Progress and Error Codes.
+ 7 Debug Codes
+</pre>
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCode.h
+
+ @par Revision Reference:
+ Version 0.92.
+
+**/
+
+#ifndef _EFI_STATUS_CODE_H_
+#define _EFI_STATUS_CODE_H_
+
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 1
+///////////////////////////////////////////////////////////////////////////////
+
+//
+// A Status Code Type is made up of the code type and severity
+// All values masked by EFI_STATUS_CODE_RESERVED_MASK are
+// reserved for use by this specification.
+//
+#define EFI_STATUS_CODE_TYPE_MASK 0x000000FF
+#define EFI_STATUS_CODE_SEVERITY_MASK 0xFF000000
+#define EFI_STATUS_CODE_RESERVED_MASK 0x00FFFF00
+
+//
+// Definition of code types, all other values masked by
+// EFI_STATUS_CODE_TYPE_MASK are reserved for use by
+// this specification.
+//
+#define EFI_PROGRESS_CODE 0x00000001
+#define EFI_ERROR_CODE 0x00000002
+#define EFI_DEBUG_CODE 0x00000003
+
+//
+// Definitions of severities, all other values masked by
+// EFI_STATUS_CODE_SEVERITY_MASK are reserved for use by
+// this specification.
+//
+#define EFI_ERROR_MINOR 0x40000000
+#define EFI_ERROR_MAJOR 0x80000000
+#define EFI_ERROR_UNRECOVERED 0x90000000
+#define EFI_ERROR_UNCONTAINED 0xA0000000
+
+//
+// A Status Code Value is made up of the class, subclass, and
+// an operation. Classes, subclasses, and operations are defined
+// in the following sections.
+//
+#define EFI_STATUS_CODE_CLASS_MASK 0xFF000000
+#define EFI_STATUS_CODE_SUBCLASS_MASK 0x00FF0000
+#define EFI_STATUS_CODE_OPERATION_MASK 0x0000FFFF
+
+//
+// Data Hub Status Code class record definition
+//
+typedef struct {
+ EFI_STATUS_CODE_TYPE CodeType;
+ EFI_STATUS_CODE_VALUE Value;
+ UINT32 Instance;
+ EFI_GUID CallerId;
+ EFI_STATUS_CODE_DATA Data;
+} DATA_HUB_STATUS_CODE_DATA_RECORD;
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 2
+///////////////////////////////////////////////////////////////////////////////
+//
+// Class definitions
+// Values of 4-127 are reserved for future use by this
+// specification.
+// Values in the range 127-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT 0x00000000
+#define EFI_PERIPHERAL 0x01000000
+#define EFI_IO_BUS 0x02000000
+#define EFI_SOFTWARE 0x03000000
+
+//
+// General partitioning scheme for Progress and Error Codes are
+// 0x0000-0x0FFF - Shared by all sub-classes in a given class
+// 0x1000-0x7FFF - Subclass Specific
+// 0x8000-0xFFFF - OEM specific
+//
+#define EFI_SUBCLASS_SPECIFIC 0x1000
+#define EFI_OEM_SPECIFIC 0x8000
+
+//
+// /////////////////////////////////////////////////////////////////////////////
+// Section 3
+///////////////////////////////////////////////////////////////////////////////
+//
+// Computing Unit Subclass definitions.
+// Values of 8-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_COMPUTING_UNIT_UNSPECIFIED (EFI_COMPUTING_UNIT | 0x00000000)
+#define EFI_COMPUTING_UNIT_HOST_PROCESSOR (EFI_COMPUTING_UNIT | 0x00010000)
+#define EFI_COMPUTING_UNIT_FIRMWARE_PROCESSOR (EFI_COMPUTING_UNIT | 0x00020000)
+#define EFI_COMPUTING_UNIT_IO_PROCESSOR (EFI_COMPUTING_UNIT | 0x00030000)
+#define EFI_COMPUTING_UNIT_CACHE (EFI_COMPUTING_UNIT | 0x00040000)
+#define EFI_COMPUTING_UNIT_MEMORY (EFI_COMPUTING_UNIT | 0x00050000)
+#define EFI_COMPUTING_UNIT_CHIPSET (EFI_COMPUTING_UNIT | 0x00060000)
+
+//
+// Computing Unit Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_PC_INIT_BEGIN 0x00000000
+#define EFI_CU_PC_INIT_END 0x00000001
+
+//
+// Computing Unit Unspecified Subclass Progress Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Progress Code definitions.
+//
+#define EFI_CU_HP_PC_POWER_ON_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_PC_CACHE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_PC_RAM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_PC_MEMORY_CONTROLLER_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_PC_IO_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_PC_BSP_SELECT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_PC_BSP_RESELECT (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_PC_AP_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_PC_SMM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+
+//
+// Computing Unit Firmware Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit IO Processor Subclass Progress Code definitions.
+//
+//
+// Computing Unit Cache Subclass Progress Code definitions.
+//
+#define EFI_CU_CACHE_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_PC_CONFIGURATION (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Computing Unit Memory Subclass Progress Code definitions.
+//
+#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Computing Unit Chipset Subclass Progress Code definitions.
+//
+//
+// Computing Unit Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_CU_EC_NON_SPECIFIC 0x00000000
+#define EFI_CU_EC_DISABLED 0x00000001
+#define EFI_CU_EC_NOT_SUPPORTED 0x00000002
+#define EFI_CU_EC_NOT_DETECTED 0x00000003
+#define EFI_CU_EC_NOT_CONFIGURED 0x00000004
+
+//
+// Computing Unit Unspecified Subclass Error Code definitions.
+//
+//
+// Computing Unit Host Processor Subclass Error Code definitions.
+//
+#define EFI_CU_HP_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_HP_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_HP_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_HP_EC_TIMER_EXPIRED (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_HP_EC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_HP_EC_INTERNAL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_HP_EC_THERMAL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_HP_EC_LOW_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_HP_EC_HIGH_VOLTAGE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_HP_EC_CACHE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_HP_EC_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_CU_HP_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_CU_HP_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_CU_HP_EC_NO_MICROCODE_UPDATE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+
+//
+// Computing Unit Firmware Processor Subclass Error Code definitions.
+//
+#define EFI_CU_FP_EC_HARD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_FP_EC_SOFT_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_FP_EC_COMM_ERROR (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Computing Unit IO Processor Subclass Error Code definitions.
+//
+//
+// Computing Unit Cache Subclass Error Code definitions.
+//
+#define EFI_CU_CACHE_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_CACHE_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_CACHE_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_CACHE_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Computing Unit Memory Subclass Error Code definitions.
+//
+#define EFI_CU_MEMORY_EC_INVALID_TYPE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_EC_INVALID_SPEED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_EC_CORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_EC_UNCORRECTABLE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_EC_SPD_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_EC_INVALID_SIZE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_EC_MISMATCH (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_EC_S3_RESUME_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_EC_UPDATE_FAIL (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_CU_MEMORY_EC_NONE_DETECTED (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_CU_MEMORY_EC_NONE_USEFUL (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Computing Unit Chipset Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 4
+///////////////////////////////////////////////////////////////////////////////
+//
+// Peripheral Subclass definitions.
+// Values of 12-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_PERIPHERAL_UNSPECIFIED (EFI_PERIPHERAL | 0x00000000)
+#define EFI_PERIPHERAL_KEYBOARD (EFI_PERIPHERAL | 0x00010000)
+#define EFI_PERIPHERAL_MOUSE (EFI_PERIPHERAL | 0x00020000)
+#define EFI_PERIPHERAL_LOCAL_CONSOLE (EFI_PERIPHERAL | 0x00030000)
+#define EFI_PERIPHERAL_REMOTE_CONSOLE (EFI_PERIPHERAL | 0x00040000)
+#define EFI_PERIPHERAL_SERIAL_PORT (EFI_PERIPHERAL | 0x00050000)
+#define EFI_PERIPHERAL_PARALLEL_PORT (EFI_PERIPHERAL | 0x00060000)
+#define EFI_PERIPHERAL_FIXED_MEDIA (EFI_PERIPHERAL | 0x00070000)
+#define EFI_PERIPHERAL_REMOVABLE_MEDIA (EFI_PERIPHERAL | 0x00080000)
+#define EFI_PERIPHERAL_AUDIO_INPUT (EFI_PERIPHERAL | 0x00090000)
+#define EFI_PERIPHERAL_AUDIO_OUTPUT (EFI_PERIPHERAL | 0x000A0000)
+#define EFI_PERIPHERAL_LCD_DEVICE (EFI_PERIPHERAL | 0x000B0000)
+#define EFI_PERIPHERAL_NETWORK (EFI_PERIPHERAL | 0x000C0000)
+
+//
+// Peripheral Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_PC_INIT 0x00000000
+#define EFI_P_PC_RESET 0x00000001
+#define EFI_P_PC_DISABLE 0x00000002
+#define EFI_P_PC_PRESENCE_DETECT 0x00000003
+#define EFI_P_PC_ENABLE 0x00000004
+#define EFI_P_PC_RECONFIG 0x00000005
+#define EFI_P_PC_DETECTED 0x00000006
+
+//
+// Peripheral Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Progress Code definitions.
+//
+#define EFI_P_KEYBOARD_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Progress Code definitions.
+//
+#define EFI_P_MOUSE_PC_SELF_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Progress Code definitions.
+//
+#define EFI_P_SERIAL_PORT_PC_CLEAR_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Parallel Port Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Progress Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Network Subclass Progress Code definitions.
+//
+//
+// Peripheral Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_P_EC_NON_SPECIFIC 0x00000000
+#define EFI_P_EC_DISABLED 0x00000001
+#define EFI_P_EC_NOT_SUPPORTED 0x00000002
+#define EFI_P_EC_NOT_DETECTED 0x00000003
+#define EFI_P_EC_NOT_CONFIGURED 0x00000004
+#define EFI_P_EC_INTERFACE_ERROR 0x00000005
+#define EFI_P_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_P_EC_INPUT_ERROR 0x00000007
+#define EFI_P_EC_OUTPUT_ERROR 0x00000008
+#define EFI_P_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// Peripheral Class Unspecified Subclass Error Code definitions.
+//
+//
+// Peripheral Class Keyboard Subclass Error Code definitions.
+//
+#define EFI_P_KEYBOARD_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_P_KEYBOARD_EC_STUCK_KEY (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Peripheral Class Mouse Subclass Error Code definitions.
+//
+#define EFI_P_MOUSE_EC_LOCKED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Peripheral Class Local Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Remote Console Subclass Error Code definitions.
+//
+//
+// Peripheral Class Serial Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Parallel Port Subclass Error Code definitions.
+//
+//
+// Peripheral Class Fixed Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Removable Media Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Input Subclass Error Code definitions.
+//
+//
+// Peripheral Class Audio Output Subclass Error Code definitions.
+//
+//
+// Peripheral Class LCD Device Subclass Error Code definitions.
+//
+//
+// Peripheral Class Network Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 5
+///////////////////////////////////////////////////////////////////////////////
+//
+// IO Bus Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_IO_BUS_UNSPECIFIED (EFI_IO_BUS | 0x00000000)
+#define EFI_IO_BUS_PCI (EFI_IO_BUS | 0x00010000)
+#define EFI_IO_BUS_USB (EFI_IO_BUS | 0x00020000)
+#define EFI_IO_BUS_IBA (EFI_IO_BUS | 0x00030000)
+#define EFI_IO_BUS_AGP (EFI_IO_BUS | 0x00040000)
+#define EFI_IO_BUS_PC_CARD (EFI_IO_BUS | 0x00050000)
+#define EFI_IO_BUS_LPC (EFI_IO_BUS | 0x00060000)
+#define EFI_IO_BUS_SCSI (EFI_IO_BUS | 0x00070000)
+#define EFI_IO_BUS_ATA_ATAPI (EFI_IO_BUS | 0x00080000)
+#define EFI_IO_BUS_FC (EFI_IO_BUS | 0x00090000)
+#define EFI_IO_BUS_IP_NETWORK (EFI_IO_BUS | 0x000A0000)
+#define EFI_IO_BUS_SMBUS (EFI_IO_BUS | 0x000B0000)
+#define EFI_IO_BUS_I2C (EFI_IO_BUS | 0x000C0000)
+
+//
+// IO Bus Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_PC_INIT 0x00000000
+#define EFI_IOB_PC_RESET 0x00000001
+#define EFI_IOB_PC_DISABLE 0x00000002
+#define EFI_IOB_PC_DETECT 0x00000003
+#define EFI_IOB_PC_ENABLE 0x00000004
+#define EFI_IOB_PC_RECONFIG 0x00000005
+#define EFI_IOB_PC_HOTPLUG 0x00000006
+
+//
+// IO Bus Class Unspecified Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Progress Code definitions.
+//
+#define EFI_IOB_PCI_PC_BUS_ENUM (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_PC_RES_ALLOC (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_PCI_PC_HPC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// IO Bus Class USB Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Progress Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Progress Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Progress Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Progress Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Progress Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_ENABLE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// IO Bus Class FC Subclass Progress Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Progress Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Progress Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Progress Code definitions.
+//
+//
+// IO Bus Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_IOB_EC_NON_SPECIFIC 0x00000000
+#define EFI_IOB_EC_DISABLED 0x00000001
+#define EFI_IOB_EC_NOT_SUPPORTED 0x00000002
+#define EFI_IOB_EC_NOT_DETECTED 0x00000003
+#define EFI_IOB_EC_NOT_CONFIGURED 0x00000004
+#define EFI_IOB_EC_INTERFACE_ERROR 0x00000005
+#define EFI_IOB_EC_CONTROLLER_ERROR 0x00000006
+#define EFI_IOB_EC_READ_ERROR 0x00000007
+#define EFI_IOB_EC_WRITE_ERROR 0x00000008
+#define EFI_IOB_EC_RESOURCE_CONFLICT 0x00000009
+
+//
+// IO Bus Class Unspecified Subclass Error Code definitions.
+//
+//
+// IO Bus Class PCI Subclass Error Code definitions.
+//
+#define EFI_IOB_PCI_EC_PERR (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_PCI_EC_SERR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class USB Subclass Error Code definitions.
+//
+//
+// IO Bus Class IBA Subclass Error Code definitions.
+//
+//
+// IO Bus Class AGP Subclass Error Code definitions.
+//
+//
+// IO Bus Class PC Card Subclass Error Code definitions.
+//
+//
+// IO Bus Class LPC Subclass Error Code definitions.
+//
+//
+// IO Bus Class SCSI Subclass Error Code definitions.
+//
+//
+// IO Bus Class ATA/ATAPI Subclass Error Code definitions.
+//
+#define EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_IOB_ATA_BUS_SMART_DISABLED (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// IO Bus Class FC Subclass Error Code definitions.
+//
+//
+// IO Bus Class IP Network Subclass Error Code definitions.
+//
+//
+// IO Bus Class SMBUS Subclass Error Code definitions.
+//
+//
+// IO Bus Class I2C Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 6
+///////////////////////////////////////////////////////////////////////////////
+//
+// Software Subclass definitions.
+// Values of 14-127 are reserved for future use by this
+// specification.
+// Values of 128-255 are reserved for OEM use.
+//
+#define EFI_SOFTWARE_UNSPECIFIED (EFI_SOFTWARE | 0x00000000)
+#define EFI_SOFTWARE_SEC (EFI_SOFTWARE | 0x00010000)
+#define EFI_SOFTWARE_PEI_CORE (EFI_SOFTWARE | 0x00020000)
+#define EFI_SOFTWARE_PEI_MODULE (EFI_SOFTWARE | 0x00030000)
+#define EFI_SOFTWARE_DXE_CORE (EFI_SOFTWARE | 0x00040000)
+#define EFI_SOFTWARE_DXE_BS_DRIVER (EFI_SOFTWARE | 0x00050000)
+#define EFI_SOFTWARE_DXE_RT_DRIVER (EFI_SOFTWARE | 0x00060000)
+#define EFI_SOFTWARE_SMM_DRIVER (EFI_SOFTWARE | 0x00070000)
+#define EFI_SOFTWARE_EFI_APPLICATION (EFI_SOFTWARE | 0x00080000)
+#define EFI_SOFTWARE_EFI_OS_LOADER (EFI_SOFTWARE | 0x00090000)
+#define EFI_SOFTWARE_RT (EFI_SOFTWARE | 0x000A0000)
+#define EFI_SOFTWARE_AL (EFI_SOFTWARE | 0x000B0000)
+#define EFI_SOFTWARE_EBC_EXCEPTION (EFI_SOFTWARE | 0x000C0000)
+#define EFI_SOFTWARE_IA32_EXCEPTION (EFI_SOFTWARE | 0x000D0000)
+#define EFI_SOFTWARE_IPF_EXCEPTION (EFI_SOFTWARE | 0x000E0000)
+#define EFI_SOFTWARE_PEI_SERVICE (EFI_SOFTWARE | 0x000F0000)
+#define EFI_SOFTWARE_EFI_BOOT_SERVICE (EFI_SOFTWARE | 0x00100000)
+#define EFI_SOFTWARE_EFI_RUNTIME_SERVICE (EFI_SOFTWARE | 0x00110000)
+#define EFI_SOFTWARE_EFI_DXE_SERVICE (EFI_SOFTWARE | 0x00120000)
+
+//
+// Software Class Progress Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_PC_INIT 0x00000000
+#define EFI_SW_PC_LOAD 0x00000001
+#define EFI_SW_PC_INIT_BEGIN 0x00000002
+#define EFI_SW_PC_INIT_END 0x00000003
+#define EFI_SW_PC_AUTHENTICATE_BEGIN 0x00000004
+#define EFI_SW_PC_AUTHENTICATE_END 0x00000005
+#define EFI_SW_PC_INPUT_WAIT 0x00000006
+#define EFI_SW_PC_USER_SETUP 0x00000007
+
+//
+// Software Class Unspecified Subclass Progress Code definitions.
+//
+//
+// Software Class SEC Subclass Progress Code definitions.
+//
+#define EFI_SW_SEC_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_SEC_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class PEI Core Subclass Progress Code definitions.
+//
+#define EFI_SW_PEI_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEI_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class PEI Module Subclass Progress Code definitions.
+//
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+//
+// Software Class DXE Core Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_CORE_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_CORE_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_CORE_PC_START_DRIVER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+
+//
+// Software Class DXE BS Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_BS_PC_BEGIN_CONNECTING_DRIVERS (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DXE_BS_PC_VERIFYING_PASSWORD (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+
+//
+// Software Class DXE RT Driver Subclass Progress Code definitions.
+//
+#define EFI_SW_DXE_RT_PC_S0 (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DXE_RT_PC_S1 (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DXE_RT_PC_S2 (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DXE_RT_PC_S3 (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DXE_RT_PC_S4 (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DXE_RT_PC_S5 (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+
+//
+// Software Class SMM Driver Subclass Progress Code definitions.
+//
+//
+// Software Class EFI Application Subclass Progress Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Progress Code definitions.
+//
+//
+// Software Class EFI RT Subclass Progress Code definitions.
+//
+#define EFI_SW_RT_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RT_PC_HANDOFF_TO_NEXT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RT_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+
+//
+// Software Class EFI AL Subclass Progress Code definitions.
+//
+#define EFI_SW_AL_PC_ENTRY_POINT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_AL_PC_RETURN_TO_LAST (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class EBC Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IA32 Exception Subclass Progress Code definitions.
+//
+//
+// Software Class IPF Exception Subclass Progress Code definitions.
+//
+//
+// Software Class PEI Services Subclass Progress Code definitions.
+//
+#define EFI_SW_PS_PC_INSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PS_PC_REINSTALL_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PS_PC_LOCATE_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PS_PC_NOTIFY_PPI (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PS_PC_GET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_PS_PC_SET_BOOT_MODE (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_PS_PC_GET_HOB_LIST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_PS_PC_CREATE_HOB (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_PS_PC_FFS_FIND_NEXT_FILE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_PS_PC_FFS_FIND_SECTION_DATA (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_PS_PC_INSTALL_PEI_MEMORY (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_PS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_PS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_PS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_PS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+
+//
+// Software Class EFI Boot Services Subclass Progress Code definitions.
+//
+#define EFI_SW_BS_PC_RAISE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_BS_PC_RESTORE_TPL (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_BS_PC_ALLOCATE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_BS_PC_FREE_PAGES (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_BS_PC_GET_MEMORY_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_BS_PC_ALLOCATE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_BS_PC_FREE_POOL (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_BS_PC_CREATE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_BS_PC_SET_TIMER (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_BS_PC_WAIT_FOR_EVENT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_BS_PC_SIGNAL_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_BS_PC_CLOSE_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_BS_PC_CHECK_EVENT (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_BS_PC_INSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_BS_PC_REINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_BS_PC_UNINSTALL_PROTOCOL_INTERFACE (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_BS_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define EFI_SW_BS_PC_PC_HANDLE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define EFI_SW_BS_PC_REGISTER_PROTOCOL_NOTIFY (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define EFI_SW_BS_PC_LOCATE_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define EFI_SW_BS_PC_INSTALL_CONFIGURATION_TABLE (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define EFI_SW_BS_PC_LOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define EFI_SW_BS_PC_START_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+#define EFI_SW_BS_PC_EXIT (EFI_SUBCLASS_SPECIFIC | 0x00000017)
+#define EFI_SW_BS_PC_UNLOAD_IMAGE (EFI_SUBCLASS_SPECIFIC | 0x00000018)
+#define EFI_SW_BS_PC_EXIT_BOOT_SERVICES (EFI_SUBCLASS_SPECIFIC | 0x00000019)
+#define EFI_SW_BS_PC_GET_NEXT_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x0000001A)
+#define EFI_SW_BS_PC_STALL (EFI_SUBCLASS_SPECIFIC | 0x0000001B)
+#define EFI_SW_BS_PC_SET_WATCHDOG_TIMER (EFI_SUBCLASS_SPECIFIC | 0x0000001C)
+#define EFI_SW_BS_PC_CONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001D)
+#define EFI_SW_BS_PC_DISCONNECT_CONTROLLER (EFI_SUBCLASS_SPECIFIC | 0x0000001E)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x0000001F)
+#define EFI_SW_BS_PC_CLOSE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000020)
+#define EFI_SW_BS_PC_OPEN_PROTOCOL_INFORMATION (EFI_SUBCLASS_SPECIFIC | 0x00000021)
+#define EFI_SW_BS_PC_PROTOCOLS_PER_HANDLE (EFI_SUBCLASS_SPECIFIC | 0x00000022)
+#define EFI_SW_BS_PC_LOCATE_HANDLE_BUFFER (EFI_SUBCLASS_SPECIFIC | 0x00000023)
+#define EFI_SW_BS_PC_LOCATE_PROTOCOL (EFI_SUBCLASS_SPECIFIC | 0x00000024)
+#define EFI_SW_BS_PC_INSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000025)
+#define EFI_SW_BS_PC_UNINSTALL_MULTIPLE_INTERFACES (EFI_SUBCLASS_SPECIFIC | 0x00000026)
+#define EFI_SW_BS_PC_CALCULATE_CRC_32 (EFI_SUBCLASS_SPECIFIC | 0x00000027)
+#define EFI_SW_BS_PC_COPY_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000028)
+#define EFI_SW_BS_PC_SET_MEM (EFI_SUBCLASS_SPECIFIC | 0x00000029)
+
+//
+// Software Class EFI Runtime Services Subclass Progress Code definitions.
+//
+#define EFI_SW_RS_PC_GET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_RS_PC_SET_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_RS_PC_GET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_RS_PC_SET_WAKEUP_TIME (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_RS_PC_CONVERT_POINTER (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_RS_PC_GET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_RS_PC_GET_NEXT_VARIABLE_NAME (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_RS_PC_SET_VARIABLE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_RS_PC_GET_NEXT_HIGH_MONOTONIC_COUNT (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_RS_PC_RESET_SYSTEM (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+
+//
+// Software Class EFI DXE Services Subclass Progress Code definitions
+//
+#define EFI_SW_DS_PC_ADD_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_DS_PC_ALLOCATE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_DS_PC_FREE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_DS_PC_REMOVE_MEMORY_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_SW_DS_PC_SET_MEMORY_SPACE_ATTRIBUTES (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_SW_DS_PC_GET_MEMORY_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_SW_DS_PC_ADD_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_SW_DS_PC_ALLOCATE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+#define EFI_SW_DS_PC_FREE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000009)
+#define EFI_SW_DS_PC_REMOVE_IO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x0000000A)
+#define EFI_SW_DS_PC_GET_IO_SPACE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x0000000B)
+#define EFI_SW_DS_PC_GET_IO_SPACE_MAP (EFI_SUBCLASS_SPECIFIC | 0x0000000C)
+#define EFI_SW_DS_PC_DISPATCH (EFI_SUBCLASS_SPECIFIC | 0x0000000D)
+#define EFI_SW_DS_PC_SCHEDULE (EFI_SUBCLASS_SPECIFIC | 0x0000000E)
+#define EFI_SW_DS_PC_TRUST (EFI_SUBCLASS_SPECIFIC | 0x0000000F)
+#define EFI_SW_DS_PC_PROCESS_FIRMWARE_VOLUME (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+
+//
+// Software Class Error Code definitions.
+// These are shared by all subclasses.
+//
+#define EFI_SW_EC_NON_SPECIFIC 0x00000000
+#define EFI_SW_EC_LOAD_ERROR 0x00000001
+#define EFI_SW_EC_INVALID_PARAMETER 0x00000002
+#define EFI_SW_EC_UNSUPPORTED 0x00000003
+#define EFI_SW_EC_INVALID_BUFFER 0x00000004
+#define EFI_SW_EC_OUT_OF_RESOURCES 0x00000005
+#define EFI_SW_EC_ABORTED 0x00000006
+#define EFI_SW_EC_ILLEGAL_SOFTWARE_STATE 0x00000007
+#define EFI_SW_EC_ILLEGAL_HARDWARE_STATE 0x00000008
+#define EFI_SW_EC_START_ERROR 0x00000009
+#define EFI_SW_EC_BAD_DATE_TIME 0x0000000A
+#define EFI_SW_EC_CFG_INVALID 0x0000000B
+#define EFI_SW_EC_CFG_CLR_REQUEST 0x0000000C
+#define EFI_SW_EC_CFG_DEFAULT 0x0000000D
+#define EFI_SW_EC_PWD_INVALID 0x0000000E
+#define EFI_SW_EC_PWD_CLR_REQUEST 0x0000000F
+#define EFI_SW_EC_PWD_CLEARED 0x00000010
+#define EFI_SW_EC_EVENT_LOG_FULL 0x00000011
+
+//
+// Software Class Unspecified Subclass Error Code definitions.
+//
+//
+// Software Class SEC Subclass Error Code definitions.
+//
+//
+// Software Class PEI Core Subclass Error Code definitions.
+//
+#define EFI_SW_PEI_CORE_EC_DXE_CORRUPT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class PEI Module Subclass Error Code definitions.
+//
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+//
+// Software Class DXE Core Subclass Error Code definitions.
+//
+#define EFI_SW_CSM_LEGACY_ROM_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+//
+// Software Class DXE Boot Service Driver Subclass Error Code definitions.
+//
+#define EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+
+//
+// Software Class DXE Runtime Service Driver Subclass Error Code definitions.
+//
+//
+// Software Class SMM Driver Subclass Error Code definitions.
+//
+//
+// Software Class EFI Application Subclass Error Code definitions.
+//
+//
+// Software Class EFI OS Loader Subclass Error Code definitions.
+//
+//
+// Software Class EFI RT Subclass Error Code definitions.
+//
+//
+// Software Class EFI AL Subclass Error Code definitions.
+//
+//
+// Software Class EBC Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_EBC_UNDEFINED 0x00000000
+#define EFI_SW_EC_EBC_DIVIDE_ERROR EXCEPT_EBC_DIVIDE_ERROR
+#define EFI_SW_EC_EBC_DEBUG EXCEPT_EBC_DEBUG
+#define EFI_SW_EC_EBC_BREAKPOINT EXCEPT_EBC_BREAKPOINT
+#define EFI_SW_EC_EBC_OVERFLOW EXCEPT_EBC_OVERFLOW
+#define EFI_SW_EC_EBC_INVALID_OPCODE EXCEPT_EBC_INVALID_OPCODE
+#define EFI_SW_EC_EBC_STACK_FAULT EXCEPT_EBC_STACK_FAULT
+#define EFI_SW_EC_EBC_ALIGNMENT_CHECK EXCEPT_EBC_ALIGNMENT_CHECK
+#define EFI_SW_EC_EBC_INSTRUCTION_ENCODING EXCEPT_EBC_INSTRUCTION_ENCODING
+#define EFI_SW_EC_EBC_BAD_BREAK EXCEPT_EBC_BAD_BREAK
+#define EFI_SW_EC_EBC_STEP EXCEPT_EBC_STEP
+
+//
+// Software Class IA32 Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IA32_DIVIDE_ERROR EXCEPT_IA32_DIVIDE_ERROR
+#define EFI_SW_EC_IA32_DEBUG EXCEPT_IA32_DEBUG
+#define EFI_SW_EC_IA32_NMI EXCEPT_IA32_NMI
+#define EFI_SW_EC_IA32_BREAKPOINT EXCEPT_IA32_BREAKPOINT
+#define EFI_SW_EC_IA32_OVERFLOW EXCEPT_IA32_OVERFLOW
+#define EFI_SW_EC_IA32_BOUND EXCEPT_IA32_BOUND
+#define EFI_SW_EC_IA32_INVALID_OPCODE EXCEPT_IA32_INVALID_OPCODE
+#define EFI_SW_EC_IA32_DOUBLE_FAULT EXCEPT_IA32_DOUBLE_FAULT
+#define EFI_SW_EC_IA32_INVALID_TSS EXCEPT_IA32_INVALID_TSS
+#define EFI_SW_EC_IA32_SEG_NOT_PRESENT EXCEPT_IA32_SEG_NOT_PRESENT
+#define EFI_SW_EC_IA32_STACK_FAULT EXCEPT_IA32_STACK_FAULT
+#define EFI_SW_EC_IA32_GP_FAULT EXCEPT_IA32_GP_FAULT
+#define EFI_SW_EC_IA32_PAGE_FAULT EXCEPT_IA32_PAGE_FAULT
+#define EFI_SW_EC_IA32_FP_ERROR EXCEPT_IA32_FP_ERROR
+#define EFI_SW_EC_IA32_ALIGNMENT_CHECK EXCEPT_IA32_ALIGNMENT_CHECK
+#define EFI_SW_EC_IA32_MACHINE_CHECK EXCEPT_IA32_MACHINE_CHECK
+#define EFI_SW_EC_IA32_SIMD EXCEPT_IA32_SIMD
+
+//
+// Software Class IPF Exception Subclass Error Code definitions.
+// These exceptions are derived from the debug protocol definitions in the EFI
+// specification.
+//
+#define EFI_SW_EC_IPF_ALT_DTLB EXCEPT_IPF_ALT_DTLB
+#define EFI_SW_EC_IPF_DNESTED_TLB EXCEPT_IPF_DNESTED_TLB
+#define EFI_SW_EC_IPF_BREAKPOINT EXCEPT_IPF_BREAKPOINT
+#define EFI_SW_EC_IPF_EXTERNAL_INTERRUPT EXCEPT_IPF_EXTERNAL_INTERRUPT
+#define EFI_SW_EC_IPF_GEN_EXCEPT EXCEPT_IPF_GEN_EXCEPT
+#define EFI_SW_EC_IPF_NAT_CONSUMPTION EXCEPT_IPF_NAT_CONSUMPTION
+#define EFI_SW_EC_IPF_DEBUG_EXCEPT EXCEPT_IPF_DEBUG_EXCEPT
+#define EFI_SW_EC_IPF_UNALIGNED_ACCESS EXCEPT_IPF_UNALIGNED_ACCESS
+#define EFI_SW_EC_IPF_FP_FAULT EXCEPT_IPF_FP_FAULT
+#define EFI_SW_EC_IPF_FP_TRAP EXCEPT_IPF_FP_TRAP
+#define EFI_SW_EC_IPF_TAKEN_BRANCH EXCEPT_IPF_TAKEN_BRANCH
+#define EFI_SW_EC_IPF_SINGLE_STEP EXCEPT_IPF_SINGLE_STEP
+
+//
+// Software Class PEI Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Boot Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI Runtime Service Subclass Error Code definitions.
+//
+//
+// Software Class EFI DXE Service Subclass Error Code definitions.
+//
+
+///////////////////////////////////////////////////////////////////////////////
+// Section 7
+///////////////////////////////////////////////////////////////////////////////
+//
+// Debug Code definitions for all classes and subclass
+// Only one debug code is defined at this point and should
+// be used for anything that gets sent to debug stream.
+//
+#define EFI_DC_UNSPECIFIED 0x0
+
+#endif
diff --git a/MdePkg/Include/Common/StatusCodeDataTypeId.h b/MdePkg/Include/Common/StatusCodeDataTypeId.h new file mode 100644 index 0000000000..49bea6122e --- /dev/null +++ b/MdePkg/Include/Common/StatusCodeDataTypeId.h @@ -0,0 +1,336 @@ +/** @file
+ This file defines the data structures to support Status Code Data.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCodeDataTypeId.h
+
+ @par Revision Reference:
+ These definitions are from Framework of EFI Status Code Spec
+ Version 0.92.
+
+**/
+
+#ifndef __STATUS_CODE_DATA_TYPE_ID_H__
+#define __STATUS_CODE_DATA_TYPE_ID_H__
+
+
+///
+/// The size of string
+///
+#define EFI_STATUS_CODE_DATA_MAX_STRING_SIZE 150
+
+///
+/// This is the max data size including all the headers which can be passed
+/// as Status Code data. This data should be multiple of 8 byte
+/// to avoid any kind of boundary issue. Also, sum of this data size (inclusive
+/// of size of EFI_STATUS_CODE_DATA should not exceed the max record size of
+/// data hub
+///
+#define EFI_STATUS_CODE_DATA_MAX_SIZE 200
+
+#pragma pack(1)
+typedef enum {
+ EfiStringAscii,
+ EfiStringUnicode,
+ EfiStringToken
+} EFI_STRING_TYPE;
+
+typedef struct {
+ EFI_HII_HANDLE Handle;
+ STRING_REF Token;
+} EFI_STATUS_CODE_STRING_TOKEN;
+
+typedef union {
+ CHAR8 *Ascii;
+ CHAR16 *Unicode;
+ EFI_STATUS_CODE_STRING_TOKEN Hii;
+} EFI_STATUS_CODE_STRING;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STRING_TYPE StringType;
+ EFI_STATUS_CODE_STRING String;
+} EFI_STATUS_CODE_STRING_DATA;
+
+#pragma pack()
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 ErrorLevel;
+ //
+ // 12 * sizeof (UINT64) Var Arg stack
+ //
+ // ascii DEBUG () Format string
+ //
+} EFI_DEBUG_INFO;
+
+#pragma pack()
+
+//
+// declaration for EFI_EXP_DATA. This may change
+//
+// typedef UINTN EFI_EXP_DATA;
+
+///
+/// Voltage Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA Voltage;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;
+
+///
+/// Microcode Update Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Version;
+} EFI_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;
+
+///
+/// Asynchronous Timer Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA TimerLimit;
+} EFI_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;
+
+///
+/// Host Processor Mismatch Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Instance;
+ UINT16 Attributes;
+} EFI_HOST_PROCESSOR_MISMATCH_ERROR_DATA;
+
+//
+// EFI_COMPUTING_UNIT_MISMATCH_ATTRIBUTES
+// All other attributes are reserved for future use and
+// must be initialized to 0.
+//
+#define EFI_COMPUTING_UNIT_MISMATCH_SPEED 0x0001
+#define EFI_COMPUTING_UNIT_MISMATCH_FSB_SPEED 0x0002
+#define EFI_COMPUTING_UNIT_MISMATCH_FAMILY 0x0004
+#define EFI_COMPUTING_UNIT_MISMATCH_MODEL 0x0008
+#define EFI_COMPUTING_UNIT_MISMATCH_STEPPING 0x0010
+#define EFI_COMPUTING_UNIT_MISMATCH_CACHE_SIZE 0x0020
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM1 0x1000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM2 0x2000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM3 0x4000
+#define EFI_COMPUTING_UNIT_MISMATCH_OEM4 0x8000
+
+///
+/// Thermal Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_EXP_BASE10_DATA Temperature;
+ EFI_EXP_BASE10_DATA Threshold;
+} EFI_COMPUTING_UNIT_THERMAL_ERROR_DATA;
+
+///
+/// Processor Disabled Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Cause;
+ BOOLEAN SoftwareDisabled;
+} EFI_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;
+
+typedef enum {
+ EfiInitCacheDataOnly,
+ EfiInitCacheInstrOnly,
+ EfiInitCacheBoth,
+ EfiInitCacheUnspecified
+} EFI_INIT_CACHE_TYPE;
+
+///
+/// Embedded cache init extended data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Level;
+ EFI_INIT_CACHE_TYPE Type;
+} EFI_CACHE_INIT_DATA;
+
+//
+// Memory Extended Error Data
+//
+
+///
+/// Memory Error Granularity Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_GRANULARITY;
+
+///
+/// Memory Error Operation Definition
+///
+typedef UINT8 EFI_MEMORY_ERROR_OPERATION;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;
+ EFI_MEMORY_ERROR_OPERATION Operation;
+ UINTN Syndrome;
+ EFI_PHYSICAL_ADDRESS Address;
+ UINTN Resolution;
+} EFI_MEMORY_EXTENDED_ERROR_DATA;
+
+//
+// Memory Error Granularities
+//
+#define EFI_MEMORY_ERROR_OTHER 0x01
+#define EFI_MEMORY_ERROR_UNKNOWN 0x02
+#define EFI_MEMORY_ERROR_DEVICE 0x03
+#define EFI_MEMORY_ERROR_PARTITION 0x04
+
+//
+// Memory Error Operations
+//
+#define EFI_MEMORY_OPERATION_OTHER 0x01
+#define EFI_MEMORY_OPERATION_UNKNOWN 0x02
+#define EFI_MEMORY_OPERATION_READ 0x03
+#define EFI_MEMORY_OPERATION_WRITE 0x04
+#define EFI_MEMORY_OPERATION_PARTIAL_WRITE 0x05
+
+//
+// Define shorthands to describe Group Operations
+// Many memory init operations are essentially group
+// operations.
+
+/// A shorthand to describe that the operation is performed
+/// on multiple devices within the array
+///
+#define EFI_MULTIPLE_MEMORY_DEVICE_OPERATION 0xfffe
+///
+/// A shorthand to describe that the operation is performed on all devices within the array
+///
+#define EFI_ALL_MEMORY_DEVICE_OPERATION 0xffff
+///
+/// A shorthand to describe that the operation is performed on multiple arrays
+///
+#define EFI_MULTIPLE_MEMORY_ARRAY_OPERATION 0xfffe
+///
+/// A shorthand to describe that the operation is performed on all the arrays
+///
+#define EFI_ALL_MEMORY_ARRAY_OPERATION 0xffff
+
+//
+// DIMM number
+//
+#pragma pack(1)
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT16 Array;
+ UINT16 Device;
+} EFI_STATUS_CODE_DIMM_NUMBER;
+#pragma pack()
+
+///
+/// Memory Module Mismatch Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;
+} EFI_MEMORY_MODULE_MISMATCH_ERROR_DATA;
+
+///
+/// Memory Range Extended Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_PHYSICAL_ADDRESS Start;
+ EFI_PHYSICAL_ADDRESS Length;
+} EFI_MEMORY_RANGE_EXTENDED_DATA;
+
+///
+/// Device handle Extended Data. Used for many
+/// errors and progress codes to point to the device.
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE Handle;
+} EFI_DEVICE_HANDLE_EXTENDED_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT8 *DevicePath;
+} EFI_DEVICE_PATH_EXTENDED_DATA;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE ControllerHandle;
+ EFI_HANDLE DriverBindingHandle;
+ UINT16 DevicePathSize;
+ UINT8 *RemainingDevicePath;
+} EFI_STATUS_CODE_START_EXTENDED_DATA;
+
+///
+/// Resource Allocation Failure Extended Error Data
+///
+
+/*
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;
+ UINT32 Bar;
+ VOID *ReqRes;
+ VOID *AllocRes;
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+*/
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 Bar;
+ UINT16 DevicePathSize;
+ UINT16 ReqResSize;
+ UINT16 AllocResSize;
+ UINT8 *DevicePath;
+ UINT8 *ReqRes;
+ UINT8 *AllocRes;
+} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+
+///
+/// Extended Error Data for Assert
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ UINT32 LineNumber;
+ UINT32 FileNameSize;
+ EFI_STATUS_CODE_STRING_DATA *FileName;
+} EFI_DEBUG_ASSERT_DATA;
+
+///
+/// System Context Data EBC/IA32/IPF
+///
+typedef union {
+ EFI_SYSTEM_CONTEXT_EBC SystemContextEbc;
+ EFI_SYSTEM_CONTEXT_IA32 SystemContextIa32;
+ EFI_SYSTEM_CONTEXT_IPF SystemContextIpf;
+} EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT;
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;
+} EFI_STATUS_CODE_EXCEP_EXTENDED_DATA;
+
+///
+/// Legacy Oprom extended data
+///
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE DeviceHandle;
+ EFI_PHYSICAL_ADDRESS RomImageBase;
+} EFI_LEGACY_OPROM_EXTENDED_DATA;
+
+#endif
diff --git a/MdePkg/Include/Common/UefiBaseTypes.h b/MdePkg/Include/Common/UefiBaseTypes.h new file mode 100644 index 0000000000..4954c10bf2 --- /dev/null +++ b/MdePkg/Include/Common/UefiBaseTypes.h @@ -0,0 +1,85 @@ +/** @file
+ This file makes the BaseTypes.h backward compatible with the ones used in the
+ past for EFI and Tiano development. It's mostly just prepending an EFI_ on the
+ definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiBaseTypes.h
+
+**/
+
+#ifndef __UEFI_BASE_TYPES_H__
+#define __UEFI_BASE_TYPES_H__
+
+#include <Common/BaseTypes.h>
+
+typedef UINT64 EFI_LBA;
+
+#define EFIERR(_a) ENCODE_ERROR(_a)
+
+#define EFI_MAX_BIT MAX_BIT
+#define EFI_MAX_ADDRESS MAX_ADDRESS
+#define EFI_BREAKPOINT() CpuBreakpoint ()
+#define EFI_DEADLOOP() CpuDeadLoop ()
+#define EFI_ERROR(A) RETURN_ERROR(A)
+
+typedef GUID EFI_GUID;
+typedef RETURN_STATUS EFI_STATUS;
+
+#define EFI_SUCCESS RETURN_SUCCESS
+#define EFI_LOAD_ERROR RETURN_LOAD_ERROR
+#define EFI_INVALID_PARAMETER RETURN_INVALID_PARAMETER
+#define EFI_UNSUPPORTED RETURN_UNSUPPORTED
+#define EFI_BAD_BUFFER_SIZE RETURN_BAD_BUFFER_SIZE
+#define EFI_BUFFER_TOO_SMALL RETURN_BUFFER_TOO_SMALL
+#define EFI_NOT_READY RETURN_NOT_READY
+#define EFI_DEVICE_ERROR RETURN_DEVICE_ERROR
+#define EFI_WRITE_PROTECTED RETURN_WRITE_PROTECTED
+#define EFI_OUT_OF_RESOURCES RETURN_OUT_OF_RESOURCES
+#define EFI_VOLUME_CORRUPTED RETURN_VOLUME_CORRUPTED
+#define EFI_VOLUME_FULL RETURN_VOLUME_FULL
+#define EFI_NO_MEDIA RETURN_NO_MEDIA
+#define EFI_MEDIA_CHANGED RETURN_MEDIA_CHANGED
+#define EFI_NOT_FOUND RETURN_NOT_FOUND
+#define EFI_ACCESS_DENIED RETURN_ACCESS_DENIED
+#define EFI_NO_RESPONSE RETURN_NO_RESPONSE
+#define EFI_NO_MAPPING RETURN_NO_MAPPING
+#define EFI_TIMEOUT RETURN_TIMEOUT
+#define EFI_NOT_STARTED RETURN_NOT_STARTED
+#define EFI_ALREADY_STARTED RETURN_ALREADY_STARTED
+#define EFI_ABORTED RETURN_ABORTED
+#define EFI_ICMP_ERROR RETURN_ICMP_ERROR
+#define EFI_TFTP_ERROR RETURN_TFTP_ERROR
+#define EFI_PROTOCOL_ERROR RETURN_PROTOCOL_ERROR
+#define EFI_INCOMPATIBLE_VERSION RETURN_INCOMPATIBLE_VERSION
+#define EFI_SECURITY_VIOLATION RETURN_SECURITY_VIOLATION
+#define EFI_CRC_ERROR RETURN_CRC_ERROR
+#define EFI_END_OF_MEDIA RETURN_END_OF_MEDIA
+#define EFI_END_OF_FILE RETURN_END_OF_FILE
+
+#define EFI_WARN_UNKNOWN_GLYPH RETURN_WARN_UNKNOWN_GLYPH
+#define EFI_WARN_DELETE_FAILURE RETURN_WARN_DELETE_FAILURE
+#define EFI_WARN_WRITE_FAILURE RETURN_WARN_WRITE_FAILURE
+#define EFI_WARN_BUFFER_TOO_SMALL RETURN_WARN_BUFFER_TOO_SMALL
+
+//
+// The EFI memory allocation functions work in units of EFI_PAGEs that are
+// 4K. This should in no way be confused with the page size of the processor.
+// An EFI_PAGE is just the quanta of memory in EFI.
+//
+#define EFI_PAGE_MASK 0xFFF
+#define EFI_PAGE_SHIFT 12
+
+#define EFI_SIZE_TO_PAGES(a) (((a) >> EFI_PAGE_SHIFT) + (((a) & EFI_PAGE_MASK) ? 1 : 0))
+
+#define EFI_PAGES_TO_SIZE(a) ( (a) << EFI_PAGE_SHIFT)
+
+#endif
diff --git a/MdePkg/Include/Dxe.h b/MdePkg/Include/Dxe.h new file mode 100644 index 0000000000..020c51e5fa --- /dev/null +++ b/MdePkg/Include/Dxe.h @@ -0,0 +1,51 @@ +/** @file
+
+ Root include file for Mde Package DXE modules
+
+ DXE modules follow the public Framework specifications and the UEFI
+ specifiations. The build infrastructure must set
+ EFI_SPECIFICATION_VERSION before including this file. To support
+ R9/UEFI2.0 set EFI_SPECIFIATION_VERSION to 0x00020000. To support
+ R8.5/EFI 1.10 set EFI_SPECIFIATION_VERSION to 0x00010010.
+ EDK_RELEASE_VERSION must be set to a non zero value.
+ EFI_SPECIFIATION_VERSION and EDK_RELEASE_VERSION are set automatically
+ by the build infrastructure for every module.
+
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __DXE_H__
+#define __DXE_H__
+
+//
+// Check to make sure EFI_SPECIFICATION_VERSION and EDK_RELEASE_VERSION are defined.
+//
+#if !defined(EFI_SPECIFICATION_VERSION)
+ #error EFI_SPECIFICATION_VERSION not defined
+#elif !defined(EDK_RELEASE_VERSION)
+ #error EDK_RELEASE_VERSION not defined
+#elif (EDK_RELEASE_VERSION == 0)
+ #error EDK_RELEASE_VERSION can not be zero
+#endif
+
+
+#include <Common/UefiBaseTypes.h>
+#include <Dxe/DxeCis.h>
+#include <Dxe/SmmCis.h>
+
+#include <Common/DataHubRecords.h>
+#include <Guid/DataHubRecords.h>
+
+#include <Protocol/Pcd.h>
+#include <Common/PcdTemp.h> //This will be removed when PCD PEIM is completed!
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Bds.h b/MdePkg/Include/Dxe/ArchProtocol/Bds.h new file mode 100644 index 0000000000..f6b72d2b00 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Bds.h @@ -0,0 +1,87 @@ +/** @file
+ Boot Device Selection Architectural Protocol as defined in DXE CIS
+
+ When the DXE core is done it calls the BDS via this protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Bds.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_BDS_H__
+#define __ARCH_PROTOCOL_BDS_H__
+
+//
+// Global ID for the BDS Architectural Protocol
+//
+#define EFI_BDS_ARCH_PROTOCOL_GUID \
+ { 0x665E3FF6, 0x46CC, 0x11d4, {0x9A, 0x38, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
+
+//
+// Declare forward reference for the BDS Architectural Protocol
+//
+typedef struct _EFI_BDS_ARCH_PROTOCOL EFI_BDS_ARCH_PROTOCOL;
+
+/**
+ This function uses policy data from the platform to determine what operating
+ system or system utility should be loaded and invoked. This function call
+ also optionally make the use of user input to determine the operating system
+ or system utility to be loaded and invoked. When the DXE Core has dispatched
+ all the drivers on the dispatch queue, this function is called. This
+ function will attempt to connect the boot devices required to load and invoke
+ the selected operating system or system utility. During this process,
+ additional firmware volumes may be discovered that may contain addition DXE
+ drivers that can be dispatched by the DXE Core. If a boot device cannot be
+ fully connected, this function calls the DXE Service Dispatch() to allow the
+ DXE drivers from any newly discovered firmware volumes to be dispatched.
+ Then the boot device connection can be attempted again. If the same boot
+ device connection operation fails twice in a row, then that boot device has
+ failed, and should be skipped. This function should never return.
+
+ @param This The EFI_BDS_ARCH_PROTOCOL instance.
+
+ @return None.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_BDS_ENTRY) (
+ IN EFI_BDS_ARCH_PROTOCOL *This
+ );
+
+/**
+ Interface stucture for the BDS Architectural Protocol.
+
+ @par Protocol Description:
+ The EFI_BDS_ARCH_PROTOCOL transfers control from DXE to an operating
+ system or a system utility. If there are not enough drivers initialized
+ when this protocol is used to access the required boot device(s), then
+ this protocol should add drivers to the dispatch queue and return control
+ back to the dispatcher. Once the required boot devices are available, then
+ the boot device can be used to load and invoke an OS or a system utility.
+
+ @par Protocol Parameters:
+ Entry - The entry point to BDS. This call does not take any parameters,
+ and the return value can be ignored. If it returns, then the
+ dispatcher must be invoked again, if it never returns, then an
+ operating system or a system utility have been invoked.
+
+**/
+struct _EFI_BDS_ARCH_PROTOCOL {
+ EFI_BDS_ENTRY Entry;
+};
+
+extern EFI_GUID gEfiBdsArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Cpu.h b/MdePkg/Include/Dxe/ArchProtocol/Cpu.h new file mode 100644 index 0000000000..975a816356 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Cpu.h @@ -0,0 +1,326 @@ +/** @file
+ CPU Architectural Protocol as defined in DXE CIS
+
+ This code abstracts the DXE core from processor implementation details.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Cpu.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_CPU_H__
+#define __ARCH_PROTOCOL_CPU_H__
+
+
+#define EFI_CPU_ARCH_PROTOCOL_GUID \
+ { 0x26baccb1, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
+
+typedef struct _EFI_CPU_ARCH_PROTOCOL EFI_CPU_ARCH_PROTOCOL;
+
+typedef enum {
+ EfiCpuFlushTypeWriteBackInvalidate,
+ EfiCpuFlushTypeWriteBack,
+ EfiCpuFlushTypeInvalidate,
+ EfiCpuMaxFlushType
+} EFI_CPU_FLUSH_TYPE;
+
+typedef enum {
+ EfiCpuInit,
+ EfiCpuMaxInitType
+} EFI_CPU_INIT_TYPE;
+
+/**
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.
+
+ @param InterruptType Defines the type of interrupt or exception that
+ occurred on the processor.This parameter is processor architecture specific.
+
+ @param SystemContext A pointer to the processor context when
+ the interrupt occurred on the processor.
+
+ @return None
+
+**/
+typedef
+VOID
+(*EFI_CPU_INTERRUPT_HANDLER) (
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_SYSTEM_CONTEXT SystemContext
+ );
+
+/**
+ This function flushes the range of addresses from Start to Start+Length
+ from the processor's data cache. If Start is not aligned to a cache line
+ boundary, then the bytes before Start to the preceding cache line boundary
+ are also flushed. If Start+Length is not aligned to a cache line boundary,
+ then the bytes past Start+Length to the end of the next cache line boundary
+ are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be
+ supported. If the data cache is fully coherent with all DMA operations, then
+ this function can just return EFI_SUCCESS. If the processor does not support
+ flushing a range of the data cache, then the entire data cache can be flushed.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param Start The beginning physical address to flush from the processor's data
+ cache.
+ @param Length The number of bytes to flush from the processor's data cache. This
+ function may flush more bytes than Length specifies depending upon
+ the granularity of the flush operation that the processor supports.
+ @param FlushType Specifies the type of flush operation to perform.
+
+ @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from
+ the processor's data cache.
+ @retval EFI_UNSUPPORTEDT The processor does not support the cache flush type specified
+ by FlushType.
+ @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed
+ from the processor's data cache.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_FLUSH_DATA_CACHE) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS Start,
+ IN UINT64 Length,
+ IN EFI_CPU_FLUSH_TYPE FlushType
+ );
+
+
+/**
+ This function enables interrupt processing by the processor.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are enabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_ENABLE_INTERRUPT) (
+ IN EFI_CPU_ARCH_PROTOCOL *This
+ );
+
+
+/**
+ This function disables interrupt processing by the processor.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Interrupts are disabled on the processor.
+ @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_DISABLE_INTERRUPT) (
+ IN EFI_CPU_ARCH_PROTOCOL *This
+ );
+
+
+/**
+ This function retrieves the processor's current interrupt state a returns it in
+ State. If interrupts are currently enabled, then TRUE is returned. If interrupts
+ are currently disabled, then FALSE is returned.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param State A pointer to the processor's current interrupt state. Set to TRUE if
+ interrupts are enabled and FALSE if interrupts are disabled.
+
+ @retval EFI_SUCCESS The processor's current interrupt state was returned in State.
+ @retval EFI_INVALID_PARAMETER State is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_GET_INTERRUPT_STATE) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ OUT BOOLEAN *State
+ );
+
+
+/**
+ This function generates an INIT on the processor. If this function succeeds, then the
+ processor will be reset, and control will not be returned to the caller. If InitType is
+ not supported by this processor, or the processor cannot programmatically generate an
+ INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error
+ occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param InitType The type of processor INIT to perform.
+
+ @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen.
+ @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported
+ by this processor.
+ @retval EFI_DEVICE_ERROR The processor INIT failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_INIT) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_CPU_INIT_TYPE InitType
+ );
+
+
+/**
+ This function registers and enables the handler specified by InterruptHandler for a processor
+ interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
+ handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
+ The installed handler is called once for each processor interrupt or exception.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
+ are enabled and FALSE if interrupts are disabled.
+ @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
+ when a processor interrupt occurs. If this parameter is NULL, then the handler
+ will be uninstalled.
+
+ @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
+ @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
+ previously installed.
+ @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
+ previously installed.
+ @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_REGISTER_INTERRUPT_HANDLER) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_EXCEPTION_TYPE InterruptType,
+ IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
+ );
+
+
+/**
+ This function reads the processor timer specified by TimerIndex and returns it in TimerValue.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param TimerIndex Specifies which processor timer is to be returned in TimerValue. This parameter
+ must be between 0 and NumberOfTimers-1.
+ @param TimerValue Pointer to the returned timer value.
+ @param TimerPeriod A pointer to the amount of time that passes in femtoseconds for each increment
+ of TimerValue.
+
+ @retval EFI_SUCCESS The processor timer value specified by TimerIndex was returned in TimerValue.
+ @retval EFI_DEVICE_ERROR An error occurred attempting to read one of the processor's timers.
+ @retval EFI_INVALID_PARAMETER TimerValue is NULL or TimerIndex is not valid.
+ @retval EFI_UNSUPPORTED The processor does not have any readable timers.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_GET_TIMER_VALUE) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN UINT32 TimerIndex,
+ OUT UINT64 *TimerValue,
+ OUT UINT64 *TimerPeriod OPTIONAL
+ );
+
+
+/**
+ This function modifies the attributes for the memory region specified by BaseAddress and
+ Length from their current attributes to the attributes specified by Attributes.
+
+ @param This The EFI_CPU_ARCH_PROTOCOL instance.
+ @param BaseAddress The physical address that is the start address of a memory region.
+ @param Length The size in bytes of the memory region.
+ @param Attributes The bit mask of attributes to set for the memory region.
+
+ @retval EFI_SUCCESS The attributes were set for the memory region.
+ @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by
+ BaseAddress and Length cannot be modified.
+ @retval EFI_INVALID_PARAMETER Length is zero.
+ @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of
+ the memory resource range.
+ @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory
+ resource range specified by BaseAddress and Length.
+ The bit mask of attributes is not support for the memory resource
+ range specified by BaseAddress and Length.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_SET_MEMORY_ATTRIBUTES) (
+ IN EFI_CPU_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ );
+
+
+/**
+ @par Protocol Description:
+ The EFI_CPU_ARCH_PROTOCOL is used to abstract processor-specific functions from the DXE
+ Foundation. This includes flushing caches, enabling and disabling interrupts, hooking interrupt
+ vectors and exception vectors, reading internal processor timers, resetting the processor, and
+ determining the processor frequency.
+
+ @param FlushDataCache
+ Flushes a range of the processor's data cache. If the processor does
+ not contain a data cache, or the data cache is fully coherent, then this
+ function can just return EFI_SUCCESS. If the processor does not support
+ flushing a range of addresses from the data cache, then the entire data
+ cache must be flushed.
+
+ @param EnableInterrupt Enables interrupt processing by the processor.
+
+ @param DisableInterrupt Disables interrupt processing by the processor.
+
+ @param GetInterruptState Retrieves the processor's current interrupt state.
+
+ @param Init
+ Generates an INIT on the processor. If a processor cannot programmatically
+ generate an INIT without help from external hardware, then this function
+ returns EFI_UNSUPPORTED.
+
+ @param RegisterInterruptHandler
+ Associates an interrupt service routine with one of the processor's interrupt
+ vectors. This function is typically used by the EFI_TIMER_ARCH_PROTOCOL to
+ hook the timer interrupt in a system. It can also be used by the debugger to
+ hook exception vectors.
+
+ @param GetTimerValue Returns the value of one of the processor's internal timers.
+
+ @param SetMemoryAttributes Attempts to set the attributes of a memory region.
+
+ @param NumberOfTimers
+ The number of timers that are available in a processor. The value in this
+ field is a constant that must not be modified after the CPU Architectural
+ Protocol is installed. All consumers must treat this as a read-only field.
+
+ @param DmaBufferAlignment
+ The size, in bytes, of the alignment required for DMA buffer allocations.
+ This is typically the size of the largest data cache line in the platform.
+ The value in this field is a constant that must not be modified after the
+ CPU Architectural Protocol is installed. All consumers must treat this as
+ a read-only field.
+
+**/
+struct _EFI_CPU_ARCH_PROTOCOL {
+ EFI_CPU_FLUSH_DATA_CACHE FlushDataCache;
+ EFI_CPU_ENABLE_INTERRUPT EnableInterrupt;
+ EFI_CPU_DISABLE_INTERRUPT DisableInterrupt;
+ EFI_CPU_GET_INTERRUPT_STATE GetInterruptState;
+ EFI_CPU_INIT Init;
+ EFI_CPU_REGISTER_INTERRUPT_HANDLER RegisterInterruptHandler;
+ EFI_CPU_GET_TIMER_VALUE GetTimerValue;
+ EFI_CPU_SET_MEMORY_ATTRIBUTES SetMemoryAttributes;
+ UINT32 NumberOfTimers;
+ UINT32 DmaBufferAlignment;
+};
+
+extern EFI_GUID gEfiCpuArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Metronome.h b/MdePkg/Include/Dxe/ArchProtocol/Metronome.h new file mode 100644 index 0000000000..a07003e5cc --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Metronome.h @@ -0,0 +1,100 @@ +/** @file
+ Metronome Architectural Protocol as defined in DXE CIS
+
+ This code abstracts the DXE core to provide delay services.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Metronome.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_METRONOME_H__
+#define __ARCH_PROTOCOL_METRONOME_H__
+
+//
+// Global ID for the Metronome Architectural Protocol
+//
+#define EFI_METRONOME_ARCH_PROTOCOL_GUID \
+ { 0x26baccb2, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
+
+//
+// Declare forward reference for the Metronome Architectural Protocol
+//
+typedef struct _EFI_METRONOME_ARCH_PROTOCOL EFI_METRONOME_ARCH_PROTOCOL;
+
+/**
+ The WaitForTick() function waits for the number of ticks specified by
+ TickNumber from a known time source in the platform. If TickNumber of
+ ticks are detected, then EFI_SUCCESS is returned. The actual time passed
+ between entry of this function and the first tick is between 0 and
+ TickPeriod 100 nS units. If you want to guarantee that at least TickPeriod
+ time has elapsed, wait for two ticks. This function waits for a hardware
+ event to determine when a tick occurs. It is possible for interrupt
+ processing, or exception processing to interrupt the execution of the
+ WaitForTick() function. Depending on the hardware source for the ticks, it
+ is possible for a tick to be missed. This function cannot guarantee that
+ ticks will not be missed. If a timeout occurs waiting for the specified
+ number of ticks, then EFI_TIMEOUT is returned.
+
+ @param This The EFI_METRONOME_ARCH_PROTOCOL instance.
+
+ @param TickNumber Number of ticks to wait.
+
+ @retval EFI_SUCCESS The wait for the number of ticks specified by TickNumber
+ succeeded.
+
+ @retval EFI_TIMEOUT A timeout occurred waiting for the specified number of ticks.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_METRONOME_WAIT_FOR_TICK) (
+ IN EFI_METRONOME_ARCH_PROTOCOL *This,
+ IN UINT32 TickNumber
+ );
+
+//
+//
+
+/**
+ Interface stucture for the Metronome Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides access to a known time source in the platform to the
+ core. The core uses this known time source to produce core services that
+ require calibrated delays.
+
+ @param WaitForTick
+ Waits for a specified number of ticks from a known time source
+ in the platform. The actual time passed between entry of this
+ function and the first tick is between 0 and TickPeriod 100 nS
+ units. If you want to guarantee that at least TickPeriod time
+ has elapsed, wait for two ticks.
+
+ @param TickPeriod
+ The period of platform's known time source in 100 nS units.
+ This value on any platform must be at least 10 uS, and must not
+ exceed 200 uS. The value in this field is a constant that must
+ not be modified after the Metronome architectural protocol is
+ installed. All consumers must treat this as a read-only field.
+
+**/
+struct _EFI_METRONOME_ARCH_PROTOCOL {
+ EFI_METRONOME_WAIT_FOR_TICK WaitForTick;
+ UINT32 TickPeriod;
+};
+
+extern EFI_GUID gEfiMetronomeArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/MonotonicCounter.h b/MdePkg/Include/Dxe/ArchProtocol/MonotonicCounter.h new file mode 100644 index 0000000000..d25374074d --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/MonotonicCounter.h @@ -0,0 +1,33 @@ +/** @file
+ Monotonic Counter Architectural Protocol as defined in DXE CIS
+
+ This code provides the services required to access the systems monotonic counter
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MonotonicCounter.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_MONTONIC_COUNTER_H__
+#define __ARCH_PROTOCOL_MONTONIC_COUNTER_H__
+
+///
+/// Global ID for the Monotonic Counter Architectural Protocol
+///
+#define EFI_MONTONIC_COUNTER_ARCH_PROTOCOL_GUID \
+ {0x1da97072, 0xbddc, 0x4b30, {0x99, 0xf1, 0x72, 0xa0, 0xb5, 0x6f, 0xff, 0x2a} }
+
+extern EFI_GUID gEfiMonotonicCounterArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/RealTimeClock.h b/MdePkg/Include/Dxe/ArchProtocol/RealTimeClock.h new file mode 100644 index 0000000000..dc968e1666 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/RealTimeClock.h @@ -0,0 +1,41 @@ +/** @file
+ Real Time clock Architectural Protocol as defined in DXE CIS
+
+ This code abstracts time and data functions. Used to provide
+ Time and date related EFI runtime services.
+
+ The GetTime (), SetTime (), GetWakeupTime (), and SetWakeupTime () EFI 1.0
+ services are added to the EFI system table and the
+ EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL_GUID protocol is registered with a NULL
+ pointer.
+
+ No CRC of the EFI system table is required, as it is done in the DXE core.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: RealTimeClock.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_REAL_TIME_CLOCK_H__
+#define __ARCH_PROTOCOL_REAL_TIME_CLOCK_H__
+
+//
+// Global ID for the Real Time Clock Architectural Protocol
+//
+#define EFI_REAL_TIME_CLOCK_ARCH_PROTOCOL_GUID \
+ { 0x27CFAC87, 0x46CC, 0x11d4, {0x9A, 0x38, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
+
+extern EFI_GUID gEfiRealTimeClockArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Reset.h b/MdePkg/Include/Dxe/ArchProtocol/Reset.h new file mode 100644 index 0000000000..80befae95f --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Reset.h @@ -0,0 +1,38 @@ +/** @file
+ Reset Architectural Protocol as defined in the DXE CIS
+
+ Used to provide ResetSystem runtime services
+
+ The ResetSystem () EFI 1.0 service is added to the EFI system table and the
+ EFI_RESET_ARCH_PROTOCOL_GUID protocol is registered with a NULL pointer.
+
+ No CRC of the EFI system table is required, as it is done in the DXE core.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Reset.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_RESET_H__
+#define __ARCH_PROTOCOL_RESET_H__
+
+//
+// Global ID for the Reset Architectural Protocol
+//
+#define EFI_RESET_ARCH_PROTOCOL_GUID \
+ { 0x27CFAC88, 0x46CC, 0x11d4, {0x9A, 0x38, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
+
+extern EFI_GUID gEfiResetArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Runtime.h b/MdePkg/Include/Dxe/ArchProtocol/Runtime.h new file mode 100644 index 0000000000..bbd4c1a699 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Runtime.h @@ -0,0 +1,162 @@ +/** @file
+ Runtime Architectural Protocol as defined in DXE CIS
+
+ This code is used to produce the EFI 1.0 runtime virtual switch over
+
+ This driver must add SetVirtualAddressMap () and ConvertPointer () to
+ the EFI system table. This driver is not responcible for CRCing the
+ EFI system table.
+
+ This driver will add EFI_RUNTIME_ARCH_PROTOCOL_GUID protocol with a
+ pointer to the Runtime Arch Protocol instance structure. The protocol
+ member functions are used by the DXE core to export information need
+ by this driver to produce the runtime transition to virtual mode
+ calling.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Runtime.h
+
+ @par Revision Reference:
+ Version 0.90.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_RUNTIME_H__
+#define __ARCH_PROTOCOL_RUNTIME_H__
+
+//
+// Global ID for the Runtime Architectural Protocol
+//
+#define EFI_RUNTIME_ARCH_PROTOCOL_GUID \
+ { 0x96d08253, 0x8483, 0x11d4, {0xbc, 0xf1, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
+
+typedef struct _EFI_RUNTIME_ARCH_PROTOCOL EFI_RUNTIME_ARCH_PROTOCOL;
+
+/**
+ When a SetVirtualAddressMap() is performed all the runtime images loaded by
+ DXE must be fixed up with the new virtual address map. To facilitate this the
+ Runtime Architectural Protocol needs to be informed of every runtime driver
+ that is registered. All the runtime images loaded by DXE should be registered
+ with this service by the DXE Core when ExitBootServices() is called. The
+ images that are registered with this service must have successfully been
+ loaded into memory with the Boot Service LoadImage(). As a result, no
+ parameter checking needs to be performed.
+
+ @param This The EFI_RUNTIME_ARCH_PROTOCOL instance.
+
+ @param ImageBase Start of image that has been loaded in memory. It is either
+ a pointer to the DOS or PE header of the image.
+
+ @param ImageSize Size of the image in bytes.
+
+ @param RelocationData Information about the fixups that were performed on ImageBase
+ when it was loaded into memory. This information is needed
+ when the virtual mode fix-ups are reapplied so that data that
+ has been programmatically updated will not be fixed up. If
+ code updates a global variable the code is responsible for
+ fixing up the variable for virtual mode.
+
+ @retval EFI_SUCCESS The ImageBase has been registered.
+
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to register ImageBase.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_RUNTIME_REGISTER_IMAGE) (
+ IN EFI_RUNTIME_ARCH_PROTOCOL *This,
+ IN EFI_PHYSICAL_ADDRESS ImageBase,
+ IN UINTN ImageSize,
+ IN VOID *RelocationData
+ );
+
+
+/**
+ This function is used to support the required runtime events. Currently only
+ runtime events of type EFI_EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE needs to be
+ registered with this service. All the runtime events that exist in the DXE
+ Core should be registered with this service when ExitBootServices() is called.
+ All the events that are registered with this service must have been created
+ with the Boot Service CreateEvent(). As a result, no parameter checking needs
+ to be performed.
+
+ @param This The EFI_RUNTIME_ARCH_PROTOCOL instance.
+
+ @param Type The same as Type passed into CreateEvent().
+
+ @param NotifyTpl The same as NotifyTpl passed into CreateEvent().
+
+ @param NotifyFunction The same as NotifyFunction passed into CreateEvent().
+
+ @param NotifyContext The same as NotifyContext passed into CreateEvent().
+
+ @param Event The EFI_EVENT returned by CreateEvent(). Event must be in
+ runtime memory.
+
+ @retval EFI_SUCCESS The Event has been registered.
+
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to register Event.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_RUNTIME_REGISTER_EVENT) (
+ IN EFI_RUNTIME_ARCH_PROTOCOL *This,
+ IN UINT32 Type,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext,
+ IN EFI_EVENT *Event
+ );
+
+//
+// Interface stucture for the Runtime Architectural Protocol
+//
+/**
+ @par Protocol Description:
+ The DXE driver that produces this protocol must be a runtime driver. This
+ driver is responsible for initializing the SetVirtualAddressMap() and
+ ConvertPointer() fields of the EFI Runtime Services Table and the
+ CalculateCrc32() field of the EFI Boot Services Table. See the Runtime
+ Services chapter and the Boot Services chapter for details on these services.
+ After the two fields of the EFI Runtime Services Table and the one field of
+ the EFI Boot Services Table have been initialized, the driver must install
+ the EFI_RUNTIME_ARCH_PROTOCOL_GUID on a new handle with an EFI_RUNTIME_ARCH_
+ PROTOCOL interface pointer. The installation of this protocol informs the
+ DXE core that the virtual memory services and the 32-bit CRC services are
+ now available, and the DXE core must update the 32-bit CRC of the EFI Runtime
+ Services Table and the 32-bit CRC of the EFI Boot Services Table.
+
+ All runtime core services are provided by the EFI_RUNTIME_ARCH_PROTOCOL.
+ This includes the support for registering runtime images that must be
+ re-fixed up when a transition is made from physical mode to virtual mode.
+ This protocol also supports all events that are defined to fire at runtime.
+ This protocol also contains a CRC-32 function that will be used by the DXE
+ core as a boot service. The EFI_RUNTIME_ARCH_PROTOCOL needs the CRC-32
+ function when a transition is made from physical mode to virtual mode and
+ the EFI System Table and EFI Runtime Table are fixed up with virtual pointers.
+
+ @param RegisterRuntimeImage
+ Register a runtime image so it can be converted to virtual mode if the EFI Runtime Services
+ SetVirtualAddressMap() is called.
+
+ @param RegisterRuntimeEvent
+ Register an event than needs to be notified at runtime.
+
+**/
+struct _EFI_RUNTIME_ARCH_PROTOCOL {
+ EFI_RUNTIME_REGISTER_IMAGE RegisterImage;
+ EFI_RUNTIME_REGISTER_EVENT RegisterEvent;
+};
+
+extern EFI_GUID gEfiRuntimeArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Security.h b/MdePkg/Include/Dxe/ArchProtocol/Security.h new file mode 100644 index 0000000000..3598199b84 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Security.h @@ -0,0 +1,136 @@ +/** @file
+ Security Architectural Protocol as defined in the DXE CIS
+
+ Used to provide Security services. Specifically, dependening upon the
+ authentication state of a discovered driver in a Firmware Volume, the
+ portable DXE Core Dispatcher will call into the Security Architectural
+ Protocol (SAP) with the authentication state of the driver.
+
+ This call-out allows for OEM-specific policy decisions to be made, such
+ as event logging for attested boots, locking flash in response to discovering
+ an unsigned driver or failed signature check, or other exception response.
+
+ The SAP can also change system behavior by having the DXE core put a driver
+ in the Schedule-On-Request (SOR) state. This will allow for later disposition
+ of the driver by platform agent, such as Platform BDS.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Security.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_SECURITY_H__
+#define __ARCH_PROTOCOL_SECURITY_H__
+
+//
+// Global ID for the Security Code Architectural Protocol
+//
+#define EFI_SECURITY_ARCH_PROTOCOL_GUID \
+ { 0xA46423E3, 0x4617, 0x49f1, {0xB9, 0xFF, 0xD1, 0xBF, 0xA9, 0x11, 0x58, 0x39 } }
+
+typedef struct _EFI_SECURITY_ARCH_PROTOCOL EFI_SECURITY_ARCH_PROTOCOL;
+
+/**
+ The EFI_SECURITY_ARCH_PROTOCOL (SAP) is used to abstract platform-specific
+ policy from the DXE core response to an attempt to use a file that returns a
+ given status for the authentication check from the section extraction protocol.
+
+ The possible responses in a given SAP implementation may include locking
+ flash upon failure to authenticate, attestation logging for all signed drivers,
+ and other exception operations. The File parameter allows for possible logging
+ within the SAP of the driver.
+
+ If File is NULL, then EFI_INVALID_PARAMETER is returned.
+
+ If the file specified by File with an authentication status specified by
+ AuthenticationStatus is safe for the DXE Core to use, then EFI_SUCCESS is returned.
+
+ If the file specified by File with an authentication status specified by
+ AuthenticationStatus is not safe for the DXE Core to use under any circumstances,
+ then EFI_ACCESS_DENIED is returned.
+
+ If the file specified by File with an authentication status specified by
+ AuthenticationStatus is not safe for the DXE Core to use right now, but it
+ might be possible to use it at a future time, then EFI_SECURITY_VIOLATION is
+ returned.
+
+ @param This The EFI_SECURITY_ARCH_PROTOCOL instance.
+
+ @param AuthenticationStatus This is the authentication type returned from the Section
+ Extraction protocol. See the Section Extraction Protocol
+ Specification for details on this type.
+
+ @param File This is a pointer to the device path of the file that is
+ being dispatched. This will optionally be used for logging.
+
+ @retval EFI_SUCCESS The file specified by File did authenticate, and the
+ platform policy dictates that the DXE Core may use File.
+
+ @retval EFI_INVALID_PARAMETER Driver is NULL.
+
+ @retval EFI_SECURITY_VIOLATION The file specified by File did not authenticate, and
+ the platform policy dictates that File should be placed
+ in the untrusted state. A file may be promoted from
+ the untrusted to the trusted state at a future time
+ with a call to the Trust() DXE Service.
+
+ @retval EFI_ACCESS_DENIED The file specified by File did not authenticate, and
+ the platform policy dictates that File should not be
+ used for any purpose.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SECURITY_FILE_AUTHENTICATION_STATE) (
+ IN EFI_SECURITY_ARCH_PROTOCOL *This,
+ IN UINT32 AuthenticationStatus,
+ IN EFI_DEVICE_PATH_PROTOCOL *File
+ )
+;
+
+//
+// Interface stucture for the Timer Architectural Protocol
+//
+/**
+ @par Protocol Description:
+
+ The EFI_SECURITY_ARCH_PROTOCOL is used to abstract platform-specific policy
+ from the DXE core. This includes locking flash upon failure to authenticate,
+ attestation logging, and other exception operations.
+
+ The driver that produces the EFI_SECURITY_ARCH_PROTOCOL may also optionally
+ install the EFI_SECURITY_POLICY_PROTOCOL_GUID onto a new handle with a NULL
+ interface. The existence of this GUID in the protocol database means that
+ the GUIDed Section Extraction Protocol should authenticate the contents of
+ an Authentication Section. The expectation is that the GUIDed Section
+ Extraction protocol will look for the existence of the EFI_SECURITY_POLICY_
+ PROTOCOL_GUID in the protocol database. If it exists, then the publication
+ thereof is taken as an injunction to attempt an authentication of any section
+ wrapped in an Authentication Section. See the Firmware File System
+ Specification for details on the GUIDed Section Extraction Protocol and
+ Authentication Sections.
+
+ @par Protocol Parameters:
+
+ FileAuthenticationState - This service is called upon fault with respect to
+ the authentication of a section of a file.
+
+**/
+struct _EFI_SECURITY_ARCH_PROTOCOL {
+ EFI_SECURITY_FILE_AUTHENTICATION_STATE FileAuthenticationState;
+};
+
+extern EFI_GUID gEfiSecurityArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/SecurityPolicy.h b/MdePkg/Include/Dxe/ArchProtocol/SecurityPolicy.h new file mode 100644 index 0000000000..b46267e10a --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/SecurityPolicy.h @@ -0,0 +1,31 @@ +/** @file
+ Security Policy protocol as defined in the DXE CIS
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SecurityPolicy.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef _SECURITY_POLICY_H_
+#define _SECURITY_POLICY_H_
+
+//
+// Security policy protocol GUID definition
+//
+#define EFI_SECURITY_POLICY_PROTOCOL_GUID \
+ {0x78E4D245, 0xCD4D, 0x4a05, {0xA2, 0xBA, 0x47, 0x43, 0xE8, 0x6C, 0xFC, 0xAB} }
+
+extern EFI_GUID gEfiSecurityPolicyProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/StatusCode.h b/MdePkg/Include/Dxe/ArchProtocol/StatusCode.h new file mode 100644 index 0000000000..6440dc3388 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/StatusCode.h @@ -0,0 +1,82 @@ +/** @file
+ Status code Runtime Protocol as defined in the DXE CIS
+
+ The StatusCode () Tiano service is added to the EFI system table and the
+ EFI_STATUS_CODE_ARCH_PROTOCOL_GUID protocol is registered with a NULL
+ pointer.
+
+ No CRC of the EFI system table is required, as it is done in the DXE core.
+
+ This code abstracts Status Code reporting.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCode.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __STATUS_CODE_RUNTIME_PROTOCOL_H__
+#define __STATUS_CODE_RUNTIME_PROTOCOL_H__
+
+#define EFI_STATUS_CODE_RUNTIME_PROTOCOL_GUID \
+{ 0xd2b2b828, 0x826, 0x48a7, { 0xb3, 0xdf, 0x98, 0x3c, 0x0, 0x60, 0x24, 0xf0 } }
+
+/**
+ Provides an interface that a software module can call to report a status code.
+
+ @param Type Indicates the type of status code being reported.
+
+ @param Value Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is used to
+ classify the entity as well as an operation.
+
+ @param Instance The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ @param CallerId This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different rules to
+ different callers.
+
+ @param Data This optional parameter may be used to pass additional data.
+
+ @retval EFI_SUCCESS The function completed successfully
+
+ @retval EFI_DEVICE_ERROR The function should not be completed due to a device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REPORT_STATUS_CODE) (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+/**
+ @par Protocol Description:
+ Provides the service required to report a status code to the platform firmware.
+ This protocol must be produced by a runtime DXE driver and may be consumed
+ only by the DXE Foundation.
+
+ @param ReportStatusCode Emit a status code.
+
+**/
+typedef struct _EFI_STATUS_CODE_PROTOCOL {
+ EFI_REPORT_STATUS_CODE ReportStatusCode;
+} EFI_STATUS_CODE_PROTOCOL;
+
+extern EFI_GUID gEfiStatusCodeRuntimeProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Timer.h b/MdePkg/Include/Dxe/ArchProtocol/Timer.h new file mode 100644 index 0000000000..330f4cfd68 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Timer.h @@ -0,0 +1,222 @@ +/** @file
+ Timer Architectural Protocol as defined in the DXE CIS
+
+ This code is used to provide the timer tick for the DXE core.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Timer.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_TIMER_H__
+#define __ARCH_PROTOCOL_TIMER_H__
+
+//
+// Global ID for the Timer Architectural Protocol
+//
+#define EFI_TIMER_ARCH_PROTOCOL_GUID \
+ { 0x26baccb3, 0x6f42, 0x11d4, {0xbc, 0xe7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
+
+//
+// Declare forward reference for the Timer Architectural Protocol
+//
+typedef struct _EFI_TIMER_ARCH_PROTOCOL EFI_TIMER_ARCH_PROTOCOL;
+
+/**
+ This function of this type is called when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will register a funtion
+ of tyis type to be called for the timer interrupt, so it can know how much
+ time has passed. This information is used to signal timer based events.
+
+ @param Time Time since the last timer interrupt in 100 ns units. This will
+ typically be TimerPeriod, but if a timer interrupt is missed, and the
+ EFI_TIMER_ARCH_PROTOCOL driver can detect missed interrupts, then Time
+ will contain the actual amount of time since the last interrupt.
+
+ None.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_TIMER_NOTIFY) (
+ IN UINT64 Time
+ );
+
+/**
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ is returned.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @param NotifyFunction The function to call when a timer interrupt fires. This
+ function executes at TPL_HIGH_LEVEL. The DXE Core will
+ register a handler for the timer interrupt, so it can know
+ how much time has passed. This information is used to
+ signal timer based events. NULL will unregister the handler.
+
+ @retval EFI_SUCCESS The timer handler was registered.
+
+ @retval EFI_UNSUPPORTED The platform does not support timer interrupts.
+
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+
+ @retval EFI_DEVICE_ERROR The timer handler could not be registered.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TIMER_REGISTER_HANDLER) (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_TIMER_NOTIFY NotifyFunction
+);
+
+/**
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is
+ returned. If the timer is programmable, then the timer period
+ will be rounded up to the nearest timer period that is supported
+ by the timer hardware. If TimerPeriod is set to 0, then the
+ timer interrupts will be disabled.
+
+ @retval EFI_SUCCESS The timer period was changed.
+
+ @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt.
+
+ @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TIMER_SET_TIMER_PERIOD) (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ );
+
+/**
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ returned, then the timer is currently disabled.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If
+ 0 is returned, then the timer is currently disabled.
+
+ @retval EFI_SUCCESS The timer period was returned in TimerPeriod.
+
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TIMER_GET_TIMER_PERIOD) (
+ IN EFI_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ );
+
+/**
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
+ interrupt from a software-generated timer interrupt.
+
+ @param This The EFI_TIMER_ARCH_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The soft timer interrupt was generated.
+
+ @retval EFI_UNSUPPORTEDT The platform does not support the generation of soft timer interrupts.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TIMER_GENERATE_SOFT_INTERRUPT) (
+ IN EFI_TIMER_ARCH_PROTOCOL *This
+ );
+
+
+/**
+ Interface stucture for the Timer Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides the services to initialize a periodic timer
+ interrupt, and to register a handler that is called each time the timer
+ interrupt fires. It may also provide a service to adjust the rate of the
+ periodic timer interrupt. When a timer interrupt occurs, the handler is
+ passed the amount of time that has passed since the previous timer
+ interrupt.
+
+ @param RegisterHandler
+ Registers a handler that will be called each time the
+ timer interrupt fires. TimerPeriod defines the minimum
+ time between timer interrupts, so TimerPeriod will also
+ be the minimum time between calls to the registered
+ handler.
+
+ @param SetTimerPeriod
+ Sets the period of the timer interrupt in 100 nS units.
+ This function is optional, and may return EFI_UNSUPPORTED.
+ If this function is supported, then the timer period will
+ be rounded up to the nearest supported timer period.
+
+ @param GetTimerPeriod
+ Retrieves the period of the timer interrupt in 100 nS units.
+
+ @param GenerateSoftInterrupt
+ Generates a soft timer interrupt that simulates the firing of
+ the timer interrupt. This service can be used to invoke the
+ registered handler if the timer interrupt has been masked for
+ a period of time.
+
+**/
+struct _EFI_TIMER_ARCH_PROTOCOL {
+ EFI_TIMER_REGISTER_HANDLER RegisterHandler;
+ EFI_TIMER_SET_TIMER_PERIOD SetTimerPeriod;
+ EFI_TIMER_GET_TIMER_PERIOD GetTimerPeriod;
+ EFI_TIMER_GENERATE_SOFT_INTERRUPT GenerateSoftInterrupt;
+};
+
+extern EFI_GUID gEfiTimerArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/Variable.h b/MdePkg/Include/Dxe/ArchProtocol/Variable.h new file mode 100644 index 0000000000..13eb113bcc --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/Variable.h @@ -0,0 +1,39 @@ +/** @file
+ Variable Architectural Protocol as defined in the DXE CIS
+
+ This code is used to produce the EFI 1.0 runtime variable services
+
+ The GetVariable (), GetNextVariableName (), and SetVariable () EFI 1.0
+ services are added to the EFI system table and the
+ EFI_VARIABLE_ARCH_PROTOCOL_GUID protocol is registered with a NULL pointer.
+
+ No CRC of the EFI system table is required, as it is done in the DXE core.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Variable.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_VARIABLE_ARCH_H__
+#define __ARCH_PROTOCOL_VARIABLE_ARCH_H__
+
+//
+// Global ID for the Variable Architectural Protocol
+//
+#define EFI_VARIABLE_ARCH_PROTOCOL_GUID \
+ { 0x1e5668e2, 0x8481, 0x11d4, {0xbc, 0xf1, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } }
+
+extern EFI_GUID gEfiVariableArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/VariableWrite.h b/MdePkg/Include/Dxe/ArchProtocol/VariableWrite.h new file mode 100644 index 0000000000..8c21df54f1 --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/VariableWrite.h @@ -0,0 +1,38 @@ +/** @file
+ Variable Write Architectural Protocol as defined in the DXE CIS
+
+ This code is used to produce the EFI 1.0 runtime variable services
+
+ The SetVariable () EFI 1.0 services may be updated to the EFI system table and the
+ EFI_VARIABLE_WRITE_ARCH_PROTOCOL_GUID protocol is registered with a NULL pointer.
+
+ No CRC of the EFI system table is required, as it is done in the DXE core.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: VariableWrite.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_VARIABLE_WRITE_ARCH_H__
+#define __ARCH_PROTOCOL_VARIABLE_WRITE_ARCH_H__
+
+//
+// Global ID for the Variable Write Architectural Protocol
+//
+#define EFI_VARIABLE_WRITE_ARCH_PROTOCOL_GUID \
+ { 0x6441f818, 0x6362, 0x4e44, {0xb5, 0x70, 0x7d, 0xba, 0x31, 0xdd, 0x24, 0x53 } }
+
+extern EFI_GUID gEfiVariableWriteArchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Dxe/ArchProtocol/WatchdogTimer.h b/MdePkg/Include/Dxe/ArchProtocol/WatchdogTimer.h new file mode 100644 index 0000000000..a8d84b18da --- /dev/null +++ b/MdePkg/Include/Dxe/ArchProtocol/WatchdogTimer.h @@ -0,0 +1,172 @@ +/** @file
+ Watchdog Timer Architectural Protocol as defined in the DXE CIS
+
+ Used to provide system watchdog timer services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: WatchdogTimer.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __ARCH_PROTOCOL_WATCHDOG_TIMER_H__
+#define __ARCH_PROTOCOL_WATCHDOG_TIMER_H__
+
+//
+// Global ID for the Watchdog Timer Architectural Protocol
+//
+#define EFI_WATCHDOG_TIMER_ARCH_PROTOCOL_GUID \
+ { 0x665E3FF5, 0x46CC, 0x11d4, {0x9A, 0x38, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } }
+
+//
+// Declare forward reference for the Timer Architectural Protocol
+//
+typedef struct _EFI_WATCHDOG_TIMER_ARCH_PROTOCOL EFI_WATCHDOG_TIMER_ARCH_PROTOCOL;
+
+/**
+ A function of this type is called when the watchdog timer fires if a
+ handler has been registered.
+
+ @param Time The time in 100 ns units that has passed since the watchdog
+ timer was armed. For the notify function to be called, this
+ must be greater than TimerPeriod.
+
+ @return None.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_WATCHDOG_TIMER_NOTIFY) (
+ IN UINT64 Time
+ );
+
+/**
+ This function registers a handler that is to be invoked when the watchdog
+ timer fires. By default, the EFI_WATCHDOG_TIMER protocol will call the
+ Runtime Service ResetSystem() when the watchdog timer fires. If a
+ NotifyFunction is registered, then the NotifyFunction will be called before
+ the Runtime Service ResetSystem() is called. If NotifyFunction is NULL, then
+ the watchdog handler is unregistered. If a watchdog handler is registered,
+ then EFI_SUCCESS is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to uninstall a handler when a handler is not installed,
+ then return EFI_INVALID_PARAMETER.
+
+ @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
+
+ @param NotifyFunction The function to call when the watchdog timer fires. If this
+ is NULL, then the handler will be unregistered.
+
+ @retval EFI_SUCCESS The watchdog timer handler was registered or
+ unregistered.
+
+ @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already
+ registered.
+
+ @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not
+ previously registered.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_WATCHDOG_TIMER_REGISTER_HANDLER) (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction
+ );
+
+/**
+ This function sets the amount of time to wait before firing the watchdog
+ timer to TimerPeriod 100 nS units. If TimerPeriod is 0, then the watchdog
+ timer is disabled.
+
+ @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
+
+ @param TimerPeriod The amount of time in 100 nS units to wait before the watchdog
+ timer is fired. If TimerPeriod is zero, then the watchdog
+ timer is disabled.
+
+ @retval EFI_SUCCESS The watchdog timer has been programmed to fire in Time
+ 100 nS units.
+
+ @retval EFI_DEVICE_ERROR A watchdog timer could not be programmed due to a device
+ error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ IN UINT64 TimerPeriod
+ );
+
+/**
+ This function retrieves the amount of time the system will wait before firing
+ the watchdog timer. This period is returned in TimerPeriod, and EFI_SUCCESS
+ is returned. If TimerPeriod is NULL, then EFI_INVALID_PARAMETER is returned.
+
+ @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance.
+
+ @param TimerPeriod A pointer to the amount of time in 100 nS units that the system
+ will wait before the watchdog timer is fired. If TimerPeriod of
+ zero is returned, then the watchdog timer is disabled.
+
+ @retval EFI_SUCCESS The amount of time that the system will wait before
+ firing the watchdog timer was returned in TimerPeriod.
+
+ @retval EFI_INVALID_PARAMETER TimerPeriod is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) (
+ IN EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This,
+ OUT UINT64 *TimerPeriod
+ );
+
+
+/**
+ Interface stucture for the Watchdog Timer Architectural Protocol.
+
+ @par Protocol Description:
+ This protocol provides the services required to implement the Boot Service
+ SetWatchdogTimer(). It provides a service to set the amount of time to wait
+ before firing the watchdog timer, and it also provides a service to register
+ a handler that is invoked when the watchdog timer fires. This protocol can
+ implement the watchdog timer by using the event and timer Boot Services, or
+ it can make use of custom hardware. When the watchdog timer fires, control
+ will be passed to a handler if one has been registered. If no handler has
+ been registered, or the registered handler returns, then the system will be
+ reset by calling the Runtime Service ResetSystem().
+
+ @param RegisterHandler - Registers a handler that is invoked when the watchdog
+ timer fires.
+
+ @param SetTimerPeriod - Sets the amount of time in 100 ns units to wait before the
+ watchdog timer is fired. If this function is supported,
+ then the watchdog timer period will be rounded up to the
+ nearest supported watchdog timer period.
+
+ @param GetTimerPeriod - Retrieves the amount of time in 100 ns units that the
+ system will wait before the watchdog timer is fired.
+
+**/
+struct _EFI_WATCHDOG_TIMER_ARCH_PROTOCOL {
+ EFI_WATCHDOG_TIMER_REGISTER_HANDLER RegisterHandler;
+ EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD SetTimerPeriod;
+ EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD GetTimerPeriod;
+};
+
+extern EFI_GUID gEfiWatchdogTimerArchProtocolGuid;
+
+#endif
+
diff --git a/MdePkg/Include/Dxe/DxeCis.h b/MdePkg/Include/Dxe/DxeCis.h new file mode 100644 index 0000000000..a36481c817 --- /dev/null +++ b/MdePkg/Include/Dxe/DxeCis.h @@ -0,0 +1,589 @@ +/** @file
+ Include file matches things in the DXE CIS.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeCis.h
+
+ @par Revision Reference:
+ Version 0.91B.
+
+**/
+
+#ifndef __DXE_CIS__
+#define __DXE_CIS__
+
+#include <Uefi/UefiSpec.h>
+
+
+#define TIANO_ERROR(a) (MAX_2_BITS | (a))
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+//
+// Tiano added a couple of return types. These are owned by UEFI specification
+// and Tiano can not use them. Thus for UEFI 2.0/R9 support we moved the values
+// to a UEFI OEM extension range to conform to UEFI specification.
+//
+#define EFI_NOT_AVAILABLE_YET EFIERR (28)
+#define EFI_UNLOAD_IMAGE EFIERR (29)
+#else
+#define EFI_NOT_AVAILABLE_YET TIANO_ERROR (0)
+#define EFI_UNLOAD_IMAGE TIANO_ERROR (1)
+#endif
+
+//
+// BugBug: Implementation contamination of UEFI 2.0
+// Pointer to internal runtime pointer
+//
+#define EFI_IPF_GP_POINTER 0x00000008
+
+
+//
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+//
+
+//
+// attributes for reserved memory before it is promoted to system memory
+//
+#define EFI_MEMORY_PRESENT 0x0100000000000000ULL
+#define EFI_MEMORY_INITIALIZED 0x0200000000000000ULL
+#define EFI_MEMORY_TESTED 0x0400000000000000ULL
+
+//
+// range for memory mapped port I/O on IPF
+//
+#define EFI_MEMORY_PORT_IO 0x4000000000000000ULL
+
+//
+// Modifier for EFI DXE Services
+//
+#define EFI_DXESERVICE
+
+
+//
+// Global Coherencey Domain types
+//
+typedef enum {
+ EfiGcdMemoryTypeNonExistent,
+ EfiGcdMemoryTypeReserved,
+ EfiGcdMemoryTypeSystemMemory,
+ EfiGcdMemoryTypeMemoryMappedIo,
+ EfiGcdMemoryTypeMaximum
+} EFI_GCD_MEMORY_TYPE;
+
+typedef enum {
+ EfiGcdIoTypeNonExistent,
+ EfiGcdIoTypeReserved,
+ EfiGcdIoTypeIo,
+ EfiGcdIoTypeMaximum
+} EFI_GCD_IO_TYPE;
+
+typedef enum {
+ EfiGcdAllocateAnySearchBottomUp,
+ EfiGcdAllocateMaxAddressSearchBottomUp,
+ EfiGcdAllocateAddress,
+ EfiGcdAllocateAnySearchTopDown,
+ EfiGcdAllocateMaxAddressSearchTopDown,
+ EfiGcdMaxAllocateType
+} EFI_GCD_ALLOCATE_TYPE;
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+ UINT64 Capabilities;
+ UINT64 Attributes;
+ EFI_GCD_MEMORY_TYPE GcdMemoryType;
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE DeviceHandle;
+} EFI_GCD_MEMORY_SPACE_DESCRIPTOR;
+
+typedef struct {
+ EFI_PHYSICAL_ADDRESS BaseAddress;
+ UINT64 Length;
+ EFI_GCD_IO_TYPE GcdIoType;
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE DeviceHandle;
+} EFI_GCD_IO_SPACE_DESCRIPTOR;
+
+/**
+ Adds reserved memory, system memory, or memory-mapped I/O resources to the
+ global coherency domain of the processor.
+
+ @param GcdMemoryType Memory type of the memory space.
+
+ @param BaseAddress Base address of the memory space.
+
+ @param Length Length of the memory space.
+
+ @param Capabilities alterable attributes of the memory space.
+
+ @retval EFI_SUCCESS Merged this memory space into GCD map.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ADD_MEMORY_SPACE) (
+ IN EFI_GCD_MEMORY_TYPE GcdMemoryType,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Capabilities
+ )
+;
+
+/**
+ Allocates nonexistent memory, reserved memory, system memory, or memorymapped
+ I/O resources from the global coherency domain of the processor.
+
+ @param GcdAllocateType The type of allocate operation
+
+ @param GcdMemoryType The desired memory type
+
+ @param Alignment Align with 2^Alignment
+
+ @param Length Length to allocate
+
+ @param BaseAddress Base address to allocate
+
+ @param Imagehandle The image handle consume the allocated space.
+
+ @param DeviceHandle The device handle consume the allocated space.
+
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+ @retval EFI_NOT_FOUND No descriptor contains the desired space.
+
+ @retval EFI_SUCCESS Memory space successfully allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ALLOCATE_MEMORY_SPACE) (
+ IN EFI_GCD_ALLOCATE_TYPE GcdAllocateType,
+ IN EFI_GCD_MEMORY_TYPE GcdMemoryType,
+ IN UINTN Alignment,
+ IN UINT64 Length,
+ IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_HANDLE DeviceHandle OPTIONAL
+ )
+;
+
+/**
+ Frees nonexistent memory, reserved memory, system memory, or memory-mapped
+ I/O resources from the global coherency domain of the processor.
+
+ @param BaseAddress Base address of the segment.
+
+ @param Length Length of the segment.
+
+ @retval EFI_SUCCESS Space successfully freed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FREE_MEMORY_SPACE) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Removes reserved memory, system memory, or memory-mapped I/O resources from
+ the global coherency domain of the processor.
+
+ @param BaseAddress Base address of the memory space.
+
+ @param Length Length of the memory space.
+
+ @retval EFI_SUCCESS Successfully remove a segment of memory space.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REMOVE_MEMORY_SPACE) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Retrieves the descriptor for a memory region containing a specified address.
+
+ @param BaseAddress Specified start address
+
+ @param Descriptor Specified length
+
+ @retval EFI_INVALID_PARAMETER Invalid parameter
+
+ @retval EFI_SUCCESS Successfully get memory space descriptor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_MEMORY_SPACE_DESCRIPTOR) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Descriptor
+ )
+;
+
+/**
+ Modifies the attributes for a memory region in the global coherency domain of the
+ processor.
+
+ @param BaseAddress Specified start address
+
+ @param Length Specified length
+
+ @param Attributes Specified attributes
+
+ @retval EFI_SUCCESS Successfully set attribute of a segment of memory space.
+
+**/
+typedef
+
+EFI_STATUS
+(EFIAPI *EFI_SET_MEMORY_SPACE_ATTRIBUTES) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN UINT64 Attributes
+ )
+;
+
+/**
+ Returns a map of the memory resources in the global coherency domain of the
+ processor.
+
+ @param NumberOfDescriptors Number of descriptors.
+
+ @param MemorySpaceMap Descriptor array
+
+ @retval EFI_INVALID_PARAMETER Invalid parameter
+
+ @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate
+
+ @retval EFI_SUCCESS Successfully get memory space map.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_MEMORY_SPACE_MAP) (
+ OUT UINTN *NumberOfDescriptors,
+ OUT EFI_GCD_MEMORY_SPACE_DESCRIPTOR **MemorySpaceMap
+ )
+;
+
+/**
+ Adds reserved I/O or I/O resources to the global coherency domain of the processor.
+
+ @param GcdIoType IO type of the segment.
+
+ @param BaseAddress Base address of the segment.
+
+ @param Length Length of the segment.
+
+ @retval EFI_SUCCESS Merged this segment into GCD map.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ADD_IO_SPACE) (
+ IN EFI_GCD_IO_TYPE GcdIoType,
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Allocates nonexistent I/O, reserved I/O, or I/O resources from the global coherency
+ domain of the processor.
+
+ @param GcdAllocateType The type of allocate operation
+
+ @param GcdIoType The desired IO type
+
+ @param Alignment Align with 2^Alignment
+
+ @param Length Length to allocate
+
+ @param BaseAddress Base address to allocate
+
+ @param Imagehandle The image handle consume the allocated space.
+
+ @param DeviceHandle The device handle consume the allocated space.
+
+ @retval EFI_INVALID_PARAMETER Invalid parameter.
+
+ @retval EFI_NOT_FOUND No descriptor contains the desired space.
+
+ @retval EFI_SUCCESS IO space successfully allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ALLOCATE_IO_SPACE) (
+ IN EFI_GCD_ALLOCATE_TYPE GcdAllocateType,
+ IN EFI_GCD_IO_TYPE GcdIoType,
+ IN UINTN Alignment,
+ IN UINT64 Length,
+ IN OUT EFI_PHYSICAL_ADDRESS *BaseAddress,
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_HANDLE DeviceHandle OPTIONAL
+ )
+;
+
+/**
+ Frees nonexistent I/O, reserved I/O, or I/O resources from the global coherency
+ domain of the processor.
+
+ @param BaseAddress Base address of the segment.
+
+ @param Length Length of the segment.
+
+ @retval EFI_SUCCESS Space successfully freed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FREE_IO_SPACE) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Removes reserved I/O or I/O resources from the global coherency domain of the
+ processor.
+
+ @param BaseAddress Base address of the segment.
+
+ @param Length Length of the segment.
+
+ @retval EFI_SUCCESS Successfully removed a segment of IO space.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REMOVE_IO_SPACE) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Retrieves the descriptor for an I/O region containing a specified address.
+
+ @param BaseAddress Specified start address
+
+ @param Descriptor Specified length
+
+ @retval EFI_INVALID_PARAMETER Descriptor is NULL.
+
+ @retval EFI_SUCCESS Successfully get the IO space descriptor.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_IO_SPACE_DESCRIPTOR) (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ OUT EFI_GCD_IO_SPACE_DESCRIPTOR *Descriptor
+ )
+;
+
+/**
+ Returns a map of the I/O resources in the global coherency domain of the processor.
+
+ @param NumberOfDescriptors Number of descriptors.
+
+ @param MemorySpaceMap Descriptor array
+
+ @retval EFI_INVALID_PARAMETER Invalid parameter
+
+ @retval EFI_OUT_OF_RESOURCES No enough buffer to allocate
+
+ @retval EFI_SUCCESS Successfully get IO space map.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_IO_SPACE_MAP) (
+ OUT UINTN *NumberOfDescriptors,
+ OUT EFI_GCD_IO_SPACE_DESCRIPTOR **IoSpaceMap
+ )
+;
+
+/**
+ Loads and executed DXE drivers from firmware volumes.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DISPATCH) (VOID)
+;
+
+/**
+ Clears the Schedule on Request (SOR) flag for a component that is stored in a firmware volume.
+
+ @param FirmwareVolumeHandle The handle of the firmware volume that contains the file specified by FileName.
+
+ @param DriverName A pointer to the name of the file in a firmware volume.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCHEDULE) (
+ IN EFI_HANDLE FirmwareVolumeHandle,
+ IN EFI_GUID *DriverName
+ )
+;
+
+/**
+ Promotes a file stored in a firmware volume from the untrusted to the trusted state.
+
+ @param FirmwareVolumeHandle The handle of the firmware volume that contains the file specified by FileName.
+
+ @param DriverName A pointer to the name of the file in a firmware volume.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TRUST) (
+ IN EFI_HANDLE FirmwareVolumeHandle,
+ IN EFI_GUID *DriverName
+ )
+;
+
+/**
+ Creates a firmware volume handle for a firmware volume that is present in system memory.
+
+ @param FirmwareVolumeHeader A pointer to the header of the firmware volume.
+ @param Size The size, in bytes, of the firmware volume.
+ @param FirmwareVolumeHandle On output, a pointer to the created handle.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PROCESS_FIRMWARE_VOLUME) (
+ IN VOID *FvHeader,
+ IN UINTN Size,
+ OUT EFI_HANDLE *FirmwareVolumeHandle
+ )
+;
+
+//
+// DXE Services Table
+//
+#define EFI_DXE_SERVICES_SIGNATURE 0x565245535f455844ULL
+#define EFI_DXE_SERVICES_REVISION ((0 << 16) | (25))
+
+typedef struct {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Global Coherency Domain Services
+ //
+ EFI_ADD_MEMORY_SPACE AddMemorySpace;
+ EFI_ALLOCATE_MEMORY_SPACE AllocateMemorySpace;
+ EFI_FREE_MEMORY_SPACE FreeMemorySpace;
+ EFI_REMOVE_MEMORY_SPACE RemoveMemorySpace;
+ EFI_GET_MEMORY_SPACE_DESCRIPTOR GetMemorySpaceDescriptor;
+ EFI_SET_MEMORY_SPACE_ATTRIBUTES SetMemorySpaceAttributes;
+ EFI_GET_MEMORY_SPACE_MAP GetMemorySpaceMap;
+ EFI_ADD_IO_SPACE AddIoSpace;
+ EFI_ALLOCATE_IO_SPACE AllocateIoSpace;
+ EFI_FREE_IO_SPACE FreeIoSpace;
+ EFI_REMOVE_IO_SPACE RemoveIoSpace;
+ EFI_GET_IO_SPACE_DESCRIPTOR GetIoSpaceDescriptor;
+ EFI_GET_IO_SPACE_MAP GetIoSpaceMap;
+
+ //
+ // Dispatcher Services
+ //
+ EFI_DISPATCH Dispatch;
+ EFI_SCHEDULE Schedule;
+ EFI_TRUST Trust;
+ //
+ // Service to process a single firmware volume found in a capsule
+ //
+ EFI_PROCESS_FIRMWARE_VOLUME ProcessFirmwareVolume;
+} EFI_DXE_SERVICES;
+
+
+#include <Common/BootMode.h>
+#include <Common/BootScript.h>
+#include <Common/Capsule.h>
+#include <Common/Dependency.h>
+#include <Common/FirmwareVolumeImageFormat.h>
+#include <Common/FirmwareVolumeHeader.h>
+#include <Common/FirmwareFileSystem.h>
+#include <Common/Hob.h>
+#include <Common/InternalFormRepresentation.h>
+#include <Common/StatusCode.h>
+#include <Common/StatusCodeDataTypeId.h>
+
+#include <Guid/AcpiTableStorage.h>
+#include <Guid/Apriori.h>
+#include <Guid/Capsule.h>
+#include <Guid/DxeServices.h>
+#include <Guid/EventLegacyBios.h>
+#include <Guid/FirmwareFileSystem.h>
+#include <Guid/FrameworkDevicePath.h>
+#include <Guid/HobList.h>
+#include <Guid/MemoryAllocationHob.h>
+#include <Guid/SmramMemoryReserve.h>
+#include <Guid/StatusCodeDataTypeId.h>
+
+#include <Dxe/ArchProtocol/Bds.h>
+#include <Dxe/ArchProtocol/Cpu.h>
+#include <Dxe/ArchProtocol/Metronome.h>
+#include <Dxe/ArchProtocol/MonotonicCounter.h>
+#include <Dxe/ArchProtocol/RealTimeClock.h>
+#include <Dxe/ArchProtocol/Reset.h>
+#include <Dxe/ArchProtocol/Runtime.h>
+#include <Dxe/ArchProtocol/Security.h>
+#include <Dxe/ArchProtocol/SecurityPolicy.h>
+#include <Dxe/ArchProtocol/StatusCode.h>
+#include <Dxe/ArchProtocol/Timer.h>
+#include <Dxe/ArchProtocol/Variable.h>
+#include <Dxe/ArchProtocol/VariableWrite.h>
+#include <Dxe/ArchProtocol/WatchdogTimer.h>
+
+#include <Protocol/AcpiSupport.h>
+#include <Protocol/BootScriptSave.h>
+#include <Protocol/CpuIo.h>
+#include <Protocol/DataHub.h>
+#include <Protocol/FirmwareVolume.h>
+#include <Protocol/FirmwareVolumeBlock.h>
+#include <Protocol/FirmwareVolumeDispatch.h>
+#include <Protocol/Hii.h>
+#include <Protocol/FormBrowser.h>
+#include <Protocol/FormCallback.h>
+#include <Protocol/GuidedSectionExtraction.h>
+#include <Protocol/IdeControllerInit.h>
+#include <Protocol/IncompatiblePciDeviceSupport.h>
+#include <Protocol/PciHostBridgeResourceAllocation.h>
+#include <Protocol/PciHotPlugInit.h>
+#include <Protocol/PciPlatform.h>
+#include <Protocol/SectionExtraction.h>
+#include <Protocol/Smbus.h>
+#include <Protocol/LegacyBios.h>
+#include <Protocol/Legacy8259.h>
+#include <Protocol/LegacyRegion.h>
+#include <Protocol/LegacyBiosPlatform.h>
+#include <Protocol/LegacyInterrupt.h>
+
+#endif
diff --git a/MdePkg/Include/Dxe/SmmCis.h b/MdePkg/Include/Dxe/SmmCis.h new file mode 100644 index 0000000000..35a1a64682 --- /dev/null +++ b/MdePkg/Include/Dxe/SmmCis.h @@ -0,0 +1,526 @@ +/** @file
+ Include file matches things in the Smm CIS spec.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmCis.h
+
+ @par Revision Reference:
+ Version 0.9.
+
+**/
+
+#ifndef __SMM_CIS__
+#define __SMM_CIS__
+
+#define EFI_SMM_CPU_IO_GUID \
+ { \
+ 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \
+ }
+
+typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;
+typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;
+
+
+//
+// SMM Base specification constant and types
+//
+#define SMM_SMST_SIGNATURE EFI_SIGNATURE_32 ('S', 'M', 'S', 'T')
+#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)
+
+//
+// *******************************************************
+// EFI_SMM_IO_WIDTH
+// *******************************************************
+//
+typedef enum {
+ SMM_IO_UINT8 = 0,
+ SMM_IO_UINT16 = 1,
+ SMM_IO_UINT32 = 2,
+ SMM_IO_UINT64 = 3
+} EFI_SMM_IO_WIDTH;
+
+/**
+ Provides the basic memory and I/O interfaces that are used to
+ abstract accesses to devices.
+
+ @param This The EFI_SMM_CPU_IO_INTERFACE instance.
+
+ @param Width Signifies the width of the I/O operations.
+
+ @param Address The base address of the I/O operations.
+
+ @param Count The number of I/O operations to perform.
+
+ @param Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the device.
+
+ @retval EFI_UNSUPPORTED The Address is not valid for this system.
+
+ @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.
+
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CPU_IO) (
+ IN EFI_SMM_CPU_IO_INTERFACE *This,
+ IN EFI_SMM_IO_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_SMM_CPU_IO Read;
+ EFI_SMM_CPU_IO Write;
+} EFI_SMM_IO_ACCESS;
+
+struct _EFI_SMM_CPU_IO_INTERFACE {
+ EFI_SMM_IO_ACCESS Mem;
+ EFI_SMM_IO_ACCESS Io;
+};
+
+/**
+ Allocates pool memory from SMRAM for IA-32 or runtime memory for
+ the Itanium processor family.
+
+ @param PoolType The type of pool to allocate.The only supported type is EfiRuntimeServicesData
+
+ @param Size The number of bytes to allocate from the pool.
+
+ @param Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL) (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ Returns pool memory to the system.
+
+ @param Buffer Pointer to the buffer to free.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_POOL) (
+ IN VOID *Buffer
+ );
+
+/**
+ Allocates memory pages from the system.
+
+ @param Type The type of allocation to perform.
+
+ @param MemoryType The only supported type is EfiRuntimeServicesData
+
+ @param NumberofPages The number of contiguous 4 KB pages to allocate
+
+ @param Memory Pointer to a physical address. On input, the way in which
+ the address is used depends on the value of Type. On output, the address
+ is set to the base of the page range that was allocated.
+
+ @retval EFI_SUCCESS The requested pages were allocated.
+
+ @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.
+
+ @retval EFI_NOT_FOUND The requested pages could not be found.
+
+ @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress
+ or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES) (
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN NumberOfPages,
+ OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ Frees memory pages for the system.
+
+ @param Memory The base physical address of the pages to be freed
+
+ @param NumberOfPages The number of contiguous 4 KB pages to free.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+
+ @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.
+
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMMCORE_FREE_PAGES) (
+ IN EFI_PHYSICAL_ADDRESS Memory,
+ IN UINTN NumberOfPages
+ );
+
+typedef
+VOID
+(EFIAPI *EFI_AP_PROCEDURE) (
+ IN VOID *Buffer
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STARTUP_THIS_AP) (
+ IN EFI_AP_PROCEDURE Procedure,
+ IN UINTN CpuNumber,
+ IN OUT VOID *ProcArguments OPTIONAL
+ );
+
+typedef struct {
+ UINT8 Reserved1[248];
+ UINT32 SMBASE;
+ UINT32 SMMRevId;
+ UINT16 IORestart;
+ UINT16 AutoHALTRestart;
+ UINT8 Reserved2[164];
+ UINT32 ES;
+ UINT32 CS;
+ UINT32 SS;
+ UINT32 DS;
+ UINT32 FS;
+ UINT32 GS;
+ UINT32 LDTBase;
+ UINT32 TR;
+ UINT32 DR7;
+ UINT32 DR6;
+ UINT32 EAX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 EBX;
+ UINT32 ESP;
+ UINT32 EBP;
+ UINT32 ESI;
+ UINT32 EDI;
+ UINT32 EIP;
+ UINT32 EFLAGS;
+ UINT32 CR3;
+ UINT32 CR0;
+} EFI_SMI_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT64 reserved;
+ UINT64 r1;
+ UINT64 r2;
+ UINT64 r3;
+ UINT64 r4;
+ UINT64 r5;
+ UINT64 r6;
+ UINT64 r7;
+ UINT64 r8;
+ UINT64 r9;
+ UINT64 r10;
+ UINT64 r11;
+ UINT64 r12;
+ UINT64 r13;
+ UINT64 r14;
+ UINT64 r15;
+ UINT64 r16;
+ UINT64 r17;
+ UINT64 r18;
+ UINT64 r19;
+ UINT64 r20;
+ UINT64 r21;
+ UINT64 r22;
+ UINT64 r23;
+ UINT64 r24;
+ UINT64 r25;
+ UINT64 r26;
+ UINT64 r27;
+ UINT64 r28;
+ UINT64 r29;
+ UINT64 r30;
+ UINT64 r31;
+
+ UINT64 pr;
+
+ UINT64 b0;
+ UINT64 b1;
+ UINT64 b2;
+ UINT64 b3;
+ UINT64 b4;
+ UINT64 b5;
+ UINT64 b6;
+ UINT64 b7;
+
+ // application registers
+ UINT64 ar_rsc;
+ UINT64 ar_bsp;
+ UINT64 ar_bspstore;
+ UINT64 ar_rnat;
+
+ UINT64 ar_fcr;
+
+ UINT64 ar_eflag;
+ UINT64 ar_csd;
+ UINT64 ar_ssd;
+ UINT64 ar_cflg;
+ UINT64 ar_fsr;
+ UINT64 ar_fir;
+ UINT64 ar_fdr;
+
+ UINT64 ar_ccv;
+
+ UINT64 ar_unat;
+
+ UINT64 ar_fpsr;
+
+ UINT64 ar_pfs;
+ UINT64 ar_lc;
+ UINT64 ar_ec;
+
+ // control registers
+ UINT64 cr_dcr;
+ UINT64 cr_itm;
+ UINT64 cr_iva;
+ UINT64 cr_pta;
+ UINT64 cr_ipsr;
+ UINT64 cr_isr;
+ UINT64 cr_iip;
+ UINT64 cr_ifa;
+ UINT64 cr_itir;
+ UINT64 cr_iipa;
+ UINT64 cr_ifs;
+ UINT64 cr_iim;
+ UINT64 cr_iha;
+
+ // debug registers
+ UINT64 dbr0;
+ UINT64 dbr1;
+ UINT64 dbr2;
+ UINT64 dbr3;
+ UINT64 dbr4;
+ UINT64 dbr5;
+ UINT64 dbr6;
+ UINT64 dbr7;
+
+ UINT64 ibr0;
+ UINT64 ibr1;
+ UINT64 ibr2;
+ UINT64 ibr3;
+ UINT64 ibr4;
+ UINT64 ibr5;
+ UINT64 ibr6;
+ UINT64 ibr7;
+
+ // virtual registers
+ UINT64 int_nat; // nat bits for R1-R31
+
+} EFI_PMI_SYSTEM_CONTEXT;
+
+typedef union {
+ EFI_SMI_CPU_SAVE_STATE Ia32SaveState;
+ EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;
+} EFI_SMM_CPU_SAVE_STATE;
+
+typedef struct {
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Rsvd1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Rsvd2[10];
+ UINT8 St0Mm0[10], Rsvd3[6];
+ UINT8 St0Mm1[10], Rsvd4[6];
+ UINT8 St0Mm2[10], Rsvd5[6];
+ UINT8 St0Mm3[10], Rsvd6[6];
+ UINT8 St0Mm4[10], Rsvd7[6];
+ UINT8 St0Mm5[10], Rsvd8[6];
+ UINT8 St0Mm6[10], Rsvd9[6];
+ UINT8 St0Mm7[10], Rsvd10[6];
+ UINT8 Rsvd11[22*16];
+} EFI_SMI_OPTIONAL_FPSAVE_STATE;
+
+typedef struct {
+ UINT64 f2[2];
+ UINT64 f3[2];
+ UINT64 f4[2];
+ UINT64 f5[2];
+ UINT64 f6[2];
+ UINT64 f7[2];
+ UINT64 f8[2];
+ UINT64 f9[2];
+ UINT64 f10[2];
+ UINT64 f11[2];
+ UINT64 f12[2];
+ UINT64 f13[2];
+ UINT64 f14[2];
+ UINT64 f15[2];
+ UINT64 f16[2];
+ UINT64 f17[2];
+ UINT64 f18[2];
+ UINT64 f19[2];
+ UINT64 f20[2];
+ UINT64 f21[2];
+ UINT64 f22[2];
+ UINT64 f23[2];
+ UINT64 f24[2];
+ UINT64 f25[2];
+ UINT64 f26[2];
+ UINT64 f27[2];
+ UINT64 f28[2];
+ UINT64 f29[2];
+ UINT64 f30[2];
+ UINT64 f31[2];
+} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;
+
+typedef union {
+ EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;
+ EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;
+} EFI_SMM_FLOATING_POINT_SAVE_STATE;
+
+/**
+ This function is the main entry point for an SMM handler dispatch
+ or communicate-based callback.
+
+ @param SmmImageHandle A unique value returned by the SMM infrastructure
+ in response to registration for a communicate-based callback or dispatch.
+
+ @param CommunicationBuffer An optional buffer that will be populated
+ by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)
+ invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.
+
+ @param SourceSize If CommunicationBuffer is non-NULL, this field
+ indicates the size of the data payload in this buffer.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT) (
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+/**
+ The SmmInstallConfigurationTable() function is used to maintain the list
+ of configuration tables that are stored in the System Management System
+ Table. The list is stored as an array of (GUID, Pointer) pairs. The list
+ must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.
+
+ @param SystemTable A pointer to the SMM System Table.
+ @param Guid A pointer to the GUID for the entry to add, update, or remove.
+ @param Table A pointer to the buffer of the table to add.
+ @param TableSize The size of the table to install.
+
+ @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
+ @retval EFI_INVALID_PARAMETER Guid is not valid.
+ @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE) (
+ IN EFI_SMM_SYSTEM_TABLE *SystemTable,
+ IN EFI_GUID *Guid,
+ IN VOID *Table,
+ IN UINTN TableSize
+ )
+;
+
+//
+// System Management System Table (SMST)
+//
+struct _EFI_SMM_SYSTEM_TABLE {
+ EFI_TABLE_HEADER Hdr;
+
+ CHAR16 *SmmFirmwareVendor;
+ UINT32 SmmFirmwareRevision;
+
+ EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;
+
+ //
+ // I/O Services
+ //
+ EFI_GUID EfiSmmCpuIoGuid;
+ EFI_SMM_CPU_IO_INTERFACE SmmIo;
+
+ //
+ // Runtime memory service
+ //
+ EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMMCORE_FREE_POOL SmmFreePool;
+ EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;
+ EFI_SMMCORE_FREE_PAGES SmmFreePages;
+
+ //
+ // MP service
+ //
+ EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;
+
+ //
+ // CPU information records
+ //
+ UINTN CurrentlyExecutingCpu;
+ UINTN NumberOfCpus;
+ EFI_SMM_CPU_SAVE_STATE *CpuSaveState;
+ EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;
+
+ //
+ // Extensibility table
+ //
+ UINTN NumberOfTableEntries;
+ EFI_CONFIGURATION_TABLE *SmmConfigurationTable;
+
+};
+
+#include <Guid/SmmCommunicate.h>
+#include <Guid/SmramMemoryReserve.h>
+#include <Protocol/SmmBase.h>
+#include <Protocol/SmmAccess.h>
+#include <Protocol/SmmControl.h>
+#include <Protocol/SmmGpiDispatch.h>
+#include <Protocol/SmmIchnDispatch.h>
+#include <Protocol/SmmPeriodicTimerDispatch.h>
+#include <Protocol/SmmPowerButtonDispatch.h>
+#include <Protocol/SmmStandbyButtonDispatch.h>
+#include <Protocol/SmmStatusCode.h>
+#include <Protocol/SmmSwDispatch.h>
+#include <Protocol/SmmSxDispatch.h>
+#include <Protocol/SmmUsbDispatch.h>
+
+extern EFI_GUID gEfiSmmCpuIoGuid;
+
+#endif
diff --git a/MdePkg/Include/DxeCore.h b/MdePkg/Include/DxeCore.h new file mode 100644 index 0000000000..9554fb8c23 --- /dev/null +++ b/MdePkg/Include/DxeCore.h @@ -0,0 +1,50 @@ +/** @file
+
+ Root include file for DXE Core
+
+ The DXE Core has its own module type since its entry point definition is
+ unique. This module type should only be used by the DXE core. The build
+ infrastructure must set EFI_SPECIFICATION_VERSION before including this
+ file. To support R9/UEFI2.0 set EFI_SPECIFIATION_VERSION to 0x00020000. To
+ support R8.5/EFI 1.10 set EFI_SPECIFIATION_VERSION to 0x00010010.
+ EDK_RELEASE_VERSION must be set to a non zero value.
+ EFI_SPECIFIATION_VERSION and EDK_RELEASE_VERSION are set automatically
+ by the build infrastructure for every module.
+
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __DXE_CORE_H__
+#define __DXE_CORE_H__
+
+
+//
+// Check to make sure EFI_SPECIFICATION_VERSION and EDK_RELEASE_VERSION are defined.
+// also check for legal combinations
+//
+#if !defined(EFI_SPECIFICATION_VERSION)
+ #error EFI_SPECIFICATION_VERSION not defined
+#elif !defined(EDK_RELEASE_VERSION)
+ #error EDK_RELEASE_VERSION not defined
+#elif (EDK_RELEASE_VERSION == 0)
+ #error EDK_RELEASE_VERSION can not be zero
+#endif
+
+
+
+#include <Common/UefiBaseTypes.h>
+#include <Dxe/DxeCis.h>
+
+#include <Protocol/Pcd.h>
+
+#endif
diff --git a/MdePkg/Include/DxeDepex.h b/MdePkg/Include/DxeDepex.h new file mode 100644 index 0000000000..e91f35083d --- /dev/null +++ b/MdePkg/Include/DxeDepex.h @@ -0,0 +1,58 @@ +/** @file
+ Include file for DXE Dependency Expression *.DXS file.
+
+ This include file is only for Dependency Expression *.DXS files and
+ should not be include directly in modules.
+
+ DEPEX (DEPendency EXpresion) BNF Grammer for DXE:
+ The BNF grammar is thus:
+<pre>
+ <depex> ::= before GUID
+ | after GUID
+ | SOR <bool>
+ | <bool>
+ <bool> ::= <bool> and <term>
+ | <bool> or <term>
+ | <term>
+ <term> ::= not <factor>
+ | <factor>
+ <factor> ::= <bool>
+ | <boolval>
+ | <depinst>
+ | <termval>
+ <boolval> ::= true
+ | false
+ <depinst> ::= push GUID
+ <termval> ::= end
+</pre>
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __DXE_DEPEX_H__
+#define __DXE_DEPEX_H__
+
+//
+// The Depex grammer needs the following strings so we must undo
+// any pre-processor redefinitions
+//
+#undef DEPENDENCY_START
+#undef BEFORE
+#undef AFTER
+#undef SOR
+#undef AND
+#undef OR
+#undef NOT
+#undef TRUE
+#undef FALSE
+#undef DEPENDENCY_END
+
+#endif
diff --git a/MdePkg/Include/Ebc/ProcessorBind.h b/MdePkg/Include/Ebc/ProcessorBind.h new file mode 100644 index 0000000000..cef769241b --- /dev/null +++ b/MdePkg/Include/Ebc/ProcessorBind.h @@ -0,0 +1,81 @@ +/** @file
+ Processor or compiler specific defines and types for EBC.
+
+ We currently only have one EBC complier so there may be some Intel compiler
+ specific functions in this file.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ProcessorBind.h
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_EBC
+
+//
+// Native integer types
+//
+typedef char INT8;
+typedef unsigned char BOOLEAN;
+typedef unsigned char UINT8;
+typedef unsigned char CHAR8;
+
+typedef short INT16;
+typedef unsigned short UINT16;
+typedef unsigned short CHAR16;
+
+typedef int INT32;
+typedef unsigned int UINT32;
+
+typedef __int64 INT64;
+typedef unsigned __int64 UINT64;
+
+//
+// "long" type scales to the processor native size with EBC compiler
+//
+typedef long INTN;
+typedef unsigned long UINTN;
+
+#define UINT8_MAX 0xff
+
+//
+// Scalable macro to set the most significant bit in a natural number
+//
+#define MAX_BIT 0x8000000000000000ULL
+#define MAX_2_BITS 0xC000000000000000ULL
+
+
+//
+// Maximum legal EBC address
+//
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify thier member functions with EFIAPI.
+//
+#define EFIAPI
+
+//
+// The Microsoft* C compiler can removed references to unreferenced data items
+// if the /OPT:REF linker option is used. We defined a macro as this is a
+// a non standard extension. Currently not supported by the EBC compiler
+//
+#define GLOBAL_REMOVE_IF_UNREFERENCED
+
+#endif
+
diff --git a/MdePkg/Include/Guid/Acpi.h b/MdePkg/Include/Guid/Acpi.h new file mode 100644 index 0000000000..a64f1b7ea0 --- /dev/null +++ b/MdePkg/Include/Guid/Acpi.h @@ -0,0 +1,48 @@ +/** @file
+ GUIDs used for ACPI entries in the EFI 1.0 system table
+
+ These GUIDs point the ACPI tables as defined in the ACPI specifications.
+ ACPI 2.0 specification defines the ACPI 2.0 GUID. UEFI 2.0 defines the
+ ACPI 2.0 Table GUID and ACPI Table GUID.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Acpi.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __ACPI_GUID_H__
+#define __ACPI_GUID_H__
+
+#define EFI_ACPI_10_TABLE_GUID \
+ { \
+ 0xeb9d2d30, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_ACPI_TABLE_GUID \
+ { \
+ 0x8868e871, 0xe4f1, 0x11d3, {0xbc, 0x22, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define ACPI_10_TABLE_GUID EFI_ACPI_10_TABLE_GUID
+//
+// ACPI 2.0 or newer tables should use EFI_ACPI_TABLE_GUID.
+//
+#define EFI_ACPI_20_TABLE_GUID EFI_ACPI_TABLE_GUID
+#define EFI_ACPI_30_TABLE_GUID EFI_ACPI_TABLE_GUID
+
+extern EFI_GUID gEfiAcpi10TableGuid;
+extern EFI_GUID gEfiAcpi20TableGuid;
+extern EFI_GUID gEfiAcpi30TableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/AcpiTableStorage.h b/MdePkg/Include/Guid/AcpiTableStorage.h new file mode 100644 index 0000000000..80b1154828 --- /dev/null +++ b/MdePkg/Include/Guid/AcpiTableStorage.h @@ -0,0 +1,30 @@ +/** @file
+ The ACPI table storage file is fully FFS compliant.
+ The file is a number of sections of type EFI_SECTION_RAW.
+ This GUID is used to identify the file as an ACPI table storage file.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: AcpiTableStorage.h
+
+ @par Revision Reference:
+ GUID defined in ACPI Table Storage Spec Version 0.9.
+
+**/
+
+#ifndef _ACPI_TABLE_STORAGE_H_
+#define _ACPI_TABLE_STORAGE_H_
+
+#define EFI_ACPI_TABLE_STORAGE_GUID \
+ { 0x7e374e25, 0x8e01, 0x4fee, {0x87, 0xf2, 0x39, 0xc, 0x23, 0xc6, 0x6, 0xcd } }
+
+extern EFI_GUID gEfiAcpiTableStorageGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Apriori.h b/MdePkg/Include/Guid/Apriori.h new file mode 100644 index 0000000000..ba92560d7e --- /dev/null +++ b/MdePkg/Include/Guid/Apriori.h @@ -0,0 +1,32 @@ +/** @file
+ GUID used as an FV filename for A Priori file. The A Priori file contains a
+ list of FV filenames that the DXE dispatcher will schedule reguardless of
+ the dependency grammer.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Apriori.h
+
+ @par Revision Reference:
+ GUID defined in DXE CIS spec version 0.91B
+
+**/
+
+#ifndef __APRIORI_GUID_H__
+#define __APRIORI_GUID_H__
+
+#define EFI_APRIORI_GUID \
+ { \
+ 0xfc510ee7, 0xffdc, 0x11d4, {0xbd, 0x41, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+extern EFI_GUID gAprioriGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Capsule.h b/MdePkg/Include/Guid/Capsule.h new file mode 100644 index 0000000000..7864b924de --- /dev/null +++ b/MdePkg/Include/Guid/Capsule.h @@ -0,0 +1,43 @@ +/** @file
+ GUIDs used for EFI Capsule
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Capsule.h
+
+ @par Revision Reference:
+ GUIDs defined in Capsule Spec Version 0.9
+
+**/
+
+#ifndef __CAPSULE_GUID_H__
+#define __CAPSULE_GUID_H__
+
+//
+// This is the GUID of the capsule header of the image on disk.
+//
+#define EFI_CAPSULE_GUID \
+ { \
+ 0x3B6686BD, 0x0D76, 0x4030, {0xB7, 0x0E, 0xB5, 0x51, 0x9E, 0x2F, 0xC5, 0xA0 } \
+ }
+
+//
+// This is the GUID of the configuration results file created by the capsule
+// application.
+//
+#define EFI_CONFIG_FILE_NAME_GUID \
+ { \
+ 0x98B8D59B, 0xE8BA, 0x48EE, {0x98, 0xDD, 0xC2, 0x95, 0x39, 0x2F, 0x1E, 0xDB } \
+ }
+
+extern EFI_GUID gEfiCapsuleGuid;
+extern EFI_GUID gEfiConfigFileNameGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/DataHubRecords.h b/MdePkg/Include/Guid/DataHubRecords.h new file mode 100644 index 0000000000..f29a5a474f --- /dev/null +++ b/MdePkg/Include/Guid/DataHubRecords.h @@ -0,0 +1,66 @@ +/** @file
+ DataHubRecord.h include all data hub sub class GUID defitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHubRecords.h
+
+ @par Revision Reference:
+ These GUID are from Cache subclass spec 0.9, DataHub SubClass spec 0.9, Memory SubClass Spec 0.9,
+ Processor Subclass spec 0.9, Misc SubClass spec 0.9.
+
+**/
+#ifndef _DATAHUB_RECORDS_GUID_H_
+#define _DATAHUB_RECORDS_GUID_H_
+
+#define EFI_PROCESSOR_PRODUCER_GUID \
+ { 0x1bf06aea, 0x5bec, 0x4a8d, {0x95, 0x76, 0x74, 0x9b, 0x09, 0x56, 0x2d, 0x30 } }
+
+extern EFI_GUID gEfiProcessorProducerGuid;
+
+
+#define EFI_PROCESSOR_SUBCLASS_GUID \
+ { 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }
+
+extern EFI_GUID gEfiProcessorSubClassGuid;
+
+
+#define EFI_CACHE_SUBCLASS_GUID \
+ { 0x7f0013a7, 0xdc79, 0x4b22, {0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } }
+
+extern EFI_GUID gEfiCacheSubClassGuid;
+
+
+#define EFI_MEMORY_PRODUCER_GUID \
+ { 0x1d7add6e, 0xb2da, 0x4b0b, {0xb2, 0x9f, 0x49, 0xcb, 0x42, 0xf4, 0x63, 0x56 } }
+
+extern EFI_GUID gEfiMemoryProducerGuid;
+
+
+#define EFI_MEMORY_SUBCLASS_GUID \
+ {0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }
+
+extern EFI_GUID gEfiMemorySubClassGuid;
+
+
+#define EFI_MISC_PRODUCER_GUID \
+ { 0x62512c92, 0x63c4, 0x4d80, {0x82, 0xb1, 0xc1, 0xa4, 0xdc, 0x44, 0x80, 0xe5 } }
+
+extern EFI_GUID gEfiMiscProducerGuid;
+
+
+#define EFI_MISC_SUBCLASS_GUID \
+ { 0x772484B2, 0x7482, 0x4b91, {0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } }
+
+extern EFI_GUID gEfiMiscSubClassGuid;
+
+
+#endif
+
diff --git a/MdePkg/Include/Guid/DebugImageInfoTable.h b/MdePkg/Include/Guid/DebugImageInfoTable.h new file mode 100644 index 0000000000..f050a2e610 --- /dev/null +++ b/MdePkg/Include/Guid/DebugImageInfoTable.h @@ -0,0 +1,58 @@ +/** @file
+ GUID and related data structures used with the Debug Image Info Table.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DebugImageInfoTable.h
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __DEBUG_IMAGE_INFO_GUID_H__
+#define __DEBUG_IMAGE_INFO_GUID_H__
+
+#define EFI_DEBUG_IMAGE_INFO_TABLE_GUID \
+ { \
+ 0x49152e77, 0x1ada, 0x4764, {0xb7, 0xa2, 0x7a, 0xfe, 0xfe, 0xd9, 0x5e, 0x8b } \
+ }
+
+extern EFI_GUID gEfiDebugImageInfoTableGuid;
+
+#define EFI_DEBUG_IMAGE_INFO_UPDATE_IN_PROGRESS 0x01
+#define EFI_DEBUG_IMAGE_INFO_TABLE_MODIFIED 0x02
+#define EFI_DEBUG_IMAGE_INFO_INITIAL_SIZE (EFI_PAGE_SIZE / sizeof (UINTN))
+#define EFI_DEBUG_IMAGE_INFO_TYPE_NORMAL 0x01
+
+typedef struct {
+ UINT64 Signature;
+ EFI_PHYSICAL_ADDRESS EfiSystemTableBase;
+ UINT32 Crc32;
+} EFI_SYSTEM_TABLE_POINTER;
+
+typedef struct {
+ UINT32 ImageInfoType;
+ EFI_LOADED_IMAGE_PROTOCOL *LoadedImageProtocolInstance;
+ EFI_HANDLE ImageHandle;
+} EFI_DEBUG_IMAGE_INFO_NORMAL;
+
+typedef union {
+ UINTN *ImageInfoType;
+ EFI_DEBUG_IMAGE_INFO_NORMAL *NormalImage;
+} EFI_DEBUG_IMAGE_INFO;
+
+typedef struct {
+ volatile UINT32 UpdateStatus;
+ UINT32 TableSize;
+ EFI_DEBUG_IMAGE_INFO *EfiDebugImageInfoTable;
+} EFI_DEBUG_IMAGE_INFO_TABLE_HEADER;
+
+#endif
diff --git a/MdePkg/Include/Guid/DxeServices.h b/MdePkg/Include/Guid/DxeServices.h new file mode 100644 index 0000000000..70e4304a4b --- /dev/null +++ b/MdePkg/Include/Guid/DxeServices.h @@ -0,0 +1,30 @@ +/** @file
+ GUID used to identify the DXE Services Table
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeServices.h
+
+ @par Revision Reference:
+ GUID defined in DXE CIS spec version 0.91B
+
+**/
+
+#ifndef __DXE_SERVICES_GUID_H__
+#define __DXE_SERVICES_GUID_H__
+
+#define EFI_DXE_SERVICES_TABLE_GUID \
+ { \
+ 0x5ad34ba, 0x6f02, 0x4214, {0x95, 0x2e, 0x4d, 0xa0, 0x39, 0x8e, 0x2b, 0xb9 } \
+ }
+
+extern EFI_GUID gEfiDxeServicesTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/EventGroup.h b/MdePkg/Include/Guid/EventGroup.h new file mode 100644 index 0000000000..f86abd4788 --- /dev/null +++ b/MdePkg/Include/Guid/EventGroup.h @@ -0,0 +1,45 @@ +/** @file
+ GUIDs for gBS->CreateEventEx Event Groups. Defined in EFI 2.0.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EventGroup.h
+
+**/
+
+#ifndef __EVENT_GROUP_GUID__
+#define __EVENT_GROUP_GUID__
+
+
+#define EFI_EVENT_GROUP_EXIT_BOOT_SERVICES \
+ { 0x27abf055, 0xb1b8, 0x4c26, { 0x80, 0x48, 0x74, 0x8f, 0x37, 0xba, 0xa2, 0xdf } }
+
+extern EFI_GUID gEfiEventExitBootServicesGuid;
+
+
+#define EFI_EVENT_GROUP_VIRTUAL_ADDRESS_CHANGE \
+ { 0x13fa7698, 0xc831, 0x49c7, { 0x87, 0xea, 0x8f, 0x43, 0xfc, 0xc2, 0x51, 0x96 } }
+
+extern EFI_GUID gEfiEventVirtualAddressChangeGuid;
+
+
+#define EFI_EVENT_GROUP_MEMORY_MAP_CHANGE \
+ { 0x78bee926, 0x692f, 0x48fd, { 0x9e, 0xdb, 0x1, 0x42, 0x2e, 0xf0, 0xd7, 0xab } }
+
+extern EFI_GUID gEfiEventMemoryMapChangeGuid;
+
+
+#define EFI_EVENT_GROUP_READY_TO_BOOT \
+ { 0x7ce88fb3, 0x4bd7, 0x4679, { 0x87, 0xa8, 0xa8, 0xd8, 0xde, 0xe5, 0x0d, 0x2b } }
+
+extern EFI_GUID gEfiEventReadyToBootGuid;
+
+
+#endif
diff --git a/MdePkg/Include/Guid/EventLegacyBios.h b/MdePkg/Include/Guid/EventLegacyBios.h new file mode 100644 index 0000000000..6700a2d767 --- /dev/null +++ b/MdePkg/Include/Guid/EventLegacyBios.h @@ -0,0 +1,28 @@ +/** @file
+ GUID is the name of events used with CreateEventEx in order to be notified when the EFI boot manager is about to boot a legacy boot option. Events of this type are notificated just before Int19h is invoked.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EventLegacyBios.h
+
+ @par Revision Reference:
+ GUIDs defined in DXE CIS 0.91b.
+
+**/
+
+#ifndef __EVENT_LEGACY_BIOS_GUID_H__
+#define __EVENT_LEGACY_BIOS_GUID_H__
+
+#define EFI_EVENT_LEGACY_BOOT_GUID \
+ { 0x2a571201, 0x4966, 0x47f6, {0x8b, 0x86, 0xf3, 0x1e, 0x41, 0xf3, 0x2f, 0x10 } }
+
+extern EFI_GUID gEfiEventLegacyBootGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FirmwareFileSystem.h b/MdePkg/Include/Guid/FirmwareFileSystem.h new file mode 100644 index 0000000000..06bfa7d583 --- /dev/null +++ b/MdePkg/Include/Guid/FirmwareFileSystem.h @@ -0,0 +1,40 @@ +/** @file
+ Guid used to define the Firmware File System. See the Framework Firmware
+ File System Specification for more details.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareFileSystem.h
+
+ @par Revision Reference:
+ Guids defined in Firmware File System Spec 0.9
+
+**/
+
+#ifndef __FIRMWARE_FILE_SYSTEM_GUID_H__
+#define __FIRMWARE_FILE_SYSTEM_GUID_H__
+
+//
+// GUIDs defined by the FFS specification.
+//
+#define EFI_FIRMWARE_FILE_SYSTEM_GUID \
+ { \
+ 0x7A9354D9, 0x0468, 0x444a, {0x81, 0xCE, 0x0B, 0xF6, 0x17, 0xD8, 0x90, 0xDF } \
+ }
+
+#define EFI_FFS_VOLUME_TOP_FILE_GUID \
+ { \
+ 0x1BA0062E, 0xC779, 0x4582, {0x85, 0x66, 0x33, 0x6A, 0xE8, 0xF7, 0x8F, 0x9 } \
+ }
+
+extern EFI_GUID gEfiFirmwareFileSystemGuid;
+extern EFI_GUID gEfiFirmwareVolumeTopFileGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/FrameworkDevicePath.h b/MdePkg/Include/Guid/FrameworkDevicePath.h new file mode 100644 index 0000000000..74c17ea625 --- /dev/null +++ b/MdePkg/Include/Guid/FrameworkDevicePath.h @@ -0,0 +1,29 @@ +/** @file
+ This GUID is used to define a vendor specific device path being owned by the
+ Framework specificaitons.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FrameworkDevicePath.h
+
+ @par Revision Reference:
+ Spec Version 0.9
+
+**/
+
+#ifndef __FRAMEWORK_DEVICE_PATH_GUID_H__
+#define __FRAMEWORK_DEVICE_PATH_GUID_H__
+
+#define EFI_FRAMEWORK_DEVICE_PATH_GUID \
+ { 0xb7084e63, 0x46b7, 0x4d1a, { 0x86, 0x77, 0xe3, 0x0b, 0x53, 0xdb, 0xf0, 0x50 } }
+
+extern EFI_GUID gEfiFrameworkDevicePathGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/GlobalVariable.h b/MdePkg/Include/Guid/GlobalVariable.h new file mode 100644 index 0000000000..4a774a5d76 --- /dev/null +++ b/MdePkg/Include/Guid/GlobalVariable.h @@ -0,0 +1,31 @@ +/** @file
+ GUID for EFI (NVRAM) Variables.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: GlobalVariable.h
+
+ @par Revision Reference:
+ GUID defined in UEFI 2.0
+**/
+
+#ifndef __GLOBAL_VARIABLE_GUID_H__
+#define __GLOBAL_VARIABLE_GUID_H__
+
+#define EFI_GLOBAL_VARIABLE_GUID \
+ { \
+ 0x8BE4DF61, 0x93CA, 0x11d2, {0xAA, 0x0D, 0x00, 0xE0, 0x98, 0x03, 0x2B, 0x8C } \
+ }
+
+#define EFI_GLOBAL_VARIABLE EFI_GLOBAL_VARIABLE_GUID
+
+extern EFI_GUID gEfiGlobalVariableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Gpt.h b/MdePkg/Include/Guid/Gpt.h new file mode 100644 index 0000000000..7124511ac5 --- /dev/null +++ b/MdePkg/Include/Guid/Gpt.h @@ -0,0 +1,45 @@ +/** @file
+ Guids used for the GPT (GUID Partition Table)
+
+ GPT defines a new disk partitioning scheme and also describes
+ usage of the legacy Master Boot Record (MBR) partitioning scheme.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Gpt.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __GPT_GUID_H__
+#define __GPT_GUID_H__
+
+#define EFI_PART_TYPE_UNUSED_GUID \
+ { \
+ 0x00000000, 0x0000, 0x0000, {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 } \
+ }
+
+#define EFI_PART_TYPE_EFI_SYSTEM_PART_GUID \
+ { \
+ 0xc12a7328, 0xf81f, 0x11d2, {0xba, 0x4b, 0x00, 0xa0, 0xc9, 0x3e, 0xc9, 0x3b } \
+ }
+
+#define EFI_PART_TYPE_LEGACY_MBR_GUID \
+ { \
+ 0x024dee41, 0x33e7, 0x11d3, {0x9d, 0x69, 0x00, 0x08, 0xc7, 0x81, 0xf3, 0x9f } \
+ }
+
+extern EFI_GUID gEfiPartTypeUnusedGuid;
+extern EFI_GUID gEfiPartTypeSystemPartGuid;
+extern EFI_GUID gEfiPartTypeLegacyMbrGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/HobList.h b/MdePkg/Include/Guid/HobList.h new file mode 100644 index 0000000000..24932921fc --- /dev/null +++ b/MdePkg/Include/Guid/HobList.h @@ -0,0 +1,32 @@ +/** @file
+ GUIDs used for HOB List entries
+
+ These GUIDs point the HOB List passed from PEI to DXE.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HobList.h
+
+ @par Revision Reference:
+ GUID defined in DXE CIS spec version 0.91
+
+**/
+
+#ifndef __HOB_LIST_GUID_H__
+#define __HOB_LIST_GUID_H__
+
+#define EFI_HOB_LIST_GUID \
+ { \
+ 0x7739f24c, 0x93d7, 0x11d4, {0x9a, 0x3a, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+extern EFI_GUID gEfiHobListGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/MemoryAllocationHob.h b/MdePkg/Include/Guid/MemoryAllocationHob.h new file mode 100644 index 0000000000..140d8b8f2d --- /dev/null +++ b/MdePkg/Include/Guid/MemoryAllocationHob.h @@ -0,0 +1,36 @@ +/** @file
+ GUIDs for HOBs used in memory allcation
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemoryAllocationHob.h
+
+ @par Revision Reference:
+ GUID defined in Hob Spec Version 0.9
+
+**/
+
+#ifndef __MEMORY_ALLOCATION_GUID_H__
+#define __MEMORY_ALLOCATION_GUID_H__
+
+#define EFI_HOB_MEMORY_ALLOC_BSP_STORE_GUID \
+ {0x564b33cd, 0xc92a, 0x4593, {0x90, 0xbf, 0x24, 0x73, 0xe4, 0x3c, 0x63, 0x22} };
+
+#define EFI_HOB_MEMORY_ALLOC_STACK_GUID \
+ {0x4ed4bf27, 0x4092, 0x42e9, {0x80, 0x7d, 0x52, 0x7b, 0x1d, 0x0, 0xc9, 0xbd} }
+
+#define EFI_HOB_MEMORY_ALLOC_MODULE_GUID \
+ {0xf8e21975, 0x899, 0x4f58, {0xa4, 0xbe, 0x55, 0x25, 0xa9, 0xc6, 0xd7, 0x7a} }
+
+extern EFI_GUID gEfiHobMemoryAllocBspStoreGuid;
+extern EFI_GUID gEfiHobMemoryAllocStackGuid;
+extern EFI_GUID gEfiHobMemoryAllocModuleGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/Mps.h b/MdePkg/Include/Guid/Mps.h new file mode 100644 index 0000000000..4596a3f76d --- /dev/null +++ b/MdePkg/Include/Guid/Mps.h @@ -0,0 +1,37 @@ +/** @file
+ GUIDs used for MPS entries in the EFI 1.0 system table
+ ACPI is the primary means of exporting MP information to the OS. MPS obly was
+ included to support Itanium-based platform power on. So don't use it if you don't have too.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Mps.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __MPS_GUID_H__
+#define __MPS_GUID_H__
+
+#define EFI_MPS_TABLE_GUID \
+ { \
+ 0xeb9d2d2f, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+//
+// GUID name defined in spec.
+//
+#define MPS_TABLE_GUID EFI_MPS_TABLE_GUID
+
+extern EFI_GUID gEfiMpsTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/PcAnsi.h b/MdePkg/Include/Guid/PcAnsi.h new file mode 100644 index 0000000000..c9b74ab03e --- /dev/null +++ b/MdePkg/Include/Guid/PcAnsi.h @@ -0,0 +1,48 @@ +/** @file
+ Terminal Device Path Vendor Guid.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PcAnsi.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __PC_ANSI_H__
+#define __PC_ANSI_H__
+
+#define EFI_PC_ANSI_GUID \
+ { \
+ 0xe0c14753, 0xf9be, 0x11d2, {0x9a, 0x0c, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_VT_100_GUID \
+ { \
+ 0xdfa66065, 0xb419, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define EFI_VT_100_PLUS_GUID \
+ { \
+ 0x7baec70b, 0x57e0, 0x4c76, {0x8e, 0x87, 0x2f, 0x9e, 0x28, 0x08, 0x83, 0x43 } \
+ }
+
+#define EFI_VT_UTF8_GUID \
+ { \
+ 0xad15a0d6, 0x8bec, 0x4acf, {0xa0, 0x73, 0xd0, 0x1d, 0xe7, 0x7e, 0x2d, 0x88 } \
+ }
+
+extern EFI_GUID gEfiPcAnsiGuid;
+extern EFI_GUID gEfiVT100Guid;
+extern EFI_GUID gEfiVT100PlusGuid;
+extern EFI_GUID gEfiVTUTF8Guid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SalSystemTable.h b/MdePkg/Include/Guid/SalSystemTable.h new file mode 100644 index 0000000000..30c830f319 --- /dev/null +++ b/MdePkg/Include/Guid/SalSystemTable.h @@ -0,0 +1,38 @@ +/** @file
+ GUIDs used for SAL system table entries in the EFI system table.
+
+ SAL System Table contains Itanium-based processor centric information about
+ the system.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SalSystemTable.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __SAL_SYSTEM_TABLE_GUID_H__
+#define __SAL_SYSTEM_TABLE_GUID_H__
+
+#define EFI_SAL_SYSTEM_TABLE_GUID \
+ { \
+ 0xeb9d2d32, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+//
+// GUID name defined in spec.
+//
+#define SAL_SYSTEM_TABLE_GUID EFI_SAL_SYSTEM_TABLE_GUID
+
+extern EFI_GUID gEfiSalSystemTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SmBios.h b/MdePkg/Include/Guid/SmBios.h new file mode 100644 index 0000000000..f02f9fee31 --- /dev/null +++ b/MdePkg/Include/Guid/SmBios.h @@ -0,0 +1,68 @@ +/** @file
+ GUIDs used to locate the SMBIOS tables in the EFI 1.0 system table.
+
+ This GUID in the system table is the only legal way to search for and
+ locate the SMBIOS tables. Do not search the 0xF0000 segment to find SMBIOS
+ tables.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmBios.h
+
+ @par Revision Reference:
+ GUIDs defined in UEFI 2.0 spec.
+
+**/
+
+#ifndef __SMBIOS_GUID_H__
+#define __SMBIOS_GUID_H__
+
+#define EFI_SMBIOS_TABLE_GUID \
+ { \
+ 0xeb9d2d31, 0x2d88, 0x11d3, {0x9a, 0x16, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+#define SMBIOS_TABLE_GUID EFI_SMBIOS_TABLE_GUID
+
+//
+// Smbios Table Entry Point Structure
+//
+#pragma pack(1)
+typedef struct {
+ UINT8 AnchorString[4];
+ UINT8 EntryPointStructureChecksum;
+ UINT8 EntryPointLength;
+ UINT8 MajorVersion;
+ UINT8 MinorVersion;
+ UINT16 MaxStructureSize;
+ UINT8 EntryPointRevision;
+ UINT8 FormattedArea[5];
+ UINT8 IntermediateAnchorString[5];
+ UINT8 IntermediateChecksum;
+ UINT16 TableLength;
+ UINT32 TableAddress;
+ UINT16 NumberOfSmbiosStructures;
+ UINT8 SmbiosBcdRevision;
+} SMBIOS_TABLE_ENTRY_POINT;
+
+//
+// The Smbios structure header
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Length;
+ UINT16 Handle;
+} SMBIOS_STRUCTURE;
+
+#pragma pack()
+
+extern EFI_GUID gEfiSmbiosTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SmmCommunicate.h b/MdePkg/Include/Guid/SmmCommunicate.h new file mode 100644 index 0000000000..2ec200b708 --- /dev/null +++ b/MdePkg/Include/Guid/SmmCommunicate.h @@ -0,0 +1,39 @@ +/** @file
+ Definitions EFI_SMM_COMMUNICATE_HEADER used by EFI_SMM_BASE_PROTOCOL.Communicate() functions
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmCommunicate.h
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9
+
+**/
+
+#ifndef __SMM_COMMUNICATE_GUID_H__
+#define __SMM_COMMUNICATE_GUID_H__
+
+//******************************************************
+// EFI_SMM_COMMUNICATE_HEADER
+//******************************************************
+#define SMM_COMMUNICATE_HEADER_GUID \
+ { \
+ 0xf328e36c, 0x23b6, 0x4a95, {0x85, 0x4b, 0x32, 0xe1, 0x95, 0x34, 0xcd, 0x75 } \
+ }
+
+typedef struct {
+ EFI_GUID HeaderGuid;
+ UINTN MessageLength;
+ UINT8 Data[1];
+} EFI_SMM_COMMUNICATE_HEADER;
+
+extern EFI_GUID gSmmCommunicateHeaderGuid;
+
+#endif
diff --git a/MdePkg/Include/Guid/SmramMemoryReserve.h b/MdePkg/Include/Guid/SmramMemoryReserve.h new file mode 100644 index 0000000000..fc49092b93 --- /dev/null +++ b/MdePkg/Include/Guid/SmramMemoryReserve.h @@ -0,0 +1,67 @@ +/** @file
+ GUID for use in reserving SMRAM regions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmramMemoryReserve.h
+
+ @par Revision Reference:
+ GUIDs defined in SmmCis spec version 0.9
+
+**/
+
+#ifndef _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+#define _EFI_SMM_PEI_SMRAM_MEMORY_RESERVE_H_
+
+#define EFI_SMM_PEI_SMRAM_MEMORY_RESERVE \
+ { \
+ 0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d } \
+ }
+
+//
+// *******************************************************
+// EFI_SMRAM_DESCRIPTOR
+// *******************************************************
+//
+typedef struct {
+ EFI_PHYSICAL_ADDRESS PhysicalStart; // Phsyical location in DRAM
+ EFI_PHYSICAL_ADDRESS CpuStart; // Address CPU uses to access the SMI handler
+ // May or may not match PhysicalStart
+ //
+ UINT64 PhysicalSize;
+ UINT64 RegionState;
+} EFI_SMRAM_DESCRIPTOR;
+
+//
+// *******************************************************
+// EFI_SMRAM_STATE
+// *******************************************************
+//
+#define EFI_SMRAM_OPEN 0x00000001
+#define EFI_SMRAM_CLOSED 0x00000002
+#define EFI_SMRAM_LOCKED 0x00000004
+#define EFI_CACHEABLE 0x00000008
+#define EFI_ALLOCATED 0x00000010
+#define EFI_NEEDS_TESTING 0x00000020
+#define EFI_NEEDS_ECC_INITIALIZATION 0x00000040
+
+//
+// *******************************************************
+// EFI_SMRAM_HOB_DESCRIPTOR_BLOCK
+// *******************************************************
+//
+typedef struct {
+ UINTN NumberOfSmmReservedRegions;
+ EFI_SMRAM_DESCRIPTOR Descriptor[1];
+} EFI_SMRAM_HOB_DESCRIPTOR_BLOCK;
+
+extern EFI_GUID gEfiSmmPeiSmramMemoryReserve;
+
+#endif
diff --git a/MdePkg/Include/Guid/StatusCodeDataTypeId.h b/MdePkg/Include/Guid/StatusCodeDataTypeId.h new file mode 100644 index 0000000000..f747af07f7 --- /dev/null +++ b/MdePkg/Include/Guid/StatusCodeDataTypeId.h @@ -0,0 +1,82 @@ +/** @file
+ GUID used to identify id for the caller who is initiating the Status Code.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCodeDataTypeId.h
+
+ @par Revision Reference:
+ GUIDs defined in Status Codes Specification 0.92
+
+**/
+
+#ifndef __STATUS_CODE_DATA_TYPE_ID_GUID_H__
+#define __STATUS_CODE_DATA_TYPE_ID_GUID_H__
+
+//
+// String Data Type defintion. This is part of Status Code Specification
+//
+#define EFI_STATUS_CODE_DATA_TYPE_STRING_GUID \
+ { 0x92D11080, 0x496F, 0x4D95, { 0xBE, 0x7E, 0x03, 0x74, 0x88, 0x38, 0x2B, 0x0A } }
+
+extern EFI_GUID gEfiStatusCodeDataTypeStringGuid;
+
+//
+// This GUID indicates that the format of the accompanying data depends
+// upon the Status Code Value, but follows this Specification
+//
+#define EFI_STATUS_CODE_SPECIFIC_DATA_GUID \
+ { 0x335984bd, 0xe805, 0x409a, { 0xb8, 0xf8, 0xd2, 0x7e, 0xce, 0x5f, 0xf7, 0xa6 } }
+
+extern EFI_GUID gEfiStatusCodeSpecificDataGuid;
+
+//
+// Debug Assert Data. This is part of Status Code Specification
+//
+#define EFI_STATUS_CODE_DATA_TYPE_ASSERT_GUID \
+ { 0xDA571595, 0x4D99, 0x487C, { 0x82, 0x7C, 0x26, 0x22, 0x67, 0x7D, 0x33, 0x07 } }
+
+
+extern EFI_GUID gEfiStatusCodeDataTypeAssertGuid;
+
+//
+// Exception Data type (CPU REGS)
+//
+#define EFI_STATUS_CODE_DATA_TYPE_EXCEPTION_HANDLER_GUID \
+ { 0x3BC2BD12, 0xAD2E, 0x11D5, { 0x87, 0xDD, 0x00, 0x06, 0x29, 0x45, 0xC3, 0xB9 } }
+
+extern EFI_GUID gEfiStatusCodeDataTypeExceptionHandlerGuid;
+
+//
+// Debug DataType defintions. User Defined Data Types.
+//
+#define EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID \
+ { 0x9A4E9246, 0xD553, 0x11D5, { 0x87, 0xE2, 0x00, 0x06, 0x29, 0x45, 0xC3, 0xb9 } }
+
+extern EFI_GUID gEfiStatusCodeDataTypeDebugGuid;
+
+//
+// Progress Code. User Defined Data Type Guid.
+//
+#define EFI_STATUS_CODE_DATA_TYPE_ERROR_GUID \
+ 0xAB359CE3, 0x99B3, 0xAE18, { 0xC8, 0x9D, 0x95, 0xD3, 0xB0, 0x72, 0xE1, 0x9B } }
+
+extern EFI_GUID gEfiStatusCodeDataTypeErrorGuid;
+
+
+//
+// Progress Code. User Defined Data Type Guid.
+//
+#define EFI_STATUS_CODE_DATA_TYPE_PROGRESS_CODE_GUID \
+ { 0xA356AB39, 0x35C4, 0x35DA, { 0xB3, 0x7A, 0xF8, 0xEA, 0x9E, 0x8B, 0x36, 0xA3 } }
+
+extern EFI_GUID gEfiStatusCodeDataTypeProgressCodeGuid;
+
+#endif
diff --git a/MdePkg/Include/Ia32/ProcessorBind.h b/MdePkg/Include/Ia32/ProcessorBind.h new file mode 100644 index 0000000000..587d8a69ab --- /dev/null +++ b/MdePkg/Include/Ia32/ProcessorBind.h @@ -0,0 +1,167 @@ +/** @file
+ Processor or Compiler specific defines and types for x64.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ProcessorBind.h
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_IA32
+
+//
+// Make sure we are useing the correct packing rules per EFI specification
+//
+#ifndef __GNUC__
+#pragma pack()
+#endif
+
+#if _MSC_EXTENSIONS
+
+//
+// Disable warning that make it impossible to compile at /W4
+// This only works for Microsoft* tools
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+#pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+#pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+#pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning
+//
+#pragma warning ( disable : 4127 )
+
+
+#endif
+
+
+#if !defined(__GNUC__) && (__STDC_VERSION__ < 199901L)
+ //
+ // No ANSI C 2000 stdint.h integer width declarations, so define equivalents
+ //
+
+ #if _MSC_EXTENSIONS
+
+ //
+ // use Microsoft* C complier dependent interger width types
+ //
+ typedef unsigned __int64 UINT64;
+ typedef __int64 INT64;
+ typedef unsigned __int32 UINT32;
+ typedef __int32 INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #else
+
+ //
+ // Assume standard IA-32 alignment.
+ // BugBug: Need to check portability of long long
+ //
+ typedef unsigned long long UINT64;
+ typedef long long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #endif
+
+ #define UINT8_MAX 0xff
+
+#else
+ //
+ // Use ANSI C 2000 stdint.h integer width declarations
+ //
+ #include "stdint.h"
+ typedef uint8_t BOOLEAN;
+ typedef int8_t INT8;
+ typedef uint8_t UINT8;
+ typedef int16_t INT16;
+ typedef uint16_t UINT16;
+ typedef int32_t INT32;
+ typedef uint32_t UINT32;
+ typedef int64_t INT64;
+ typedef uint64_t UINT64;
+ typedef char CHAR8;
+ typedef uint16_t CHAR16;
+
+#endif
+
+typedef UINT32 UINTN;
+typedef INT32 INTN;
+
+
+//
+// Processor specific defines
+//
+#define MAX_BIT 0x80000000
+#define MAX_2_BITS 0xC0000000
+
+//
+// Maximum legal IA-32 address
+//
+#define MAX_ADDRESS 0xFFFFFFFF
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify thier member functions with EFIAPI.
+//
+#if _MSC_EXTENSIONS
+ //
+ // Microsoft* compiler requires _EFIAPI useage, __cdecl is Microsoft* specific C.
+ //
+ #define EFIAPI __cdecl
+#endif
+
+#if __GNUC__
+ #define EFIAPI __attribute__((cdecl))
+#endif
+
+//
+// The Microsoft* C compiler can removed references to unreferenced data items
+// if the /OPT:REF linker option is used. We defined a macro as this is a
+// a non standard extension
+//
+#if _MSC_EXTENSIONS
+ #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
+#else
+ #define GLOBAL_REMOVE_IF_UNREFERENCED
+#endif
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Acpi.h b/MdePkg/Include/IndustryStandard/Acpi.h new file mode 100644 index 0000000000..d2fe3459c2 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/Acpi.h @@ -0,0 +1,91 @@ +/** @file
+ This file contains some basic ACPI definitions that are consumed by drivers
+ that do not care about ACPI versions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Acpi.h
+
+**/
+
+#ifndef _ACPI_H_
+#define _ACPI_H_
+
+//
+// Common table header, this prefaces all ACPI tables, including FACS, but
+// excluding the RSD PTR structure
+//
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+} EFI_ACPI_COMMON_HEADER;
+
+//
+// Common ACPI description table header. This structure prefaces most ACPI tables.
+//
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT8 Revision;
+ UINT8 Checksum;
+ UINT8 OemId[6];
+ UINT64 OemTableId;
+ UINT32 OemRevision;
+ UINT32 CreatorId;
+ UINT32 CreatorRevision;
+} EFI_ACPI_DESCRIPTION_HEADER;
+
+#pragma pack()
+//
+// Define for Pci Host Bridge Resource Allocation
+//
+#define ACPI_ADDRESS_SPACE_DESCRIPTOR 0x8A
+#define ACPI_END_TAG_DESCRIPTOR 0x79
+
+#define ACPI_ADDRESS_SPACE_TYPE_MEM 0x00
+#define ACPI_ADDRESS_SPACE_TYPE_IO 0x01
+#define ACPI_ADDRESS_SPACE_TYPE_BUS 0x02
+
+//
+// Make sure structures match spec
+//
+#pragma pack(1)
+
+typedef struct {
+ UINT8 Desc;
+ UINT16 Len;
+ UINT8 ResType;
+ UINT8 GenFlag;
+ UINT8 SpecificFlag;
+ UINT64 AddrSpaceGranularity;
+ UINT64 AddrRangeMin;
+ UINT64 AddrRangeMax;
+ UINT64 AddrTranslationOffset;
+ UINT64 AddrLen;
+} EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR;
+
+typedef struct {
+ UINT8 Desc;
+ UINT8 Checksum;
+} EFI_ACPI_END_TAG_DESCRIPTOR;
+
+//
+// General use definitions
+//
+#define EFI_ACPI_RESERVED_BYTE 0x00
+#define EFI_ACPI_RESERVED_WORD 0x0000
+#define EFI_ACPI_RESERVED_DWORD 0x00000000
+#define EFI_ACPI_RESERVED_QWORD 0x0000000000000000
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/Usb.h b/MdePkg/Include/IndustryStandard/Usb.h new file mode 100644 index 0000000000..dca7351ff1 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/Usb.h @@ -0,0 +1,282 @@ +/** @file
+ Support for USB 1.1 standard.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Usb.h
+
+**/
+
+#ifndef __USB_H__
+#define __USB_H__
+
+//
+// USB Descriptor types
+//
+#define USB_DT_DEVICE 0x01
+#define USB_DT_CONFIG 0x02
+#define USB_DT_STRING 0x03
+#define USB_DT_INTERFACE 0x04
+#define USB_DT_ENDPOINT 0x05
+#define USB_DT_HUB 0x29
+#define USB_DT_HID 0x21
+
+//
+// USB request type
+//
+#define USB_TYPE_STANDARD (0x00 << 5)
+#define USB_TYPE_CLASS (0x01 << 5)
+#define USB_TYPE_VENDOR (0x02 << 5)
+#define USB_TYPE_RESERVED (0x03 << 5)
+
+//
+// USB request targer device
+//
+#define USB_RECIP_DEVICE 0x00
+#define USB_RECIP_INTERFACE 0x01
+#define USB_RECIP_ENDPOINT 0x02
+#define USB_RECIP_OTHER 0x03
+
+//
+// Request target types.
+//
+#define USB_RT_DEVICE 0x00
+#define USB_RT_INTERFACE 0x01
+#define USB_RT_ENDPOINT 0x02
+#define USB_RT_HUB (USB_TYPE_CLASS | USB_RECIP_DEVICE)
+#define USB_RT_PORT (USB_TYPE_CLASS | USB_RECIP_OTHER)
+
+//
+// USB Transfer Results
+//
+#define EFI_USB_NOERROR 0x00
+#define EFI_USB_ERR_NOTEXECUTE 0x01
+#define EFI_USB_ERR_STALL 0x02
+#define EFI_USB_ERR_BUFFER 0x04
+#define EFI_USB_ERR_BABBLE 0x08
+#define EFI_USB_ERR_NAK 0x10
+#define EFI_USB_ERR_CRC 0x20
+#define EFI_USB_ERR_TIMEOUT 0x40
+#define EFI_USB_ERR_BITSTUFF 0x80
+#define EFI_USB_ERR_SYSTEM 0x100
+
+//
+//Use 200 ms to increase the error handling response time
+//
+#define EFI_USB_INTERRUPT_DELAY 2000000
+
+//
+// USB transation direction
+//
+typedef enum {
+ EfiUsbDataOut,
+ EfiUsbDataIn,
+ EfiUsbNoData
+} EFI_USB_DATA_DIRECTION;
+
+//
+// Usb Data recipient type
+//
+typedef enum {
+ EfiUsbDevice,
+ EfiUsbInterface,
+ EfiUsbEndpoint
+} EFI_USB_RECIPIENT;
+
+typedef enum {
+ EfiUsbEndpointHalt,
+ EfiUsbDeviceRemoteWakeup
+} EFI_USB_STANDARD_FEATURE_SELECTOR;
+
+#pragma pack(1)
+//
+// Usb device request structure
+//
+typedef struct {
+ UINT8 RequestType;
+ UINT8 Request;
+ UINT16 Value;
+ UINT16 Index;
+ UINT16 Length;
+} EFI_USB_DEVICE_REQUEST;
+
+//
+// Standard USB request
+//
+#define USB_DEV_GET_STATUS 0x00
+
+#define USB_DEV_CLEAR_FEATURE 0x01
+
+#define USB_DEV_SET_FEATURE 0x03
+
+#define USB_DEV_SET_ADDRESS 0x05
+#define USB_DEV_SET_ADDRESS_REQ_TYPE 0x00
+
+#define USB_DEV_GET_DESCRIPTOR 0x06
+#define USB_DEV_GET_DESCRIPTOR_REQ_TYPE 0x80
+
+#define USB_DEV_SET_DESCRIPTOR 0x07
+#define USB_DEV_SET_DESCRIPTOR_REQ_TYPE 0x00
+
+#define USB_DEV_GET_CONFIGURATION 0x08
+#define USB_DEV_GET_CONFIGURATION_REQ_TYPE 0x80
+
+#define USB_DEV_SET_CONFIGURATION 0x09
+#define USB_DEV_SET_CONFIGURATION_REQ_TYPE 0x00
+
+#define USB_DEV_GET_INTERFACE 0x0A
+#define USB_DEV_GET_INTERFACE_REQ_TYPE 0x81
+
+#define USB_DEV_SET_INTERFACE 0x0B
+#define USB_DEV_SET_INTERFACE_REQ_TYPE 0x01
+
+#define USB_DEV_SYNCH_FRAME 0x0C
+#define USB_DEV_SYNCH_FRAME_REQ_TYPE 0x82
+
+//
+// Device descriptor. refer USB1.1
+//
+typedef struct usb_device_descriptor {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 BcdUSB;
+ UINT8 DeviceClass;
+ UINT8 DeviceSubClass;
+ UINT8 DeviceProtocol;
+ UINT8 MaxPacketSize0;
+ UINT16 IdVendor;
+ UINT16 IdProduct;
+ UINT16 BcdDevice;
+ UINT8 StrManufacturer;
+ UINT8 StrProduct;
+ UINT8 StrSerialNumber;
+ UINT8 NumConfigurations;
+} EFI_USB_DEVICE_DESCRIPTOR;
+
+//
+// Endpoint descriptor
+//
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 EndpointAddress;
+ UINT8 Attributes;
+ UINT16 MaxPacketSize;
+ UINT8 Interval;
+} EFI_USB_ENDPOINT_DESCRIPTOR;
+
+//
+// Interface descriptor
+//
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 InterfaceNumber;
+ UINT8 AlternateSetting;
+ UINT8 NumEndpoints;
+ UINT8 InterfaceClass;
+ UINT8 InterfaceSubClass;
+ UINT8 InterfaceProtocol;
+ UINT8 Interface;
+} EFI_USB_INTERFACE_DESCRIPTOR;
+
+//
+// USB alternate setting
+//
+typedef struct {
+ EFI_USB_INTERFACE_DESCRIPTOR *Interface;
+} USB_ALT_SETTING;
+
+//
+// Configuration descriptor
+//
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 TotalLength;
+ UINT8 NumInterfaces;
+ UINT8 ConfigurationValue;
+ UINT8 Configuration;
+ UINT8 Attributes;
+ UINT8 MaxPower;
+} EFI_USB_CONFIG_DESCRIPTOR;
+
+//
+// Supported String Languages
+//
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT16 SupportedLanID[1];
+} EFI_USB_SUPPORTED_LANGUAGES;
+
+//
+// String descriptor
+//
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ CHAR16 String[1];
+} EFI_USB_STRING_DESCRIPTOR;
+
+//
+// Hub descriptor
+//
+#define MAXBYTES 8
+typedef struct {
+ UINT8 Length;
+ UINT8 DescriptorType;
+ UINT8 NbrPorts;
+ UINT8 HubCharacteristics[2];
+ UINT8 PwrOn2PwrGood;
+ UINT8 HubContrCurrent;
+ UINT8 Filler[MAXBYTES];
+} EFI_USB_HUB_DESCRIPTOR;
+
+typedef struct {
+ UINT16 PortStatus;
+ UINT16 PortChangeStatus;
+} EFI_USB_PORT_STATUS;
+
+//
+// Constant value for Port Status & Port Change Status
+//
+#define USB_PORT_STAT_CONNECTION 0x0001
+#define USB_PORT_STAT_ENABLE 0x0002
+#define USB_PORT_STAT_SUSPEND 0x0004
+#define USB_PORT_STAT_OVERCURRENT 0x0008
+#define USB_PORT_STAT_RESET 0x0010
+#define USB_PORT_STAT_POWER 0x0100
+#define USB_PORT_STAT_LOW_SPEED 0x0200
+
+#define USB_PORT_STAT_C_CONNECTION 0x0001
+#define USB_PORT_STAT_C_ENABLE 0x0002
+#define USB_PORT_STAT_C_SUSPEND 0x0004
+#define USB_PORT_STAT_C_OVERCURRENT 0x0008
+#define USB_PORT_STAT_C_RESET 0x0010
+
+//
+// Used for set/clear port feature request
+//
+typedef enum {
+ EfiUsbPortEnable = 1,
+ EfiUsbPortSuspend = 2,
+ EfiUsbPortReset = 4,
+ EfiUsbPortPower = 8,
+ EfiUsbPortConnectChange = 16,
+ EfiUsbPortEnableChange = 17,
+ EfiUsbPortSuspendChange = 18,
+ EfiUsbPortOverCurrentChange = 19,
+ EfiUsbPortResetChange = 20
+} EFI_USB_PORT_FEATURE;
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/pci22.h b/MdePkg/Include/IndustryStandard/pci22.h new file mode 100644 index 0000000000..7fee279e80 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/pci22.h @@ -0,0 +1,481 @@ +/** @file
+ Support for PCI 2.2 standard.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: pci22.h
+
+**/
+
+#ifndef _PCI22_H
+#define _PCI22_H
+
+#define PCI_MAX_SEGMENT 0
+
+#define PCI_MAX_BUS 255
+
+#define PCI_MAX_DEVICE 31
+#define PCI_MAX_FUNC 7
+
+//
+// Command
+//
+#define PCI_VGA_PALETTE_SNOOP_DISABLED 0x20
+
+#pragma pack(push, 1)
+typedef struct {
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Command;
+ UINT16 Status;
+ UINT8 RevisionID;
+ UINT8 ClassCode[3];
+ UINT8 CacheLineSize;
+ UINT8 LatencyTimer;
+ UINT8 HeaderType;
+ UINT8 BIST;
+} PCI_DEVICE_INDEPENDENT_REGION;
+
+typedef struct {
+ UINT32 Bar[6];
+ UINT32 CISPtr;
+ UINT16 SubsystemVendorID;
+ UINT16 SubsystemID;
+ UINT32 ExpansionRomBar;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved1[3];
+ UINT32 Reserved2;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT8 MinGnt;
+ UINT8 MaxLat;
+} PCI_DEVICE_HEADER_TYPE_REGION;
+
+typedef struct {
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_DEVICE_HEADER_TYPE_REGION Device;
+} PCI_TYPE00;
+
+typedef struct {
+ UINT32 Bar[2];
+ UINT8 PrimaryBus;
+ UINT8 SecondaryBus;
+ UINT8 SubordinateBus;
+ UINT8 SecondaryLatencyTimer;
+ UINT8 IoBase;
+ UINT8 IoLimit;
+ UINT16 SecondaryStatus;
+ UINT16 MemoryBase;
+ UINT16 MemoryLimit;
+ UINT16 PrefetchableMemoryBase;
+ UINT16 PrefetchableMemoryLimit;
+ UINT32 PrefetchableBaseUpper32;
+ UINT32 PrefetchableLimitUpper32;
+ UINT16 IoBaseUpper16;
+ UINT16 IoLimitUpper16;
+ UINT8 CapabilityPtr;
+ UINT8 Reserved[3];
+ UINT32 ExpansionRomBAR;
+ UINT8 InterruptLine;
+ UINT8 InterruptPin;
+ UINT16 BridgeControl;
+} PCI_BRIDGE_CONTROL_REGISTER;
+
+typedef struct {
+ PCI_DEVICE_INDEPENDENT_REGION Hdr;
+ PCI_BRIDGE_CONTROL_REGISTER Bridge;
+} PCI_TYPE01;
+
+typedef union {
+ PCI_TYPE00 Device;
+ PCI_TYPE01 Bridge;
+} PCI_TYPE_GENERIC;
+
+typedef struct {
+ UINT32 CardBusSocketReg; // Cardus Socket/ExCA Base
+ // Address Register
+ //
+ UINT16 Reserved;
+ UINT16 SecondaryStatus; // Secondary Status
+ UINT8 PciBusNumber; // PCI Bus Number
+ UINT8 CardBusBusNumber; // CardBus Bus Number
+ UINT8 SubordinateBusNumber; // Subordinate Bus Number
+ UINT8 CardBusLatencyTimer; // CardBus Latency Timer
+ UINT32 MemoryBase0; // Memory Base Register 0
+ UINT32 MemoryLimit0; // Memory Limit Register 0
+ UINT32 MemoryBase1;
+ UINT32 MemoryLimit1;
+ UINT32 IoBase0;
+ UINT32 IoLimit0; // I/O Base Register 0
+ UINT32 IoBase1; // I/O Limit Register 0
+ UINT32 IoLimit1;
+ UINT8 InterruptLine; // Interrupt Line
+ UINT8 InterruptPin; // Interrupt Pin
+ UINT16 BridgeControl; // Bridge Control
+} PCI_CARDBUS_CONTROL_REGISTER;
+
+//
+// Definitions of PCI class bytes and manipulation macros.
+//
+#define PCI_CLASS_OLD 0x00
+#define PCI_CLASS_OLD_OTHER 0x00
+#define PCI_CLASS_OLD_VGA 0x01
+
+#define PCI_CLASS_MASS_STORAGE 0x01
+#define PCI_CLASS_MASS_STORAGE_SCSI 0x00
+#define PCI_CLASS_MASS_STORAGE_IDE 0x01 // obsolete
+#define PCI_CLASS_IDE 0x01
+#define PCI_CLASS_MASS_STORAGE_FLOPPY 0x02
+#define PCI_CLASS_MASS_STORAGE_IPI 0x03
+#define PCI_CLASS_MASS_STORAGE_RAID 0x04
+#define PCI_CLASS_MASS_STORAGE_OTHER 0x80
+
+#define PCI_CLASS_NETWORK 0x02
+#define PCI_CLASS_NETWORK_ETHERNET 0x00
+#define PCI_CLASS_ETHERNET 0x00 // obsolete
+#define PCI_CLASS_NETWORK_TOKENRING 0x01
+#define PCI_CLASS_NETWORK_FDDI 0x02
+#define PCI_CLASS_NETWORK_ATM 0x03
+#define PCI_CLASS_NETWORK_ISDN 0x04
+#define PCI_CLASS_NETWORK_OTHER 0x80
+
+#define PCI_CLASS_DISPLAY 0x03
+#define PCI_CLASS_DISPLAY_CTRL 0x03 // obsolete
+#define PCI_CLASS_DISPLAY_VGA 0x00
+#define PCI_CLASS_VGA 0x00 // obsolete
+#define PCI_CLASS_DISPLAY_XGA 0x01
+#define PCI_CLASS_DISPLAY_3D 0x02
+#define PCI_CLASS_DISPLAY_OTHER 0x80
+#define PCI_CLASS_DISPLAY_GFX 0x80
+#define PCI_CLASS_GFX 0x80 // obsolete
+#define PCI_CLASS_BRIDGE 0x06
+#define PCI_CLASS_BRIDGE_HOST 0x00
+#define PCI_CLASS_BRIDGE_ISA 0x01
+#define PCI_CLASS_ISA 0x01 // obsolete
+#define PCI_CLASS_BRIDGE_EISA 0x02
+#define PCI_CLASS_BRIDGE_MCA 0x03
+#define PCI_CLASS_BRIDGE_P2P 0x04
+#define PCI_CLASS_BRIDGE_PCMCIA 0x05
+#define PCI_CLASS_BRIDGE_NUBUS 0x06
+#define PCI_CLASS_BRIDGE_CARDBUS 0x07
+#define PCI_CLASS_BRIDGE_RACEWAY 0x08
+#define PCI_CLASS_BRIDGE_ISA_PDECODE 0x80
+#define PCI_CLASS_ISA_POSITIVE_DECODE 0x80 // obsolete
+#define PCI_CLASS_SERIAL 0x0C
+#define PCI_CLASS_SERIAL_FIREWIRE 0x00
+#define PCI_CLASS_SERIAL_ACCESS_BUS 0x01
+#define PCI_CLASS_SERIAL_SSA 0x02
+#define PCI_CLASS_SERIAL_USB 0x03
+#define PCI_CLASS_SERIAL_FIBRECHANNEL 0x04
+#define PCI_CLASS_SERIAL_SMB 0x05
+
+#define IS_CLASS1(_p, c) ((_p)->Hdr.ClassCode[2] == (c))
+#define IS_CLASS2(_p, c, s) (IS_CLASS1 (_p, c) && ((_p)->Hdr.ClassCode[1] == (s)))
+#define IS_CLASS3(_p, c, s, p) (IS_CLASS2 (_p, c, s) && ((_p)->Hdr.ClassCode[0] == (p)))
+
+#define IS_PCI_DISPLAY(_p) IS_CLASS1 (_p, PCI_CLASS_DISPLAY)
+#define IS_PCI_VGA(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 0)
+#define IS_PCI_8514(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_VGA, 1)
+#define IS_PCI_GFX(_p) IS_CLASS3 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_GFX, 0)
+#define IS_PCI_OLD(_p) IS_CLASS1 (_p, PCI_CLASS_OLD)
+#define IS_PCI_OLD_VGA(_p) IS_CLASS2 (_p, PCI_CLASS_OLD, PCI_CLASS_OLD_VGA)
+#define IS_PCI_IDE(_p) IS_CLASS2 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_IDE)
+#define IS_PCI_SCSI(_p) IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_SCSI, 0)
+#define IS_PCI_RAID(_p) IS_CLASS3 (_p, PCI_CLASS_MASS_STORAGE, PCI_CLASS_MASS_STORAGE_RAID, 0)
+#define IS_PCI_LPC(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA, 0)
+#define IS_PCI_P2P(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 0)
+#define IS_PCI_P2P_SUB(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_P2P, 1)
+#define IS_PCI_USB(_p) IS_CLASS2 (_p, PCI_CLASS_SERIAL, PCI_CLASS_SERIAL_USB)
+
+#define HEADER_TYPE_DEVICE 0x00
+#define HEADER_TYPE_PCI_TO_PCI_BRIDGE 0x01
+#define HEADER_TYPE_CARDBUS_BRIDGE 0x02
+
+#define HEADER_TYPE_MULTI_FUNCTION 0x80
+#define HEADER_LAYOUT_CODE 0x7f
+
+#define IS_PCI_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_PCI_TO_PCI_BRIDGE))
+#define IS_CARDBUS_BRIDGE(_p) (((_p)->Hdr.HeaderType & HEADER_LAYOUT_CODE) == (HEADER_TYPE_CARDBUS_BRIDGE))
+#define IS_PCI_MULTI_FUNC(_p) ((_p)->Hdr.HeaderType & HEADER_TYPE_MULTI_FUNCTION)
+
+#define PCI_DEVICE_ROMBAR 0x30
+#define PCI_BRIDGE_ROMBAR 0x38
+
+#define PCI_MAX_BAR 6
+#define PCI_MAX_CONFIG_OFFSET 0x100
+//
+// bugbug: this is supported in PCI spec v2.3
+//
+#define PCI_EXP_MAX_CONFIG_OFFSET 0x1000
+
+#define PCI_VENDOR_ID_OFFSET 0x00
+#define PCI_DEVICE_ID_OFFSET 0x02
+#define PCI_COMMAND_OFFSET 0x04
+#define PCI_PRIMARY_STATUS_OFFSET 0x06
+#define PCI_REVISION_ID_OFFSET 0x08
+#define PCI_CLASSCODE_OFFSET 0x09
+#define PCI_CACHELINE_SIZE_OFFSET 0x0C
+#define PCI_LATENCY_TIMER_OFFSET 0x0D
+#define PCI_HEADER_TYPE_OFFSET 0x0E
+#define PCI_BIST_OFFSET 0x0F
+
+#define PCI_BRIDGE_CONTROL_REGISTER_OFFSET 0x3E
+#define PCI_BRIDGE_STATUS_REGISTER_OFFSET 0x1E
+
+#define PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET 0x18
+#define PCI_BRIDGE_SECONDARY_BUS_REGISTER_OFFSET 0x19
+#define PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET 0x1a
+
+typedef struct {
+ UINT8 Register;
+ UINT8 Function;
+ UINT8 Device;
+ UINT8 Bus;
+ UINT8 Reserved[4];
+} DEFIO_PCI_ADDR;
+
+typedef union {
+ struct {
+ UINT32 Reg : 8;
+ UINT32 Func : 3;
+ UINT32 Dev : 5;
+ UINT32 Bus : 8;
+ UINT32 Reserved : 7;
+ UINT32 Enable : 1;
+ } Bits;
+ UINT32 Uint32;
+} PCI_CONFIG_ACCESS_CF8;
+
+#pragma pack()
+
+#define EFI_ROOT_BRIDGE_LIST 'eprb'
+#define PCI_EXPANSION_ROM_HEADER_SIGNATURE 0xaa55
+#define EFI_PCI_EXPANSION_ROM_HEADER_EFISIGNATURE 0x0EF1
+#define PCI_DATA_STRUCTURE_SIGNATURE EFI_SIGNATURE_32 ('P', 'C', 'I', 'R')
+#define PCI_CODE_TYPE_PCAT_IMAGE 0x00
+#define PCI_CODE_TYPE_EFI_IMAGE 0x03
+#define EFI_PCI_EXPANSION_ROM_HEADER_COMPRESSED 0x0001
+
+#define EFI_PCI_COMMAND_IO_SPACE 0x0001
+#define EFI_PCI_COMMAND_MEMORY_SPACE 0x0002
+#define EFI_PCI_COMMAND_BUS_MASTER 0x0004
+#define EFI_PCI_COMMAND_SPECIAL_CYCLE 0x0008
+#define EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE 0x0010
+#define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP 0x0020
+#define EFI_PCI_COMMAND_PARITY_ERROR_RESPOND 0x0040
+#define EFI_PCI_COMMAND_STEPPING_CONTROL 0x0080
+#define EFI_PCI_COMMAND_SERR 0x0100
+#define EFI_PCI_COMMAND_FAST_BACK_TO_BACK 0x0200
+
+#define EFI_PCI_BRIDGE_CONTROL_PARITY_ERROR_RESPONSE 0x0001
+#define EFI_PCI_BRIDGE_CONTROL_SERR 0x0002
+#define EFI_PCI_BRIDGE_CONTROL_ISA 0x0004
+#define EFI_PCI_BRIDGE_CONTROL_VGA 0x0008
+#define EFI_PCI_BRIDGE_CONTROL_VGA_16 0x0010
+#define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT 0x0020
+#define EFI_PCI_BRIDGE_CONTROL_RESET_SECONDARY_BUS 0x0040
+#define EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK 0x0080
+#define EFI_PCI_BRIDGE_CONTROL_PRIMARY_DISCARD_TIMER 0x0100
+#define EFI_PCI_BRIDGE_CONTROL_SECONDARY_DISCARD_TIMER 0x0200
+#define EFI_PCI_BRIDGE_CONTROL_TIMER_STATUS 0x0400
+#define EFI_PCI_BRIDGE_CONTROL_DISCARD_TIMER_SERR 0x0800
+
+//
+// Following are the PCI-CARDBUS bridge control bit
+//
+#define EFI_PCI_BRIDGE_CONTROL_IREQINT_ENABLE 0x0080
+#define EFI_PCI_BRIDGE_CONTROL_RANGE0_MEMORY_TYPE 0x0100
+#define EFI_PCI_BRIDGE_CONTROL_RANGE1_MEMORY_TYPE 0x0200
+#define EFI_PCI_BRIDGE_CONTROL_WRITE_POSTING_ENABLE 0x0400
+
+//
+// Following are the PCI status control bit
+//
+#define EFI_PCI_STATUS_CAPABILITY 0x0010
+#define EFI_PCI_STATUS_66MZ_CAPABLE 0x0020
+#define EFI_PCI_FAST_BACK_TO_BACK_CAPABLE 0x0080
+#define EFI_PCI_MASTER_DATA_PARITY_ERROR 0x0100
+
+#define EFI_PCI_CAPABILITY_PTR 0x34
+#define EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR 0x14
+
+#pragma pack(1)
+typedef struct {
+ UINT16 Signature; // 0xaa55
+ UINT8 Reserved[0x16];
+ UINT16 PcirOffset;
+} PCI_EXPANSION_ROM_HEADER;
+
+typedef struct {
+ UINT16 Signature; // 0xaa55
+ UINT16 InitializationSize;
+ UINT32 EfiSignature; // 0x0EF1
+ UINT16 EfiSubsystem;
+ UINT16 EfiMachineType;
+ UINT16 CompressionType;
+ UINT8 Reserved[8];
+ UINT16 EfiImageHeaderOffset;
+ UINT16 PcirOffset;
+} EFI_PCI_EXPANSION_ROM_HEADER;
+
+typedef struct {
+ UINT16 Signature; // 0xaa55
+ UINT8 Size512;
+ UINT8 Reserved[15];
+ UINT16 PcirOffset;
+} EFI_LEGACY_EXPANSION_ROM_HEADER;
+
+typedef union {
+ UINT8 *Raw;
+ PCI_EXPANSION_ROM_HEADER *Generic;
+ EFI_PCI_EXPANSION_ROM_HEADER *Efi;
+ EFI_LEGACY_EXPANSION_ROM_HEADER *PcAt;
+} EFI_PCI_ROM_HEADER;
+
+typedef struct {
+ UINT32 Signature; // "PCIR"
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT16 Reserved0;
+ UINT16 Length;
+ UINT8 Revision;
+ UINT8 ClassCode[3];
+ UINT16 ImageLength;
+ UINT16 CodeRevision;
+ UINT8 CodeType;
+ UINT8 Indicator;
+ UINT16 Reserved1;
+} PCI_DATA_STRUCTURE;
+
+//
+// PCI Capability List IDs and records
+//
+#define EFI_PCI_CAPABILITY_ID_PMI 0x01
+#define EFI_PCI_CAPABILITY_ID_AGP 0x02
+#define EFI_PCI_CAPABILITY_ID_VPD 0x03
+#define EFI_PCI_CAPABILITY_ID_SLOTID 0x04
+#define EFI_PCI_CAPABILITY_ID_MSI 0x05
+#define EFI_PCI_CAPABILITY_ID_HOTPLUG 0x06
+#define EFI_PCI_CAPABILITY_ID_PCIX 0x07
+//
+// bugbug: this ID is defined in PCI spec v2.3
+//
+#define EFI_PCI_CAPABILITY_ID_PCIEXP 0x10
+
+typedef struct {
+ UINT8 CapabilityID;
+ UINT8 NextItemPtr;
+} EFI_PCI_CAPABILITY_HDR;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_PMI
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 PMC;
+ UINT16 PMCSR;
+ UINT8 BridgeExtention;
+ UINT8 Data;
+} EFI_PCI_CAPABILITY_PMI;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_AGP
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 Rev;
+ UINT8 Reserved;
+ UINT32 Status;
+ UINT32 Command;
+} EFI_PCI_CAPABILITY_AGP;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_VPD
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 AddrReg;
+ UINT32 DataReg;
+} EFI_PCI_CAPABILITY_VPD;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_SLOTID
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT8 ExpnsSlotReg;
+ UINT8 ChassisNo;
+} EFI_PCI_CAPABILITY_SLOTID;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_MSI
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrReg;
+ UINT16 MsgDataReg;
+} EFI_PCI_CAPABILITY_MSI32;
+
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 MsgCtrlReg;
+ UINT32 MsgAddrRegLsdw;
+ UINT32 MsgAddrRegMsdw;
+ UINT16 MsgDataReg;
+} EFI_PCI_CAPABILITY_MSI64;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_HOTPLUG
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ //
+ // not finished - fields need to go here
+ //
+} EFI_PCI_CAPABILITY_HOTPLUG;
+
+//
+// Capability EFI_PCI_CAPABILITY_ID_PCIX
+//
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 CommandReg;
+ UINT32 StatusReg;
+} EFI_PCI_CAPABILITY_PCIX;
+
+typedef struct {
+ EFI_PCI_CAPABILITY_HDR Hdr;
+ UINT16 SecStatusReg;
+ UINT32 StatusReg;
+ UINT32 SplitTransCtrlRegUp;
+ UINT32 SplitTransCtrlRegDn;
+} EFI_PCI_CAPABILITY_PCIX_BRDG;
+
+#define DEVICE_ID_NOCARE 0xFFFF
+
+#define PCI_ACPI_UNUSED 0
+#define PCI_BAR_NOCHANGE 0
+#define PCI_BAR_OLD_ALIGN 0xFFFFFFFFFFFFFFFFULL
+#define PCI_BAR_EVEN_ALIGN 0xFFFFFFFFFFFFFFFEULL
+#define PCI_BAR_SQUAD_ALIGN 0xFFFFFFFFFFFFFFFDULL
+#define PCI_BAR_DQUAD_ALIGN 0xFFFFFFFFFFFFFFFCULL
+
+#define PCI_BAR_IDX0 0x00
+#define PCI_BAR_IDX1 0x01
+#define PCI_BAR_IDX2 0x02
+#define PCI_BAR_IDX3 0x03
+#define PCI_BAR_IDX4 0x04
+#define PCI_BAR_IDX5 0x05
+#define PCI_BAR_ALL 0xFF
+
+#pragma pack(pop)
+
+#endif
diff --git a/MdePkg/Include/IndustryStandard/scsi.h b/MdePkg/Include/IndustryStandard/scsi.h new file mode 100644 index 0000000000..41023094f5 --- /dev/null +++ b/MdePkg/Include/IndustryStandard/scsi.h @@ -0,0 +1,282 @@ +/** @file
+ support for SCSI standard
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: scsi.h
+
+**/
+
+#ifndef _SCSI_H
+#define _SCSI_H
+
+//
+// SCSI command OP Code
+//
+//
+// Commands for all device types
+//
+#define EFI_SCSI_OP_CHANGE_DEFINITION 0x40
+#define EFI_SCSI_OP_COMPARE 0x39
+#define EFI_SCSI_OP_COPY 0x18
+#define EFI_SCSI_OP_COPY_VERIFY 0x3a
+#define EFI_SCSI_OP_INQUIRY 0x12
+#define EFI_SCSI_OP_LOG_SELECT 0x4c
+#define EFI_SCSI_OP_LOG_SENSE 0x4d
+#define EFI_SCSI_OP_MODE_SEL6 0x15
+#define EFI_SCSI_OP_MODE_SEL10 0x55
+#define EFI_SCSI_OP_MODE_SEN6 0x1a
+#define EFI_SCSI_OP_MODE_SEN10 0x5a
+#define EFI_SCSI_OP_READ_BUFFER 0x3c
+#define EFI_SCSI_OP_REQUEST_SENSE 0x03
+#define EFI_SCSI_OP_SEND_DIAG 0x1d
+#define EFI_SCSI_OP_TEST_UNIT_READY 0x00
+#define EFI_SCSI_OP_WRITE_BUFF 0x3b
+
+//
+// Commands unique to Direct Access Devices
+//
+#define EFI_SCSI_OP_COMPARE 0x39
+#define EFI_SCSI_OP_FORMAT 0x04
+#define EFI_SCSI_OP_LOCK_UN_CACHE 0x36
+#define EFI_SCSI_OP_PREFETCH 0x34
+#define EFI_SCSI_OP_MEDIA_REMOVAL 0x1e
+#define EFI_SCSI_OP_READ6 0x08
+#define EFI_SCSI_OP_READ10 0x28
+#define EFI_SCSI_OP_READ_CAPACITY 0x25
+#define EFI_SCSI_OP_READ_DEFECT 0x37
+#define EFI_SCSI_OP_READ_LONG 0x3e
+#define EFI_SCSI_OP_REASSIGN_BLK 0x07
+#define EFI_SCSI_OP_RECEIVE_DIAG 0x1c
+#define EFI_SCSI_OP_RELEASE 0x17
+#define EFI_SCSI_OP_REZERO 0x01
+#define EFI_SCSI_OP_SEARCH_DATA_E 0x31
+#define EFI_SCSI_OP_SEARCH_DATA_H 0x30
+#define EFI_SCSI_OP_SEARCH_DATA_L 0x32
+#define EFI_SCSI_OP_SEEK6 0x0b
+#define EFI_SCSI_OP_SEEK10 0x2b
+#define EFI_SCSI_OP_SEND_DIAG 0x1d
+#define EFI_SCSI_OP_SET_LIMIT 0x33
+#define EFI_SCSI_OP_START_STOP_UNIT 0x1b
+#define EFI_SCSI_OP_SYNC_CACHE 0x35
+#define EFI_SCSI_OP_VERIFY 0x2f
+#define EFI_SCSI_OP_WRITE6 0x0a
+#define EFI_SCSI_OP_WRITE10 0x2a
+#define EFI_SCSI_OP_WRITE_VERIFY 0x2e
+#define EFI_SCSI_OP_WRITE_LONG 0x3f
+#define EFI_SCSI_OP_WRITE_SAME 0x41
+
+//
+// Commands unique to Sequential Access Devices
+//
+#define EFI_SCSI_OP_ERASE 0x19
+#define EFI_SCSI_OP_LOAD_UNLOAD 0x1b
+#define EFI_SCSI_OP_LOCATE 0x2b
+#define EFI_SCSI_OP_READ_BLOCK_LIMIT 0x05
+#define EFI_SCSI_OP_READ_POS 0x34
+#define EFI_SCSI_OP_READ_REVERSE 0x0f
+#define EFI_SCSI_OP_RECOVER_BUF_DATA 0x14
+#define EFI_SCSI_OP_RESERVE_UNIT 0x16
+#define EFI_SCSI_OP_REWIND 0x01
+#define EFI_SCSI_OP_SPACE 0x11
+#define EFI_SCSI_OP_VERIFY_TAPE 0x13
+#define EFI_SCSI_OP_WRITE_FILEMARK 0x10
+
+//
+// Commands unique to Printer Devices
+//
+#define EFI_SCSI_OP_PRINT 0x0a
+#define EFI_SCSI_OP_SLEW_PRINT 0x0b
+#define EFI_SCSI_OP_STOP_PRINT 0x1b
+#define EFI_SCSI_OP_SYNC_BUFF 0x10
+
+//
+// Commands unique to Processor Devices
+//
+#define EFI_SCSI_OP_RECEIVE 0x08
+#define EFI_SCSI_OP_SEND 0x0a
+
+//
+// Commands unique to Write-Once Devices
+//
+#define EFI_SCSI_OP_MEDIUM_SCAN 0x38
+#define EFI_SCSI_OP_SEARCH_DAT_E10 0x31
+#define EFI_SCSI_OP_SEARCH_DAT_E12 0xb1
+#define EFI_SCSI_OP_SEARCH_DAT_H10 0x30
+#define EFI_SCSI_OP_SEARCH_DAT_H12 0xb0
+#define EFI_SCSI_OP_SEARCH_DAT_L10 0x32
+#define EFI_SCSI_OP_SEARCH_DAT_L12 0xb2
+#define EFI_SCSI_OP_SET_LIMIT10 0x33
+#define EFI_SCSI_OP_SET_LIMIT12 0xb3
+#define EFI_SCSI_OP_VERIFY10 0x2f
+#define EFI_SCSI_OP_VERIFY12 0xaf
+#define EFI_SCSI_OP_WRITE12 0xaa
+#define EFI_SCSI_OP_WRITE_VERIFY10 0x2e
+#define EFI_SCSI_OP_WRITE_VERIFY12 0xae
+
+//
+// Commands unique to CD-ROM Devices
+//
+#define EFI_SCSI_OP_PLAY_AUD_10 0x45
+#define EFI_SCSI_OP_PLAY_AUD_12 0xa5
+#define EFI_SCSI_OP_PLAY_AUD_MSF 0x47
+#define EFI_SCSI_OP_PLAY_AUD_TKIN 0x48
+#define EFI_SCSI_OP_PLAY_TK_REL10 0x49
+#define EFI_SCSI_OP_PLAY_TK_REL12 0xa9
+#define EFI_SCSI_OP_READ_CD_CAPACITY 0x25
+#define EFI_SCSI_OP_READ_HEADER 0x44
+#define EFI_SCSI_OP_READ_SUB_CHANNEL 0x42
+#define EFI_SCSI_OP_READ_TOC 0x43
+
+//
+// Commands unique to Scanner Devices
+//
+#define EFI_SCSI_OP_GET_DATABUFF_STAT 0x34
+#define EFI_SCSI_OP_GET_WINDOW 0x25
+#define EFI_SCSI_OP_OBJECT_POS 0x31
+#define EFI_SCSI_OP_SCAN 0x1b
+#define EFI_SCSI_OP_SET_WINDOW 0x24
+
+//
+// Commands unique to Optical Memory Devices
+//
+#define EFI_SCSI_OP_UPDATE_BLOCK 0x3d
+
+//
+// Commands unique to Medium Changer Devices
+//
+#define EFI_SCSI_OP_EXCHANGE_MEDIUM 0xa6
+#define EFI_SCSI_OP_INIT_ELEMENT_STAT 0x07
+#define EFI_SCSI_OP_POS_TO_ELEMENT 0x2b
+#define EFI_SCSI_OP_REQUEST_VE_ADDR 0xb5
+#define EFI_SCSI_OP_SEND_VOL_TAG 0xb6
+
+//
+// Commands unique to Communition Devices
+//
+#define EFI_SCSI_OP_GET_MESSAGE6 0x08
+#define EFI_SCSI_OP_GET_MESSAGE10 0x28
+#define EFI_SCSI_OP_GET_MESSAGE12 0xa8
+#define EFI_SCSI_OP_SEND_MESSAGE6 0x0a
+#define EFI_SCSI_OP_SEND_MESSAGE10 0x2a
+#define EFI_SCSI_OP_SEND_MESSAGE12 0xaa
+
+//
+// SCSI Data Transfer Direction
+//
+#define EFI_SCSI_DATA_IN 0
+#define EFI_SCSI_DATA_OUT 1
+
+//
+// Peripheral Device Type Definitions
+//
+#define EFI_SCSI_TYPE_DISK 0x00 // Disk device
+#define EFI_SCSI_TYPE_TAPE 0x01 // Tape device
+#define EFI_SCSI_TYPE_PRINTER 0x02 // Printer
+#define EFI_SCSI_TYPE_PROCESSOR 0x03 // Processor
+#define EFI_SCSI_TYPE_WORM 0x04 // Write-once read-multiple
+#define EFI_SCSI_TYPE_CDROM 0x05 // CD-ROM device
+#define EFI_SCSI_TYPE_SCANNER 0x06 // Scanner device
+#define EFI_SCSI_TYPE_OPTICAL 0x07 // Optical memory device
+#define EFI_SCSI_TYPE_MEDIUMCHANGER 0x08 // Medium Changer device
+#define EFI_SCSI_TYPE_COMMUNICATION 0x09 // Communications device
+#define EFI_SCSI_TYPE_RESERVED_LOW 0x0A // Reserved (low)
+#define EFI_SCSI_TYPE_RESERVED_HIGH 0x1E // Reserved (high)
+#define EFI_SCSI_TYPE_UNKNOWN 0x1F // Unknown or no device type
+#pragma pack(1)
+//
+// Data structures for scsi command use
+//
+typedef struct {
+ UINT8 Peripheral_Type : 5;
+ UINT8 Peripheral_Qualifier : 3;
+ UINT8 DeviceType_Modifier : 7;
+ UINT8 RMB : 1;
+ UINT8 Version;
+ UINT8 Response_Data_Format;
+ UINT8 Addnl_Length;
+ UINT8 Reserved_5_95[95 - 5 + 1];
+} EFI_SCSI_INQUIRY_DATA;
+
+typedef struct {
+ UINT8 Error_Code : 7;
+ UINT8 Valid : 1;
+ UINT8 Segment_Number;
+ UINT8 Sense_Key : 4;
+ UINT8 Reserved_21 : 1;
+ UINT8 ILI : 1;
+ UINT8 Reserved_22 : 2;
+ UINT8 Information_3_6[4];
+ UINT8 Addnl_Sense_Length; // n - 7
+ UINT8 Vendor_Specific_8_11[4];
+ UINT8 Addnl_Sense_Code; // mandatory
+ UINT8 Addnl_Sense_Code_Qualifier; // mandatory
+ UINT8 Field_Replaceable_Unit_Code; // optional
+ UINT8 Reserved_15_17[3];
+} EFI_SCSI_SENSE_DATA;
+
+typedef struct {
+ UINT8 LastLba3;
+ UINT8 LastLba2;
+ UINT8 LastLba1;
+ UINT8 LastLba0;
+ UINT8 BlockSize3;
+ UINT8 BlockSize2;
+ UINT8 BlockSize1;
+ UINT8 BlockSize0;
+} EFI_SCSI_DISK_CAPACITY_DATA;
+
+#pragma pack()
+//
+// Sense Key
+//
+#define EFI_SCSI_REQUEST_SENSE_ERROR (0x70)
+#define EFI_SCSI_SK_NO_SENSE (0x0)
+#define EFI_SCSI_SK_RECOVERY_ERROR (0x1)
+#define EFI_SCSI_SK_NOT_READY (0x2)
+#define EFI_SCSI_SK_MEDIUM_ERROR (0x3)
+#define EFI_SCSI_SK_HARDWARE_ERROR (0x4)
+#define EFI_SCSI_SK_ILLEGAL_REQUEST (0x5)
+#define EFI_SCSI_SK_UNIT_ATTENTION (0x6)
+#define EFI_SCSI_SK_DATA_PROTECT (0x7)
+#define EFI_SCSI_SK_BLANK_CHECK (0x8)
+#define EFI_SCSI_SK_VENDOR_SPECIFIC (0x9)
+#define EFI_SCSI_SK_RESERVED_A (0xA)
+#define EFI_SCSI_SK_ABORT (0xB)
+#define EFI_SCSI_SK_RESERVED_C (0xC)
+#define EFI_SCSI_SK_OVERFLOW (0xD)
+#define EFI_SCSI_SK_MISCOMPARE (0xE)
+#define EFI_SCSI_SK_RESERVED_F (0xF)
+
+//
+// Additional Sense Codes
+//
+#define EFI_SCSI_ASC_NOT_READY (0x04)
+#define EFI_SCSI_ASC_MEDIA_ERR1 (0x10)
+#define EFI_SCSI_ASC_MEDIA_ERR2 (0x11)
+#define EFI_SCSI_ASC_MEDIA_ERR3 (0x14)
+#define EFI_SCSI_ASC_MEDIA_ERR4 (0x30)
+#define EFI_SCSI_ASC_MEDIA_UPSIDE_DOWN (0x06)
+#define EFI_SCSI_ASC_INVALID_CMD (0x20)
+#define EFI_SCSI_ASC_LBA_OUT_OF_RANGE (0x21)
+#define EFI_SCSI_ASC_INVALID_FIELD (0x24)
+#define EFI_SCSI_ASC_WRITE_PROTECTED (0x27)
+#define EFI_SCSI_ASC_MEDIA_CHANGE (0x28)
+#define EFI_SCSI_ASC_RESET (0x29) /* Power On Reset or Bus Reset occurred */
+#define EFI_SCSI_ASC_ILLEGAL_FIELD (0x26)
+#define EFI_SCSI_ASC_NO_MEDIA (0x3A)
+#define EFI_SCSI_ASC_ILLEGAL_MODE_FOR_THIS_TRACK (0x64)
+
+//
+// Additional Sense Code Qualifier
+//
+#define EFI_SCSI_ASCQ_IN_PROGRESS (0x01)
+
+#endif
diff --git a/MdePkg/Include/Ipf/IpfDefines.h b/MdePkg/Include/Ipf/IpfDefines.h new file mode 100644 index 0000000000..4b9c1adee0 --- /dev/null +++ b/MdePkg/Include/Ipf/IpfDefines.h @@ -0,0 +1,553 @@ +///** @file
+// IPF Processor Defines for assembly code
+//
+// @note
+// This file is included by assembly files as well. The assmber can NOT deal
+// with /* */ commnets this is why this file is commented not following the
+// coding standard
+//
+//Copyright (c) 2006, Intel Corporation
+//All rights reserved. This program and the accompanying materials
+//are licensed and made available under the terms and conditions of the BSD License
+//which accompanies this distribution. The full text of the license may be found at
+//http://opensource.org/licenses/bsd-license.php
+//
+//THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+//WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//Module Name: IpfDefines.h
+//
+//**/
+
+#ifndef _IPFDEFINES_H
+#define _IPFDEFINES_H
+
+//
+// IPI DElivery Methods
+//
+#define IPI_INT_DELIVERY 0x0
+#define IPI_PMI_DELIVERY 0x2
+#define IPI_NMI_DELIVERY 0x4
+#define IPI_INIT_DELIVERY 0x5
+#define IPI_ExtINT_DELIVERY 0x7
+
+//
+// Define Itanium-based system registers.
+//
+// Define Itanium-based system register bit field offsets.
+//
+// Processor Status Register (PSR) Bit positions
+//
+// User / System mask
+//
+#define PSR_RV0 0
+#define PSR_BE 1
+#define PSR_UP 2
+#define PSR_AC 3
+#define PSR_MFL 4
+#define PSR_MFH 5
+
+//
+// PSR bits 6-12 reserved (must be zero)
+//
+#define PSR_MBZ0 6
+#define PSR_MBZ0_V 0x1ffUL L
+
+//
+// System only mask
+//
+#define PSR_IC 13
+#define PSR_IC_MASK (1 << 13)
+#define PSR_I 14
+#define PSR_PK 15
+#define PSR_MBZ1 16
+#define PSR_MBZ1_V 0x1UL L
+#define PSR_DT 17
+#define PSR_DFL 18
+#define PSR_DFH 19
+#define PSR_SP 20
+#define PSR_PP 21
+#define PSR_DI 22
+#define PSR_SI 23
+#define PSR_DB 24
+#define PSR_LP 25
+#define PSR_TB 26
+#define PSR_RT 27
+
+//
+// PSR bits 28-31 reserved (must be zero)
+//
+#define PSR_MBZ2 28
+#define PSR_MBZ2_V 0xfUL L
+
+//
+// Neither mask
+//
+#define PSR_CPL 32
+#define PSR_CPL_LEN 2
+#define PSR_IS 34
+#define PSR_MC 35
+#define PSR_IT 36
+#define PSR_IT_MASK 0x1000000000
+#define PSR_ID 37
+#define PSR_DA 38
+#define PSR_DD 39
+#define PSR_SS 40
+#define PSR_RI 41
+#define PSR_RI_LEN 2
+#define PSR_ED 43
+#define PSR_BN 44
+
+//
+// PSR bits 45-63 reserved (must be zero)
+//
+#define PSR_MBZ3 45
+#define PSR_MBZ3_V 0xfffffUL L
+
+//
+// Floating Point Status Register (FPSR) Bit positions
+//
+//
+// Traps
+//
+#define FPSR_VD 0
+#define FPSR_DD 1
+#define FPSR_ZD 2
+#define FPSR_OD 3
+#define FPSR_UD 4
+#define FPSR_ID 5
+
+//
+// Status Field 0 - Controls
+//
+#define FPSR0_FTZ0 6
+#define FPSR0_WRE0 7
+#define FPSR0_PC0 8
+#define FPSR0_RC0 10
+#define FPSR0_TD0 12
+
+//
+// Status Field 0 - Flags
+//
+#define FPSR0_V0 13
+#define FPSR0_D0 14
+#define FPSR0_Z0 15
+#define FPSR0_O0 16
+#define FPSR0_U0 17
+#define FPSR0_I0 18
+
+//
+// Status Field 1 - Controls
+//
+#define FPSR1_FTZ0 19
+#define FPSR1_WRE0 20
+#define FPSR1_PC0 21
+#define FPSR1_RC0 23
+#define FPSR1_TD0 25
+
+//
+// Status Field 1 - Flags
+//
+#define FPSR1_V0 26
+#define FPSR1_D0 27
+#define FPSR1_Z0 28
+#define FPSR1_O0 29
+#define FPSR1_U0 30
+#define FPSR1_I0 31
+
+//
+// Status Field 2 - Controls
+//
+#define FPSR2_FTZ0 32
+#define FPSR2_WRE0 33
+#define FPSR2_PC0 34
+#define FPSR2_RC0 36
+#define FPSR2_TD0 38
+
+//
+// Status Field 2 - Flags
+//
+#define FPSR2_V0 39
+#define FPSR2_D0 40
+#define FPSR2_Z0 41
+#define FPSR2_O0 42
+#define FPSR2_U0 43
+#define FPSR2_I0 44
+
+//
+// Status Field 3 - Controls
+//
+#define FPSR3_FTZ0 45
+#define FPSR3_WRE0 46
+#define FPSR3_PC0 47
+#define FPSR3_RC0 49
+#define FPSR3_TD0 51
+
+//
+// Status Field 0 - Flags
+//
+#define FPSR3_V0 52
+#define FPSR3_D0 53
+#define FPSR3_Z0 54
+#define FPSR3_O0 55
+#define FPSR3_U0 56
+#define FPSR3_I0 57
+
+//
+// FPSR bits 58-63 Reserved -- Must be zero
+//
+#define FPSR_MBZ0 58
+#define FPSR_MBZ0_V 0x3fUL L
+
+//
+// For setting up FPSR on kernel entry
+// All traps are disabled.
+//
+#define FPSR_FOR_KERNEL 0x3f
+
+#define FP_REG_SIZE 16 // 16 byte spill size
+#define HIGHFP_REGS_LENGTH (96 * 16)
+
+//
+// Define hardware Task Priority Register (TPR)
+//
+//
+// TPR bit positions
+//
+#define TPR_MIC 4 // Bits 0 - 3 ignored
+#define TPR_MIC_LEN 4
+#define TPR_MMI 16 // Mask Maskable Interrupt
+//
+// Define hardware Interrupt Status Register (ISR)
+//
+//
+// ISR bit positions
+//
+#define ISR_CODE 0
+#define ISR_CODE_LEN 16
+#define ISR_CODE_MASK 0xFFFF
+#define ISR_IA_VECTOR 16
+#define ISR_IA_VECTOR_LEN 8
+#define ISR_MBZ0 24
+#define ISR_MBZ0_V 0xff
+#define ISR_X 32
+#define ISR_W 33
+#define ISR_R 34
+#define ISR_NA 35
+#define ISR_SP 36
+#define ISR_RS 37
+#define ISR_IR 38
+#define ISR_NI 39
+#define ISR_MBZ1 40
+#define ISR_EI 41
+#define ISR_ED 43
+#define ISR_MBZ2 44
+#define ISR_MBZ2_V 0xfffff
+
+//
+// ISR codes
+//
+// For General exceptions: ISR{3:0}
+//
+#define ISR_ILLEGAL_OP 0 // Illegal operation fault
+#define ISR_PRIV_OP 1 // Privileged operation fault
+#define ISR_PRIV_REG 2 // Privileged register fauls
+#define ISR_RESVD_REG 3 // Reserved register/field flt
+#define ISR_ILLEGAL_ISA 4 // Disabled instruction set transition fault
+//
+// Define hardware Default Control Register (DCR)
+//
+//
+// DCR bit positions
+//
+#define DCR_PP 0
+#define DCR_BE 1
+#define DCR_LC 2
+#define DCR_MBZ0 4
+#define DCR_MBZ0_V 0xf
+#define DCR_DM 8
+#define DCR_DP 9
+#define DCR_DK 10
+#define DCR_DX 11
+#define DCR_DR 12
+#define DCR_DA 13
+#define DCR_DD 14
+#define DCR_DEFER_ALL 0x7f00
+#define DCR_MBZ1 2
+#define DCR_MBZ1_V 0xffffffffffffUL L
+
+//
+// Define hardware RSE Configuration Register
+//
+// RS Configuration (RSC) bit field positions
+//
+#define RSC_MODE 0
+#define RSC_PL 2
+#define RSC_BE 4
+#define RSC_MBZ0 5
+#define RSC_MBZ0_V 0x3ff
+#define RSC_LOADRS 16
+#define RSC_LOADRS_LEN 14
+#define RSC_MBZ1 30
+#define RSC_MBZ1_V 0x3ffffffffUL L
+
+//
+// RSC modes
+//
+#define RSC_MODE_LY (0x0) // Lazy
+#define RSC_MODE_SI (0x1) // Store intensive
+#define RSC_MODE_LI (0x2) // Load intensive
+#define RSC_MODE_EA (0x3) // Eager
+//
+// RSC Endian bit values
+//
+#define RSC_BE_LITTLE 0
+#define RSC_BE_BIG 1
+
+//
+// Define Interruption Function State (IFS) Register
+//
+// IFS bit field positions
+//
+#define IFS_IFM 0
+#define IFS_IFM_LEN 38
+#define IFS_MBZ0 38
+#define IFS_MBZ0_V 0x1ffffff
+#define IFS_V 63
+#define IFS_V_LEN 1
+
+//
+// IFS is valid when IFS_V = IFS_VALID
+//
+#define IFS_VALID 1
+
+//
+// Define Page Table Address (PTA)
+//
+#define PTA_VE 0
+#define PTA_VF 8
+#define PTA_SIZE 2
+#define PTA_SIZE_LEN 6
+#define PTA_BASE 15
+
+//
+// Define Region Register (RR)
+//
+//
+// RR bit field positions
+//
+#define RR_VE 0
+#define RR_MBZ0 1
+#define RR_PS 2
+#define RR_PS_LEN 6
+#define RR_RID 8
+#define RR_RID_LEN 24
+#define RR_MBZ1 32
+
+//
+// SAL uses region register 0 and RID of 1000
+//
+#define SAL_RID 0x1000
+#define SAL_RR_REG 0x0
+#define SAL_TR 0x0
+
+//
+// Total number of region registers
+//
+#define RR_SIZE 8
+
+//
+// Define Protection Key Register (PKR)
+//
+// PKR bit field positions
+//
+#define PKR_V 0
+#define PKR_WD 1
+#define PKR_RD 2
+#define PKR_XD 3
+#define PKR_MBZ0 4
+#define PKR_KEY 8
+#define PKR_KEY_LEN 24
+#define PKR_MBZ1 32
+
+#define PKR_VALID (1 << PKR_V)
+
+//
+// Number of protection key registers
+//
+#define PKRNUM 8
+
+//
+// Define Interruption TLB Insertion register (ITIR)
+//
+//
+// Define Translation Insertion Format (TR)
+//
+// PTE0 bit field positions
+//
+#define PTE0_P 0
+#define PTE0_MBZ0 1
+#define PTE0_MA 2
+#define PTE0_A 5
+#define PTE0_D 6
+#define PTE0_PL 7
+#define PTE0_AR 9
+#define PTE0_PPN 12
+#define PTE0_MBZ1 48
+#define PTE0_ED 52
+#define PTE0_IGN0 53
+
+//
+// ITIR bit field positions
+//
+#define ITIR_MBZ0 0
+#define ITIR_PS 2
+#define ITIR_PS_LEN 6
+#define ITIR_KEY 8
+#define ITIR_KEY_LEN 24
+#define ITIR_MBZ1 32
+#define ITIR_MBZ1_LEN 16
+#define ITIR_PPN 48
+#define ITIR_PPN_LEN 15
+#define ITIR_MBZ2 63
+
+#define ATTR_IPAGE 0x661 // Access Rights = RWX (bits 11-9=011), PL 0(8-7=0)
+#define ATTR_DEF_BITS 0x661 // Access Rights = RWX (bits 11-9=010), PL 0(8-7=0)
+// Dirty (bit 6=1), Accessed (bit 5=1),
+// MA WB (bits 4-2=000), Present (bit 0=1)
+//
+// Memory access rights
+//
+#define AR_UR_KR 0x0 // user/kernel read
+#define AR_URX_KRX 0x1 // user/kernel read and execute
+#define AR_URW_KRW 0x2 // user/kernel read & write
+#define AR_URWX_KRWX 0x3 // user/kernel read,write&execute
+#define AR_UR_KRW 0x4 // user read/kernel read,write
+#define AR_URX_KRWX 0x5 // user read/execute, kernel all
+#define AR_URWX_KRW 0x6 // user all, kernel read & write
+#define AR_UX_KRX 0x7 // user execute only, kernel read and execute
+//
+// Memory attribute values
+//
+//
+// The next 4 are all cached, non-sequential & speculative, coherent
+//
+#define MA_WBU 0x0 // Write back, unordered
+//
+// The next 3 are all non-cached, sequential & non-speculative
+//
+#define MA_UC 0x4 // Non-coalescing, sequential & non-speculative
+#define MA_UCE 0x5 // Non-coalescing, sequential, non-speculative
+// & fetchadd exported
+//
+#define MA_WC 0x6 // Non-cached, Coalescing, non-seq., spec.
+#define MA_NAT 0xf // NaT page
+//
+// Definition of the offset of TRAP/INTERRUPT/FAULT handlers from the
+// base of IVA (Interruption Vector Address)
+//
+#define IVT_SIZE 0x8000
+#define EXTRA_ALIGNMENT 0x1000
+
+#define OFF_VHPTFLT 0x0000 // VHPT Translation fault
+#define OFF_ITLBFLT 0x0400 // Instruction TLB fault
+#define OFF_DTLBFLT 0x0800 // Data TLB fault
+#define OFF_ALTITLBFLT 0x0C00 // Alternate ITLB fault
+#define OFF_ALTDTLBFLT 0x1000 // Alternate DTLB fault
+#define OFF_NESTEDTLBFLT 0x1400 // Nested TLB fault
+#define OFF_IKEYMISSFLT 0x1800 // Inst Key Miss fault
+#define OFF_DKEYMISSFLT 0x1C00 // Data Key Miss fault
+#define OFF_DIRTYBITFLT 0x2000 // Dirty-Bit fault
+#define OFF_IACCESSBITFLT 0x2400 // Inst Access-Bit fault
+#define OFF_DACCESSBITFLT 0x2800 // Data Access-Bit fault
+#define OFF_BREAKFLT 0x2C00 // Break Inst fault
+#define OFF_EXTINT 0x3000 // External Interrupt
+//
+// Offset 0x3400 to 0x0x4C00 are reserved
+//
+#define OFF_PAGENOTPFLT 0x5000 // Page Not Present fault
+#define OFF_KEYPERMFLT 0x5100 // Key Permission fault
+#define OFF_IACCESSRTFLT 0x5200 // Inst Access-Rights flt
+#define OFF_DACCESSRTFLT 0x5300 // Data Access-Rights fault
+#define OFF_GPFLT 0x5400 // General Exception fault
+#define OFF_FPDISFLT 0x5500 // Disable-FP fault
+#define OFF_NATFLT 0x5600 // NAT Consumption fault
+#define OFF_SPECLNFLT 0x5700 // Speculation fault
+#define OFF_DBGFLT 0x5900 // Debug fault
+#define OFF_ALIGNFLT 0x5A00 // Unaligned Reference fault
+#define OFF_LOCKDREFFLT 0x5B00 // Locked Data Reference fault
+#define OFF_FPFLT 0x5C00 // Floating Point fault
+#define OFF_FPTRAP 0x5D00 // Floating Point Trap
+#define OFF_LOPRIVTRAP 0x5E00 // Lower-Privilege Transfer Trap
+#define OFF_TAKENBRTRAP 0x5F00 // Taken Branch Trap
+#define OFF_SSTEPTRAP 0x6000 // Single Step Trap
+//
+// Offset 0x6100 to 0x6800 are reserved
+//
+#define OFF_IA32EXCEPTN 0x6900 // iA32 Exception
+#define OFF_IA32INTERCEPT 0x6A00 // iA32 Intercept
+#define OFF_IA32INT 0x6B00 // iA32 Interrupt
+#define NUMBER_OF_VECTORS 0x100
+//
+// Privilege levels
+//
+#define PL_KERNEL 0
+#define PL_USER 3
+
+//
+// Instruction set (IS) bits
+//
+#define IS_IA64 0
+#define IS_IA 1
+
+//
+// RSC while in kernel: enabled, little endian, PL = 0, eager mode
+//
+#define RSC_KERNEL ((RSC_MODE_EA << RSC_MODE) | (RSC_BE_LITTLE << RSC_BE))
+
+//
+// Lazy RSC in kernel: enabled, little endian, pl = 0, lazy mode
+//
+#define RSC_KERNEL_LAZ ((RSC_MODE_LY << RSC_MODE) | (RSC_BE_LITTLE << RSC_BE))
+
+//
+// RSE disabled: disabled, PL = 0, little endian, eager mode
+//
+#define RSC_KERNEL_DISABLED ((RSC_MODE_LY << RSC_MODE) | (RSC_BE_LITTLE << RSC_BE))
+
+#define NAT_BITS_PER_RNAT_REG 63
+
+//
+// Macros for generating PTE0 and PTE1 value
+//
+#define PTE0(ed, ppn12_47, ar, pl, d, a, ma, p) \
+ ( ( ed << PTE0_ED ) | \
+ ( ppn12_47 << PTE0_PPN ) | \
+ ( ar << PTE0_AR ) | \
+ ( pl << PTE0_PL ) | \
+ ( d << PTE0_D ) | \
+ ( a << PTE0_A ) | \
+ ( ma << PTE0_MA ) | \
+ ( p << PTE0_P ) \
+ )
+
+#define ITIR(ppn48_63, key, ps) \
+ ( ( ps << ITIR_PS ) | \
+ ( key << ITIR_KEY ) | \
+ ( ppn48_63 << ITIR_PPN ) \
+ )
+
+//
+// Macro to generate mask value from bit position. The result is a
+// 64-bit.
+//
+#define BITMASK(bp, value) (value << bp)
+
+#define BUNDLE_SIZE 16
+#define SPURIOUS_INT 0xF
+
+#define FAST_DISABLE_INTERRUPTS rsm BITMASK (PSR_I, 1);;
+
+#define FAST_ENABLE_INTERRUPTS ssm BITMASK (PSR_I, 1);;
+
+#endif
diff --git a/MdePkg/Include/Ipf/IpfMacro.i b/MdePkg/Include/Ipf/IpfMacro.i new file mode 100644 index 0000000000..506b4b328c --- /dev/null +++ b/MdePkg/Include/Ipf/IpfMacro.i @@ -0,0 +1,64 @@ +//++
+// Copyright (c) 2006, Intel Corporation
+// All rights reserved. This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+// Module Name:
+// IpfMacro.i
+//
+// Abstract:
+// Contains the macros needed for calling procedures in Itanium-based assembly code.
+//
+//
+// Revision History:
+//
+//--
+
+#ifndef __IA64PROC_I__
+#define __IA64PROC_I__
+
+
+#define PROCEDURE_ENTRY(name) .##text; \
+ .##type name, @function; \
+ .##proc name; \
+name::
+
+#define PROCEDURE_EXIT(name) .##endp name
+
+// Note: use of NESTED_SETUP requires number of locals (l) >= 3
+
+#define NESTED_SETUP(i,l,o,r) \
+ alloc loc1=ar##.##pfs,i,l,o,r ;\
+ mov loc0=b0
+
+#define NESTED_RETURN \
+ mov b0=loc0 ;\
+ mov ar##.##pfs=loc1 ;;\
+ br##.##ret##.##dpnt b0;;
+
+
+#define INTERRUPT_HANDLER_BEGIN(name) \
+PROCEDURE_ENTRY(name##HandlerBegin) \
+;; \
+PROCEDURE_EXIT(name##HandlerBegin)
+
+#define INTERRUPT_HANDLER_END(name) \
+PROCEDURE_ENTRY(name##HandlerEnd) \
+;; \
+PROCEDURE_EXIT(name##HandlerEnd)
+
+
+#define INTERRUPT_HANDLER_BLOCK_BEGIN \
+INTERRUPT_HANDLER_BEGIN(First)
+
+#define INTERRUPT_HANDLER_BLOCK_END \
+INTERRUPT_HANDLER_END(Last)
+
+
+
+#endif
diff --git a/MdePkg/Include/Ipf/ProcessorBind.h b/MdePkg/Include/Ipf/ProcessorBind.h new file mode 100644 index 0000000000..99da96ca05 --- /dev/null +++ b/MdePkg/Include/Ipf/ProcessorBind.h @@ -0,0 +1,202 @@ +/** @file
+ Processor or Compiler specific defines and types for Intel Itanium(TM).
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ProcessorBind.h
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_IPF
+
+
+//
+// Make sure we are useing the correct packing rules per EFI specification
+//
+#pragma pack()
+
+
+#if _MSC_EXTENSIONS
+
+//
+// Disable warning that make it impossible to compile at /W4
+// This only works for Microsoft tools. Copied from the
+// IA-32 version of efibind.h
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+#pragma warning ( disable : 4214 )
+
+
+// Disabling the unreferenced formal parameter warnings.
+//
+#pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+#pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning
+//
+#pragma warning ( disable : 4127 )
+
+//
+// Can not cast a function pointer to a data pointer. We need to do this on
+// IPF to get access to the PLABEL.
+//
+#pragma warning ( disable : 4514 )
+
+
+#endif
+
+
+#if (__STDC_VERSION__ < 199901L)
+ //
+ // No ANSI C 2000 stdint.h integer width declarations, so define equivalents
+ //
+
+ #if _MSC_EXTENSIONS
+
+
+ //
+ // use Microsoft C complier dependent interger width types
+ //
+ typedef unsigned __int64 UINT64;
+ typedef __int64 INT64;
+ typedef unsigned __int32 UINT32;
+ typedef __int32 INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #else
+ #ifdef _EFI_P64
+ //
+ // P64 - is Intel Itanium(TM) speak for pointers being 64-bit and longs and ints
+ // are 32-bits
+ //
+ typedef unsigned long long UINT64;
+ typedef long long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short CHAR16;
+ typedef unsigned short UINT16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #else
+ //
+ // Assume LP64 - longs and pointers are 64-bit. Ints are 32-bit.
+ //
+ typedef unsigned long UINT64;
+ typedef long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #endif
+ #endif
+
+ #define UINT8_MAX 0xff
+
+#else
+ //
+ // Use ANSI C 2000 stdint.h integer width declarations
+ //
+ #include <stdint.h>
+ typedef uint8_t BOOLEAN;
+ typedef int8_t INT8;
+ typedef uint8_t UINT8;
+ typedef int16_t INT16;
+ typedef uint16_t UINT16;
+ typedef int32_t INT32;
+ typedef uint32_t UINT32;
+ typedef int64_t INT64;
+ typedef uint64_t UINT64;
+ typedef char CHAR8;
+ typedef uint16_t CHAR16;
+
+#endif
+
+typedef UINT64 UINTN;
+typedef INT64 INTN;
+
+
+//
+// Processor specific defines
+//
+#define MAX_BIT 0x8000000000000000ULL
+#define MAX_2_BITS 0xC000000000000000ULL
+
+//
+// Maximum legal Itanium-based address
+//
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify thier member functions with EFIAPI.
+//
+#if _MSC_EXTENSIONS
+ //
+ // Microsoft* compiler requires _EFIAPI useage, __cdecl is Microsoft* specific C.
+ //
+ #define EFIAPI __cdecl
+#else
+ #define EFIAPI
+#endif
+
+//
+// The Microsoft* C compiler can removed references to unreferenced data items
+// if the /OPT:REF linker option is used. We defined a macro as this is a
+// a non standard extension
+//
+#define GLOBAL_REMOVE_IF_UNREFERENCED
+
+//
+// A pointer to a function in IPF points to a plabel.
+//
+typedef struct {
+ UINT64 EntryPoint;
+ UINT64 GP;
+} EFI_PLABEL;
+
+typedef struct {
+ UINTN BootPhase; // entry r20 value
+ UINTN UniqueId; // PAL arbitration ID
+ UINTN HealthStat; // Health Status
+ UINTN PALRetAddress; // return address to PAL
+} IPF_HANDOFF_STATUS;
+
+#endif
+
diff --git a/MdePkg/Include/Ipf/SalApi.h b/MdePkg/Include/Ipf/SalApi.h new file mode 100644 index 0000000000..cbaf4ac41a --- /dev/null +++ b/MdePkg/Include/Ipf/SalApi.h @@ -0,0 +1,691 @@ +/** @file
+ Main SAL API's defined in SAL 3.0 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SalApi.h
+
+**/
+
+#ifndef __SAL_API_H__
+#define __SAL_API_H__
+
+typedef UINTN EFI_SAL_STATUS;
+
+//
+// EFI_SAL_STATUS defines
+//
+#define EFI_SAL_SUCCESS ((EFI_SAL_STATUS) 0)
+#define EFI_SAL_MORE_RECORDS ((EFI_SAL_STATUS) 3)
+#define EFI_SAL_NOT_IMPLEMENTED ((EFI_SAL_STATUS) - 1)
+#define EFI_SAL_INVALID_ARGUMENT ((EFI_SAL_STATUS) - 2)
+#define EFI_SAL_ERROR ((EFI_SAL_STATUS) - 3)
+#define EFI_SAL_VIRTUAL_ADDRESS_ERROR ((EFI_SAL_STATUS) - 4)
+#define EFI_SAL_NO_INFORMATION ((EFI_SAL_STATUS) - 5)
+#define EFI_SAL_NOT_ENOUGH_SCRATCH ((EFI_SAL_STATUS) - 9)
+
+//
+// Return values from SAL
+//
+typedef struct {
+ EFI_SAL_STATUS Status; // register r8
+ UINTN r9;
+ UINTN r10;
+ UINTN r11;
+} SAL_RETURN_REGS;
+
+typedef SAL_RETURN_REGS (EFIAPI *SAL_PROC)
+ (
+ IN UINT64 FunctionId,
+ IN UINT64 Arg2,
+ IN UINT64 Arg3,
+ IN UINT64 Arg4,
+ IN UINT64 Arg5,
+ IN UINT64 Arg6,
+ IN UINT64 Arg7,
+ IN UINT64 Arg8
+ );
+
+//
+// SAL Procedure FunctionId definition
+//
+#define EFI_SAL_SET_VECTORS 0x01000000
+#define EFI_SAL_GET_STATE_INFO 0x01000001
+#define EFI_SAL_GET_STATE_INFO_SIZE 0x01000002
+#define EFI_SAL_CLEAR_STATE_INFO 0x01000003
+#define EFI_SAL_MC_RENDEZ 0x01000004
+#define EFI_SAL_MC_SET_PARAMS 0x01000005
+#define EFI_SAL_REGISTER_PHYSICAL_ADDR 0x01000006
+#define EFI_SAL_CACHE_FLUSH 0x01000008
+#define EFI_SAL_CACHE_INIT 0x01000009
+#define EFI_SAL_PCI_CONFIG_READ 0x01000010
+#define EFI_SAL_PCI_CONFIG_WRITE 0x01000011
+#define EFI_SAL_FREQ_BASE 0x01000012
+#define EFI_SAL_UPDATE_PAL 0x01000020
+
+#define EFI_SAL_FUNCTION_ID_MASK 0x0000ffff
+#define EFI_SAL_MAX_SAL_FUNCTION_ID 0x00000021
+
+//
+// SAL Procedure parameter definitions
+// Not much point in using typedefs or enums because all params
+// are UINT64 and the entry point is common
+//
+// EFI_SAL_SET_VECTORS
+//
+#define EFI_SAL_SET_MCA_VECTOR 0x0
+#define EFI_SAL_SET_INIT_VECTOR 0x1
+#define EFI_SAL_SET_BOOT_RENDEZ_VECTOR 0x2
+
+typedef struct {
+ UINT64 Length : 32;
+ UINT64 ChecksumValid : 1;
+ UINT64 Reserved1 : 7;
+ UINT64 ByteChecksum : 8;
+ UINT64 Reserved2 : 16;
+} SAL_SET_VECTORS_CS_N;
+
+//
+// EFI_SAL_GET_STATE_INFO, EFI_SAL_GET_STATE_INFO_SIZE,
+// EFI_SAL_CLEAR_STATE_INFO
+//
+#define EFI_SAL_MCA_STATE_INFO 0x0
+#define EFI_SAL_INIT_STATE_INFO 0x1
+#define EFI_SAL_CMC_STATE_INFO 0x2
+#define EFI_SAL_CP_STATE_INFO 0x3
+
+//
+// EFI_SAL_MC_SET_PARAMS
+//
+#define EFI_SAL_MC_SET_RENDEZ_PARAM 0x1
+#define EFI_SAL_MC_SET_WAKEUP_PARAM 0x2
+#define EFI_SAL_MC_SET_CPE_PARAM 0x3
+
+#define EFI_SAL_MC_SET_INTR_PARAM 0x1
+#define EFI_SAL_MC_SET_MEM_PARAM 0x2
+
+//
+// EFI_SAL_REGISTER_PAL_PHYSICAL_ADDR
+//
+#define EFI_SAL_REGISTER_PAL_ADDR 0x0
+
+//
+// EFI_SAL_CACHE_FLUSH
+//
+#define EFI_SAL_FLUSH_I_CACHE 0x01
+#define EFI_SAL_FLUSH_D_CACHE 0x02
+#define EFI_SAL_FLUSH_BOTH_CACHE 0x03
+#define EFI_SAL_FLUSH_MAKE_COHERENT 0x04
+
+//
+// EFI_SAL_PCI_CONFIG_READ, EFI_SAL_PCI_CONFIG_WRITE
+//
+#define EFI_SAL_PCI_CONFIG_ONE_BYTE 0x1
+#define EFI_SAL_PCI_CONFIG_TWO_BYTES 0x2
+#define EFI_SAL_PCI_CONFIG_FOUR_BYTES 0x4
+
+typedef struct {
+ UINT64 Register : 8;
+ UINT64 Function : 3;
+ UINT64 Device : 5;
+ UINT64 Bus : 8;
+ UINT64 Segment : 8;
+ UINT64 Reserved : 32;
+} SAL_PCI_ADDRESS;
+
+//
+// EFI_SAL_FREQ_BASE
+//
+#define EFI_SAL_CPU_INPUT_FREQ_BASE 0x0
+#define EFI_SAL_PLATFORM_IT_FREQ_BASE 0x1
+#define EFI_SAL_PLATFORM_RTC_FREQ_BASE 0x2
+
+//
+// EFI_SAL_UPDATE_PAL
+//
+#define EFI_SAL_UPDATE_BAD_PAL_VERSION ((UINT64) -1)
+#define EFI_SAL_UPDATE_PAL_AUTH_FAIL ((UINT64) -2)
+#define EFI_SAL_UPDATE_PAL_BAD_TYPE ((UINT64) -3)
+#define EFI_SAL_UPDATE_PAL_READONLY ((UINT64) -4)
+#define EFI_SAL_UPDATE_PAL_WRITE_FAIL ((UINT64) -10)
+#define EFI_SAL_UPDATE_PAL_ERASE_FAIL ((UINT64) -11)
+#define EFI_SAL_UPDATE_PAL_READ_FAIL ((UINT64) -12)
+#define EFI_SAL_UPDATE_PAL_CANT_FIT ((UINT64) -13)
+
+typedef struct {
+ UINT32 Size;
+ UINT32 MmddyyyyDate;
+ UINT16 Version;
+ UINT8 Type;
+ UINT8 Reserved[5];
+ UINT64 FwVendorId;
+} SAL_UPDATE_PAL_DATA_BLOCK;
+
+typedef struct _SAL_UPDATE_PAL_INFO_BLOCK {
+ struct _SAL_UPDATE_PAL_INFO_BLOCK *Next;
+ struct SAL_UPDATE_PAL_DATA_BLOCK *DataBlock;
+ UINT8 StoreChecksum;
+ UINT8 Reserved[15];
+} SAL_UPDATE_PAL_INFO_BLOCK;
+
+//
+// SAL System Table Definitions
+//
+#pragma pack(1)
+typedef struct {
+ UINT32 Signature;
+ UINT32 Length;
+ UINT16 SalRevision;
+ UINT16 EntryCount;
+ UINT8 CheckSum;
+ UINT8 Reserved[7];
+ UINT16 SalAVersion;
+ UINT16 SalBVersion;
+ UINT8 OemId[32];
+ UINT8 ProductId[32];
+ UINT8 Reserved2[8];
+} SAL_SYSTEM_TABLE_HEADER;
+#pragma pack()
+
+#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"
+#define EFI_SAL_REVISION 0x0300
+//
+// SAL System Types
+//
+#define EFI_SAL_ST_ENTRY_POINT 0
+#define EFI_SAL_ST_MEMORY_DESCRIPTOR 1
+#define EFI_SAL_ST_PLATFORM_FEATURES 2
+#define EFI_SAL_ST_TR_USAGE 3
+#define EFI_SAL_ST_PTC 4
+#define EFI_SAL_ST_AP_WAKEUP 5
+
+#pragma pack(1)
+typedef struct {
+ UINT8 Type; // Type == 0
+ UINT8 Reserved[7];
+ UINT64 PalProcEntry;
+ UINT64 SalProcEntry;
+ UINT64 SalGlobalDataPointer;
+ UINT64 Reserved2[2];
+} SAL_ST_ENTRY_POINT_DESCRIPTOR;
+
+//
+// Not needed for Itanium-based OS boot
+//
+typedef struct {
+ UINT8 Type; // Type == 1
+ UINT8 NeedVirtualRegistration;
+ UINT8 MemoryAttributes;
+ UINT8 PageAccessRights;
+ UINT8 SupportedAttributes;
+ UINT8 Reserved;
+ UINT8 MemoryType;
+ UINT8 MemoryUsage;
+ UINT64 PhysicalMemoryAddress;
+ UINT32 Length;
+ UINT32 Reserved1;
+ UINT64 OemReserved;
+} SAL_ST_MEMORY_DESCRIPTOR_ENTRY;
+
+#pragma pack()
+//
+// Memory Attributes
+//
+#define SAL_MDT_ATTRIB_WB 0x00
+//
+// #define SAL_MDT_ATTRIB_UC 0x02
+//
+#define SAL_MDT_ATTRIB_UC 0x04
+#define SAL_MDT_ATTRIB_UCE 0x05
+#define SAL_MDT_ATTRIB_WC 0x06
+
+//
+// Supported memory Attributes
+//
+#define SAL_MDT_SUPPORT_WB 0x1
+#define SAL_MDT_SUPPORT_UC 0x2
+#define SAL_MDT_SUPPORT_UCE 0x4
+#define SAL_MDT_SUPPORT_WC 0x8
+
+//
+// Virtual address registration
+//
+#define SAL_MDT_NO_VA 0x00
+#define SAL_MDT_NEED_VA 0x01
+//
+// MemoryType info
+//
+#define SAL_REGULAR_MEMORY 0x0000
+#define SAL_MMIO_MAPPING 0x0001
+#define SAL_SAPIC_IPI_BLOCK 0x0002
+#define SAL_IO_PORT_MAPPING 0x0003
+#define SAL_FIRMWARE_MEMORY 0x0004
+#define SAL_BLACK_HOLE 0x000A
+//
+// Memory Usage info
+//
+#define SAL_MDT_USAGE_UNSPECIFIED 0x00
+#define SAL_PAL_CODE 0x01
+#define SAL_BOOTSERVICE_CODE 0x02
+#define SAL_BOOTSERVICE_DATA 0x03
+#define SAL_RUNTIMESERVICE_CODE 0x04
+#define SAL_RUNTIMESERVICE_DATA 0x05
+#define SAL_IA32_OPTIONROM 0x06
+#define SAL_IA32_SYSTEMROM 0x07
+#define SAL_PMI_CODE 0x0a
+#define SAL_PMI_DATA 0x0b
+
+#pragma pack(1)
+typedef struct {
+ UINT8 Type; // Type == 2
+ UINT8 PlatformFeatures;
+ UINT8 Reserved[14];
+} SAL_ST_PLATFORM_FEATURES;
+#pragma pack()
+
+#define SAL_PLAT_FEAT_BUS_LOCK 0x01
+#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02
+#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04
+
+#pragma pack(1)
+typedef struct {
+ UINT8 Type; // Type == 3
+ UINT8 TRType;
+ UINT8 TRNumber;
+ UINT8 Reserved[5];
+ UINT64 VirtualAddress;
+ UINT64 EncodedPageSize;
+ UINT64 Reserved1;
+} SAL_ST_TR_DECRIPTOR;
+#pragma pack()
+
+#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00
+#define EFI_SAL_ST_TR_USAGE_DATA 01
+
+#pragma pack(1)
+typedef struct {
+ UINT64 NumberOfProcessors;
+ UINT64 LocalIDRegister;
+} SAL_COHERENCE_DOMAIN_INFO;
+#pragma pack()
+
+#pragma pack(1)
+typedef struct {
+ UINT8 Type; // Type == 4
+ UINT8 Reserved[3];
+ UINT32 NumberOfDomains;
+ SAL_COHERENCE_DOMAIN_INFO *DomainInformation;
+} SAL_ST_CACHE_COHERENCE_DECRIPTOR;
+#pragma pack()
+
+#pragma pack(1)
+typedef struct {
+ UINT8 Type; // Type == 5
+ UINT8 WakeUpType;
+ UINT8 Reserved[6];
+ UINT64 ExternalInterruptVector;
+} SAL_ST_AP_WAKEUP_DECRIPTOR;
+#pragma pack()
+//
+// FIT Entry
+//
+#define EFI_SAL_FIT_ENTRY_PTR (0x100000000 - 32) // 4GB - 24
+#define EFI_SAL_FIT_PALA_ENTRY (0x100000000 - 48) // 4GB - 32
+#define EFI_SAL_FIT_PALB_TYPE 01
+
+typedef struct {
+ UINT64 Address;
+ UINT8 Size[3];
+ UINT8 Reserved;
+ UINT16 Revision;
+ UINT8 Type : 7;
+ UINT8 CheckSumValid : 1;
+ UINT8 CheckSum;
+} EFI_SAL_FIT_ENTRY;
+
+//
+// SAL Common Record Header
+//
+typedef struct {
+ UINT16 Length;
+ UINT8 Data[1024];
+} SAL_OEM_DATA;
+
+typedef struct {
+ UINT8 Seconds;
+ UINT8 Minutes;
+ UINT8 Hours;
+ UINT8 Reserved;
+ UINT8 Day;
+ UINT8 Month;
+ UINT8 Year;
+ UINT8 Century;
+} SAL_TIME_STAMP;
+
+typedef struct {
+ UINT64 RecordId;
+ UINT16 Revision;
+ UINT8 ErrorSeverity;
+ UINT8 ValidationBits;
+ UINT32 RecordLength;
+ SAL_TIME_STAMP TimeStamp;
+ UINT8 OemPlatformId[16];
+} SAL_RECORD_HEADER;
+
+typedef struct {
+ EFI_GUID Guid;
+ UINT16 Revision;
+ UINT8 ErrorRecoveryInfo;
+ UINT8 Reserved;
+ UINT32 SectionLength;
+} SAL_SEC_HEADER;
+
+//
+// SAL Processor Record
+//
+#define SAL_PROCESSOR_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf1, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define CHECK_INFO_VALID_BIT_MASK 0x1
+#define REQUESTOR_ID_VALID_BIT_MASK 0x2
+#define RESPONDER_ID_VALID_BIT_MASK 0x4
+#define TARGER_ID_VALID_BIT_MASK 0x8
+#define PRECISE_IP_VALID_BIT_MASK 0x10
+
+typedef struct {
+ UINT64 InfoValid : 1;
+ UINT64 ReqValid : 1;
+ UINT64 RespValid : 1;
+ UINT64 TargetValid : 1;
+ UINT64 IpValid : 1;
+ UINT64 Reserved : 59;
+ UINT64 Info;
+ UINT64 Req;
+ UINT64 Resp;
+ UINT64 Target;
+ UINT64 Ip;
+} MOD_ERROR_INFO;
+
+typedef struct {
+ UINT8 CpuidInfo[40];
+ UINT8 Reserved;
+} CPUID_INFO;
+
+typedef struct {
+ UINT64 FrLow;
+ UINT64 FrHigh;
+} FR_STRUCT;
+
+#define MIN_STATE_VALID_BIT_MASK 0x1
+#define BR_VALID_BIT_MASK 0x2
+#define CR_VALID_BIT_MASK 0x4
+#define AR_VALID_BIT_MASK 0x8
+#define RR_VALID_BIT_MASK 0x10
+#define FR_VALID_BIT_MASK 0x20
+
+typedef struct {
+ UINT64 ValidFieldBits;
+ UINT8 MinStateInfo[1024];
+ UINT64 Br[8];
+ UINT64 Cr[128];
+ UINT64 Ar[128];
+ UINT64 Rr[8];
+ FR_STRUCT Fr[128];
+} PSI_STATIC_STRUCT;
+
+#define PROC_ERROR_MAP_VALID_BIT_MASK 0x1
+#define PROC_STATE_PARAMETER_VALID_BIT_MASK 0x2
+#define PROC_CR_LID_VALID_BIT_MASK 0x4
+#define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8
+#define CPU_INFO_VALID_BIT_MASK 0x1000000
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT64 ProcErrorMap;
+ UINT64 ProcStateParameter;
+ UINT64 ProcCrLid;
+ MOD_ERROR_INFO CacheError[15];
+ MOD_ERROR_INFO TlbError[15];
+ MOD_ERROR_INFO BusError[15];
+ MOD_ERROR_INFO RegFileCheck[15];
+ MOD_ERROR_INFO MsCheck[15];
+ CPUID_INFO CpuInfo;
+ PSI_STATIC_STRUCT PsiValidData;
+} SAL_PROCESSOR_ERROR_RECORD;
+
+//
+// Sal Platform memory Error Record
+//
+#define SAL_MEMORY_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf2, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define MEMORY_ERROR_STATUS_VALID_BIT_MASK 0x1
+#define MEMORY_PHYSICAL_ADDRESS_VALID_BIT_MASK 0x2
+#define MEMORY_ADDR_BIT_MASK 0x4
+#define MEMORY_NODE_VALID_BIT_MASK 0x8
+#define MEMORY_CARD_VALID_BIT_MASK 0x10
+#define MEMORY_MODULE_VALID_BIT_MASK 0x20
+#define MEMORY_BANK_VALID_BIT_MASK 0x40
+#define MEMORY_DEVICE_VALID_BIT_MASK 0x80
+#define MEMORY_ROW_VALID_BIT_MASK 0x100
+#define MEMORY_COLUMN_VALID_BIT_MASK 0x200
+#define MEMORY_BIT_POSITION_VALID_BIT_MASK 0x400
+#define MEMORY_PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x800
+#define MEMORY_PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x1000
+#define MEMORY_PLATFORM_TARGET_VALID_BIT_MASK 0x2000
+#define MEMORY_PLATFORM_BUS_SPECIFIC_DATA_VALID_BIT_MASK 0x4000
+#define MEMORY_PLATFORM_OEM_ID_VALID_BIT_MASK 0x8000
+#define MEMORY_PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x10000
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT64 MemErrorStatus;
+ UINT64 MemPhysicalAddress;
+ UINT64 MemPhysicalAddressMask;
+ UINT16 MemNode;
+ UINT16 MemCard;
+ UINT16 MemModule;
+ UINT16 MemBank;
+ UINT16 MemDevice;
+ UINT16 MemRow;
+ UINT16 MemColumn;
+ UINT16 MemBitPosition;
+ UINT64 ModRequestorId;
+ UINT64 ModResponderId;
+ UINT64 ModTargetId;
+ UINT64 BusSpecificData;
+ UINT8 MemPlatformOemId[16];
+} SAL_MEMORY_ERROR_RECORD;
+
+//
+// PCI BUS Errors
+//
+#define SAL_PCI_BUS_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf4, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define PCI_BUS_ERROR_STATUS_VALID_BIT_MASK 0x1
+#define PCI_BUS_ERROR_TYPE_VALID_BIT_MASK 0x2
+#define PCI_BUS_ID_VALID_BIT_MASK 0x4
+#define PCI_BUS_ADDRESS_VALID_BIT_MASK 0x8
+#define PCI_BUS_DATA_VALID_BIT_MASK 0x10
+#define PCI_BUS_CMD_VALID_BIT_MASK 0x20
+#define PCI_BUS_REQUESTOR_ID_VALID_BIT_MASK 0x40
+#define PCI_BUS_RESPONDER_ID_VALID_BIT_MASK 0x80
+#define PCI_BUS_TARGET_VALID_BIT_MASK 0x100
+#define PCI_BUS_OEM_ID_VALID_BIT_MASK 0x200
+#define PCI_BUS_OEM_DATA_STRUCT_VALID_BIT_MASK 0x400
+
+typedef struct {
+ UINT8 BusNumber;
+ UINT8 SegmentNumber;
+} PCI_BUS_ID;
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT64 PciBusErrorStatus;
+ UINT16 PciBusErrorType;
+ PCI_BUS_ID PciBusId;
+ UINT32 Reserved;
+ UINT64 PciBusAddress;
+ UINT64 PciBusData;
+ UINT64 PciBusCommand;
+ UINT64 PciBusRequestorId;
+ UINT64 PciBusResponderId;
+ UINT64 PciBusTargetId;
+ UINT8 PciBusOemId[16];
+} SAL_PCI_BUS_ERROR_RECORD;
+
+//
+// PCI Component Errors
+//
+#define SAL_PCI_COMP_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf6, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define PCI_COMP_ERROR_STATUS_VALID_BIT_MASK 0x1
+#define PCI_COMP_INFO_VALID_BIT_MASK 0x2
+#define PCI_COMP_MEM_NUM_VALID_BIT_MASK 0x4
+#define PCI_COMP_IO_NUM_VALID_BIT_MASK 0x8
+#define PCI_COMP_REG_DATA_PAIR_VALID_BIT_MASK 0x10
+#define PCI_COMP_OEM_DATA_STRUCT_VALID_BIT_MASK 0x20
+
+typedef struct {
+ UINT16 VendorId;
+ UINT16 DeviceId;
+ UINT8 ClassCode[3];
+ UINT8 FunctionNumber;
+ UINT8 DeviceNumber;
+ UINT8 BusNumber;
+ UINT8 SegmentNumber;
+ UINT8 Reserved[5];
+} PCI_COMP_INFO;
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT64 PciComponentErrorStatus;
+ PCI_COMP_INFO PciComponentInfo;
+ UINT32 PciComponentMemNum;
+ UINT32 PciComponentIoNum;
+ UINT8 PciBusOemId[16];
+} SAL_PCI_COMPONENT_ERROR_RECORD;
+
+//
+// Sal Device Errors Info.
+//
+#define SAL_DEVICE_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf3, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define SEL_RECORD_ID_VALID_BIT_MASK 0x1;
+#define SEL_RECORD_TYPE_VALID_BIT_MASK 0x2;
+#define SEL_GENERATOR_ID_VALID_BIT_MASK 0x4;
+#define SEL_EVM_REV_VALID_BIT_MASK 0x8;
+#define SEL_SENSOR_TYPE_VALID_BIT_MASK 0x10;
+#define SEL_SENSOR_NUM_VALID_BIT_MASK 0x20;
+#define SEL_EVENT_DIR_TYPE_VALID_BIT_MASK 0x40;
+#define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;
+#define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;
+#define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT16 SelRecordId;
+ UINT8 SelRecordType;
+ UINT32 TimeStamp;
+ UINT16 GeneratorId;
+ UINT8 EvmRevision;
+ UINT8 SensorType;
+ UINT8 SensorNum;
+ UINT8 EventDirType;
+ UINT8 Data1;
+ UINT8 Data2;
+ UINT8 Data3;
+} SAL_DEVICE_ERROR_RECORD;
+
+//
+// Sal SMBIOS Device Errors Info.
+//
+#define SAL_SMBIOS_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf5, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define SMBIOS_EVENT_TYPE_VALID_BIT_MASK 0x1
+#define SMBIOS_LENGTH_VALID_BIT_MASK 0x2
+#define SMBIOS_TIME_STAMP_VALID_BIT_MASK 0x4
+#define SMBIOS_DATA_VALID_BIT_MASK 0x8
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT8 SmbiosEventType;
+ UINT8 SmbiosLength;
+ UINT8 SmbiosBcdTimeStamp[6];
+} SAL_SMBIOS_DEVICE_ERROR_RECORD;
+
+//
+// Sal Platform Specific Errors Info.
+//
+#define SAL_PLATFORM_ERROR_RECORD_INFO \
+ { \
+ 0xe429faf7, 0x3cb7, 0x11d4, {0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+#define PLATFORM_ERROR_STATUS_VALID_BIT_MASK 0x1
+#define PLATFORM_REQUESTOR_ID_VALID_BIT_MASK 0x2
+#define PLATFORM_RESPONDER_ID_VALID_BIT_MASK 0x4
+#define PLATFORM_TARGET_VALID_BIT_MASK 0x8
+#define PLATFORM_SPECIFIC_DATA_VALID_BIT_MASK 0x10
+#define PLATFORM_OEM_ID_VALID_BIT_MASK 0x20
+#define PLATFORM_OEM_DATA_STRUCT_VALID_BIT_MASK 0x40
+#define PLATFORM_OEM_DEVICE_PATH_VALID_BIT_MASK 0x80
+
+typedef struct {
+ SAL_SEC_HEADER SectionHeader;
+ UINT64 ValidationBits;
+ UINT64 PlatformErrorStatus;
+ UINT64 PlatformRequestorId;
+ UINT64 PlatformResponderId;
+ UINT64 PlatformTargetId;
+ UINT64 PlatformBusSpecificData;
+ UINT8 OemComponentId[16];
+} SAL_PLATFORM_SPECIFIC_ERROR_RECORD;
+
+//
+// Union of all the possible Sal Record Types
+//
+typedef union {
+ SAL_RECORD_HEADER *RecordHeader;
+ SAL_PROCESSOR_ERROR_RECORD *SalProcessorRecord;
+ SAL_PCI_BUS_ERROR_RECORD *SalPciBusRecord;
+ SAL_PCI_COMPONENT_ERROR_RECORD *SalPciComponentRecord;
+ SAL_DEVICE_ERROR_RECORD *ImpiRecord;
+ SAL_SMBIOS_DEVICE_ERROR_RECORD *SmbiosRecord;
+ SAL_PLATFORM_SPECIFIC_ERROR_RECORD *PlatformRecord;
+ SAL_MEMORY_ERROR_RECORD *MemoryRecord;
+ UINT8 *Raw;
+} SAL_ERROR_RECORDS_POINTERS;
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h new file mode 100644 index 0000000000..ff663c91b7 --- /dev/null +++ b/MdePkg/Include/Library/BaseLib.h @@ -0,0 +1,4861 @@ +/** @file
+ Memory-only library functions with no library constructor/destructor
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseLib.h
+
+**/
+
+#ifndef __BASE_LIB__
+#define __BASE_LIB__
+
+//
+// Definitions for architecture specific types
+// These include SPIN_LOCK and BASE_LIBRARY_JUMP_BUFFER
+//
+
+//
+// SPIN_LOCK
+//
+typedef UINTN SPIN_LOCK;
+
+#if defined (MDE_CPU_IA32)
+//
+// IA32 context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT32 Ebx;
+ UINT32 Esi;
+ UINT32 Edi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT32 Eip;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#elif defined (MDE_CPU_IPF)
+//
+// IPF context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 InitialUNAT;
+ UINT64 AfterSpillUNAT;
+ UINT64 PFS;
+ UINT64 BSP;
+ UINT64 RNAT;
+ UINT64 Predicates;
+ UINT64 LoopCount;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 SP;
+ UINT64 F2Low;
+ UINT64 F2High;
+ UINT64 F3Low;
+ UINT64 F3High;
+ UINT64 F4Low;
+ UINT64 F4High;
+ UINT64 F5Low;
+ UINT64 F5High;
+ UINT64 F16Low;
+ UINT64 F16High;
+ UINT64 F17Low;
+ UINT64 F17High;
+ UINT64 F18Low;
+ UINT64 F18High;
+ UINT64 F19Low;
+ UINT64 F19High;
+ UINT64 F20Low;
+ UINT64 F20High;
+ UINT64 F21Low;
+ UINT64 F21High;
+ UINT64 F22Low;
+ UINT64 F22High;
+ UINT64 F23Low;
+ UINT64 F23High;
+ UINT64 F24Low;
+ UINT64 F24High;
+ UINT64 F25Low;
+ UINT64 F25High;
+ UINT64 F26Low;
+ UINT64 F26High;
+ UINT64 F27Low;
+ UINT64 F27High;
+ UINT64 F28Low;
+ UINT64 F28High;
+ UINT64 F29Low;
+ UINT64 F29High;
+ UINT64 F30Low;
+ UINT64 F30High;
+ UINT64 F31Low;
+ UINT64 F31High;
+ UINT64 FPSR;
+ UINT64 BR0;
+ UINT64 BR1;
+ UINT64 BR2;
+ UINT64 BR3;
+ UINT64 BR4;
+ UINT64 BR5;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#elif defined (MDE_CPU_X64)
+//
+// X64 context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 Rbx;
+ UINT64 Rsp;
+ UINT64 Rbp;
+ UINT64 Rdi;
+ UINT64 Rsi;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 Rip;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#elif defined (MDE_CPU_EBC)
+//
+// EBC context buffer used by SetJump() and LongJump()
+//
+typedef struct {
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 IP;
+} BASE_LIBRARY_JUMP_BUFFER;
+
+#else
+#error Unknown Processor Type
+#endif
+
+//
+// String Services
+//
+
+/**
+ Copies one Null-terminated Unicode string to another Null-terminated Unicode
+ string and returns the new Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destiantion
+
+**/
+CHAR16 *
+EFIAPI
+StrCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ );
+
+/**
+ Copies one Null-terminated Unicode string with a maximum length to another
+ Null-terminated Unicode string with a maximum length and returns the new
+ Unicode string.
+
+ This function copies the contents of the Unicode string Source to the Unicode
+ string Destination, and returns Destination. At most, Length Unicode
+ characters are copied from Source to Destination. If Length is 0, then
+ Destination is returned unmodified. If Length is greater that the number of
+ Unicode characters in Source, then Destination is padded with Null Unicode
+ characters. If Source and Destination overlap, then the results are
+ undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to copy.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCpy (
+ OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ );
+
+/**
+ Returns the length of a Null-terminated Unicode string.
+
+ This function returns the number of Unicode characters in the Null-terminated
+ Unicode string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+StrLen (
+ IN CONST CHAR16 *String
+ );
+
+/**
+ Returns the size of a Null-terminated Unicode string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated Unicode
+ string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and String contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated Unicode string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+StrSize (
+ IN CONST CHAR16 *String
+ );
+
+/**
+ Compares two Null-terminated Unicode strings, and returns the difference
+ between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched Unicode character in SecondString subtracted from the first
+ mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString
+ );
+
+/**
+ Compares two Null-terminated Unicode strings with maximum lengths, and
+ returns the difference between the first mismatched Unicode characters.
+
+ This function compares the Null-terminated Unicode string FirstString to the
+ Null-terminated Unicode string SecondString. At most, Length Unicode
+ characters will be compared. If Length is 0, then 0 is returned. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched Unicode character in SecondString
+ subtracted from the first mismatched Unicode character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated Unicode string.
+ @param SecondString Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to compare.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+StrnCmp (
+ IN CONST CHAR16 *FirstString,
+ IN CONST CHAR16 *SecondString,
+ IN UINTN Length
+ );
+
+/**
+ Concatenates one Null-terminated Unicode string to another Null-terminated
+ Unicode string, and returns the concatenated Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination. The Null-terminated concatenated
+ Unicode String is returned. If Source and Destination overlap, then the
+ results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source
+ );
+
+/**
+ Concatenates one Null-terminated Unicode string with a maximum length to the
+ end of another Null-terminated Unicode string, and returns the concatenated
+ Unicode string.
+
+ This function concatenates two Null-terminated Unicode strings. The contents
+ of Null-terminated Unicode string Source are concatenated to the end of
+ Null-terminated Unicode string Destination, and Destination is returned. At
+ most, Length Unicode characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Destination contains more
+ than PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and Source contains more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+ If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination
+ and Source results in a Unicode string with more than
+ PcdMaximumUnicodeStringLength Unicode characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated Unicode string.
+ @param Source Pointer to a Null-terminated Unicode string.
+ @param Length Maximum number of Unicode characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR16 *
+EFIAPI
+StrnCat (
+ IN OUT CHAR16 *Destination,
+ IN CONST CHAR16 *Source,
+ IN UINTN Length
+ );
+
+/**
+ Copies one Null-terminated ASCII string to another Null-terminated ASCII
+ string and returns the new ASCII string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. If Source and Destination
+ overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ );
+
+/**
+ Copies one Null-terminated ASCII string with a maximum length to another
+ Null-terminated ASCII string with a maximum length and returns the new ASCII
+ string.
+
+ This function copies the contents of the ASCII string Source to the ASCII
+ string Destination, and returns Destination. At most, Length ASCII characters
+ are copied from Source to Destination. If Length is 0, then Destination is
+ returned unmodified. If Length is greater that the number of ASCII characters
+ in Source, then Destination is padded with Null ASCII characters. If Source
+ and Destination overlap, then the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to copy.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCpy (
+ OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ );
+
+/**
+ Returns the length of a Null-terminated ASCII string.
+
+ This function returns the number of ASCII characters in the Null-terminated
+ ASCII string specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The length of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrLen (
+ IN CONST CHAR8 *String
+ );
+
+/**
+ Returns the size of a Null-terminated ASCII string in bytes, including the
+ Null terminator.
+
+ This function returns the size, in bytes, of the Null-terminated ASCII string
+ specified by String.
+
+ If String is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and String contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param String Pointer to a Null-terminated ASCII string.
+
+ @return The size of String.
+
+**/
+UINTN
+EFIAPI
+AsciiStrSize (
+ IN CONST CHAR8 *String
+ );
+
+/**
+ Compares two Null-terminated ASCII strings, and returns the difference
+ between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. If FirstString is identical to
+ SecondString, then 0 is returned. Otherwise, the value returned is the first
+ mismatched ASCII character in SecondString subtracted from the first
+ mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ );
+
+/**
+ Performs a case insensitive comparison of two Null-terminated ASCII strings,
+ and returns the difference between the first mismatched ASCII characters.
+
+ This function performs a case insensitive comparison of the Null-terminated
+ ASCII string FirstString to the Null-terminated ASCII string SecondString. If
+ FirstString is identical to SecondString, then 0 is returned. Otherwise, the
+ value returned is the first mismatched lower case ASCII character in
+ SecondString subtracted from the first mismatched lower case ASCII character
+ in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString using case insensitive
+ comparisons.
+ @retval !=0 FirstString is not identical to SecondString using case
+ insensitive comparisons.
+
+**/
+INTN
+EFIAPI
+AsciiStriCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString
+ );
+
+/**
+ Compares two Null-terminated ASCII strings with maximum lengths, and returns
+ the difference between the first mismatched ASCII characters.
+
+ This function compares the Null-terminated ASCII string FirstString to the
+ Null-terminated ASCII string SecondString. At most, Length ASCII characters
+ will be compared. If Length is 0, then 0 is returned. If FirstString is
+ identical to SecondString, then 0 is returned. Otherwise, the value returned
+ is the first mismatched ASCII character in SecondString subtracted from the
+ first mismatched ASCII character in FirstString.
+
+ If FirstString is NULL, then ASSERT().
+ If SecondString is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and FirstString contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and SecondString contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+
+ @param FirstString Pointer to a Null-terminated ASCII string.
+ @param SecondString Pointer to a Null-terminated ASCII string.
+
+ @retval 0 FirstString is identical to SecondString.
+ @retval !=0 FirstString is not identical to SecondString.
+
+**/
+INTN
+EFIAPI
+AsciiStrnCmp (
+ IN CONST CHAR8 *FirstString,
+ IN CONST CHAR8 *SecondString,
+ IN UINTN Length
+ );
+
+/**
+ Concatenates one Null-terminated ASCII string to another Null-terminated
+ ASCII string, and returns the concatenated ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents of
+ Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination. The Null-terminated concatenated ASCII
+ String is returned.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Destination contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source
+ );
+
+/**
+ Concatenates one Null-terminated ASCII string with a maximum length to the
+ end of another Null-terminated ASCII string, and returns the concatenated
+ ASCII string.
+
+ This function concatenates two Null-terminated ASCII strings. The contents
+ of Null-terminated ASCII string Source are concatenated to the end of Null-
+ terminated ASCII string Destination, and Destination is returned. At most,
+ Length ASCII characters are concatenated from Source to the end of
+ Destination, and Destination is always Null-terminated. If Length is 0, then
+ Destination is returned unmodified. If Source and Destination overlap, then
+ the results are undefined.
+
+ If Destination is NULL, then ASSERT().
+ If Source is NULL, then ASSERT().
+ If Source and Destination overlap, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Destination contains more
+ than PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and Source contains more than
+ PcdMaximumAsciiStringLength ASCII characters, then ASSERT().
+ If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and
+ Source results in a ASCII string with more than PcdMaximumAsciiStringLength
+ ASCII characters, then ASSERT().
+
+ @param Destination Pointer to a Null-terminated ASCII string.
+ @param Source Pointer to a Null-terminated ASCII string.
+ @param Length Maximum number of ASCII characters to concatenate from
+ Source.
+
+ @return Destination
+
+**/
+CHAR8 *
+EFIAPI
+AsciiStrnCat (
+ IN OUT CHAR8 *Destination,
+ IN CONST CHAR8 *Source,
+ IN UINTN Length
+ );
+
+//
+// LIST_ENTRY definition
+//
+typedef struct _LIST_ENTRY LIST_ENTRY;
+
+struct _LIST_ENTRY {
+ LIST_ENTRY *ForwardLink;
+ LIST_ENTRY *BackLink;
+};
+
+//
+// Linked List Functions and Macros
+//
+
+/**
+ Initializes the head node of a doubly linked list that is declared as a
+ global variable in a module.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this macro, the other linked list functions
+ may be used to add and remove nodes from the linked list. This macro results
+ in smaller executables by initializing the linked list in the data section,
+ instead if calling the InitializeListHead() function to perform the
+ equivalent operation.
+
+ @param ListHead The head note of a list to initiailize.
+
+**/
+#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&ListHead, &ListHead}
+
+/**
+ Initializes the head node of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Initializes the forward and backward links of a new linked list. After
+ initializing a linked list with this function, the other linked list
+ functions may be used to add and remove nodes from the linked list. It is up
+ to the caller of this function to allocate the memory for ListHead.
+
+ If ListHead is NULL, then ASSERT().
+
+ @param ListHead A pointer to the head node of a new doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InitializeListHead (
+ IN LIST_ENTRY *ListHead
+ );
+
+/**
+ Adds a node to the beginning of a doubly linked list, and returns the pointer
+ to the head node of the doubly linked list.
+
+ Adds the node Entry at the beginning of the doubly linked list denoted by
+ ListHead, and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be inserted at the beginning
+ of a doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertHeadList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Entry
+ );
+
+/**
+ Adds a node to the end of a doubly linked list, and returns the pointer to
+ the head node of the doubly linked list.
+
+ Adds the node Entry to the end of the doubly linked list denoted by ListHead,
+ and returns ListHead.
+
+ If ListHead is NULL, then ASSERT().
+ If Entry is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and ListHead contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+ @param Entry A pointer to a node that is to be added at the end of the
+ doubly linked list.
+
+ @return ListHead
+
+**/
+LIST_ENTRY *
+EFIAPI
+InsertTailList (
+ IN LIST_ENTRY *ListHead,
+ IN LIST_ENTRY *Entry
+ );
+
+/**
+ Retrieves the first node of a doubly linked list.
+
+ Returns the first node of a doubly linked list. List must have been
+ initialized with InitializeListHead(). If List is empty, then NULL is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+
+ @return The first node of a doubly linked list.
+ @retval NULL The list is empty.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetFirstNode (
+ IN CONST LIST_ENTRY *List
+ );
+
+/**
+ Retrieves the next node of a doubly linked list.
+
+ Returns the node of a doubly linked list that follows Node. List must have
+ been initialized with InitializeListHead(). If List is empty, then List is
+ returned.
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @return Pointer to the next node if one exists. Otherwise a null value which
+ is actually List is returned.
+
+**/
+LIST_ENTRY *
+EFIAPI
+GetNextNode (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+/**
+ Checks to see if a doubly linked list is empty or not.
+
+ Checks to see if the doubly linked list is empty. If the linked list contains
+ zero nodes, this function returns TRUE. Otherwise, it returns FALSE.
+
+ If ListHead is NULL, then ASSERT().
+ If ListHead was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param ListHead A pointer to the head node of a doubly linked list.
+
+ @retval TRUE The linked list is empty.
+ @retval FALSE The linked list is not empty.
+
+**/
+BOOLEAN
+EFIAPI
+IsListEmpty (
+ IN CONST LIST_ENTRY *ListHead
+ );
+
+/**
+ Determines if a node in a doubly linked list is null.
+
+ Returns FALSE if Node is one of the nodes in the doubly linked list specified
+ by List. Otherwise, TRUE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List and Node is not equal to List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is one of the nodes in the doubly linked list.
+ @retval FALSE Node is not one of the nodes in the doubly linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNull (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+/**
+ Determines if a node the last node in a doubly linked list.
+
+ Returns TRUE if Node is the last node in the doubly linked list specified by
+ List. Otherwise, FALSE is returned. List must have been initialized with
+ InitializeListHead().
+
+ If List is NULL, then ASSERT().
+ If Node is NULL, then ASSERT().
+ If List was not initialized with InitializeListHead(), then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and List contains more than
+ PcdMaximumLinkedListLenth nodes, then ASSERT().
+ If Node is not a node in List, then ASSERT().
+
+ @param List A pointer to the head node of a doubly linked list.
+ @param Node A pointer to a node in the doubly linked list.
+
+ @retval TRUE Node is the last node in the linked list.
+ @retval FALSE Node is not the last node in the linked list.
+
+**/
+BOOLEAN
+EFIAPI
+IsNodeAtEnd (
+ IN CONST LIST_ENTRY *List,
+ IN CONST LIST_ENTRY *Node
+ );
+
+/**
+ Swaps the location of two nodes in a doubly linked list, and returns the
+ first node after the swap.
+
+ If FirstEntry is identical to SecondEntry, then SecondEntry is returned.
+ Otherwise, the location of the FirstEntry node is swapped with the location
+ of the SecondEntry node in a doubly linked list. SecondEntry must be in the
+ same double linked list as FirstEntry and that double linked list must have
+ been initialized with InitializeListHead(). SecondEntry is returned after the
+ nodes are swapped.
+
+ If FirstEntry is NULL, then ASSERT().
+ If SecondEntry is NULL, then ASSERT().
+ If SecondEntry and FirstEntry are not in the same linked list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ FirstEntry and SecondEntry contains more than PcdMaximumLinkedListLenth
+ nodes, then ASSERT().
+
+ @param FirstEntry A pointer to a node in a linked list.
+ @param SecondEntry A pointer to another node in the same linked list.
+
+**/
+LIST_ENTRY *
+EFIAPI
+SwapListEntries (
+ IN LIST_ENTRY *FirstEntry,
+ IN LIST_ENTRY *SecondEntry
+ );
+
+/**
+ Removes a node from a doubly linked list, and returns the node that follows
+ the removed node.
+
+ Removes the node Entry from a doubly linked list. It is up to the caller of
+ this function to release the memory used by this node if that is required. On
+ exit, the node following Entry in the doubly linked list is returned. If
+ Entry is the only node in the linked list, then the head node of the linked
+ list is returned.
+
+ If Entry is NULL, then ASSERT().
+ If Entry is the head node of an empty list, then ASSERT().
+ If PcdMaximumLinkedListLenth is not zero, and the linked list containing
+ Entry contains more than PcdMaximumLinkedListLenth nodes, then ASSERT().
+
+ @param Entry A pointer to a node in a linked list
+
+ @return Entry
+
+**/
+LIST_ENTRY *
+EFIAPI
+RemoveEntryList (
+ IN CONST LIST_ENTRY *Entry
+ );
+
+//
+// Math Services
+//
+
+/**
+ Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled
+ with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the left by Count bits. The
+ low Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift left.
+ @param Count The number of bits to shift left.
+
+ @return Operand << Count
+
+**/
+UINT64
+EFIAPI
+LShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. This high bits are
+ filled with zeros. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to zero. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+RShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled
+ with original integer's bit 63. The shifted value is returned.
+
+ This function shifts the 64-bit value Operand to the right by Count bits. The
+ high Count bits are set to bit 63 of Operand. The shifted value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to shift right.
+ @param Count The number of bits to shift right.
+
+ @return Operand >> Count
+
+**/
+UINT64
+EFIAPI
+ARShiftU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT32
+EFIAPI
+LRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits
+ with the low bits that were rotated.
+
+ This function rotates the 32-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 31, then ASSERT().
+
+ @param Operand The 32-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT32
+EFIAPI
+RRotU32 (
+ IN UINT32 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits
+ with the high bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the left by Count bits. The
+ low Count bits are fill with the high Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate left.
+ @param Count The number of bits to rotate left.
+
+ @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+LRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits
+ with the high low bits that were rotated.
+
+ This function rotates the 64-bit value Operand to the right by Count bits.
+ The high Count bits are fill with the low Count bits of Operand. The rotated
+ value is returned.
+
+ If Count is greater than 63, then ASSERT().
+
+ @param Operand The 64-bit operand to rotate right.
+ @param Count The number of bits to rotate right.
+
+ @return Operand >>> Count
+
+**/
+UINT64
+EFIAPI
+RRotU64 (
+ IN UINT64 Operand,
+ IN UINTN Count
+ );
+
+/**
+ Returns the bit position of the lowest bit set in a 32-bit value.
+
+ This function computes the bit position of the lowest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet32 (
+ IN UINT32 Operand
+ );
+
+/**
+ Returns the bit position of the lowest bit set in a 64-bit value.
+
+ This function computes the bit position of the lowest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the lowest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+LowBitSet64 (
+ IN UINT64 Operand
+ );
+
+/**
+ Returns the bit position of the highest bit set in a 32-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 32-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 31 is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet32 (
+ IN UINT32 Operand
+ );
+
+/**
+ Returns the bit position of the highest bit set in a 64-bit value. Equivalent
+ to log2(x).
+
+ This function computes the bit position of the highest bit set in the 64-bit
+ value specified by Operand. If Operand is zero, then -1 is returned.
+ Otherwise, a value between 0 and 63 is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return Position of the highest bit set in Operand if found.
+ @retval -1 Operand is zero.
+
+**/
+INTN
+EFIAPI
+HighBitSet64 (
+ IN UINT64 Operand
+ );
+
+/**
+ Returns the value of the highest bit set in a 32-bit value. Equivalent to
+ 1 << HighBitSet32(x).
+
+ This function computes the value of the highest bit set in the 32-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 32-bit operand to evaluate.
+
+ @return 1 << HighBitSet32(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT32
+EFIAPI
+GetPowerOfTwo32 (
+ IN UINT32 Operand
+ );
+
+/**
+ Returns the value of the highest bit set in a 64-bit value. Equivalent to
+ 1 << HighBitSet64(x).
+
+ This function computes the value of the highest bit set in the 64-bit value
+ specified by Operand. If Operand is zero, then zero is returned.
+
+ @param Operand The 64-bit operand to evaluate.
+
+ @return 1 << HighBitSet64(Operand)
+ @retval 0 Operand is zero.
+
+**/
+UINT64
+EFIAPI
+GetPowerOfTwo64 (
+ IN UINT64 Operand
+ );
+
+/**
+ Switches the endianess of a 16-bit integer.
+
+ This function swaps the bytes in a 16-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 16-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT16
+EFIAPI
+SwapBytes16 (
+ IN UINT16 Value
+ );
+
+/**
+ Switches the endianess of a 32-bit integer.
+
+ This function swaps the bytes in a 32-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 32-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT32
+EFIAPI
+SwapBytes32 (
+ IN UINT32 Value
+ );
+
+/**
+ Switches the endianess of a 64-bit integer.
+
+ This function swaps the bytes in a 64-bit unsigned value to switch the value
+ from little endian to big endian or vice versa. The byte swapped value is
+ returned.
+
+ @param Operand A 64-bit unsigned value.
+
+ @return The byte swaped Operand.
+
+**/
+UINT64
+EFIAPI
+SwapBytes64 (
+ IN UINT64 Value
+ );
+
+/**
+ Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 32-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 32-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x32 (
+ IN UINT64 Multiplicand,
+ IN UINT32 Multiplier
+ );
+
+/**
+ Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and
+ generates a 64-bit unsigned result.
+
+ This function multiples the 64-bit unsigned value Multiplicand by the 64-bit
+ unsigned value Multiplier and generates a 64-bit unsigned result. This 64-
+ bit unsigned result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit unsigned value.
+ @param Multiplier A 64-bit unsigned value.
+
+ @return Multiplicand * Multiplier
+
+**/
+UINT64
+EFIAPI
+MultU64x64 (
+ IN UINT64 Multiplicand,
+ IN UINT64 Multiplier
+ );
+
+/**
+ Multiples a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result.
+
+ This function multiples the 64-bit signed value Multiplicand by the 64-bit
+ signed value Multiplier and generates a 64-bit signed result. This 64-bit
+ signed result is returned.
+
+ If the result overflows, then ASSERT().
+
+ @param Multiplicand A 64-bit signed value.
+ @param Multiplier A 64-bit signed value.
+
+ @return Multiplicand * Multiplier
+
+**/
+INT64
+EFIAPI
+MultS64x64 (
+ IN INT64 Multiplicand,
+ IN INT64 Multiplier
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. This
+ function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 32-bit remainder. This function
+ returns the 32-bit unsigned remainder.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+
+ @return Dividend % Divisor
+
+**/
+UINT32
+EFIAPI
+ModU64x32 (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 32-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 32-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 32-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 32-bit unsigned value.
+ @param Remainder A pointer to a 32-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x32Remainder (
+ IN UINT64 Dividend,
+ IN UINT32 Divisor,
+ OUT UINT32 *Remainder OPTIONAL
+ );
+
+/**
+ Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates
+ a 64-bit unsigned result and an optional 64-bit unsigned remainder.
+
+ This function divides the 64-bit unsigned value Dividend by the 64-bit
+ unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder
+ is not NULL, then the 64-bit unsigned remainder is returned in Remainder.
+ This function returns the 64-bit unsigned quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit unsigned value.
+ @param Divisor A 64-bit unsigned value.
+ @param Remainder A pointer to a 64-bit unsigned value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+UINT64
+EFIAPI
+DivU64x64Remainder (
+ IN UINT64 Dividend,
+ IN UINT64 Divisor,
+ OUT UINT64 *Remainder OPTIONAL
+ );
+
+/**
+ Divides a 64-bit signed integer by a 64-bit signed integer and generates a
+ 64-bit signed result and a optional 64-bit signed remainder.
+
+ This function divides the 64-bit signed value Dividend by the 64-bit signed
+ value Divisor and generates a 64-bit signed quotient. If Remainder is not
+ NULL, then the 64-bit signed remainder is returned in Remainder. This
+ function returns the 64-bit signed quotient.
+
+ If Divisor is 0, then ASSERT().
+
+ @param Dividend A 64-bit signed value.
+ @param Divisor A 64-bit signed value.
+ @param Remainder A pointer to a 64-bit signed value. This parameter is
+ optional and may be NULL.
+
+ @return Dividend / Divisor
+
+**/
+INT64
+EFIAPI
+DivS64x64Remainder (
+ IN INT64 Dividend,
+ IN INT64 Divisor,
+ OUT INT64 *Remainder OPTIONAL
+ );
+
+/**
+ Reads a 16-bit value from memory that may be unaligned.
+
+ This function returns the 16-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+
+ @return *Uint16
+
+**/
+UINT16
+EFIAPI
+ReadUnaligned16 (
+ IN CONST UINT16 *Uint16
+ );
+
+/**
+ Writes a 16-bit value to memory that may be unaligned.
+
+ This function writes the 16-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 16-bit value that may be unaligned.
+ @param Value 16-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT16
+EFIAPI
+WriteUnaligned16 (
+ OUT UINT16 *Uint16,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 24-bit value from memory that may be unaligned.
+
+ This function returns the 24-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned24 (
+ IN CONST UINT32 *Buffer
+ );
+
+/**
+ Writes a 24-bit value to memory that may be unaligned.
+
+ This function writes the 24-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 24-bit value that may be unaligned.
+ @param Value 24-bit value to write to Buffer.
+
+ @return The value written.
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned24 (
+ OUT UINT32 *Buffer,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit value from memory that may be unaligned.
+
+ This function returns the 32-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+
+ @return *Uint32
+
+**/
+UINT32
+EFIAPI
+ReadUnaligned32 (
+ IN CONST UINT32 *Uint32
+ );
+
+/**
+ Writes a 32-bit value to memory that may be unaligned.
+
+ This function writes the 32-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 32-bit value that may be unaligned.
+ @param Value 32-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+WriteUnaligned32 (
+ OUT UINT32 *Uint32,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 64-bit value from memory that may be unaligned.
+
+ This function returns the 64-bit value pointed to by Buffer. The function
+ guarantees that the read operation does not produce an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+
+ @return *Uint64
+
+**/
+UINT64
+EFIAPI
+ReadUnaligned64 (
+ IN CONST UINT64 *Uint64
+ );
+
+/**
+ Writes a 64-bit value to memory that may be unaligned.
+
+ This function writes the 64-bit value specified by Value to Buffer. Value is
+ returned. The function guarantees that the write operation does not produce
+ an alignment fault.
+
+ If the Buffer is NULL, then ASSERT().
+
+ @param Buffer Pointer to a 64-bit value that may be unaligned.
+ @param Value 64-bit value to write to Buffer.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+WriteUnaligned64 (
+ OUT UINT64 *Uint64,
+ IN UINT64 Value
+ );
+
+//
+// Bit Field Functions
+//
+
+/**
+ Returns a bit field from an 8-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The bit field read.
+
+**/
+UINT8
+EFIAPI
+BitFieldRead8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an 8-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 8-bit value is
+ returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldWrite8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAnd8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field from an 8-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 8-bit value is returned.
+
+ If 8-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 8-bit value.
+
+**/
+UINT8
+EFIAPI
+BitFieldAndThenOr8 (
+ IN UINT8 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Returns a bit field from a 16-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The bit field read.
+
+**/
+UINT16
+EFIAPI
+BitFieldRead16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a 16-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 16-bit value is
+ returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldWrite16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAnd16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field from a 16-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 16-bit value is returned.
+
+ If 16-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 16-bit value.
+
+**/
+UINT16
+EFIAPI
+BitFieldAndThenOr16 (
+ IN UINT16 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Returns a bit field from a 32-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read.
+
+**/
+UINT32
+EFIAPI
+BitFieldRead32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a 32-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 32-bit value is
+ returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldWrite32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAnd32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field from a 32-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 32-bit value is returned.
+
+ If 32-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 32-bit value.
+
+**/
+UINT32
+EFIAPI
+BitFieldAndThenOr32 (
+ IN UINT32 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Returns a bit field from a 64-bit value.
+
+ Returns the bitfield specified by the StartBit and the EndBit from Operand.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The bit field read.
+
+**/
+UINT64
+EFIAPI
+BitFieldRead64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a 64-bit value, and returns the result.
+
+ Writes Value to the bit field specified by the StartBit and the EndBit in
+ Operand. All other bits in Operand are preserved. The new 64-bit value is
+ returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldWrite64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the
+ result.
+
+ Performs a bitwise inclusive OR between the bit field specified by StartBit
+ and EndBit in Operand and the value specified by OrData. All other bits in
+ Operand are preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND, and returns
+ the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAnd64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field from a 64-bit value, performs a bitwise AND followed by a
+ bitwise OR, and returns the result.
+
+ Performs a bitwise AND between the bit field specified by StartBit and EndBit
+ in Operand and the value specified by AndData, followed by a bitwise
+ inclusive OR with value specified by OrData. All other bits in Operand are
+ preserved. The new 64-bit value is returned.
+
+ If 64-bit operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Operand Operand on which to perform the bitfield operation.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the value.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The new 64-bit value.
+
+**/
+UINT64
+EFIAPI
+BitFieldAndThenOr64 (
+ IN UINT64 Operand,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+//
+// Base Library Synchronization Functions
+//
+
+/**
+ Retrieves the architecture specific spin lock alignment requirements for
+ optimal spin lock performance.
+
+ This function retrieves the spin lock alignment requirements for optimal
+ performance on a given CPU architecture. The spin lock alignment must be a
+ power of two and is returned by this function. If there are no alignment
+ requirements, then 1 must be returned. The spin lock synchronization
+ functions must function correctly if the spin lock size and alignment values
+ returned by this function are not used at all. These values are hints to the
+ consumers of the spin lock synchronization functions to obtain optimal spin
+ lock performance.
+
+ @return The architecture specific spin lock alignment.
+
+**/
+UINTN
+EFIAPI
+GetSpinLockProperties (
+ VOID
+ );
+
+/**
+ Initializes a spin lock to the released state and returns the spin lock.
+
+ This function initializes the spin lock specified by SpinLock to the released
+ state, and returns SpinLock. Optimal performance can be achieved by calling
+ GetSpinLockProperties() to determine the size and alignment requirements for
+ SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to initialize to the released
+ state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+InitializeSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+/**
+ Waits until a spin lock can be placed in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns SpinLock. Otherwise, this function waits
+ indefinitely for the spin lock to be released, and then places it in the
+ acquired state and returns SpinLock. All state transitions of SpinLock must
+ be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+ If PcdSpinLockTimeout is not zero, and SpinLock is can not be acquired in
+ PcdSpinLockTimeout microseconds, then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+AcquireSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+/**
+ Attempts to place a spin lock in the acquired state.
+
+ This function checks the state of the spin lock specified by SpinLock. If
+ SpinLock is in the released state, then this function places SpinLock in the
+ acquired state and returns TRUE. Otherwise, FALSE is returned. All state
+ transitions of SpinLock must be performed using MP safe mechanisms.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to place in the acquired state.
+
+ @retval TRUE SpinLock was placed in the acquired state.
+ @retval FALSE SpinLock could not be acquired.
+
+**/
+BOOLEAN
+EFIAPI
+AcquireSpinLockOrFail (
+ IN SPIN_LOCK *SpinLock
+ );
+
+/**
+ Releases a spin lock.
+
+ This function places the spin lock specified by SpinLock in the release state
+ and returns SpinLock.
+
+ If SpinLock is NULL, then ASSERT().
+ If SpinLock was not initialized with InitializeSpinLock(), then ASSERT().
+
+ @param SpinLock A pointer to the spin lock to release.
+
+ @return SpinLock
+
+**/
+SPIN_LOCK *
+EFIAPI
+ReleaseSpinLock (
+ IN SPIN_LOCK *SpinLock
+ );
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedIncrement (
+ IN UINT32 *Value
+ );
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decremented value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decremented value.
+
+**/
+UINT32
+EFIAPI
+InterlockedDecrement (
+ IN UINT32 *Value
+ );
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT32
+EFIAPI
+InterlockedCompareExchange32 (
+ IN UINT32 *Value,
+ IN UINT32 CompareValue,
+ IN UINT32 ExchangeValue
+ );
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+UINT64
+EFIAPI
+InterlockedCompareExchange64 (
+ IN UINT64 *Value,
+ IN UINT64 CompareValue,
+ IN UINT64 ExchangeValue
+ );
+
+/**
+ Performs an atomic compare exchange operation on a pointer value.
+
+ Performs an atomic compare exchange operation on the pointer value specified
+ by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to
+ CompareValue, then Value is returned. The compare exchange operation must be
+ performed using MP safe mechanisms.
+
+ If Value is NULL, then ASSERT().
+
+ @param Value A pointer to the pointer value for the compare exchange
+ operation.
+ @param CompareValue Pointer value used in compare operation.
+ @param ExchangeValue Pointer value used in exchange operation.
+
+**/
+VOID *
+EFIAPI
+InterlockedCompareExchangePointer (
+ IN VOID **Value,
+ IN VOID *CompareValue,
+ IN VOID *ExchangeValue
+ );
+
+//
+// Base Library CPU Functions
+//
+typedef
+VOID
+(EFIAPI *SWITCH_STACK_ENTRY_POINT) (
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2 OPTIONAL
+ );
+
+/**
+ Used to serialize load and store operations.
+
+ All loads and stores that proceed calls to this function are guaranteed to be
+ globally visible when this function returns.
+
+**/
+VOID
+EFIAPI
+MemoryFence (
+ VOID
+ );
+
+/**
+ Saves the current CPU context that can be restored with a call to LongJump()
+ and returns 0.
+
+ Saves the current CPU context in the buffer specified by JumpBuffer and
+ returns 0. The initial call to SetJump() must always return 0. Subsequent
+ calls to LongJump() cause a non-zero value to be returned by SetJump().
+
+ If JumpBuffer is NULL, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+
+ @retval 0 Indicates a return from SetJump().
+
+**/
+UINTN
+EFIAPI
+SetJump (
+ OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer
+ );
+
+/**
+ Restores the CPU context that was saved with SetJump().
+
+ Restores the CPU context from the buffer specified by JumpBuffer. This
+ function never returns to the caller. Instead is resumes execution based on
+ the state of JumpBuffer.
+
+ If JumpBuffer is NULL, then ASSERT().
+ If Value is 0, then ASSERT().
+
+ @param JumpBuffer A pointer to CPU context buffer.
+ @param Value The value to return when the SetJump() context is
+ restored and must be non-zero.
+
+**/
+VOID
+EFIAPI
+LongJump (
+ IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,
+ IN UINTN Value
+ );
+
+/**
+ Enables CPU interrupts.
+
+ Enables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+EnableInterrupts (
+ VOID
+ );
+
+/**
+ Disables CPU interrupts.
+
+ Disables CPU interrupts.
+
+**/
+VOID
+EFIAPI
+DisableInterrupts (
+ VOID
+ );
+
+/**
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ Disables CPU interrupts and returns the interrupt state prior to the disable
+ operation.
+
+ @retval TRUE CPU interrupts were enabled on entry to this call.
+ @retval FALSE CPU interrupts were disabled on entry to this call.
+
+**/
+BOOLEAN
+EFIAPI
+SaveAndDisableInterrupts (
+ VOID
+ );
+
+/**
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+ Enables CPU interrupts for the smallest window required to capture any
+ pending interrupts.
+
+**/
+VOID
+EFIAPI
+EnableDisableInterrupts (
+ VOID
+ );
+
+/**
+ Retrieves the current CPU interrupt state.
+
+ Retrieves the current CPU interrupt state. Returns TRUE is interrupts are
+ currently enabled. Otherwise returns FALSE.
+
+ @retval TRUE CPU interrupts are enabled.
+ @retval FALSE CPU interrupts are disabled.
+
+**/
+BOOLEAN
+EFIAPI
+GetInterruptState (
+ VOID
+ );
+
+/**
+ Set the current CPU interrupt state.
+
+ Sets the current CPU interrupt state to the state specified by
+ InterruptState. If InterruptState is TRUE, then interrupts are enabled. If
+ InterruptState is FALSE, then interrupts are disabled. InterruptState is
+ returned.
+
+ @param InterruptState TRUE if interrupts should enabled. FALSE if
+ interrupts should be disabled.
+
+ @return InterruptState
+
+**/
+BOOLEAN
+EFIAPI
+SetInterruptState (
+ IN BOOLEAN InterruptState
+ );
+
+/**
+ Places the CPU in a sleep state until an interrupt is received.
+
+ Places the CPU in a sleep state until an interrupt is received. If interrupts
+ are disabled prior to calling this function, then the CPU will be placed in a
+ sleep state indefinitely.
+
+**/
+VOID
+EFIAPI
+CpuSleep (
+ VOID
+ );
+
+/**
+ Requests CPU to pause for a short period of time.
+
+ Requests CPU to pause for a short period of time. Typically used in MP
+ systems to prevent memory starvation while waiting for a spin lock.
+
+**/
+VOID
+EFIAPI
+CpuPause (
+ VOID
+ );
+
+/**
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+ Flushes all the Translation Lookaside Buffers(TLB) entries in a CPU.
+
+**/
+VOID
+EFIAPI
+CpuFlushTlb (
+ VOID
+ );
+
+/**
+ Transfers control to a function starting with a new stack.
+
+ Transfers control to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ @param EntryPoint A pointer to function to call with the new stack.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function.
+
+**/
+VOID
+EFIAPI
+SwitchStack (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+/**
+ Generates a breakpoint on the CPU.
+
+ Generates a breakpoint on the CPU. The breakpoint must be implemented such
+ that code can resume normal execution after the breakpoint.
+
+**/
+VOID
+EFIAPI
+CpuBreakpoint (
+ VOID
+ );
+
+/**
+ Executes an infinite loop.
+
+ Forces the CPU to execute an infinite loop. A debugger may be used to skip
+ past the loop and the code that follows the loop must execute properly. This
+ implies that the infinite loop must not cause the code that follow it to be
+ optimized away.
+
+**/
+VOID
+EFIAPI
+CpuDeadLoop (
+ VOID
+ );
+
+//
+// IA32 and X64 Specific Functions
+//
+//
+// Byte packed structure for 16-bit Real Mode EFLAGS
+//
+typedef union {
+ struct {
+ UINT32 CF:1; // Carry Flag
+ UINT32 Reserved_0:1; // Reserved
+ UINT32 PF:1; // Parity Flag
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AF:1; // Auxiliary Carry Flag
+ UINT32 Reserved_2:1; // Reserved
+ UINT32 ZF:1; // Zero Flag
+ UINT32 SF:1; // Sign Flag
+ UINT32 TF:1; // Trap Flag
+ UINT32 IF:1; // Interrupt Enable Flag
+ UINT32 DF:1; // Direction Flag
+ UINT32 OF:1; // Overflow Flag
+ UINT32 IOPL:2; // I/O Privilege Level
+ UINT32 NT:1; // Nested Task
+ UINT32 Reserved_3:1; // Reserved
+ } Bits;
+ UINT16 Uint16;
+} IA32_FLAGS16;
+
+//
+// Byte packed structure for EFLAGS/RFLAGS
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 CF:1; // Carry Flag
+ UINT32 Reserved_0:1; // Reserved
+ UINT32 PF:1; // Parity Flag
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AF:1; // Auxiliary Carry Flag
+ UINT32 Reserved_2:1; // Reserved
+ UINT32 ZF:1; // Zero Flag
+ UINT32 SF:1; // Sign Flag
+ UINT32 TF:1; // Trap Flag
+ UINT32 IF:1; // Interrupt Enable Flag
+ UINT32 DF:1; // Direction Flag
+ UINT32 OF:1; // Overflow Flag
+ UINT32 IOPL:2; // I/O Privilege Level
+ UINT32 NT:1; // Nested Task
+ UINT32 Reserved_3:1; // Reserved
+ UINT32 RF:1; // Resume Flag
+ UINT32 VM:1; // Virtual 8086 Mode
+ UINT32 AC:1; // Alignment Check
+ UINT32 VIF:1; // Virtual Interrupt Flag
+ UINT32 VIP:1; // Virtual Interrupt Pending
+ UINT32 ID:1; // ID Flag
+ UINT32 Reserved_4:10; // Reserved
+ } Bits;
+ UINTN UintN;
+} IA32_EFLAGS32;
+
+//
+// Byte packed structure for Control Register 0 (CR0)
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 PE:1; // Protection Enable
+ UINT32 MP:1; // Monitor Coprocessor
+ UINT32 EM:1; // Emulation
+ UINT32 TS:1; // Task Switched
+ UINT32 ET:1; // Extension Type
+ UINT32 NE:1; // Numeric Error
+ UINT32 Reserved_0:10; // Reserved
+ UINT32 WP:1; // Write Protect
+ UINT32 Reserved_1:1; // Reserved
+ UINT32 AM:1; // Alignment Mask
+ UINT32 Reserved_2:10; // Reserved
+ UINT32 NW:1; // Mot Write-through
+ UINT32 CD:1; // Cache Disable
+ UINT32 PG:1; // Paging
+ } Bits;
+ UINTN UintN;
+} IA32_CR0;
+
+//
+// Byte packed structure for Control Register 4 (CR4)
+// 32-bits on IA-32
+// 64-bits on X64. The upper 32-bits on X64 are reserved
+//
+typedef union {
+ struct {
+ UINT32 VME:1; // Virtual-8086 Mode Extensions
+ UINT32 PVI:1; // Protected-Mode Virtual Interrupts
+ UINT32 TSD:1; // Time Stamp Disable
+ UINT32 DE:1; // Debugging Extensions
+ UINT32 PSE:1; // Page Size Extensions
+ UINT32 PAE:1; // Physical Address Extension
+ UINT32 MCE:1; // Machine Check Enable
+ UINT32 PGE:1; // Page Global Enable
+ UINT32 PCE:1; // Performance Monitoring Counter
+ // Enable
+ UINT32 OSFXSR:1; // Operating System Support for
+ // FXSAVE and FXRSTOR instructions
+ UINT32 OSXMMEXCPT:1; // Operating System Support for
+ // Unmasked SIMD Floating Point
+ // Exceptions
+ UINT32 Reserved_0:2; // Reserved
+ UINT32 VMXE:1; // VMX Enable
+ UINT32 Reserved_1:18; // Reseved
+ } Bits;
+ UINTN UintN;
+} IA32_CR4;
+
+//
+// Byte packed structure for an IDTR, GDTR, LDTR descriptor
+//
+typedef struct {
+ UINT16 Limit;
+ UINTN Base;
+} IA32_DESCRIPTOR;
+
+#define IA32_IDT_GATE_TYPE_TASK 0x85
+#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86
+#define IA32_IDT_GATE_TYPE_TRAP_16 0x87
+#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E
+#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F
+
+//
+// Byte packed structure for an Interrupt Gate Descriptor
+//
+typedef union {
+ struct {
+ UINT32 OffsetLow:16; // Offset bits 15..0
+ UINT32 Selector:16; // Selector
+ UINT32 Reserved_0:8; // Reserved
+ UINT32 GateType:8; // Gate Type. See #defines above
+ UINT32 OffsetHigh:16; // Offset bits 31..16
+ } Bits;
+ UINT64 Uint64;
+} IA32_IDT_GATE_DESCRIPTOR;
+
+//
+// Byte packed structure for an FP/SSE/SSE2 context
+//
+typedef struct {
+ UINT8 Buffer[512];
+} IA32_FX_BUFFER;
+
+//
+// Structures for the 16-bit real mode thunks
+//
+typedef struct {
+ UINT32 Reserved1;
+ UINT32 Reserved2;
+ UINT32 Reserved3;
+ UINT32 Reserved4;
+ UINT8 BL;
+ UINT8 BH;
+ UINT16 Reserved5;
+ UINT8 DL;
+ UINT8 DH;
+ UINT16 Reserved6;
+ UINT8 CL;
+ UINT8 CH;
+ UINT16 Reserved7;
+ UINT8 AL;
+ UINT8 AH;
+ UINT16 Reserved8;
+} IA32_BYTE_REGS;
+
+typedef struct {
+ UINT16 DI;
+ UINT16 Reserved1;
+ UINT16 SI;
+ UINT16 Reserved2;
+ UINT16 BP;
+ UINT16 Reserved3;
+ UINT16 SP;
+ UINT16 Reserved4;
+ UINT16 BX;
+ UINT16 Reserved5;
+ UINT16 DX;
+ UINT16 Reserved6;
+ UINT16 CX;
+ UINT16 Reserved7;
+ UINT16 AX;
+ UINT16 Reserved8;
+} IA32_WORD_REGS;
+
+typedef struct {
+ UINT32 EDI;
+ UINT32 ESI;
+ UINT32 EBP;
+ UINT32 ESP;
+ UINT32 EBX;
+ UINT32 EDX;
+ UINT32 ECX;
+ UINT32 EAX;
+ UINT16 DS;
+ UINT16 ES;
+ UINT16 FS;
+ UINT16 GS;
+ IA32_EFLAGS32 EFLAGS;
+ UINT32 Eip;
+ UINT16 CS;
+ UINT16 SS;
+} IA32_DWORD_REGS;
+
+typedef union {
+ IA32_DWORD_REGS E;
+ IA32_WORD_REGS X;
+ IA32_BYTE_REGS H;
+} IA32_REGISTER_SET;
+
+//
+// Byte packed structure for an 16-bit real mode thunks
+//
+typedef struct {
+ IA32_REGISTER_SET RealModeState;
+ VOID *RealModeBuffer;
+ UINTN RealModeBufferSize;
+ VOID *CallStack;
+ UINTN CallStackSize;
+ VOID *RealModeCode;
+ UINTN RealModeCodeSize;
+} THUNK_CONTEXT;
+
+/**
+ Retrieves CPUID information.
+
+ Executes the CPUID instruction with EAX set to the value specified by Index.
+ This function always returns Index.
+ If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
+ If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
+ If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
+ If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit value to load into EAX prior to invoking the CPUID
+ instruction.
+ @param Eax Pointer to the 32-bit EAX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Ebx Pointer to the 32-bit EBX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Ecx Pointer to the 32-bit ECX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+ @param Edx Pointer to the 32-bit EDX value returned by the CPUID
+ instruction. This is an optional parameter that may be NULL.
+
+ @return Index
+
+**/
+UINT32
+EFIAPI
+AsmCpuid (
+ IN UINT32 Index,
+ OUT UINT32 *Eax, OPTIONAL
+ OUT UINT32 *Ebx, OPTIONAL
+ OUT UINT32 *Ecx, OPTIONAL
+ OUT UINT32 *Edx OPTIONAL
+ );
+
+/**
+ Returns the lower 32-bits of a Machine Specific Register(MSR).
+
+ Reads and returns the lower 32-bits of the MSR specified by Index.
+ No parameter checking is performed on Index, and some Index values may cause
+ CPU exceptions. The caller must either guarantee that Index is valid, or the
+ caller must set up exception handlers to catch the exceptions. This function
+ is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The lower 32 bits of the MSR identified by Index.
+
+**/
+UINT32
+EFIAPI
+AsmReadMsr32 (
+ IN UINT32 Index
+ );
+
+/**
+ Zero-extend a 32-bit value and writes it to a Machine Specific Register(MSR).
+
+ Writes the 32-bit value specified by Value to the MSR specified by Index. The
+ upper 32-bits of the MSR write are set to zero. The 32-bit value written to
+ the MSR is returned. No parameter checking is performed on Index or Value,
+ and some of these may cause CPU exceptions. The caller must either guarantee
+ that Index and Value are valid, or the caller must establish proper exception
+ handlers. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 32-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+AsmWriteMsr32 (
+ IN UINT32 Index,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and
+ writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the lower 32-bits of the read result and the value specified by
+ OrData, and writes the result to the 64-bit MSR specified by Index. The lower
+ 32-bits of the value written to the MSR is returned. No parameter checking is
+ performed on Index or OrData, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and OrData are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrOr32 (
+ IN UINT32 Index,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes
+ the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData, and
+ writes the result to the 64-bit MSR specified by Index. The lower 32-bits of
+ the value written to the MSR is returned. No parameter checking is performed
+ on Index or AndData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index and AndData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAnd32 (
+ IN UINT32 Index,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR
+ on the lower 32-bits, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ lower 32-bits of the read result and the value specified by AndData
+ preserving the upper 32-bits, performs a bitwise inclusive OR between the
+ result of the AND operation and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Address. The lower 32-bits of the value
+ written to the MSR is returned. No parameter checking is performed on Index,
+ AndData, or OrData, and some of these may cause CPU exceptions. The caller
+ must either guarantee that Index, AndData, and OrData are valid, or the
+ caller must establish proper exception handlers. This function is only
+ available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrAndThenOr32 (
+ IN UINT32 Index,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned. The caller must either guarantee that Index is valid, or the caller
+ must set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The bit field read from the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldRead32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination MSR are preserved. The lower 32-bits of the MSR written is
+ returned. Extra left bits in Value are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldWrite32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The lower 32-bits of the value
+ written to the MSR are returned. Extra left bits in OrData are stripped. The
+ caller must either guarantee that Index and the data written is valid, or
+ the caller must set up exception handlers to catch the exceptions. This
+ function is only available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The lower 32-bits of the value written to the
+ MSR are returned. Extra left bits in AndData are stripped. The caller must
+ either guarantee that Index and the data written is valid, or the caller must
+ set up exception handlers to catch the exceptions. This function is only
+ available on IA-32 and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAnd32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a
+ bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ lower 32-bits of the value written to the MSR are returned. Extra left bits
+ in both AndData and OrData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The lower 32-bit of the value written to the MSR.
+
+**/
+UINT32
+EFIAPI
+AsmMsrBitFieldAndThenOr32 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Returns a 64-bit Machine Specific Register(MSR).
+
+ Reads and returns the 64-bit MSR specified by Index. No parameter checking is
+ performed on Index, and some Index values may cause CPU exceptions. The
+ caller must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to read.
+
+ @return The value of the MSR identified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadMsr64 (
+ IN UINT32 Index
+ );
+
+/**
+ Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
+ value.
+
+ Writes the 64-bit value specified by Value to the MSR specified by Index. The
+ 64-bit value written to the MSR is returned. No parameter checking is
+ performed on Index or Value, and some of these may cause CPU exceptions. The
+ caller must either guarantee that Index and Value are valid, or the caller
+ must establish proper exception handlers. This function is only available on
+ IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param Value The 64-bit value to write to the MSR.
+
+ @return Value
+
+**/
+UINT64
+EFIAPI
+AsmWriteMsr64 (
+ IN UINT32 Index,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result
+ back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. No parameter checking is performed on Index or OrData, and some of
+ these may cause CPU exceptions. The caller must either guarantee that Index
+ and OrData are valid, or the caller must establish proper exception handlers.
+ This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param OrData The value to OR with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrOr64 (
+ IN UINT32 Index,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by OrData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned. No
+ parameter checking is performed on Index or OrData, and some of these may
+ cause CPU exceptions. The caller must either guarantee that Index and OrData
+ are valid, or the caller must establish proper exception handlers. This
+ function is only available on IA-32 and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAnd64 (
+ IN UINT32 Index,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive
+ OR, and writes the result back to the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between read
+ result and the value specified by AndData, performs a bitwise inclusive OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit MSR specified by Index. The value written
+ to the MSR is returned. No parameter checking is performed on Index, AndData,
+ or OrData, and some of these may cause CPU exceptions. The caller must either
+ guarantee that Index, AndData, and OrData are valid, or the caller must
+ establish proper exception handlers. This function is only available on IA-32
+ and X64.
+
+ @param Index The 32-bit MSR index to write.
+ @param AndData The value to AND with the read value from the MSR.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrAndThenOr64 (
+ IN UINT32 Index,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of an MSR.
+
+ Reads the bit field in the 64-bit MSR. The bit field is specified by the
+ StartBit and the EndBit. The value of the bit field is returned. The caller
+ must either guarantee that Index is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read from the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldRead64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an MSR.
+
+ Writes Value to a bit field in a 64-bit MSR. The bit field is specified by
+ the StartBit and the EndBit. All other bits in the destination MSR are
+ preserved. The MSR written is returned. Extra left bits in Value are
+ stripped. The caller must either guarantee that Index and the data written is
+ valid, or the caller must set up exception handlers to catch the exceptions.
+ This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldWrite64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and
+ writes the result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit MSR specified by Index. The value written to the MSR is
+ returned. Extra left bits in OrData are stripped. The caller must either
+ guarantee that Index and the data written is valid, or the caller must set up
+ exception handlers to catch the exceptions. This function is only available
+ on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND between the
+ read result and the value specified by AndData, and writes the result to the
+ 64-bit MSR specified by Index. The value written to the MSR is returned.
+ Extra left bits in AndData are stripped. The caller must either guarantee
+ that Index and the data written is valid, or the caller must set up exception
+ handlers to catch the exceptions. This function is only available on IA-32
+ and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAnd64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MSR.
+
+ Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by
+ a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit MSR specified by Index. The
+ value written to the MSR is returned. Extra left bits in both AndData and
+ OrData are stripped. The caller must either guarantee that Index and the data
+ written is valid, or the caller must set up exception handlers to catch the
+ exceptions. This function is only available on IA-32 and X64.
+
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Index The 32-bit MSR index to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the bit field.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MSR.
+
+**/
+UINT64
+EFIAPI
+AsmMsrBitFieldAndThenOr64 (
+ IN UINT32 Index,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads the current value of the EFLAGS register.
+
+ Reads and returns the current value of the EFLAGS register. This function is
+ only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a
+ 64-bit value on X64.
+
+ @return EFLAGS on IA-32 or RFLAGS on X64.
+
+**/
+UINTN
+EFIAPI
+AsmReadEflags (
+ VOID
+ );
+
+/**
+ Reads the current value of the Control Register 0 (CR0).
+
+ Reads and returns the current value of CR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 0 (CR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr0 (
+ VOID
+ );
+
+/**
+ Reads the current value of the Control Register 2 (CR2).
+
+ Reads and returns the current value of CR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 2 (CR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr2 (
+ VOID
+ );
+
+/**
+ Reads the current value of the Control Register 3 (CR3).
+
+ Reads and returns the current value of CR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 3 (CR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr3 (
+ VOID
+ );
+
+/**
+ Reads the current value of the Control Register 4 (CR4).
+
+ Reads and returns the current value of CR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of the Control Register 4 (CR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadCr4 (
+ VOID
+ );
+
+/**
+ Writes a value to Control Register 0 (CR0).
+
+ Writes and returns a new value to CR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr0 The value to write to CR0.
+
+ @return The value written to CR0.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr0 (
+ UINTN Cr0
+ );
+
+/**
+ Writes a value to Control Register 2 (CR2).
+
+ Writes and returns a new value to CR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr2 The value to write to CR2.
+
+ @return The value written to CR2.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr2 (
+ UINTN Cr2
+ );
+
+/**
+ Writes a value to Control Register 3 (CR3).
+
+ Writes and returns a new value to CR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr3 The value to write to CR3.
+
+ @return The value written to CR3.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr3 (
+ UINTN Cr3
+ );
+
+/**
+ Writes a value to Control Register 4 (CR4).
+
+ Writes and returns a new value to CR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Cr4 The value to write to CR4.
+
+ @return The value written to CR4.
+
+**/
+UINTN
+EFIAPI
+AsmWriteCr4 (
+ UINTN Cr4
+ );
+
+/**
+ Reads the current value of Debug Register 0 (DR0).
+
+ Reads and returns the current value of DR0. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr0 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 1 (DR1).
+
+ Reads and returns the current value of DR1. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr1 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 2 (DR2).
+
+ Reads and returns the current value of DR2. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr2 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 3 (DR3).
+
+ Reads and returns the current value of DR3. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr3 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 4 (DR4).
+
+ Reads and returns the current value of DR4. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr4 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 5 (DR5).
+
+ Reads and returns the current value of DR5. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr5 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 6 (DR6).
+
+ Reads and returns the current value of DR6. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr6 (
+ VOID
+ );
+
+/**
+ Reads the current value of Debug Register 7 (DR7).
+
+ Reads and returns the current value of DR7. This function is only available
+ on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on
+ X64.
+
+ @return The value of Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmReadDr7 (
+ VOID
+ );
+
+/**
+ Writes a value to Debug Register 0 (DR0).
+
+ Writes and returns a new value to DR0. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr0 The value to write to Dr0.
+
+ @return The value written to Debug Register 0 (DR0).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr0 (
+ UINTN Dr0
+ );
+
+/**
+ Writes a value to Debug Register 1 (DR1).
+
+ Writes and returns a new value to DR1. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr1 The value to write to Dr1.
+
+ @return The value written to Debug Register 1 (DR1).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr1 (
+ UINTN Dr1
+ );
+
+/**
+ Writes a value to Debug Register 2 (DR2).
+
+ Writes and returns a new value to DR2. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr2 The value to write to Dr2.
+
+ @return The value written to Debug Register 2 (DR2).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr2 (
+ UINTN Dr2
+ );
+
+/**
+ Writes a value to Debug Register 3 (DR3).
+
+ Writes and returns a new value to DR3. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr3 The value to write to Dr3.
+
+ @return The value written to Debug Register 3 (DR3).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr3 (
+ UINTN Dr3
+ );
+
+/**
+ Writes a value to Debug Register 4 (DR4).
+
+ Writes and returns a new value to DR4. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr4 The value to write to Dr4.
+
+ @return The value written to Debug Register 4 (DR4).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr4 (
+ UINTN Dr4
+ );
+
+/**
+ Writes a value to Debug Register 5 (DR5).
+
+ Writes and returns a new value to DR5. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr5 The value to write to Dr5.
+
+ @return The value written to Debug Register 5 (DR5).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr5 (
+ UINTN Dr5
+ );
+
+/**
+ Writes a value to Debug Register 6 (DR6).
+
+ Writes and returns a new value to DR6. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr6 The value to write to Dr6.
+
+ @return The value written to Debug Register 6 (DR6).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr6 (
+ UINTN Dr6
+ );
+
+/**
+ Writes a value to Debug Register 7 (DR7).
+
+ Writes and returns a new value to DR7. This function is only available on
+ IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64.
+
+ @param Dr7 The value to write to Dr7.
+
+ @return The value written to Debug Register 7 (DR7).
+
+**/
+UINTN
+EFIAPI
+AsmWriteDr7 (
+ UINTN Dr7
+ );
+
+/**
+ Reads the current value of Code Segment Register (CS).
+
+ Reads and returns the current value of CS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of CS.
+
+**/
+UINT16
+EFIAPI
+AsmReadCs (
+ VOID
+ );
+
+/**
+ Reads the current value of Data Segment Register (DS).
+
+ Reads and returns the current value of DS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of DS.
+
+**/
+UINT16
+EFIAPI
+AsmReadDs (
+ VOID
+ );
+
+/**
+ Reads the current value of Extra Segment Register (ES).
+
+ Reads and returns the current value of ES. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of ES.
+
+**/
+UINT16
+EFIAPI
+AsmReadEs (
+ VOID
+ );
+
+/**
+ Reads the current value of FS Data Segment Register (FS).
+
+ Reads and returns the current value of FS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of FS.
+
+**/
+UINT16
+EFIAPI
+AsmReadFs (
+ VOID
+ );
+
+/**
+ Reads the current value of GS Data Segment Register (GS).
+
+ Reads and returns the current value of GS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of GS.
+
+**/
+UINT16
+EFIAPI
+AsmReadGs (
+ VOID
+ );
+
+/**
+ Reads the current value of Stack Segment Register (SS).
+
+ Reads and returns the current value of SS. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of SS.
+
+**/
+UINT16
+EFIAPI
+AsmReadSs (
+ VOID
+ );
+
+/**
+ Reads the current value of Task Register (TR).
+
+ Reads and returns the current value of TR. This function is only available on
+ IA-32 and X64.
+
+ @return The current value of TR.
+
+**/
+UINT16
+EFIAPI
+AsmReadTr (
+ VOID
+ );
+
+/**
+ Reads the current Global Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current GDTR descriptor and returns it in Gdtr. This
+ function is only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadGdtr (
+ OUT IA32_DESCRIPTOR *Gdtr
+ );
+
+/**
+ Writes the current Global Descriptor Table Register (GDTR) descriptor.
+
+ Writes and the current GDTR descriptor specified by Gdtr. This function is
+ only available on IA-32 and X64.
+
+ If Gdtr is NULL, then ASSERT().
+
+ @param Gdtr Pointer to a GDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteGdtr (
+ IN CONST IA32_DESCRIPTOR *Gdtr
+ );
+
+/**
+ Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Reads and returns the current IDTR descriptor and returns it in Idtr. This
+ function is only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmReadIdtr (
+ OUT IA32_DESCRIPTOR *Idtr
+ );
+
+/**
+ Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.
+
+ Writes the current IDTR descriptor and returns it in Idtr. This function is
+ only available on IA-32 and X64.
+
+ If Idtr is NULL, then ASSERT().
+
+ @param Idtr Pointer to a IDTR descriptor.
+
+**/
+VOID
+EFIAPI
+AsmWriteIdtr (
+ IN CONST IA32_DESCRIPTOR *Idtr
+ );
+
+/**
+ Reads the current Local Descriptor Table Register(LDTR) selector.
+
+ Reads and returns the current 16-bit LDTR descriptor value. This function is
+ only available on IA-32 and X64.
+
+ @return The current selector of LDT.
+
+**/
+UINT16
+EFIAPI
+AsmReadLdtr (
+ VOID
+ );
+
+/**
+ Writes the current Local Descriptor Table Register (GDTR) selector.
+
+ Writes and the current LDTR descriptor specified by Ldtr. This function is
+ only available on IA-32 and X64.
+
+ @param Ldtr 16-bit LDTR selector value.
+
+**/
+VOID
+EFIAPI
+AsmWriteLdtr (
+ IN UINT16 Ldtr
+ );
+
+/**
+ Save the current floating point/SSE/SSE2 context to a buffer.
+
+ Saves the current floating point/SSE/SSE2 state to the buffer specified by
+ Buffer. Buffer must be aligned on a 16-byte boundary. This function is only
+ available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxSave (
+ OUT IA32_FX_BUFFER *Buffer
+ );
+
+/**
+ Restores the current floating point/SSE/SSE2 context from a buffer.
+
+ Restores the current floating point/SSE/SSE2 state from the buffer specified
+ by Buffer. Buffer must be aligned on a 16-byte boundary. This function is
+ only available on IA-32 and X64.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-byte boundary, then ASSERT().
+ If Buffer was not saved with AsmFxSave(), then ASSERT().
+
+ @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.
+
+**/
+VOID
+EFIAPI
+AsmFxRestore (
+ IN CONST IA32_FX_BUFFER *Buffer
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #0 (MM0).
+
+ Reads and returns the current value of MM0. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM0.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm0 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #1 (MM1).
+
+ Reads and returns the current value of MM1. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM1.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm1 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #2 (MM2).
+
+ Reads and returns the current value of MM2. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM2.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm2 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #3 (MM3).
+
+ Reads and returns the current value of MM3. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM3.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm3 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #4 (MM4).
+
+ Reads and returns the current value of MM4. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM4.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm4 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #5 (MM5).
+
+ Reads and returns the current value of MM5. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM5.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm5 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #6 (MM6).
+
+ Reads and returns the current value of MM6. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM6.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm6 (
+ VOID
+ );
+
+/**
+ Reads the current value of 64-bit MMX Register #7 (MM7).
+
+ Reads and returns the current value of MM7. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of MM7.
+
+**/
+UINT64
+EFIAPI
+AsmReadMm7 (
+ VOID
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #0 (MM0).
+
+ Writes the current value of MM0. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM0.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm0 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #1 (MM1).
+
+ Writes the current value of MM1. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM1.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm1 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #2 (MM2).
+
+ Writes the current value of MM2. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM2.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm2 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #3 (MM3).
+
+ Writes the current value of MM3. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM3.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm3 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #4 (MM4).
+
+ Writes the current value of MM4. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM4.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm4 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #5 (MM5).
+
+ Writes the current value of MM5. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM5.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm5 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #6 (MM6).
+
+ Writes the current value of MM6. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM6.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm6 (
+ IN UINT64 Value
+ );
+
+/**
+ Writes the current value of 64-bit MMX Register #7 (MM7).
+
+ Writes the current value of MM7. This function is only available on IA32 and
+ X64.
+
+ @param Value The 64-bit value to write to MM7.
+
+**/
+VOID
+EFIAPI
+AsmWriteMm7 (
+ IN UINT64 Value
+ );
+
+/**
+ Reads the current value of Time Stamp Counter (TSC).
+
+ Reads and returns the current value of TSC. This function is only available
+ on IA-32 and X64.
+
+ @return The current value of TSC
+
+**/
+UINT64
+EFIAPI
+AsmReadTsc (
+ VOID
+ );
+
+/**
+ Reads the current value of a Performance Counter (PMC).
+
+ Reads and returns the current value of performance counter specified by
+ Index. This function is only available on IA-32 and X64.
+
+ @param Index The 32-bit Performance Counter index to read.
+
+ @return The value of the PMC specified by Index.
+
+**/
+UINT64
+EFIAPI
+AsmReadPmc (
+ IN UINT32 Index
+ );
+
+/**
+ Sets up a monitor buffer that is used by AsmMwait().
+
+ Executes a MONITOR instruction with the register state specified by Eax, Ecx
+ and Edx. Returns Eax. This function is only available on IA-32 and X64.
+
+ @param Eax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+ @param Edx The value to load into EDX or RDX before executing the MONITOR
+ instruction.
+
+ @return Eax
+
+**/
+UINTN
+EFIAPI
+AsmMonitor (
+ IN UINTN Eax,
+ IN UINTN Ecx,
+ IN UINTN Edx
+ );
+
+/**
+ Executes an MWAIT instruction.
+
+ Executes an MWAIT instruction with the register state specified by Eax and
+ Ecx. Returns Eax. This function is only available on IA-32 and X64.
+
+ @param Eax The value to load into EAX or RAX before executing the MONITOR
+ instruction.
+ @param Ecx The value to load into ECX or RCX before executing the MONITOR
+ instruction.
+
+ @return Eax
+
+**/
+UINTN
+EFIAPI
+AsmMwait (
+ IN UINTN Eax,
+ IN UINTN Ecx
+ );
+
+/**
+ Executes a WBINVD instruction.
+
+ Executes a WBINVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmWbinvd (
+ VOID
+ );
+
+/**
+ Executes a INVD instruction.
+
+ Executes a INVD instruction. This function is only available on IA-32 and
+ X64.
+
+**/
+VOID
+EFIAPI
+AsmInvd (
+ VOID
+ );
+
+/**
+ Flushes a cache line from all the instruction and data caches within the
+ coherency domain of the CPU.
+
+ Flushed the cache line specified by LinearAddress, and returns LinearAddress.
+ This function is only available on IA-32 and X64.
+
+ @param LinearAddress The address of the cache line to flush. If the CPU is
+ in a physical addressing mode, then LinearAddress is a
+ physical address. If the CPU is in a virtual
+ addressing mode, then LinearAddress is a virtual
+ address.
+
+ @return LinearAddress
+**/
+VOID *
+EFIAPI
+AsmFlushCacheLine (
+ IN VOID *LinearAddress
+ );
+
+/**
+ Enables the 32-bit paging mode on the CPU.
+
+ Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode. This function is
+ only available on IA-32. After the 32-bit paging mode is enabled, control is
+ transferred to the function specified by EntryPoint using the new stack
+ specified by NewStack and passing in the parameters specified by Context1 and
+ Context2. Context1 and Context2 are optional and may be NULL. The function
+ EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit protected mode with flat descriptors. This
+ means all descriptors must have a base of 0 and a limit of 4GB.
+ 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat
+ descriptors.
+ 4) CR3 must point to valid page tables that will be used once the transition
+ is complete, and those page tables must guarantee that the pages for this
+ function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is enabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is enabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is enabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+/**
+ Disables the 32-bit paging mode on the CPU.
+
+ Disables the 32-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 32-paged protected
+ mode. This function is only available on IA-32. After the 32-bit paging mode
+ is disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be NULL. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit paged mode, then ASSERT().
+ If EntryPoint is NULL, then ASSERT().
+ If NewStack is NULL, then ASSERT().
+
+ There are a number of constraints that must be followed before calling this
+ function:
+ 1) Interrupts must be disabled.
+ 2) The caller must be in 32-bit paged mode.
+ 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.
+ 4) CR3 must point to valid page tables that guarantee that the pages for
+ this function and the stack are identity mapped.
+
+ @param EntryPoint A pointer to function to call with the new stack after
+ paging is disabled.
+ @param Context1 A pointer to the context to pass into the EntryPoint
+ function as the first parameter after paging is disabled.
+ @param Context2 A pointer to the context to pass into the EntryPoint
+ function as the second parameter after paging is
+ disabled.
+ @param NewStack A pointer to the new stack to use for the EntryPoint
+ function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging32 (
+ IN SWITCH_STACK_ENTRY_POINT EntryPoint,
+ IN VOID *Context1, OPTIONAL
+ IN VOID *Context2, OPTIONAL
+ IN VOID *NewStack
+ );
+
+/**
+ Enables the 64-bit paging mode on the CPU.
+
+ Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+ must be properly initialized prior to calling this service. This function
+ assumes the current execution mode is 32-bit protected mode with flat
+ descriptors. This function is only available on IA-32. After the 64-bit
+ paging mode is enabled, control is transferred to the function specified by
+ EntryPoint using the new stack specified by NewStack and passing in the
+ parameters specified by Context1 and Context2. Context1 and Context2 are
+ optional and may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 32-bit protected mode with flat
+ descriptors, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for long mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is enabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is enabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is enabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT64 EntryPoint,
+ IN UINT64 Context1, OPTIONAL
+ IN UINT64 Context2, OPTIONAL
+ IN UINT64 NewStack
+ );
+
+/**
+ Disables the 64-bit paging mode on the CPU.
+
+ Disables the 64-bit paging mode on the CPU and returns to 32-bit protected
+ mode. This function assumes the current execution mode is 64-paging mode.
+ This function is only available on X64. After the 64-bit paging mode is
+ disabled, control is transferred to the function specified by EntryPoint
+ using the new stack specified by NewStack and passing in the parameters
+ specified by Context1 and Context2. Context1 and Context2 are optional and
+ may be 0. The function EntryPoint must never return.
+
+ If the current execution mode is not 64-bit paged mode, then ASSERT().
+ If EntryPoint is 0, then ASSERT().
+ If NewStack is 0, then ASSERT().
+
+ @param Cs The 16-bit selector to load in the CS before EntryPoint
+ is called. The descriptor in the GDT that this selector
+ references must be setup for 32-bit protected mode.
+ @param EntryPoint The 64-bit virtual address of the function to call with
+ the new stack after paging is disabled.
+ @param Context1 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the first parameter after
+ paging is disabled.
+ @param Context2 The 64-bit virtual address of the context to pass into
+ the EntryPoint function as the second parameter after
+ paging is disabled.
+ @param NewStack The 64-bit virtual address of the new stack to use for
+ the EntryPoint function after paging is disabled.
+
+**/
+VOID
+EFIAPI
+AsmDisablePaging64 (
+ IN UINT16 CodeSelector,
+ IN UINT32 EntryPoint,
+ IN UINT32 Context1, OPTIONAL
+ IN UINT32 Context2, OPTIONAL
+ IN UINT32 NewStack
+ );
+
+//
+// 16-bit thunking services
+//
+
+/**
+ Prepares all structures a code required to use AsmThunk16().
+
+ Prepares all structures and code required to use AsmThunk16().
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareThunk16 (
+ OUT THUNK_CONTEXT *ThunkContext
+ );
+
+/**
+ Transfers control to a 16-bit real mode entry point and returns the results.
+
+ Transfers control to a 16-bit real mode entry point and returns the results.
+ AsmPrepareThunk16() must be called with ThunkContext before this function is
+ used.
+
+ If ThunkContext is NULL, then ASSERT().
+ If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ );
+
+/**
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results.
+
+ Prepares all structures and code for a 16-bit real mode thunk, transfers
+ control to a 16-bit real mode entry point, and returns the results. If the
+ caller only need to perform a single 16-bit real mode thunk, then this
+ service should be used. If the caller intends to make more than one 16-bit
+ real mode thunk, then it is more efficient if AsmPrepareThunk16() is called
+ once and AsmThunk16() can be called for each 16-bit real mode thunk.
+
+ If ThunkContext is NULL, then ASSERT().
+
+ @param ThunkContext A pointer to the context structure that describes the
+ 16-bit real mode code to call.
+
+**/
+VOID
+EFIAPI
+AsmPrepareAndThunk16 (
+ IN OUT THUNK_CONTEXT *ThunkContext
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/BaseMemoryLib.h b/MdePkg/Include/Library/BaseMemoryLib.h new file mode 100644 index 0000000000..5994530b55 --- /dev/null +++ b/MdePkg/Include/Library/BaseMemoryLib.h @@ -0,0 +1,395 @@ +/** @file
+ Memory-only library functions with no library constructor/destructor
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BaseMemoryLib.h
+
+**/
+
+#ifndef __BASE_MEMORY_LIB__
+#define __BASE_MEMORY_LIB__
+
+/**
+ Copy Length bytes from Source to Destination.
+
+ This function copies Length bytes from SourceBuffer to DestinationBuffer, and
+ returns DestinationBuffer. The implementation must be reentrant, and it must
+ handle the case where SourceBuffer overlaps DestinationBuffer.
+
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param Destination Target of copy
+ @param Source Place to copy from
+ @param Length Number of bytes to copy
+
+ @return Destination
+
+**/
+VOID *
+EFIAPI
+CopyMem (
+ OUT VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Set Buffer to Value for Size bytes.
+
+ This function fills Length bytes of Buffer with Value, and returns Buffer.
+
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+ @param Value Value of the set operation.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Fills a target buffer with a 16-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 16-bit value specified by
+ Value, and returns Buffer. Value is repeated every 16-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem16 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Fills a target buffer with a 32-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 32-bit value specified by
+ Value, and returns Buffer. Value is repeated every 32-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem32 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Fills a target buffer with a 64-bit value, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the 64-bit value specified by
+ Value, and returns Buffer. Value is repeated every 64-bits in for Length
+ bytes of Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is not aligned on a 64-bit boundary, then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill.
+ @param Length Number of bytes in Buffer to fill.
+ @param Value Value with which to fill Length bytes of Buffer.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+SetMem64 (
+ OUT VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ Set Buffer to 0 for Size bytes.
+
+ This function fills Length bytes of Buffer with zeros, and returns Buffer.
+
+ If Buffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Memory to set.
+ @param Size Number of bytes to set
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+ZeroMem (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+/**
+ Compares two memory buffers of a given length.
+
+ This function compares Length bytes of SourceBuffer to Length bytes of
+ DestinationBuffer. If all Length bytes of the two buffers are identical, then
+ 0 is returned. Otherwise, the value returned is the first mismatched byte in
+ SourceBuffer subtracted from the first mismatched byte in DestinationBuffer.
+
+ If DestinationBuffer is NULL and Length > 0, then ASSERT().
+ If SourceBuffer is NULL and Length > 0, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - DestinationBuffer + 1), then
+ ASSERT().
+ If Length is greater than (MAX_ADDRESS - SourceBuffer + 1), then ASSERT().
+
+ @param DestinationBuffer First memory buffer
+ @param SourceBuffer Second memory buffer
+ @param Length Length of DestinationBuffer and SourceBuffer memory
+ regions to compare
+
+ @retval 0 if DestinationBuffer == SourceBuffer
+ @retval Non-zero if DestinationBuffer != SourceBuffer
+
+**/
+INTN
+EFIAPI
+CompareMem (
+ IN CONST VOID *DestinationBuffer,
+ IN CONST VOID *SourceBuffer,
+ IN UINTN Length
+ );
+
+/**
+ Scans a target buffer for an 8-bit value, and returns a pointer to the
+ matching 8-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address for an 8-bit value that matches
+ Value. If a match is found, then a pointer to the matching byte in the target
+ buffer is returned. If no match is found, then NULL is returned. If Length is
+ 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem8 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT8 Value
+ );
+
+/**
+ Scans a target buffer for a 16-bit value, and returns a pointer to the
+ matching 16-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 16-bit increments for a 16-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 16-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem16 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT16 Value
+ );
+
+/**
+ Scans a target buffer for a 32-bit value, and returns a pointer to the
+ matching 32-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 32-bit increments for a 32-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 32-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem32 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT32 Value
+ );
+
+/**
+ Scans a target buffer for a 64-bit value, and returns a pointer to the
+ matching 64-bit value in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 64-bit increments for a 64-bit
+ value that matches Value. If a match is found, then a pointer to the matching
+ value in the target buffer is returned. If no match is found, then NULL is
+ returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Value Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence or NULL if not found.
+ @retval NULL if Length == 0 or Value was not found.
+
+**/
+VOID *
+EFIAPI
+ScanMem64 (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN UINT64 Value
+ );
+
+/**
+ This function copies a source GUID to a destination GUID.
+
+ This function copies the contents of the 128-bit GUID specified by SourceGuid
+ to DestinationGuid, and returns DestinationGuid.
+
+ If DestinationGuid is NULL, then ASSERT().
+ If SourceGuid is NULL, then ASSERT().
+
+ @param DestinationGuid Pointer to the destination GUID.
+ @param SourceGuid Pointer to the source GUID.
+
+ @return DestinationGuid
+
+**/
+GUID *
+EFIAPI
+CopyGuid (
+ OUT GUID *DestinationGuid,
+ IN CONST GUID *SourceGuid
+ );
+
+/**
+ Compares two GUIDs
+
+ This function compares Guid1 to Guid2. If the GUIDs are identical then TRUE
+ is returned. If there are any bit differences in the two GUIDs, then FALSE is
+ returned.
+
+ If Guid1 is NULL, then ASSERT().
+ If Guid2 is NULL, then ASSERT().
+
+ @param Guid1 guid to compare
+ @param Guid2 guid to compare
+
+ @retval TRUE if Guid1 == Guid2
+ @retval FALSE if Guid1 != Guid2
+
+**/
+BOOLEAN
+EFIAPI
+CompareGuid (
+ IN CONST GUID *Guid1,
+ IN CONST GUID *Guid2
+ );
+
+/**
+ Scans a target buffer for a GUID, and returns a pointer to the matching GUID
+ in the target buffer.
+
+ This function searches target the buffer specified by Buffer and Length from
+ the lowest address to the highest address at 128-bit increments for the
+ 128-bit GUID value that matches Guid. If a match is found, then a pointer to
+ the matching GUID in the target buffer is returned. If no match is found,
+ then NULL is returned. If Length is 0, then NULL is returned.
+
+ If Buffer is NULL, then ASSERT().
+ If Buffer is not aligned on a 64-bit boundary, then ASSERT().
+ If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to scan.
+ @param Length Number of bytes in Buffer to scan.
+ @param Guid Value to search for in the target buffer.
+
+ @return Pointer to the first occurrence.
+ @retval NULL if Length == 0 or Guid was not found.
+**/
+VOID *
+EFIAPI
+ScanGuid (
+ IN CONST VOID *Buffer,
+ IN UINTN Length,
+ IN CONST GUID *Guid
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/CacheMaintenanceLib.h b/MdePkg/Include/Library/CacheMaintenanceLib.h new file mode 100644 index 0000000000..74d2ab7e8a --- /dev/null +++ b/MdePkg/Include/Library/CacheMaintenanceLib.h @@ -0,0 +1,72 @@ +/** @file
+ Cache Maintenance Functions
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CacheMaintenanceLib.h
+
+**/
+
+#ifndef __CACHE_MAINTENANCE_LIB__
+#define __CACHE_MAINTENANCE_LIB__
+
+VOID
+EFIAPI
+InvalidateInstructionCache (
+ VOID
+ );
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ );
+
+VOID
+EFIAPI
+WriteBackInvalidateDataCache (
+ VOID
+ );
+
+VOID *
+EFIAPI
+WriteBackInvalidateDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ );
+
+VOID
+EFIAPI
+WriteBackDataCache (
+ VOID
+ );
+
+VOID *
+EFIAPI
+WriteBackDataCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ );
+
+VOID
+EFIAPI
+InvalidateDataCache (
+ VOID
+ );
+
+VOID *
+EFIAPI
+InvalidateInstructionCacheRange (
+ IN VOID *Address,
+ IN UINTN Length
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h new file mode 100644 index 0000000000..d79c002cc0 --- /dev/null +++ b/MdePkg/Include/Library/CpuLib.h @@ -0,0 +1,20 @@ +/** @file
+ Library that provides processor specific library services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CpuLib.h
+
+**/
+
+#ifndef __CPU_LIB_H__
+#define __CPU_LIB_H__
+
+#endif
\ No newline at end of file diff --git a/MdePkg/Include/Library/DebugLib.h b/MdePkg/Include/Library/DebugLib.h new file mode 100644 index 0000000000..625bcfbf24 --- /dev/null +++ b/MdePkg/Include/Library/DebugLib.h @@ -0,0 +1,439 @@ +/** @file
+ Public include file for the Debug Library
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __DEBUG_LIB_H__
+#define __DEBUG_LIB_H__
+
+//
+// Declare bits for PcdDebugPropertyMask
+//
+#define DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED 0x01
+#define DEBUG_PROPERTY_DEBUG_PRINT_ENABLED 0x02
+#define DEBUG_PROPERTY_DEBUG_CODE_ENABLED 0x04
+#define DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED 0x08
+#define DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED 0x10
+#define DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED 0x20
+
+//
+// Declare bits for PcdDebugPrintErrorLevel and the ErrorLevel parameter of DebugPrint()
+//
+#define EFI_D_INIT 0x00000001 // Initialization style messages
+#define EFI_D_WARN 0x00000002 // Warnings
+#define EFI_D_LOAD 0x00000004 // Load events
+#define EFI_D_FS 0x00000008 // EFI File system
+#define EFI_D_POOL 0x00000010 // Alloc & Free's
+#define EFI_D_PAGE 0x00000020 // Alloc & Free's
+#define EFI_D_INFO 0x00000040 // Verbose
+#define EFI_D_VARIABLE 0x00000100 // Variable
+#define EFI_D_BM 0x00000400 // Boot Manager (BDS)
+#define EFI_D_BLKIO 0x00001000 // BlkIo Driver
+#define EFI_D_NET 0x00004000 // SNI Driver
+#define EFI_D_UNDI 0x00010000 // UNDI Driver
+#define EFI_D_LOADFILE 0x00020000 // UNDI Driver
+#define EFI_D_EVENT 0x00080000 // Event messages
+#define EFI_D_ERROR 0x80000000 // Error
+
+/**
+
+ Prints a debug message to the debug output device if the specified error level is enabled.
+
+ If any bit in ErrorLevel is also set in PcdDebugPrintErrorLevel, then print
+ the message specified by Format and the associated variable argument list to
+ the debug output device.
+
+ If Format is NULL, then ASSERT().
+
+ @param ErrorLevel The error level of the debug message.
+ @param Format Format string for the debug message to print.
+
+**/
+VOID
+EFIAPI
+DebugPrint (
+ IN UINTN ErrorLevel,
+ IN CHAR8 *Format,
+ ...
+ );
+
+
+/**
+
+ Prints an assert message containing a filename, line number, and description.
+ This may be followed by a breakpoint or a dead loop.
+
+ Print a message of the form “ASSERT <FileName>(<LineNumber>): <Description>\n”
+ to the debug output device. If DEBUG_PROPERTY_ASSERT_BREAKPOINT_ENABLED bit of
+ PcdDebugProperyMask is set then CpuBreakpoint() is called. Otherwise, if
+ DEBUG_PROPERTY_ASSERT_DEADLOOP_ENABLED bit of PcdDebugProperyMask is set then
+ CpuDeadLoop() is called. If neither of these bits are set, then this function
+ returns immediately after the message is printed to the debug output device.
+ DebugAssert() must actively prevent recusrsion. If DebugAssert() is called while
+ processing another DebugAssert(), then DebugAssert() must return immediately.
+
+ If FileName is NULL, then a <FileName> string of “(NULL) Filename” is printed.
+
+ If Description is NULL, then a <Description> string of “(NULL) Description” is printed.
+
+ @param FileName Pointer to the name of the source file that generated the assert condition.
+ @param LineNumber The line number in the source file that generated the assert condition
+ @param Description Pointer to the description of the assert condition.
+
+**/
+VOID
+EFIAPI
+DebugAssert (
+ IN CHAR8 *FileName,
+ IN INTN LineNumber,
+ IN CHAR8 *Description
+ );
+
+
+/**
+
+ Fills a target buffer with PcdDebugClearMemoryValue, and returns the target buffer.
+
+ This function fills Length bytes of Buffer with the value specified by
+ PcdDebugClearMemoryValue, and returns Buffer.
+
+ If Buffer is NULL, then ASSERT().
+
+ If Length is greater than (MAX_ADDRESS – Buffer + 1), then ASSERT().
+
+ @param Buffer Pointer to the target buffer to fill with PcdDebugClearMemoryValue.
+ @param Length Number of bytes in Buffer to fill with zeros PcdDebugClearMemoryValue.
+
+ @return Buffer
+
+**/
+VOID *
+EFIAPI
+DebugClearMemory (
+ OUT VOID *Buffer,
+ IN UINTN Length
+ );
+
+
+/**
+
+ Returns TRUE if ASSERT() macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugAssertEnabled (
+ VOID
+ );
+
+
+/**
+
+ Returns TRUE if DEBUG()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugPrintEnabled (
+ VOID
+ );
+
+
+/**
+
+ Returns TRUE if DEBUG_CODE()macros are enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugCodeEnabled (
+ VOID
+ );
+
+
+/**
+
+ Returns TRUE if DEBUG_CLEAR_MEMORY()macro is enabled.
+
+ This function returns TRUE if the DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of
+ PcdDebugProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set.
+ @retval FALSE The DEBUG_PROPERTY_DEBUG_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+DebugClearMemoryEnabled (
+ VOID
+ );
+
+
+/**
+
+ Internal worker macro that calls DebugAssert().
+
+ This macro calls DebugAssert() passing in the filename, line number, and
+ expression that evailated to FALSE.
+
+ @param Expression Boolean expression that evailated to FALSE
+
+**/
+#define _ASSERT(Expression) DebugAssert (__FILE__, __LINE__, #Expression)
+
+
+/**
+
+ Internal worker macro that calls DebugPrint().
+
+ This macro calls DebugPrint() passing in the debug error level, a format
+ string, and a variable argument list.
+
+ @param Expression Expression containing an error level, a format string,
+ and a variable argument list based on the format string.
+
+**/
+#define _DEBUG(Expression) DebugPrint Expression
+
+
+/**
+
+ Macro that calls DebugAssert() if a expression evaluates to FALSE.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro evaluates the Boolean expression specified by Expression. If
+ Expression evaluates to FALSE, then DebugAssert() is called passing in the
+ source filename, source line number, and Expression.
+
+ @param Expression Boolean expression
+
+**/
+#define ASSERT(Expression) \
+ do { \
+ if (DebugAssertEnabled ()) { \
+ if (!(Expression)) { \
+ _ASSERT (Expression); \
+ } \
+ } \
+ } while (FALSE)
+
+
+/**
+
+ Macro that calls DebugPrint().
+
+ If the DEBUG_PROPERTY_DEBUG_PRINT_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro passes Expression to DebugPrint().
+
+ @param Expression Expression containing an error level, a format string,
+ and a variable argument list based on the format string.
+
+
+**/
+#define DEBUG(Expression) \
+ do { \
+ if (DebugPrintEnabled ()) { \
+ _DEBUG (Expression); \
+ } \
+ } while (FALSE)
+
+
+/**
+
+ Macro that calls DebugAssert() if an EFI_STATUS evaluates to an error code.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro evaluates the EFI_STATUS value specified by StatusParameter.
+ If StatusParameter is an error code, then DebugAssert() is called passing in
+ the source filename, source line number, and StatusParameter.
+
+ @param StatusParameter EFI_STATUS value to evaluate.
+
+**/
+#define ASSERT_EFI_ERROR(StatusParameter) \
+ do { \
+ if (DebugAssertEnabled ()) { \
+ if (EFI_ERROR (StatusParameter)) { \
+ DEBUG ((EFI_D_ERROR, "\nASSERT_EFI_ERROR (Status = %r)\n", StatusParameter)); \
+ _ASSERT (!EFI_ERROR (StatusParameter)); \
+ } \
+ } \
+ } while (FALSE)
+
+
+/**
+
+ Macro that calls DebugAssert() if a protocol is already installed in the
+ handle database.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear,
+ then return.
+
+ If Handle is NULL, then a check is made to see if the protocol specified by Guid
+ is present on any handle in the handle database. If Handle is not NULL, then
+ a check is made to see if the protocol specified by Guid is present on the
+ handle specified by Handle. If the check finds the protocol, then DebugAssert()
+ is called passing in the source filename, source line number, and Guid.
+
+ If Guid is NULL, then ASSERT().
+
+ @param Handle The handle to check for the protocol. This is an optional
+ parameter that may be NULL. If it is NULL, then the entire
+ handle database is searched.
+
+ @param Guid Pointer to a protocol GUID.
+
+**/
+#define ASSERT_PROTOCOL_ALREADY_INSTALLED(Handle, Guid) \
+ do { \
+ if (DebugAssertEnabled ()) { \
+ VOID *Instance; \
+ ASSERT (Guid != NULL); \
+ if (Handle == NULL) { \
+ if (!EFI_ERROR (gBS->LocateProtocol (Guid, NULL, &Instance))) { \
+ _ASSERT (Guid already installed in database); \
+ } \
+ } else { \
+ if (!EFI_ERROR (gBS->LocateProtocol (Handle, Guid, &Instance))) { \
+ _ASSERT (Guid already installed on Handle); \
+ } \
+ } \
+ } \
+ } while (FALSE)
+
+
+/**
+ Macro that marks the beginning of debug source code.
+
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro marks the beginning of source code that is included in a module.
+ Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END()
+ are not included in a module.
+
+**/
+#define DEBUG_CODE_BEGIN() do { if (DebugCodeEnabled ()) { UINT8 __DebugCodeLocal
+
+
+/**
+
+ Macro that marks the end of debug source code.
+
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro marks the end of source code that is included in a module.
+ Otherwise, the source lines between DEBUG_CODE_BEGIN() and DEBUG_CODE_END()
+ are not included in a module.
+
+**/
+#define DEBUG_CODE_END() __DebugCodeLocal = 0; } } while (FALSE)
+
+
+/**
+
+ Macro that declares a section of debug source code.
+
+ If the DEBUG_PROPERTY_DEBUG_CODE_ENABLED bit of PcdDebugProperyMask is set,
+ then the source code specified by Expression is included in a module.
+ Otherwise, the source specified by Expression is not included in a module.
+
+**/
+#define DEBUG_CODE(Expression) \
+ DEBUG_CODE_BEGIN (); \
+ Expression \
+ DEBUG_CODE_END ()
+
+
+/**
+
+ Macro that calls DebugClearMemory() to clear a buffer to a default value.
+
+ If the DEBUG_PROPERTY_CLEAR_MEMORY_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro calls DebugClearMemory() passing in Address and Length.
+
+ @param Address Pointer to a buffer.
+ @param Length The number of bytes in the buffer to set.
+
+**/
+#define DEBUG_CLEAR_MEMORY(Address, Length) \
+ do { \
+ if (DebugClearMemoryEnabled ()) { \
+ DebugClearMemory (Address, Length); \
+ } \
+ } while (FALSE)
+
+
+/**
+
+ Macro that calls DebugAssert() if the containing record does not have a
+ matching signature. If the signatures matches, then a pointer to the data
+ structure that contains a specified field of that data structure is returned.
+ This is a light weight method hide information by placing a public data
+ structure inside a larger private data structure and using a pointer to the
+ public data structure to retrieve a pointer to the private data structure.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is clear,
+ then this macro computes the offset, in bytes, of field specified by Field
+ from the beginning of the data structure specified by TYPE. This offset is
+ subtracted from Record, and is used to return a pointer to a data structure
+ of the type specified by TYPE.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro computes the offset, in bytes, of field specified by Field from
+ the beginning of the data structure specified by TYPE. This offset is
+ subtracted from Record, and is used to compute a pointer to a data structure of
+ the type specified by TYPE. The Signature field of the data structure specified
+ by TYPE is compared to TestSignature. If the signatures match, then a pointer
+ to the pointer to a data structure of the type specified by TYPE is returned.
+ If the signatures do not match, then DebugAssert() is called with a description
+ of “CR has a bad signature” and Record is returned.
+
+ If the data type specified by TYPE does not contain the field specified by Field,
+ then the module will not compile.
+
+ If TYPE does not contain a field called Signature, then the module will not
+ compile.
+
+ @param Record Pointer to the field specified by Field within a data
+ structure of type TYPE.
+
+ @param TYPE The name of the data structure type to return This
+ data structure must contain the field specified by Field.
+
+ @param Field The name of the field in the data structure specified
+ by TYPE to which Record points.
+
+ @param TestSignature The 32-bit signature value to match.
+
+**/
+#define CR(Record, TYPE, Field, TestSignature) \
+ (DebugAssertEnabled () && (_CR (Record, TYPE, Field)->Signature != TestSignature)) ? \
+ (TYPE *) (_ASSERT (CR has Bad Signature), Record) : \
+ _CR (Record, TYPE, Field)
+
+#endif
diff --git a/MdePkg/Include/Library/DevicePathLib.h b/MdePkg/Include/Library/DevicePathLib.h new file mode 100644 index 0000000000..bedbd1c0d4 --- /dev/null +++ b/MdePkg/Include/Library/DevicePathLib.h @@ -0,0 +1,197 @@ +/** @file
+ Entry point to a DXE Boot Services Driver
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DevicePathLib.h
+
+**/
+
+#ifndef __DEVICE_PATH_LIB_H__
+#define __DEVICE_PATH_LIB_H__
+
+/**
+ This function returns the size, in bytes,
+ of the device path data structure specified by DevicePath.
+ If DevicePath is NULL, then 0 is returned.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The size of a device path in bytes.
+
+**/
+UINTN
+EFIAPI
+GetDevicePathSize (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+/**
+ This function allocates space for a new copy of the device path
+ specified by DevicePath.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @return The duplicated device path.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DuplicateDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+/**
+ This function appends the device path SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a device path data structure.
+
+ @return
+ A pointer to the new device path is returned.
+ NULL is returned if space for the new device path could not be allocated from pool.
+ It is up to the caller to free the memory used by FirstDevicePath and SecondDevicePath
+ if they are no longer needed.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePath (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+;
+
+/**
+ This function appends the device path node SecondDevicePath
+ to every device path instance in FirstDevicePath.
+
+ @param FirstDevicePath A pointer to a device path data structure.
+
+ @param SecondDevicePath A pointer to a single device path node.
+
+ @return
+ A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathNode (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *FirstDevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *SecondDevicePath
+ )
+;
+
+/**
+ This function appends the device path instance Instance to the device path Source.
+ If Source is NULL, then a new device path with one instance is created.
+
+ @param Source A pointer to a device path data structure.
+ @param Instance A pointer to a device path instance.
+
+ @return
+ A pointer to the new device path.
+ If there is not enough temporary pool memory available to complete this function,
+ then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+AppendDevicePathInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Source,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Instance
+ )
+;
+
+/**
+ Function retrieves the next device path instance from a device path data structure.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @param Size A pointer to the size of a device path instance in bytes.
+
+ @return
+ This function returns a pointer to the current device path instance.
+ In addition, it returns the size in bytes of the current device path instance in Size,
+ and a pointer to the next device path instance in DevicePath.
+ If there are no more device path instances in DevicePath, then DevicePath will be set to NULL.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+GetNextDevicePathInstance (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,
+ OUT UINTN *Size
+ )
+;
+
+/**
+ Return TRUE is this is a multi instance device path.
+
+ @param DevicePath A pointer to a device path data structure.
+
+ @retval TRUE If DevicePath is multi-instance.
+ @retval FALSE If DevicePath is not multi-instance or DevicePath is NULL.
+
+**/
+BOOLEAN
+EFIAPI
+IsDevicePathMultiInstance (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+/**
+ This function retrieves the device path protocol from a handle.
+
+ @param Handle The handle from which to retrieve the device path protocol.
+
+ @return
+ This function returns the device path protocol from the handle specified by Handle.
+ If Handle is NULL or Handle does not contain a device path protocol, then NULL is returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+DevicePathFromHandle (
+ IN EFI_HANDLE Handle
+ )
+;
+
+/**
+ This function allocates a device path for a file and appends it to an existing device path.
+
+ @param Device A pointer to a device handle. This parameter is optional and may be NULL.
+ @param FileName A pointer to a Null-terminated Unicode string.
+
+ @return
+ If Device is a valid device handle that contains a device path protocol,
+ then a device path for the file specified by FileName is allocated
+ and appended to the device path associated with the handle Device. The allocated device path is returned.
+ If Device is NULL or Device is a handle that does not support the device path protocol,
+ then a device path containing a single device path node for the file specified by FileName
+ is allocated and returned.
+
+**/
+EFI_DEVICE_PATH_PROTOCOL *
+EFIAPI
+FileDevicePath (
+ IN EFI_HANDLE Device, OPTIONAL
+ IN CONST CHAR16 *FileName
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/DxeCoreEntryPoint.h b/MdePkg/Include/Library/DxeCoreEntryPoint.h new file mode 100644 index 0000000000..1de2798b9f --- /dev/null +++ b/MdePkg/Include/Library/DxeCoreEntryPoint.h @@ -0,0 +1,77 @@ +/** @file
+ Entry point to the DXE Core
+
+ Copyright (c) 2006, Intel Corporation<BR>
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MODULE_ENTRY_POINT_H__
+#define __MODULE_ENTRY_POINT_H__
+
+//
+// Declare the cache of copy of HobList.
+//
+extern VOID *gHobList;
+
+
+/**
+ Enrty point to DXE core.
+
+ @param HobStart Pointer of HobList.
+
+**/
+VOID
+EFIAPI
+_ModuleEntryPoint (
+ IN VOID *HobStart
+ );
+
+
+/**
+ Wrapper of enrty point to DXE CORE.
+
+ @param HobStart Pointer of HobList.
+
+**/
+VOID
+EFIAPI
+EfiMain (
+ IN VOID *HobStart
+ );
+
+
+/**
+ Call constructs for all libraries. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Call the list of driver entry points. Automatics Generated by tool.
+
+ @param HobStart Pointer to HobList.
+
+**/
+VOID
+EFIAPI
+ProcessModuleEntryPointList (
+ IN VOID *HobStart
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/DxeRuntimeDriverLib.h b/MdePkg/Include/Library/DxeRuntimeDriverLib.h new file mode 100644 index 0000000000..7f6f0eb50d --- /dev/null +++ b/MdePkg/Include/Library/DxeRuntimeDriverLib.h @@ -0,0 +1,332 @@ +/** @file
+ Library to abstract runtime services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeRuntimeDriverLib.h
+
+**/
+
+#ifndef __DXE_RUNTIME_DRIVER_LIB__
+#define __DXE_RUNTIME_DRIVER_LIB__
+
+
+extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[];
+
+extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[];
+
+/**
+ Check to see if the execute context is in Runtime phase or not.
+
+ @param None.
+
+ @retval TRUE The driver is in SMM.
+ @retval FALSE The driver is not in SMM.
+
+**/
+BOOLEAN
+EFIAPI
+EfiAtRuntime (
+ VOID
+ );
+
+/**
+ Check to see if the SetVirtualAddressMsp() is invoked or not.
+
+ @retval TRUE SetVirtualAddressMsp() has been called.
+ @retval FALSE SetVirtualAddressMsp() has not been called.
+
+**/
+BOOLEAN
+EFIAPI
+EfiGoneVirtual (
+ VOID
+ );
+
+/**
+ Return current time and date information, and time-keeping
+ capabilities of hardware platform.
+
+ @param Time A pointer to storage to receive a snapshot of the current time.
+ @param Capabilities An optional pointer to a buffer to receive the real time clock device¡¯s
+ capabilities.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetTime (
+ OUT EFI_TIME *Time,
+ OUT EFI_TIME_CAPABILITIES *Capabilities
+ );
+
+/**
+ Set current time and date information.
+
+ @param Time A pointer to cache of time setting.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to execute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiSetTime (
+ IN EFI_TIME *Time
+ );
+
+/**
+ Return current wakeup alarm clock setting.
+
+ @param Enabled Indicate if the alarm clock is enabled or disabled.
+ @param Pending Indicate if the alarm signal is pending and requires acknowledgement.
+ @param Time Current alarm clock setting.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetWakeupTime (
+ OUT BOOLEAN *Enabled,
+ OUT BOOLEAN *Pending,
+ OUT EFI_TIME *Time
+ );
+
+/**
+ Set current wakeup alarm clock.
+
+ @param Enable Enable or disable current alarm clock..
+ @param Time Point to alarm clock setting.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiSetWakeupTime (
+ IN BOOLEAN Enable,
+ IN EFI_TIME *Time
+ );
+
+/**
+ Return value of variable.
+
+ @param VariableName the name of the vendor's variable, it's a
+ Null-Terminated Unicode String
+ @param VendorGuid Unify identifier for vendor.
+ @param Attributes Point to memory location to return the attributes of variable. If the point
+ is NULL, the parameter would be ignored.
+ @param DataSize As input, point to the maxinum size of return Data-Buffer.
+ As output, point to the actual size of the returned Data-Buffer.
+ @param Data Point to return Data-Buffer.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetVariable (
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *DataSize,
+ OUT VOID *Data
+ )
+;
+
+/**
+ Enumerates variable's name.
+
+ @param VariableNameSize As input, point to maxinum size of variable name.
+ As output, point to actual size of varaible name.
+ @param VariableName As input, supplies the last VariableName that was returned by
+ GetNextVariableName().
+ As output, returns the name of variable. The name
+ string is Null-Terminated Unicode string.
+ @param VendorGuid As input, supplies the last VendorGuid that was returned by
+ GetNextVriableName().
+ As output, returns the VendorGuid of the current variable.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetNextVariableName (
+ IN OUT UINTN *VariableNameSize,
+ IN OUT CHAR16 *VariableName,
+ IN OUT EFI_GUID *VendorGuid
+ );
+
+/**
+ Sets value of variable.
+
+ @param VariableName the name of the vendor's variable, it's a
+ Null-Terminated Unicode String
+ @param VendorGuid Unify identifier for vendor.
+ @param Attributes Point to memory location to return the attributes of variable. If the point
+ is NULL, the parameter would be ignored.
+ @param DataSize The size in bytes of Data-Buffer.
+ @param Data Point to the content of the variable.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiSetVariable (
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ IN UINT32 Attributes,
+ IN UINTN DataSize,
+ IN VOID *Data
+ );
+
+/**
+ Returns the next high 32 bits of platform's monotonic counter.
+
+ @param HighCount Pointer to returned value.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetNextHighMonotonicCount (
+ OUT UINT32 *HighCount
+ );
+
+/**
+ Resets the entire platform.
+
+ @param ResetType The type of reset to perform.
+ @param ResetStatus The status code for reset.
+ @param DataSize The size in bytes of reset data.
+ @param ResetData Pointer to data buffer that includes
+ Null-Terminated Unicode string.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+VOID
+EfiResetSystem (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN CHAR16 *ResetData
+ );
+
+/**
+ Determines the new virtual address that is to be used on subsequent memory accesses.
+
+ @param DebugDisposition Supplies type information for the pointer being converted.
+ @param Address The pointer to a pointer that is to be fixed to be the
+ value needed for the new virtual address mapping being
+ applied.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiConvertPointer (
+ IN UINTN DebugDisposition,
+ IN OUT VOID *Address
+ );
+
+
+/**
+ Change the runtime addressing mode of EFI firmware from physical to virtual.
+
+ @param MemoryMapSize The size in bytes of VirtualMap.
+ @param DescriptorSize The size in bytes of an entry in the VirtualMap.
+ @param DescriptorVersion The version of the structure entries in VirtualMap.
+ @param VirtualMap An array of memory descriptors which contain new virtual
+ address mapping information for all runtime ranges. Type
+ EFI_MEMORY_DESCRIPTOR is defined in the
+ GetMemoryMap() function description.
+
+ @retval EFI_SUCCESS The virtual address map has been applied.
+ @retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in
+ virtual address mapped mode.
+ @retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is
+ invalid.
+ @retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory
+ map that requires a mapping.
+ @retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found
+ in the memory map.
+**/
+EFI_STATUS
+EFIAPI
+EfiSetVirtualAddressMap (
+ IN UINTN MemoryMapSize,
+ IN UINTN DescriptorSize,
+ IN UINT32 DescriptorVersion,
+ IN CONST EFI_MEMORY_DESCRIPTOR *VirtualMap
+ );
+
+
+/**
+ Conver the standard Lib double linked list to a virtual mapping.
+
+ @param DebugDisposition Supplies type information for the pointer being converted.
+ @param ListHead Head of linked list to convert.
+
+ @retval EFI_SUCCESS Success to execute the function.
+ @retval !EFI_SUCCESS Failed to e3xecute the function.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiConvertList (
+ IN UINTN DebugDisposition,
+ IN OUT LIST_ENTRY *ListHead
+ );
+
+
+EFI_STATUS
+EFIAPI
+EfiUpdateCapsule (
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
+ IN UINTN CapsuleCount,
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList
+ );
+
+
+EFI_STATUS
+EFIAPI
+EfiQueryCapsuleCapabilities (
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
+ IN UINTN CapsuleCount,
+ OUT UINT64 *MaximumCapsuleSize,
+ OUT EFI_RESET_TYPE *ResetType
+ );
+
+EFI_STATUS
+EFIAPI
+EfiQueryVariableInfo (
+ IN UINT32 Attrubutes,
+ OUT UINT64 *MaximumVariableStorageSize,
+ OUT UINT64 *RemainingVariableStorageSize,
+ OUT UINT64 *MaximumVariableSize
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/DxeServicesTableLib.h b/MdePkg/Include/Library/DxeServicesTableLib.h new file mode 100644 index 0000000000..f473a1721c --- /dev/null +++ b/MdePkg/Include/Library/DxeServicesTableLib.h @@ -0,0 +1,26 @@ +/** @file
+ Library that provides a global pointer to the DXE Services Table
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeServicesTableLib.h
+
+**/
+
+#ifndef __DXE_SERVICES_TABLE_LIB_H__
+#define __DXE_SERVICES_TABLE_LIB_H__
+
+//
+//
+//
+extern EFI_DXE_SERVICES *gDS;
+
+#endif
+
diff --git a/MdePkg/Include/Library/DxeSmmDriverEntryPoint.h b/MdePkg/Include/Library/DxeSmmDriverEntryPoint.h new file mode 100644 index 0000000000..12d35d5f52 --- /dev/null +++ b/MdePkg/Include/Library/DxeSmmDriverEntryPoint.h @@ -0,0 +1,140 @@ +/** @file
+ Entry point to a DXE SMM Driver
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MODULE_ENTRY_POINT_H__
+#define __MODULE_ENTRY_POINT_H__
+
+//
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented
+//
+extern const UINT32 _gUefiDriverRevision;
+
+//
+// Declare the number of entry points in the image.
+//
+extern const UINT8 _gDriverEntryPointCount;
+
+//
+// Declare the number of unload handler in the image.
+//
+extern const UINT8 _gDriverUnloadImageCount;
+
+/**
+ Enrty point to DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Enrty point wrapper of DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Computes the cummulative return status for the driver entry point and perform
+ a long jump back into DriverEntryPoint().
+
+ @param Status Status returned by the driver that is exiting.
+
+**/
+VOID
+EFIAPI
+ExitDriver (
+ IN EFI_STATUS Status
+ );
+
+/**
+ Call constructs for all libraries. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Call destructors for all libraries. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryDestructorList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Call the list of driver entry points. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @return Status returned by entry points of drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessModuleEntryPointList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Call the unload handlers for all the modules. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+
+ @return Status returned by unload handlers of drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessModuleUnloadList (
+ IN EFI_HANDLE ImageHandle
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/HiiLib.h b/MdePkg/Include/Library/HiiLib.h new file mode 100644 index 0000000000..05824a6e33 --- /dev/null +++ b/MdePkg/Include/Library/HiiLib.h @@ -0,0 +1,44 @@ +/** @file
+ Public include file for the HII Library
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HiiLib.h
+
+**/
+
+#ifndef __HII_LIB_H__
+#define __HII_LIB_H__
+
+/**
+ This function allocates pool for an EFI_HII_PACKAGES structure
+ with enough space for the variable argument list of package pointers.
+ The allocated structure is initialized using NumberOfPackages, Guid,
+ and the variable length argument list of package pointers.
+
+ @param NumberOfPackages The number of HII packages to prepare.
+ @param Guid Package GUID.
+
+ @return
+ The allocated and initialized packages.
+
+**/
+EFI_HII_PACKAGES *
+EFIAPI
+PreparePackages (
+ IN UINTN NumberOfPackages,
+ IN CONST EFI_GUID *Guid OPTIONAL,
+ ...
+ )
+;
+
+
+
+#endif
diff --git a/MdePkg/Include/Library/HobLib.h b/MdePkg/Include/Library/HobLib.h new file mode 100644 index 0000000000..cac9c4fa09 --- /dev/null +++ b/MdePkg/Include/Library/HobLib.h @@ -0,0 +1,275 @@ +/** @file
+ Public include file for the HOB Library
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: HobLib.h
+
+**/
+
+#ifndef __HOB_LIB_H__
+#define __HOB_LIB_H__
+
+/**
+ Returns the pointer to the HOB list.
+
+ @return The pointer to the HOB list.
+
+**/
+VOID *
+EFIAPI
+GetHobList (
+ VOID
+ )
+;
+
+/**
+ This function searches the first instance of a HOB type from the starting HOB pointer.
+ If there does not exist such HOB type from the starting HOB pointer, it will return NULL.
+
+ @param Type The HOB type to return.
+ @param HobStart The starting HOB pointer to search from.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextHob (
+ IN UINT16 Type,
+ IN CONST VOID *HobStart
+ )
+;
+
+/**
+ This function searches the first instance of a HOB type among the whole HOB list.
+ If there does not exist such HOB type in the HOB list, it will return NULL.
+
+ @param Type The HOB type to return.
+
+ @return The next instance of a HOB type from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetFirstHob (
+ IN UINT16 Type
+ )
+;
+
+/**
+ This function searches the first instance of a HOB from the starting HOB pointer.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+ @param HobStart A pointer to a Guid.
+
+ @return The next instance of the matched GUID HOB from the starting HOB.
+
+**/
+VOID *
+EFIAPI
+GetNextGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN CONST VOID *HobStart
+ )
+;
+
+/**
+ This function searches the first instance of a HOB among the whole HOB list.
+ Such HOB should satisfy two conditions:
+ its HOB type is EFI_HOB_TYPE_GUID_EXTENSION and its GUID Name equals to the input Guid.
+ If there does not exist such HOB from the starting HOB pointer, it will return NULL.
+
+ @param Guid The GUID to match with in the HOB list.
+
+ @return The first instance of the matched GUID HOB among the whole HOB list.
+
+**/
+VOID *
+EFIAPI
+GetFirstGuidHob (
+ IN CONST EFI_GUID *Guid
+ )
+;
+
+/**
+ This function builds a HOB for a loaded PE32 module.
+
+ @param ModuleName The GUID File Name of the module.
+ @param MemoryAllocationModule The 64 bit physical address of the module.
+ @param ModuleLength The length of the module in bytes.
+ @param EntryPoint The 64 bit physical address of the module’s entry point.
+
+**/
+VOID
+EFIAPI
+BuildModuleHob (
+ IN CONST EFI_GUID *ModuleName,
+ IN EFI_PHYSICAL_ADDRESS MemoryAllocationModule,
+ IN UINT64 ModuleLength,
+ IN EFI_PHYSICAL_ADDRESS EntryPoint
+ )
+;
+
+/**
+ Builds a HOB that describes a chunk of system memory.
+
+ @param ResourceType The type of resource described by this HOB.
+ @param ResourceAttribute The resource attributes of the memory described by this HOB.
+ @param PhysicalStart The 64 bit physical address of memory described by this HOB.
+ @param NumberOfBytes The length of the memory described by this HOB in bytes.
+
+**/
+VOID
+EFIAPI
+BuildResourceDescriptorHob (
+ IN EFI_RESOURCE_TYPE ResourceType,
+ IN EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttribute,
+ IN EFI_PHYSICAL_ADDRESS PhysicalStart,
+ IN UINT64 NumberOfBytes
+ )
+;
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification
+ and returns the start address of GUID HOB data so that caller can fill the customized data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidHob (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN DataLength
+ )
+;
+
+/**
+ This function builds a customized HOB tagged with a GUID for identification,
+ copies the input data to the HOB data field, and returns the start address of GUID HOB data.
+
+ @param Guid The GUID to tag the customized HOB.
+ @param Data The data to be copied into the data field of the GUID HOB.
+ @param DataLength The size of the data payload for the GUID HOB.
+
+ @return The start address of GUID HOB data.
+
+**/
+VOID *
+EFIAPI
+BuildGuidDataHob (
+ IN CONST EFI_GUID *Guid,
+ IN VOID *Data,
+ IN UINTN DataLength
+ )
+;
+
+/**
+ Builds a Firmware Volume HOB.
+
+ @param BaseAddress The base address of the Firmware Volume.
+ @param Length The size of the Firmware Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildFvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Builds a Capsule Volume HOB.
+
+ @param BaseAddress The base address of the Capsule Volume.
+ @param Length The size of the Capsule Volume in bytes.
+
+**/
+VOID
+EFIAPI
+BuildCvHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Builds a HOB for the CPU.
+
+ @param SizeOfMemorySpace The maximum physical memory addressability of the processor.
+ @param SizeOfIoSpace The maximum physical I/O addressability of the processor.
+
+**/
+VOID
+EFIAPI
+BuildCpuHob (
+ IN UINT8 SizeOfMemorySpace,
+ IN UINT8 SizeOfIoSpace
+ )
+;
+
+/**
+ Builds a HOB for the Stack.
+
+ @param BaseAddress The 64 bit physical address of the Stack.
+ @param Length The length of the stack in bytes.
+
+**/
+VOID
+EFIAPI
+BuildStackHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length
+ )
+;
+
+/**
+ Builds a HOB for the BSP store.
+
+ @param BaseAddress The 64 bit physical address of the BSP.
+ @param Length The length of the BSP store in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildBspStoreHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+;
+
+/**
+ Builds a HOB for the memory allocation.
+
+ @param BaseAddress The 64 bit physical address of the memory.
+ @param Length The length of the memory allocation in bytes.
+ @param MemoryType Type of memory allocated by this HOB.
+
+**/
+VOID
+EFIAPI
+BuildMemoryAllocationHob (
+ IN EFI_PHYSICAL_ADDRESS BaseAddress,
+ IN UINT64 Length,
+ IN EFI_MEMORY_TYPE MemoryType
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/IoLib.h b/MdePkg/Include/Library/IoLib.h new file mode 100644 index 0000000000..532c26b0e5 --- /dev/null +++ b/MdePkg/Include/Library/IoLib.h @@ -0,0 +1,2311 @@ +/** @file
+ I/O and MMIO Library Services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IoLib.h
+
+**/
+
+#ifndef __IO_LIB_H__
+#define __IO_LIB_H__
+
+#define IO_LIB_ADDRESS(Segment,Port) \
+ ( ((Port) & 0xffff) | (((Segment) & 0xffff) << 16) )
+
+/**
+ Reads an 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoRead8 (
+ IN UINTN Port
+ );
+
+/**
+ Writes an 8-bit I/O port.
+
+ Writes the 8-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoWrite8 (
+ IN UINTN Port,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoOr8 (
+ IN UINTN Port,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAnd8 (
+ IN UINTN Port,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit I/O port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoAndThenOr8 (
+ IN UINTN Port,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in an 8-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldRead8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldWrite8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 8-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 8-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAnd8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 8-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 8-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT8
+EFIAPI
+IoBitFieldAndThenOr8 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoRead16 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 16-bit I/O port.
+
+ Writes the 16-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoWrite16 (
+ IN UINTN Port,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoOr16 (
+ IN UINTN Port,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAnd16 (
+ IN UINTN Port,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit I/O port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoAndThenOr16 (
+ IN UINTN Port,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 16-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldRead16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldWrite16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 16-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 16-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAnd16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 16-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 16-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT16
+EFIAPI
+IoBitFieldAndThenOr16 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoRead32 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 32-bit I/O port.
+
+ Writes the 32-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoWrite32 (
+ IN UINTN Port,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoOr32 (
+ IN UINTN Port,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAnd32 (
+ IN UINTN Port,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit I/O port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoAndThenOr32 (
+ IN UINTN Port,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 32-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldRead32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldWrite32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 32-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 32-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAnd32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 32-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 32-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT32
+EFIAPI
+IoBitFieldAndThenOr32 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
+ This function must guarantee that all I/O read and write operations are
+ serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoRead64 (
+ IN UINTN Port
+ );
+
+/**
+ Writes a 64-bit I/O port.
+
+ Writes the 64-bit I/O port specified by Port with the value specified by Value
+ and returns Value. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param Value The value to write to the I/O port.
+
+ @return The value written the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoWrite64 (
+ IN UINTN Port,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoOr64 (
+ IN UINTN Port,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back
+ to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAnd64 (
+ IN UINTN Port,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit I/O port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, performs a bitwise OR
+ between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 64-bit I/O port specified by Port. The value
+ written to the I/O port is returned. This function must guarantee that all
+ I/O read and write operations are serialized.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoAndThenOr64 (
+ IN UINTN Port,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of an I/O register.
+
+ Reads the bit field in a 64-bit I/O register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldRead64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to an I/O register.
+
+ Writes Value to the bit field of the I/O register. The bit field is specified
+ by the StartBit and the EndBit. All other bits in the destination I/O
+ register are preserved. The value written to the I/O port is returned. Extra
+ left bits in Value are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldWrite64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise inclusive OR
+ between the read result and the value specified by OrData, and writes the
+ result to the 64-bit I/O port specified by Port. The value written to the I/O
+ port is returned. This function must guarantee that all I/O read and write
+ operations are serialized. Extra left bits in OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the
+ result back to the bit field in the 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND between
+ the read result and the value specified by AndData, and writes the result to
+ the 64-bit I/O port specified by Port. The value written to the I/O port is
+ returned. This function must guarantee that all I/O read and write operations
+ are serialized. Extra left bits in AndData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAnd64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit port.
+
+ Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed
+ by a bitwise inclusive OR between the read result and the value specified by
+ AndData, and writes the result to the 64-bit I/O port specified by Port. The
+ value written to the I/O port is returned. This function must guarantee that
+ all I/O read and write operations are serialized. Extra left bits in both
+ AndData and OrData are stripped.
+
+ If 64-bit I/O port operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Port The I/O port to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with the read value from the I/O port.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the I/O port.
+
+**/
+UINT64
+EFIAPI
+IoBitFieldAndThenOr64 (
+ IN UINTN Port,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit MMIO register.
+
+ Writes the 8-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioWrite8 (
+ IN UINTN Address,
+ IN UINT8 Value
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 8-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in an 8-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value read.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 8-bit register is returned.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 8-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 8-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit MMIO register.
+
+ Reads the 8-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 8-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 8-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT8
+EFIAPI
+MmioBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit MMIO register.
+
+ Writes the 16-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioWrite16 (
+ IN UINTN Address,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 16-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 16-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value read.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 16-bit register is returned.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 16-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 16-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit MMIO register.
+
+ Reads the 16-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 16-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 16-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT16
+EFIAPI
+MmioBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit MMIO register.
+
+ Writes the 32-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioWrite32 (
+ IN UINTN Address,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 32-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 32-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value read.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 32-bit register is returned.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 32-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 32-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit MMIO register.
+
+ Reads the 32-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 32-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 32-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT32
+EFIAPI
+MmioBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
+ returned. This function must guarantee that all MMIO read and write
+ operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to read.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioRead64 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 64-bit MMIO register.
+
+ Writes the 64-bit MMIO register specified by Address with the value specified
+ by Value and returns Value. This function must guarantee that all MMIO read
+ and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param Value The value to write to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioWrite64 (
+ IN UINTN Address,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise inclusive OR, and writes the
+ result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param OrData The value to OR with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioOr64 (
+ IN UINTN Address,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result
+ back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAnd64 (
+ IN UINTN Address,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise
+ inclusive OR, and writes the result back to the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, performs a
+ bitwise OR between the result of the AND operation and the value specified by
+ OrData, and writes the result to the 64-bit MMIO register specified by
+ Address. The value written to the MMIO register is returned. This function
+ must guarantee that all MMIO read and write operations are serialized.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+
+
+ @param Address The MMIO register to write.
+ @param AndData The value to AND with the read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioAndThenOr64 (
+ IN UINTN Address,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field of a MMIO register.
+
+ Reads the bit field in a 64-bit MMIO register. The bit field is specified by
+ the StartBit and the EndBit. The value of the bit field is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+
+ @return The value read.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldRead64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a MMIO register.
+
+ Writes Value to the bit field of the MMIO register. The bit field is
+ specified by the StartBit and the EndBit. All other bits in the destination
+ MMIO register are preserved. The new value of the 64-bit register is returned.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param Value New value of the bit field.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldWrite64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 Value
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise
+ inclusive OR between the read result and the value specified by OrData, and
+ writes the result to the 64-bit MMIO register specified by Address. The value
+ written to the MMIO register is returned. This function must guarantee that
+ all MMIO read and write operations are serialized. Extra left bits in OrData
+ are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param OrData The value to OR with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 OrData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and
+ writes the result back to the bit field in the 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ between the read result and the value specified by AndData, and writes the
+ result to the 64-bit MMIO register specified by Address. The value written to
+ the MMIO register is returned. This function must guarantee that all MMIO
+ read and write operations are serialized. Extra left bits in AndData are
+ stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAnd64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData
+ );
+
+/**
+ Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed
+ by a bitwise inclusive OR, and writes the result back to the bit field in the
+ 64-bit MMIO register.
+
+ Reads the 64-bit MMIO register specified by Address, performs a bitwise AND
+ followed by a bitwise inclusive OR between the read result and the value
+ specified by AndData, and writes the result to the 64-bit MMIO register
+ specified by Address. The value written to the MMIO register is returned.
+ This function must guarantee that all MMIO read and write operations are
+ serialized. Extra left bits in both AndData and OrData are stripped.
+
+ If 64-bit MMIO register operations are not supported, then ASSERT().
+ If StartBit is greater than 63, then ASSERT().
+ If EndBit is greater than 63, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address MMIO register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..63.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..63.
+ @param AndData The value to AND with read value from the MMIO register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the MMIO register.
+
+**/
+UINT64
+EFIAPI
+MmioBitFieldAndThenOr64 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT64 AndData,
+ IN UINT64 OrData
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/MemoryAllocationLib.h b/MdePkg/Include/Library/MemoryAllocationLib.h new file mode 100644 index 0000000000..4e76684f77 --- /dev/null +++ b/MdePkg/Include/Library/MemoryAllocationLib.h @@ -0,0 +1,547 @@ +/** @file
+ Memory Allocation Library Services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemoryAllocationLib.h
+
+**/
+
+#ifndef __MEMORY_ALLOCATION_LIB_H__
+#define __MEMORY_ALLOCATION_LIB_H__
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return
+ A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePages (
+ IN UINTN Pages
+ )
+;
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return
+ A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePages (
+ IN UINTN Pages
+ )
+;
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType.
+
+ @param Pages The number of 4 KB pages to allocate.
+
+ @return
+ A pointer to the allocated buffer. The buffer returned is aligned on a 4KB boundary.
+ If Pages is 0, then NULL is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPages (
+ IN UINTN Pages
+ )
+;
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+ None.
+
+**/
+VOID
+EFIAPI
+FreePages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+;
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an alignment specified by Alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment.
+
+ @param Pages The number of 4 KB pages to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ The allocated buffer is returned. If Pages is 0, then NULL is returned.
+ If there is not enough memory at the specified alignment remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPages (
+ IN UINTN Pages,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Frees one or more 4KB pages that were previously allocated with
+ one of the aligned page allocation functions in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer of pages to free.
+ @param Pages The number of 4 KB pages to free.
+
+ None.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPages (
+ IN VOID *Buffer,
+ IN UINTN Pages
+ )
+;
+
+/**
+ Allocates a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocatePool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimePool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedPool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateZeroPool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeZeroPool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate and zero.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedZeroPool (
+ IN UINTN AllocationSize
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer
+ )
+;
+
+/**
+ Frees a buffer that was previously allocated with one of the pool allocation functions
+ in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer to free.
+
+ None.
+
+**/
+VOID
+EFIAPI
+FreePool (
+ IN VOID *Buffer
+ )
+;
+
+/**
+ Allocates a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimePool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Allocates and zeros a buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedZeroPool (
+ IN UINTN AllocationSize,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedRuntimeCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment.
+
+ @param AllocationSize The number of bytes to allocate.
+ @param Buffer The buffer to copy to the allocated buffer.
+ @param Alignment The requested alignment of the allocation. Must be a power of two.
+ If Alignment is zero, then byte alignment is used.
+
+ @return
+ A pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned.
+ If there is not enough memory remaining to satisfy the request, then NULL is returned.
+
+**/
+VOID *
+EFIAPI
+AllocateAlignedReservedCopyPool (
+ IN UINTN AllocationSize,
+ IN CONST VOID *Buffer,
+ IN UINTN Alignment
+ )
+;
+
+/**
+ Frees a buffer that was previously allocated with one of the aligned pool allocation functions
+ in the Memory Allocation Library.
+
+ @param Buffer Pointer to the buffer to free.
+
+ None.
+
+**/
+VOID
+EFIAPI
+FreeAlignedPool (
+ IN VOID *Buffer
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/PcdLib.h b/MdePkg/Include/Library/PcdLib.h new file mode 100644 index 0000000000..1375e0039f --- /dev/null +++ b/MdePkg/Include/Library/PcdLib.h @@ -0,0 +1,690 @@ +/** @file
+PCD Library Class Interface Declarations
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+
+Module Name: PcdLib.h
+
+**/
+
+#ifndef __PCD_LIB_H__
+#define __PCD_LIB_H__
+
+
+#define PcdToken(TokenName) _PCD_TOKEN_##TokenName
+
+
+//
+// Feature Flag is in the form of a global constant
+//
+#define FeaturePcdGet(TokenName) _gPcd_FixedAtBuild_##TokenName
+
+
+//
+// Fixed is fixed at build time
+//
+#define FixedPcdGet8(TokenName) _gPcd_FixedAtBuild_##TokenName
+#define FixedPcdGet16(TokenName) _gPcd_FixedAtBuild_##TokenName
+#define FixedPcdGet32(TokenName) _gPcd_FixedAtBuild_##TokenName
+#define FixedPcdGet64(TokenName) _gPcd_FixedAtBuild_##TokenName
+#define FixedPcdGetBool(TokenName) _gPcd_FixedAtBuild_##TokenName
+
+
+//
+// BugBug: This works for strings, but not constants.
+//
+#define FixedPcdGetPtr(TokenName) ((VOID *)_gPcd_FixedAtBuild_##TokenName)
+
+
+//
+// (Binary) Patch is in the form of a global variable
+//
+#define PatchPcdGet8(TokenName) _gPcd_BinaryPatch_##TokenName
+#define PatchPcdGet16(TokenName) _gPcd_BinaryPatch_##TokenName
+#define PatchPcdGet32(TokenName) _gPcd_BinaryPatch_##TokenName
+#define PatchPcdGet64(TokenName) _gPcd_BinaryPatch_##TokenName
+#define PatchPcdGetBool(TokenName) _gPcd_BinaryPatch_##TokenName
+#define PatchPcdGetPtr(TokenName) ((VOID *)_gPcd_BinaryPatch_##TokenName)
+
+
+//
+// Dynamic is via the protocol with only the TokenNumber as argument
+// It can also be Patch or Fixed type based on a build option
+//
+#define PcdGet8(TokenName) _PCD_MODE_8_##TokenName
+#define PcdGet16(TokenName) _PCD_MODE_16_##TokenName
+#define PcdGet32(TokenName) _PCD_MODE_32_##TokenName
+#define PcdGet64(TokenName) _PCD_MODE_64_##TokenName
+#define PcdGetPtr(TokenName) _PCD_MODE_PTR_##TokenName
+#define PcdGetBool(TokenName) _PCD_MODE_BOOL_##TokenName
+
+
+//
+// Dynamic Ex is to support binary distribution
+//
+#define PcdGetEx8(Guid, TokenName) LibPcdGetEx8 (Guid, _PCD_TOKEN_##TokenName)
+#define PcdGetEx16(Guid, TokenName) LibPcdGetEx16 (Guid, _PCD_TOKEN_##TokenName)
+#define PcdGetEx32(Guid, TokenName) LibPcdGetEx32 (Guid, _PCD_TOKEN_##TokenName)
+#define PcdGetEx64(Guid, TokenName) LibPcdGetEx64 (Guid, _PCD_TOKEN_##TokenName)
+#define PcdGetExPtr(Guid, TokenName) LibPcdGetExPtr (Guid, _PCD_TOKEN_##TokenName)
+#define PcdGetExBool(Guid, TokenName) LibPcdGetExBool (Guid, _PCD_TOKEN_##TokenName)
+
+
+//
+// Dynamic Set
+//
+#define PcdSet8(TokenName, Value) LibPcdSet8 (_PCD_TOKEN_##TokenName, Value)
+#define PcdSet16(TokenName, Value) LibPcdSet16 (_PCD_TOKEN_##TokenName, Value)
+#define PcdSet32(TokenName, Value) LibPcdSet32 (_PCD_TOKEN_##TokenName, Value)
+#define PcdSet64(TokenName, Value) LibPcdSet64 (_PCD_TOKEN_##TokenName, Value)
+#define PcdSetPtr(TokenName, Value) LibPcdSetPtr (_PCD_TOKEN_##TokenName, Value)
+#define PcdSetBool(TokenName, Value) LibPcdSetBool(_PCD_TOKEN_##TokenName, Value)
+
+
+//
+// Dynamic Set Ex
+//
+#define PcdSetEx8 (Guid, TokenName, Value) LibPcdSetEx8 (Guid, _PCD_TOKEN_##TokenName, Value)
+#define PcdSetEx16 (Guid, TokenName, Value) LibPcdSetEx16 (Guid, _PCD_TOKEN_##TokenName, Value)
+#define PcdSetEx32 (Guid, TokenName, Value) LibPcdSetEx32 (Guid, _PCD_TOKEN_##TokenName, Value)
+#define PcdSetEx64 (Guid, TokenName, Value) LibPcdSetEx64 (Guid, _PCD_TOKEN_##TokenName, Value)
+#define PcdSetExPtr (Guid, TokenName, Value) LibPcdSetExPtr (Guid, _PCD_TOKEN_##TokenName, Value)
+#define PcdSetExBool(Guid, TokenName, Value) LibPcdSetExBool(Guid, _PCD_TOKEN_##TokenName, Value)
+
+
+/**
+ Sets the current SKU in the PCD database to the value specified by SkuId. SkuId is returned.
+
+ @param[in] SkuId The SKU value that will be used when the PCD service will retrieve and
+ set values associated with a PCD token.
+
+ @retval UINTN Return the SKU ID that just be set.
+
+**/
+UINTN
+EFIAPI
+LibPcdSetSku (
+ IN UINTN SkuId
+ );
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Returns the 8-bit value for the token specified by TokenNumber.
+
+**/
+UINT8
+EFIAPI
+LibPcdGet8 (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber.
+
+ @param[in] The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Returns the 16-bit value for the token specified by TokenNumber.
+
+**/
+UINT16
+EFIAPI
+LibPcdGet16 (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Returns the 32-bit value for the token specified by TokenNumber.
+
+**/
+UINT32
+EFIAPI
+LibPcdGet32 (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Returns the 64-bit value for the token specified by TokenNumber.
+
+**/
+UINT64
+EFIAPI
+LibPcdGet64 (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the pointer to the buffer of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Returns the pointer to the token specified by TokenNumber.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetPtr (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Returns the Boolean value of the token specified by TokenNumber.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetBool (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the size of the token specified by TokenNumber.
+
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Returns the size of the token specified by TokenNumber.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetSize (
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 8-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT8 Return the UINT8.
+
+**/
+UINT8
+EFIAPI
+LibPcdGetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 16-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT16 Return the UINT16.
+
+**/
+UINT16
+EFIAPI
+LibPcdGetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 32-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT32 Return the UINT32.
+
+**/
+UINT32
+EFIAPI
+LibPcdGetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the 64-bit value for the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINT64 Return the UINT64.
+
+**/
+UINT64
+EFIAPI
+LibPcdGetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the pointer to the buffer of token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval VOID* Return the VOID* pointer.
+
+**/
+VOID *
+EFIAPI
+LibPcdGetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the Boolean value of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval BOOLEAN Return the BOOLEAN.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdGetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Returns the size of the token specified by TokenNumber and Guid.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates
+ which namespace to retrieve a value from.
+ @param[in] TokenNumber The PCD token number to retrieve a current value for.
+
+ @retval UINTN Return the size.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetExSize (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSet8 (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT16 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSet16 (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSet32 (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSet64 (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber to
+ the value specified by Value. Value is returned.
+ If Value is NULL, then ASSERT().
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value A pointer to the buffer to set.
+
+ @retval VOID* Return the pointer for the buffer been set.
+
+**/
+VOID*
+EFIAPI
+LibPcdSetPtr (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber
+ to the value specified by Value. Value is returned.
+
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The boolean value to set.
+
+ @retval BOOLEAN Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetBool (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+
+/**
+ Sets the 8-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT8
+EFIAPI
+LibPcdSetEx8 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+
+/**
+ Sets the 16-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 16-bit value to set.
+
+ @retval UINT8 Return the value been set.
+
+**/
+UINT16
+EFIAPI
+LibPcdSetEx16 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+
+/**
+ Sets the 32-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 32-bit value to set.
+
+ @retval UINT32 Return the value been set.
+
+**/
+UINT32
+EFIAPI
+LibPcdSetEx32 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+
+/**
+ Sets the 64-bit value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 64-bit value to set.
+
+ @retval UINT64 Return the value been set.
+
+**/
+UINT64
+EFIAPI
+LibPcdSetEx64 (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+
+/**
+ Sets a buffer for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+ If Value is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The 8-bit value to set.
+
+ @retval VOID * Return the value been set.
+
+**/
+VOID *
+EFIAPI
+LibPcdSetExPtr (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+
+/**
+ Sets the Boolean value for the token specified by TokenNumber and
+ Guid to the value specified by Value. Value is returned.
+ If Guid is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that
+ designates which namespace to set a value from.
+ @param[in] TokenNumber The PCD token number to set a current value for.
+ @param[in] Value The Boolean value to set.
+
+ @retval Boolean Return the value been set.
+
+**/
+BOOLEAN
+EFIAPI
+LibPcdSetExBool (
+ IN CONST GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+
+/**
+ When the token specified by TokenNumber and Guid is set,
+ then notification function specified by NotificationFunction is called.
+ If Guid is NULL, then the default token space is used.
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] CallBackGuid The PCD token GUID being set.
+ @param[in] CallBackToken The PCD token number being set.
+ @param[in] TokenData A pointer to the token data being set.
+ @param[in] TokenDataSize The size, in bytes, of the data being set.
+
+ @retval VOID
+
+**/
+typedef
+VOID
+(EFIAPI *PCD_CALLBACK) (
+ IN CONST GUID *CallBackGuid, OPTIONAL
+ IN UINTN CallBackToken,
+ IN VOID *TokenData,
+ IN UINTN TokenDataSize
+ );
+
+
+/**
+ When the token specified by TokenNumber and Guid is set,
+ then notification function specified by NotificationFunction is called.
+ If Guid is NULL, then the default token space is used.
+ If NotificationFunction is NULL, then ASSERT().
+
+ @param[in] Guid Pointer to a 128-bit unique value that designates which
+ namespace to set a value from. If NULL, then the default
+ token space is used.
+ @param[in] TokenNumber The PCD token number to monitor.
+ @param[in] NotificationFunction The function to call when the token
+ specified by Guid and TokenNumber is set.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCallbackOnSet (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ );
+
+
+/**
+ Disable a notification function that was established with LibPcdCallbackonSet().
+
+ @param[in] Guid Specify the GUID token space.
+ @param[in] TokenNumber Specify the token number.
+ @param[in] NotificationFunction The callback function to be unregistered.
+
+ @retval VOID
+
+**/
+VOID
+EFIAPI
+LibPcdCancelCallback (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN TokenNumber,
+ IN PCD_CALLBACK NotificationFunction
+ );
+
+
+/**
+ Retrieves the next PCD token number from the token space specified by Guid.
+ If Guid is NULL, then the default token space is used. If TokenNumber is 0,
+ then the first token number is returned. Otherwise, the token number that
+ follows TokenNumber in the token space is returned. If TokenNumber is the last
+ token number in the token space, then 0 is returned. If TokenNumber is not 0 and
+ is not in the token space specified by Guid, then ASSERT().
+
+ @param[in] Pointer to a 128-bit unique value that designates which namespace
+ to set a value from. If NULL, then the default token space is used.
+ @param[in] The previous PCD token number. If 0, then retrieves the first PCD
+ token number.
+
+ @retval UINTN The next valid token number.
+
+**/
+UINTN
+EFIAPI
+LibPcdGetNextToken (
+ IN CONST GUID *Guid, OPTIONAL
+ IN UINTN *TokenNumber
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PciCf8Lib.h b/MdePkg/Include/Library/PciCf8Lib.h new file mode 100644 index 0000000000..a1023916ba --- /dev/null +++ b/MdePkg/Include/Library/PciCf8Lib.h @@ -0,0 +1,1052 @@ +/** @file
+ PCI CF8 Library Services for PCI Segment #0
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciCf8Lib.h
+
+**/
+
+#ifndef __PCI_CF8_LIB_H__
+#define __PCI_CF8_LIB_H__
+
+#include <Library/PciLib.h>
+
+/**
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+ address that can be passed to the PCI Library functions.
+
+ Computes an address that is compatible with the PCI Library functions. The
+ unused upper bits of Bus, Device, Function and Register are stripped prior to
+ the generation of the address.
+
+ @param Bus PCI Bus number. Range 0..255.
+ @param Device PCI Device number. Range 0..31.
+ @param Function PCI Function number. Range 0..7.
+ @param Register PCI Register number. Range 0..255.
+
+ @return The encode PCI address.
+
+**/
+#define PCI_CF8_LIB_ADDRESS(Bus,Device,Function,Offset) \
+ PCI_LIB_ADDRESS (Bus, Device, Function, Offset)
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Read8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Write8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8Or8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8And8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8AndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciCf8BitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Read16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Write16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8Or16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8And16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8AndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciCf8BitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Read32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Write32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8Or32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8And32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8AndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If the register specified by Address >= 0x100, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciCf8BitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8ReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ );
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If the register specified by StartAddress >= 0x100, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x100, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciCf8WriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PciExpressLib.h b/MdePkg/Include/Library/PciExpressLib.h new file mode 100644 index 0000000000..b773e72fd8 --- /dev/null +++ b/MdePkg/Include/Library/PciExpressLib.h @@ -0,0 +1,1020 @@ +/** @file
+ Pci Express Library Services for PCI Segment #0
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciExpressLib.h
+
+**/
+
+#ifndef __PCI_EXPRESS_LIB_H__
+#define __PCI_EXPRESS_LIB_H__
+
+#include <Library/PciLib.h>
+
+/**
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+ address that can be passed to the PCI Library functions.
+
+ Computes an address that is compatible with the PCI Library functions. The
+ unused upper bits of Bus, Device, Function and Register are stripped prior to
+ the generation of the address.
+
+ @param Bus PCI Bus number. Range 0..255.
+ @param Device PCI Device number. Range 0..31.
+ @param Function PCI Function number. Range 0..7.
+ @param Register PCI Register number. Range 0..4095.
+
+ @return The encode PCI address.
+
+**/
+#define PCI_EXPRESS_LIB_ADDRESS(Bus,Device,Function,Offset) \
+ PCI_LIB_ADDRESS (Bus, Device, Function, Offset)
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciExpressBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciExpressBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciExpressBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ );
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciExpressWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PciLib.h b/MdePkg/Include/Library/PciLib.h new file mode 100644 index 0000000000..55edf4082f --- /dev/null +++ b/MdePkg/Include/Library/PciLib.h @@ -0,0 +1,1015 @@ +/** @file
+ PCI Library Services for PCI Segment #0
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciLib.h
+
+**/
+
+#ifndef __PCI_LIB_H__
+#define __PCI_LIB_H__
+
+/**
+ Macro that converts PCI Bus, PCI Device, PCI Function and PCI Register to an
+ address that can be passed to the PCI Library functions.
+
+ @param Bus PCI Bus number. Range 0..255.
+ @param Device PCI Device number. Range 0..31.
+ @param Function PCI Function number. Range 0..7.
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095
+ for PCI Express.
+
+ @return The encoded PCI address.
+
+**/
+#define PCI_LIB_ADDRESS(Bus,Device,Function,Offset) \
+ (((Offset) & 0xfff) | (((Function) & 0x07) << 12) | (((Device) & 0x1f) << 15) | (((Bus) & 0xff) << 20))
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciRead8 (
+ IN UINTN Address
+ );
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciWrite8 (
+ IN UINTN Address,
+ IN UINT8 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with
+ an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciOr8 (
+ IN UINTN Address,
+ IN UINT8 OrData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAnd8 (
+ IN UINTN Address,
+ IN UINT8 AndData
+ );
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit
+ value, followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciAndThenOr8 (
+ IN UINTN Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldRead8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 8-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldWrite8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 8-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 8-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAnd8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ );
+
+/**
+ Reads a bit field in an 8-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 8-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..7.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..7.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciBitFieldAndThenOr8 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ );
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciRead16 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciWrite16 (
+ IN UINTN Address,
+ IN UINT16 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with
+ a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciOr16 (
+ IN UINTN Address,
+ IN UINT16 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAnd16 (
+ IN UINTN Address,
+ IN UINT16 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit
+ value, followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciAndThenOr16 (
+ IN UINTN Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldRead16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 16-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldWrite16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 16-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 16-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAnd16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ );
+
+/**
+ Reads a bit field in a 16-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 16-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 16-bit boundary, then ASSERT().
+ If StartBit is greater than 15, then ASSERT().
+ If EndBit is greater than 15, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..15.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..15.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciBitFieldAndThenOr16 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ );
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+
+ @return The read value from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciRead32 (
+ IN UINTN Address
+ );
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the
+ value specified by Value. Value is returned. This function must guarantee
+ that all PCI read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param Value The value to write.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciWrite32 (
+ IN UINTN Address,
+ IN UINT32 Data
+ );
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with
+ a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciOr32 (
+ IN UINTN Address,
+ IN UINT32 OrData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAnd32 (
+ IN UINTN Address,
+ IN UINT32 AndData
+ );
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit
+ value, followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and
+ the value specified by OrData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+
+ @param Address Address that encodes the PCI Bus, Device, Function and
+ Register.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciAndThenOr32 (
+ IN UINTN Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register. The bit field is
+ specified by the StartBit and the EndBit. The value of the bit field is
+ returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to read.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+
+ @return The value of the bit field read from the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldRead32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ );
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register. The bit
+ field is specified by the StartBit and the EndBit. All other bits in the
+ destination PCI configuration register are preserved. The new value of the
+ 32-bit register is returned.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param Value New value of the bit field.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldWrite32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and
+ writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise inclusive OR between the read result and the value specified by
+ OrData, and writes the result to the 32-bit PCI configuration register
+ specified by Address. The value written to the PCI configuration register is
+ returned. This function must guarantee that all PCI read and write operations
+ are serialized. Extra left bits in OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise
+ AND, and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND between the read result and the value specified by AndData, and
+ writes the result to the 32-bit PCI configuration register specified by
+ Address. The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are
+ serialized. Extra left bits in AndData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAnd32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ );
+
+/**
+ Reads a bit field in a 32-bit port, performs a bitwise AND followed by a
+ bitwise inclusive OR, and writes the result back to the bit field in the
+ 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address, performs a
+ bitwise AND followed by a bitwise inclusive OR between the read result and
+ the value specified by AndData, and writes the result to the 32-bit PCI
+ configuration register specified by Address. The value written to the PCI
+ configuration register is returned. This function must guarantee that all PCI
+ read and write operations are serialized. Extra left bits in both AndData and
+ OrData are stripped.
+
+ If Address > 0x0FFFFFFF, then ASSERT().
+ If Address is not aligned on a 32-bit boundary, then ASSERT().
+ If StartBit is greater than 31, then ASSERT().
+ If EndBit is greater than 31, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address PCI configuration register to write.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ Range 0..31.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ Range 0..31.
+ @param AndData The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the result of the AND operation.
+
+ @return The value written back to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciBitFieldAndThenOr32 (
+ IN UINTN Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ );
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress and
+ Size into the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be read. Size is
+ returned. When possible 32-bit PCI configuration read cycles are used to read
+ from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+ and 16-bit PCI configuration read cycles may be used at the beginning and the
+ end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciReadBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ );
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI
+ configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress and
+ Size from the buffer specified by Buffer. This function only allows the PCI
+ configuration registers from a single PCI function to be written. Size is
+ returned. When possible 32-bit PCI configuration write cycles are used to
+ write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+ 8-bit and 16-bit PCI configuration write cycles may be used at the beginning
+ and the end of the range.
+
+ If StartAddress > 0x0FFFFFFF, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Bus, Device,
+ Function and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return Size
+
+**/
+UINTN
+EFIAPI
+PciWriteBuffer (
+ IN UINTN StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PciSegmentLib.h b/MdePkg/Include/Library/PciSegmentLib.h new file mode 100644 index 0000000000..eaca938762 --- /dev/null +++ b/MdePkg/Include/Library/PciSegmentLib.h @@ -0,0 +1,924 @@ +/** @file
+ Functions accessing PCI configuration registers on any supported PCI segment
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciSegmentLib.h
+
+**/
+
+#ifndef __PCI_SEGMENT_LIB__
+#define __PCI_SEGMENT_LIB__
+
+
+/**
+ Macro that converts PCI Segment, PCI Bus, PCI Device, PCI Function,
+ and PCI Register to an address that can be passed to the PCI Segment Library functions.
+
+ Computes an address that is compatible with the PCI Segment Library functions.
+ The unused upper bits of Segment, Bus, Device, Function,
+ and Register are stripped prior to the generation of the address.
+
+ @param Segment PCI Segment number. Range 0..65535.
+ @param Bus PCI Bus number. Range 0..255.
+ @param Device PCI Device number. Range 0..31.
+ @param Function PCI Function number. Range 0..7.
+ @param Register PCI Register number. Range 0..255 for PCI. Range 0..4095 for PCI Express.
+
+ @return The address that is compatible with the PCI Segment Library functions.
+
+**/
+#define PCI_SEGMENT_LIB_ADDRESS(Segment,Bus,Device,Function,Register) \
+ ( ((Register) & 0xfff) | \
+ (((Function) & 0x07) << 12) | \
+ (((Device) & 0x1f) << 15) | \
+ (((Bus) & 0xff) << 20) | \
+ (LShiftU64((Segment) & 0xffff, 32)) \
+ )
+
+/**
+ Reads an 8-bit PCI configuration register.
+
+ Reads and returns the 8-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @return The 8-bit PCI configuration register specified by Address.
+
+**/
+UINT8
+EFIAPI
+PciSegmentRead8 (
+ IN UINT64 Address
+ )
+;
+
+/**
+ Writes an 8-bit PCI configuration register.
+
+ Writes the 8-bit PCI configuration register specified by Address with the value specified by Value.
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Value The value to write.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+PciSegmentWrite8 (
+ IN UINT64 Address,
+ IN UINT8 Value
+ )
+;
+
+/**
+ Performs a bitwise inclusive OR of an 8-bit PCI configuration register with an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentOr8 (
+ IN UINT64 Address,
+ IN UINT8 OrData
+ )
+;
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentAnd8 (
+ IN UINT64 Address,
+ IN UINT8 AndData
+ )
+;
+
+/**
+ Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit value,
+ followed a bitwise inclusive OR with another 8-bit value.
+
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentAndThenOr8 (
+ IN UINT64 Address,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+;
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in an 8-bit PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ The value of the bit field is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+
+ @return The value of the bit field.
+
+**/
+UINT8
+EFIAPI
+PciSegmentBitFieldRead8 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+;
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ All other bits in the destination PCI configuration register are preserved.
+ The new value of the 8-bit register is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param Value New value of the bit field.
+
+ @return The new value of the 8-bit register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentBitFieldWrite8 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 Value
+ )
+;
+
+/**
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentBitFieldOr8 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 OrData
+ )
+;
+
+/**
+ Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR,
+ and writes the result back to the bit field in the 8-bit port.
+
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in OrData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentBitFieldAnd8 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData
+ )
+;
+
+/**
+ Reads a bit field in an 8-bit PCI configuration register, performs a bitwise AND,
+ and writes the result back to the bit field in the 8-bit register.
+
+ Reads the 8-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 8-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in AndData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT8
+EFIAPI
+PciSegmentBitFieldAndThenOr8 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT8 AndData,
+ IN UINT8 OrData
+ )
+;
+
+/**
+ Reads a 16-bit PCI configuration register.
+
+ Reads and returns the 16-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @return The 16-bit PCI configuration register specified by Address.
+
+**/
+UINT16
+EFIAPI
+PciSegmentRead16 (
+ IN UINT64 Address
+ )
+;
+
+/**
+ Writes a 16-bit PCI configuration register.
+
+ Writes the 16-bit PCI configuration register specified by Address with the value specified by Value.
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Value The value to write.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+PciSegmentWrite16 (
+ IN UINT64 Address,
+ IN UINT16 Value
+ )
+;
+
+/**
+ Performs a bitwise inclusive OR of a 16-bit PCI configuration register with a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentOr16 (
+ IN UINT64 Address,
+ IN UINT16 OrData
+ )
+;
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentAnd16 (
+ IN UINT64 Address,
+ IN UINT16 AndData
+ )
+;
+
+/**
+ Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit value,
+ followed a bitwise inclusive OR with another 16-bit value.
+
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentAndThenOr16 (
+ IN UINT64 Address,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+;
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 16-bit PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ The value of the bit field is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+
+ @return The value of the bit field.
+
+**/
+UINT16
+EFIAPI
+PciSegmentBitFieldRead16 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+;
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ All other bits in the destination PCI configuration register are preserved.
+ The new value of the 16-bit register is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param Value New value of the bit field.
+
+ @return The new value of the 16-bit register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentBitFieldWrite16 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 Value
+ )
+;
+
+/**
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentBitFieldOr16 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 OrData
+ )
+;
+
+/**
+ Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR,
+ and writes the result back to the bit field in the 16-bit port.
+
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in OrData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentBitFieldAnd16 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData
+ )
+;
+
+/**
+ Reads a bit field in a 16-bit PCI configuration register, performs a bitwise AND,
+ and writes the result back to the bit field in the 16-bit register.
+
+ Reads the 16-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 16-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in AndData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT16
+EFIAPI
+PciSegmentBitFieldAndThenOr16 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT16 AndData,
+ IN UINT16 OrData
+ )
+;
+
+/**
+ Reads a 32-bit PCI configuration register.
+
+ Reads and returns the 32-bit PCI configuration register specified by Address.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+
+ @return The 32-bit PCI configuration register specified by Address.
+
+**/
+UINT32
+EFIAPI
+PciSegmentRead32 (
+ IN UINT64 Address
+ )
+;
+
+/**
+ Writes a 32-bit PCI configuration register.
+
+ Writes the 32-bit PCI configuration register specified by Address with the value specified by Value.
+ Value is returned. This function must guarantee that all PCI read and write operations are serialized.
+ If Address > 0x0FFFFFFF, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Value The value to write.
+
+ @return The parameter of Value.
+
+**/
+UINT32
+EFIAPI
+PciSegmentWrite32 (
+ IN UINT64 Address,
+ IN UINT32 Value
+ )
+;
+
+/**
+ Performs a bitwise inclusive OR of a 32-bit PCI configuration register with a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentOr32 (
+ IN UINT64 Address,
+ IN UINT32 OrData
+ )
+;
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentAnd32 (
+ IN UINT64 Address,
+ IN UINT32 AndData
+ )
+;
+
+/**
+ Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit value,
+ followed a bitwise inclusive OR with another 32-bit value.
+
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ performs a bitwise inclusive OR between the result of the AND operation and the value specified by OrData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ If any reserved bits in Address are set, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Andata The value to AND with the PCI configuration register.
+ @param OrData The value to OR with the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentAndThenOr32 (
+ IN UINT64 Address,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+;
+
+/**
+ Reads a bit field of a PCI configuration register.
+
+ Reads the bit field in a 32-bit PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ The value of the bit field is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+
+ @return The value of the bit field.
+
+**/
+UINT32
+EFIAPI
+PciSegmentBitFieldRead32 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit
+ )
+;
+
+/**
+ Writes a bit field to a PCI configuration register.
+
+ Writes Value to the bit field of the PCI configuration register.
+ The bit field is specified by the StartBit and the EndBit.
+ All other bits in the destination PCI configuration register are preserved.
+ The new value of the 32-bit register is returned.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param Value New value of the bit field.
+
+ @return The new value of the 32-bit register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentBitFieldWrite32 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 Value
+ )
+;
+
+/**
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentBitFieldOr32 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 OrData
+ )
+;
+
+/**
+ Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR,
+ and writes the result back to the bit field in the 32-bit port.
+
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise inclusive OR between the read result and the value specified by OrData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in OrData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentBitFieldAnd32 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData
+ )
+;
+
+/**
+ Reads a bit field in a 32-bit PCI configuration register, performs a bitwise AND,
+ and writes the result back to the bit field in the 32-bit register.
+
+ Reads the 32-bit PCI configuration register specified by Address,
+ performs a bitwise AND between the read result and the value specified by AndData,
+ and writes the result to the 32-bit PCI configuration register specified by Address.
+ The value written to the PCI configuration register is returned.
+ This function must guarantee that all PCI read and write operations are serialized.
+ Extra left bits in AndData are stripped.
+ If any reserved bits in Address are set, then ASSERT().
+ If StartBit is greater than 7, then ASSERT().
+ If EndBit is greater than 7, then ASSERT().
+ If EndBit is less than or equal to StartBit, then ASSERT().
+
+ @param Address Address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param StartBit The ordinal of the least significant bit in the bit field.
+ The ordinal of the least significant bit in a byte is bit 0.
+ @param EndBit The ordinal of the most significant bit in the bit field.
+ The ordinal of the most significant bit in a byte is bit 7.
+ @param AndData The value to AND with the read value from the PCI configuration register.
+ @param OrData The value to OR with the read value from the PCI configuration register.
+
+ @return The value written to the PCI configuration register.
+
+**/
+UINT32
+EFIAPI
+PciSegmentBitFieldAndThenOr32 (
+ IN UINT64 Address,
+ IN UINTN StartBit,
+ IN UINTN EndBit,
+ IN UINT32 AndData,
+ IN UINT32 OrData
+ )
+;
+
+/**
+ Reads a range of PCI configuration registers into a caller supplied buffer.
+
+ Reads the range of PCI configuration registers specified by StartAddress
+ and Size into the buffer specified by Buffer.
+ This function only allows the PCI configuration registers from a single PCI function to be read.
+ Size is returned.
+ If any reserved bits in StartAddress are set, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer receiving the data read.
+
+ @return The paramter of Size.
+
+**/
+UINTN
+EFIAPI
+PciSegmentReadBuffer (
+ IN UINT64 StartAddress,
+ IN UINTN Size,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Copies the data in a caller supplied buffer to a specified range of PCI configuration space.
+
+ Writes the range of PCI configuration registers specified by StartAddress
+ and Size from the buffer specified by Buffer.
+ This function only allows the PCI configuration registers from a single PCI function to be written.
+ Size is returned.
+ If any reserved bits in StartAddress are set, then ASSERT().
+ If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().
+ If (StartAddress + Size - 1) > 0x0FFFFFFF, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+
+ @param StartAddress Starting address that encodes the PCI Segment, Bus, Device, Function, and Register.
+ @param Size Size in bytes of the transfer.
+ @param Buffer Pointer to a buffer containing the data to write.
+
+ @return The paramter of Size.
+
+**/
+UINTN
+EFIAPI
+PciSegmentWriteBuffer (
+ IN UINT64 StartAddress,
+ IN UINTN Size,
+ IN VOID *Buffer
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/PeCoffGetEntryPointLib.h b/MdePkg/Include/Library/PeCoffGetEntryPointLib.h new file mode 100644 index 0000000000..f20562eef9 --- /dev/null +++ b/MdePkg/Include/Library/PeCoffGetEntryPointLib.h @@ -0,0 +1,39 @@ +/** @file
+ Memory Only PE COFF loader
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffGetEntryPointLib.h
+
+**/
+
+#ifndef __PE_COFF_GET_ENTRY_POINT_LIB_H__
+#define __PE_COFF_GET_ENTRY_POINT_LIB_H__
+
+/**
+ Loads a PE/COFF image into memory
+
+ @param Pe32Data Pointer to a PE/COFF Image
+
+ @param EntryPoint Pointer to the entry point of the PE/COFF image
+
+ @retval EFI_SUCCESS if the EntryPoint was returned
+ @retval EFI_INVALID_PARAMETER if the EntryPoint could not be found from Pe32Data
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderGetEntryPoint (
+ IN VOID *Pe32Data,
+ IN OUT VOID **EntryPoint
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/PeCoffLib.h b/MdePkg/Include/Library/PeCoffLib.h new file mode 100644 index 0000000000..08e8195a8a --- /dev/null +++ b/MdePkg/Include/Library/PeCoffLib.h @@ -0,0 +1,131 @@ +/** @file
+ Memory Only PE COFF loader
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeCoffLib.h
+
+**/
+
+#ifndef __BASE_PE_COFF_LIB_H__
+#define __BASE_PE_COFF_LIB_H__
+
+//
+// Return status codes from the PE/COFF Loader services
+// BUGBUG: Find where used and see if can be replaced by RETURN_STATUS codes
+//
+#define IMAGE_ERROR_SUCCESS 0
+#define IMAGE_ERROR_IMAGE_READ 1
+#define IMAGE_ERROR_INVALID_PE_HEADER_SIGNATURE 2
+#define IMAGE_ERROR_INVALID_MACHINE_TYPE 3
+#define IMAGE_ERROR_INVALID_SUBSYSTEM 4
+#define IMAGE_ERROR_INVALID_IMAGE_ADDRESS 5
+#define IMAGE_ERROR_INVALID_IMAGE_SIZE 6
+#define IMAGE_ERROR_INVALID_SECTION_ALIGNMENT 7
+#define IMAGE_ERROR_SECTION_NOT_LOADED 8
+#define IMAGE_ERROR_FAILED_RELOCATION 9
+#define IMAGE_ERROR_FAILED_ICACHE_FLUSH 10
+
+
+//
+// PE/COFF Loader Read Function passed in by caller
+//
+typedef
+RETURN_STATUS
+(EFIAPI *PE_COFF_LOADER_READ_FILE) (
+ IN VOID *FileHandle,
+ IN UINTN FileOffset,
+ IN OUT UINTN *ReadSize,
+ OUT VOID *Buffer
+ );
+
+//
+// Context structure used while PE/COFF image is being loaded and relocated
+//
+typedef struct {
+ PHYSICAL_ADDRESS ImageAddress;
+ UINT64 ImageSize;
+ PHYSICAL_ADDRESS DestinationAddress;
+ PHYSICAL_ADDRESS EntryPoint;
+ PE_COFF_LOADER_READ_FILE ImageRead;
+ VOID *Handle;
+ VOID *FixupData;
+ UINT32 SectionAlignment;
+ UINT32 PeCoffHeaderOffset;
+ UINT32 DebugDirectoryEntryRva;
+ VOID *CodeView;
+ CHAR8 *PdbPointer;
+ UINTN SizeOfHeaders;
+ UINT32 ImageCodeMemoryType;
+ UINT32 ImageDataMemoryType;
+ UINT32 ImageError;
+ UINTN FixupDataSize;
+ UINT16 Machine;
+ UINT16 ImageType;
+ BOOLEAN RelocationsStripped;
+ BOOLEAN IsTeImage;
+} PE_COFF_LOADER_IMAGE_CONTEXT;
+
+
+/**
+ Retrieves information on a PE/COFF image
+
+ @param ImageContext The context of the image being loaded
+
+ @retval EFI_SUCCESS The information on the PE/COFF image was collected.
+ @retval EFI_INVALID_PARAMETER ImageContext is NULL.
+ @retval EFI_UNSUPPORTED The PE/COFF image is not supported.
+ @retval Otherwise The error status from reading the PE/COFF image using the
+ ImageContext->ImageRead() function
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderGetImageInfo (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+;
+
+/**
+ Relocates a PE/COFF image in memory
+
+ @param ImageContext Contains information on the loaded image to relocate
+
+ @retval EFI_SUCCESS if the PE/COFF image was relocated
+ @retval EFI_LOAD_ERROR if the image is not a valid PE/COFF image
+ @retval EFI_UNSUPPORTED not support
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderRelocateImage (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+;
+
+/**
+ Loads a PE/COFF image into memory
+
+ @param ImageContext Contains information on image to load into memory
+
+ @retval EFI_SUCCESS if the PE/COFF image was loaded
+ @retval EFI_BUFFER_TOO_SMALL if the caller did not provide a large enough buffer
+ @retval EFI_LOAD_ERROR if the image is a runtime driver with no relocations
+ @retval EFI_INVALID_PARAMETER if the image address is invalid
+
+**/
+RETURN_STATUS
+EFIAPI
+PeCoffLoaderLoadImage (
+ IN OUT PE_COFF_LOADER_IMAGE_CONTEXT *ImageContext
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/PeiCoreEntryPoint.h b/MdePkg/Include/Library/PeiCoreEntryPoint.h new file mode 100644 index 0000000000..4f88223d73 --- /dev/null +++ b/MdePkg/Include/Library/PeiCoreEntryPoint.h @@ -0,0 +1,50 @@ +/** @file
+ Entry point to the PEI Core
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MODULE_ENTRY_POINT_H__
+#define __MODULE_ENTRY_POINT_H__
+
+
+/**
+ Call constructs for all libraries. Automatics Generated by tool.
+
+ @param FfsHeader Pointer to header of FFS.
+ @param PeiServices Pointer to the PEI Services Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+
+/**
+ Call the list of driver entry points. Automatics Generated by tool.
+
+ @param PeiStartupDescriptor Pointer to startup information .
+ @param OldCoreData Pointer to Original startup information.
+
+ @return Status returned by entry points of drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessModuleEntryPointList (
+ IN EFI_PEI_STARTUP_DESCRIPTOR *PeiStartupDescriptor,
+ IN VOID *OldCoreData
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PeiCoreLib.h b/MdePkg/Include/Library/PeiCoreLib.h new file mode 100644 index 0000000000..dfbe51c5da --- /dev/null +++ b/MdePkg/Include/Library/PeiCoreLib.h @@ -0,0 +1,306 @@ +/** @file
+ PEI Core Library implementation
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiCoreLib.h
+
+**/
+
+#ifndef __PEI_CORE_LIB_H__
+#define __PEI_CORE_LIB_H__
+
+/**
+ This service enables a given PEIM to register an interface into the PEI Foundation.
+
+ @param PpiList A pointer to the list of interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreInstallPpi (
+ IN EFI_PEI_PPI_DESCRIPTOR *PpiList
+ )
+;
+
+/**
+ This service enables PEIMs to replace an entry in the PPI database with an alternate entry.
+
+ @param OldPpi Pointer to the old PEI PPI Descriptors.
+ @param NewPpi Pointer to the new PEI PPI Descriptors.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The OldPpi or NewPpi is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI PPI descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+ @retval EFI_NOT_FOUND The PPI for which the reinstallation was requested has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreReinstallPpi (
+ IN EFI_PEI_PPI_DESCRIPTOR *OldPpi,
+ IN EFI_PEI_PPI_DESCRIPTOR *NewPpi
+ )
+;
+
+/**
+ This service enables PEIMs to discover a given instance of an interface.
+
+ @param Guid A pointer to the GUID whose corresponding interface needs to be found.
+ @param Instance The N-th instance of the interface that is required.
+ @param PpiDescriptor A pointer to instance of the EFI_PEI_PPI_DESCRIPTOR.
+ @param Ppi A pointer to the instance of the interface.
+
+ @retval EFI_SUCCESS The interface was successfully returned.
+ @retval EFI_NOT_FOUND The PPI descriptor is not found in the database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreLocatePpi (
+ IN EFI_GUID *Guid,
+ IN UINTN Instance,
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor,
+ IN OUT VOID **Ppi
+ )
+;
+
+/**
+ This service enables PEIMs to register a given service to be invoked
+ when another service is installed or reinstalled.
+
+ @param NotifyList A pointer to the list of notification interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+ @retval EFI_INVALID_PARAMETER The NotifyList pointer is NULL.
+ @retval EFI_INVALID_PARAMETER Any of the PEI notify descriptors in the list do not have
+ the EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES bit set in the Flags field.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreNotifyPpi (
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList
+ )
+;
+
+/**
+ This service enables PEIMs to ascertain the present value of the boot mode.
+
+ @param BootMode A pointer to contain the value of the boot mode.
+
+ @retval EFI_SUCCESS The boot mode was returned successfully.
+ @retval EFI_INVALID_PARAMETER BootMode is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreGetBootMode (
+ IN OUT EFI_BOOT_MODE *BootMode
+ )
+;
+
+/**
+ This service enables PEIMs to update the boot mode variable.
+
+ @param BootMode The value of the boot mode to set.
+
+ @retval EFI_SUCCESS The value was successfully updated
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreSetBootMode (
+ IN EFI_BOOT_MODE BootMode
+ )
+;
+
+/**
+ This service enables a PEIM to ascertain the address of the list of HOBs in memory.
+
+ @param HobList A pointer to the list of HOBs that the PEI Foundation will initialize.
+
+ @retval EFI_SUCCESS The list was successfully returned.
+ @retval EFI_NOT_AVAILABLE_YET The HOB list is not yet published.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreGetHobList (
+ IN OUT VOID **HobList
+ )
+;
+
+/**
+ This service enables PEIMs to create various types of HOBs.
+
+ @param Type The type of HOB to be installed.
+ @param Length The length of the HOB to be added.
+ @param Hob The address of a pointer that will contain the HOB header.
+
+ @retval EFI_SUCCESS The HOB was successfully created.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreCreateHob (
+ IN UINT16 Type,
+ IN UINT16 Length,
+ IN OUT VOID **Hob
+ )
+;
+
+/**
+ This service enables PEIMs to discover additional firmware volumes.
+
+ @param Instance This instance of the firmware volume to find.
+ The value 0 is the Boot Firmware Volume (BFV).
+ @param FwVolHeader Pointer to the firmware volume header of the volume to return.
+
+ @retval EFI_SUCCESS The volume was found.
+ @retval EFI_NOT_FOUND The volume was not found.
+ @retval EFI_INVALID_PARAMETER FwVolHeader is NULL.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindNextVolume (
+ IN UINTN Instance,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader
+ )
+;
+
+/**
+ This service enables PEIMs to discover additional firmware files.
+
+ @param SearchType A filter to find files only of this type.
+ @param FwVolHeader Pointer to the firmware volume header of the volume to search.
+ This parameter must point to a valid FFS volume.
+ @param FileHeader Pointer to the current file from which to begin searching.
+
+ @retval EFI_SUCCESS The file was found.
+ @retval EFI_NOT_FOUND The file was not found.
+ @retval EFI_NOT_FOUND The header checksum was not zero.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindNextFile (
+ IN EFI_FV_FILETYPE SearchType,
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
+ IN OUT EFI_FFS_FILE_HEADER **FileHeader
+ )
+;
+
+/**
+ This service enables PEIMs to discover sections of a given type within a valid FFS file.
+
+ @param SearchType The value of the section type to find.
+ @param FfsFileHeader A pointer to the file header that contains the set of sections to be searched.
+ @param SectionData A pointer to the discovered section, if successful.
+
+ @retval EFI_SUCCESS The section was found.
+ @retval EFI_NOT_FOUND The section was not found.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreFfsFindSectionData (
+ IN EFI_SECTION_TYPE SectionType,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT VOID **SectionData
+ )
+;
+
+/**
+ This service enables PEIMs to register the permanent memory configuration
+ that has been initialized with the PEI Foundation.
+
+ @param MemoryBegin The value of a region of installed memory.
+ @param MemoryLength The corresponding length of a region of installed memory.
+
+ @retval EFI_SUCCESS The region was successfully installed in a HOB.
+ @retval EFI_INVALID_PARAMETER MemoryBegin and MemoryLength are illegal for this system.
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreInstallPeiMemory (
+ IN EFI_PHYSICAL_ADDRESS MemoryBegin,
+ IN UINT64 MemoryLength
+ )
+;
+
+/**
+ This service enables PEIMs to allocate memory after the permanent memory has been installed by a PEIM.
+
+ @param MemoryType Type of memory to allocate.
+ @param Pages Number of pages to allocate.
+ @param Memory Pointer of memory allocated.
+
+ @retval EFI_SUCCESS The memory range was successfully allocated.
+ @retval EFI_INVALID_PARAMETER Type is not equal to AllocateAnyPages.
+ @retval EFI_NOT_AVAILABLE_YET Called with permanent memory not available.
+ @retval EFI_OUT_OF_RESOURCES The pages could not be allocated.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreAllocatePages (
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT EFI_PHYSICAL_ADDRESS *Memory
+ )
+;
+
+/**
+ This service allocates memory from the Hand-Off Block (HOB) heap.
+
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer If the call succeeds, a pointer to a pointer to the allocated buffer;
+ undefined otherwise.
+
+ @retval EFI_SUCCESS The allocation was successful
+ @retval EFI_OUT_OF_RESOURCES There is not enough heap to allocate the requested size.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreAllocatePool (
+ IN UINTN Size,
+ OUT VOID **Buffer
+ )
+;
+
+/**
+ This service resets the entire platform, including all processors and devices, and reboots the system.
+
+ @retval EFI_NOT_AVAILABLE_YET The service has not been installed yet.
+
+**/
+EFI_STATUS
+EFIAPI
+PeiCoreResetSystem (
+ VOID
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Library/PeiServicesTablePointerLib.h new file mode 100644 index 0000000000..815e722b6c --- /dev/null +++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h @@ -0,0 +1,26 @@ +/** @file
+ PEI Services Table Pointer Library services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiServicesTablePointerLib.h
+
+**/
+
+#ifndef __PEI_SERVICES_TABLE_POINTER_LIB_H__
+#define __PEI_SERVICES_TABLE_POINTER_LIB_H__
+
+EFI_PEI_SERVICES **
+GetPeiServicesTablePointer (
+ VOID
+ );
+
+#endif
+
diff --git a/MdePkg/Include/Library/PeimEntryPoint.h b/MdePkg/Include/Library/PeimEntryPoint.h new file mode 100644 index 0000000000..e08845926d --- /dev/null +++ b/MdePkg/Include/Library/PeimEntryPoint.h @@ -0,0 +1,103 @@ +/** @file
+ Entry point to a PEIM
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MODULE_ENTRY_POINT_H__
+#define __MODULE_ENTRY_POINT_H__
+
+//
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented
+//
+extern const UINT32 _gPeimRevision;
+
+/**
+ Image entry point of Peim.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+ @return Status returned by entry points of Peims.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+
+/**
+ Wrapper of Peim image entry point.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+ @return Status returned by entry points of Peims.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+
+/**
+ Call constructs for all libraries. Automatics Generated by tool.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+
+/**
+ Call destructors for all libraries. Automatics Generated by tool.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryDestructorList (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+
+/**
+ Call the list of driver entry points. Automatics Generated by tool.
+
+ @param FfsHeader Pointer to FFS header the loaded driver.
+ @param PeiServices Pointer to the PEI services.
+
+ @return Status returned by entry points of drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessModuleEntryPointList (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/PerformanceLib.h b/MdePkg/Include/Library/PerformanceLib.h new file mode 100644 index 0000000000..36564095e9 --- /dev/null +++ b/MdePkg/Include/Library/PerformanceLib.h @@ -0,0 +1,201 @@ +/** @file
+ Library that provides services to measure module execution performance
+
+ Copyright (c) 2004, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PerformanceLib.h
+
+**/
+
+#ifndef __PERFORMANCE_LIB_H__
+#define __PERFORMANCE_LIB_H__
+
+//
+// Performance library propery mask bits
+//
+#define PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED 0x00000001
+
+/**
+ Creates a record for the beginning of a performance measurement.
+
+ Creates a record that contains the Handle, Token, and Module.
+ If TimeStamp is not zero, then TimeStamp is added to the record as the start time.
+ If TimeStamp is zero, then this function reads the current time stamp
+ and adds that time stamp value to the record as the start time.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The start of the measurement was recorded.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to record the measurement.
+
+**/
+RETURN_STATUS
+EFIAPI
+StartPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token, OPTIONAL
+ IN CONST CHAR8 *Module, OPTIONAL
+ IN UINT64 TimeStamp
+ );
+
+/**
+ Fills in the end time of a performance measurement.
+
+ Looks up the record that matches Handle, Token, and Module.
+ If the record can not be found then return RETURN_NOT_FOUND.
+ If the record is found and TimeStamp is not zero,
+ then TimeStamp is added to the record as the end time.
+ If the record is found and TimeStamp is zero, then this function reads
+ the current time stamp and adds that time stamp value to the record as the end time.
+ If this function is called multiple times for the same record, then the end time is overwritten.
+
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param TimeStamp 64-bit time stamp.
+
+ @retval RETURN_SUCCESS The end of the measurement was recorded.
+ @retval RETURN_NOT_FOUND The specified measurement record could not be found.
+
+**/
+RETURN_STATUS
+EFIAPI
+EndPerformanceMeasurement (
+ IN CONST VOID *Handle, OPTIONAL
+ IN CONST CHAR8 *Token, OPTIONAL
+ IN CONST CHAR8 *Module, OPTIONAL
+ IN UINT64 TimeStamp
+ );
+
+/**
+ Retrieves a previously logged performance measurement.
+
+ Looks up the record that matches Handle, Token, and Module.
+ If the record can not be found then return RETURN_NOT_FOUND.
+ If the record is found then the start of the measurement is returned in StartTimeStamp,
+ and the end of the measurement is returned in EndTimeStamp.
+
+ @param LogEntryKey The key for the previous performance measurement log entry.
+ If 0, then the first performance measurement log entry is retrieved.
+ @param Handle Pointer to environment specific context used
+ to identify the component being measured.
+ @param Token Pointer to a Null-terminated ASCII string
+ that identifies the component being measured.
+ @param Module Pointer to a Null-terminated ASCII string
+ that identifies the module being measured.
+ @param StartTimeStamp The 64-bit time stamp that was recorded when the measurement was started.
+ @param EndTimeStamp The 64-bit time stamp that was recorded when the measurement was ended.
+
+ @return The key for the current performance log entry.
+
+**/
+UINTN
+EFIAPI
+GetPerformanceMeasurement (
+ UINTN LogEntryKey,
+ OUT CONST VOID **Handle,
+ OUT CONST CHAR8 **Token,
+ OUT CONST CHAR8 **Module,
+ OUT UINT64 *StartTimeStamp,
+ OUT UINT64 *EndTimeStamp
+ );
+
+/**
+ Returns TRUE if the performance measurement macros are enabled.
+
+ This function returns TRUE if the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is set.
+ @retval FALSE The PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of
+ PcdPerformanceLibraryPropertyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+PerformanceMeasurementEnabled (
+ VOID
+ );
+
+/**
+ Macro that calls EndPerformanceMeasurement().
+
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,
+ then EndPerformanceMeasurement() is called.
+
+**/
+#define PERF_END(Handle, Token, Module, TimeStamp) \
+ do { \
+ if (PerformanceMeasurementEnabled ()) { \
+ EndPerformanceMeasurement (Handle, Token, Module, TimeStamp); \
+ } \
+ } while (FALSE)
+
+/**
+ Macro that calls StartPerformanceMeasurement().
+
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,
+ then StartPerformanceMeasurement() is called.
+
+**/
+#define PERF_START(Handle, Token, Module, TimeStamp) \
+ do { \
+ if (PerformanceMeasurementEnabled ()) { \
+ StartPerformanceMeasurement (Handle, Token, Module, TimeStamp); \
+ } \
+ } while (FALSE)
+
+/**
+ Macro that marks the beginning of performance measurement source code.
+
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,
+ then this macro marks the beginning of source code that is included in a module.
+ Otherwise, the source lines between PERF_CODE_BEGIN() and PERF_CODE_END() are not included in a module.
+
+**/
+#define PERF_CODE_BEGIN() do { if (PerformanceMeasurementEnabled ()) { UINT8 __PerformanceCodeLocal
+
+/**
+ Macro that marks the end of performance measurement source code.
+
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,
+ then this macro marks the end of source code that is included in a module.
+ Otherwise, the source lines between PERF_CODE_BEGIN() and PERF_CODE_END() are not included in a module.
+
+**/
+#define PERF_CODE_END() __PerformanceCodeLocal = 0; } } while (FALSE)
+
+/**
+ Macro that declares a section of performance measurement source code.
+
+ If the PERFORMANCE_LIBRARY_PROPERTY_MEASUREMENT_ENABLED bit of PcdPerformanceLibraryPropertyMask is set,
+ then the source code specified by Expression is included in a module.
+ Otherwise, the source specified by Expression is not included in a module.
+
+ @param Expression Performance measurement source code to include in a module.
+
+**/
+#define PERF_CODE(Expression) \
+ PERF_CODE_BEGIN (); \
+ Expression \
+ PERF_CODE_END ()
+
+
+#endif
diff --git a/MdePkg/Include/Library/PrintLib.h b/MdePkg/Include/Library/PrintLib.h new file mode 100644 index 0000000000..c84b7c36aa --- /dev/null +++ b/MdePkg/Include/Library/PrintLib.h @@ -0,0 +1,116 @@ +/** @file
+ Library that provides print services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PrintLib.h
+
+**/
+
+#ifndef __PRINT_LIB_H__
+#define __PRINT_LIB_H__
+
+//
+// Print primitives
+//
+#define LEFT_JUSTIFY 0x01
+#define COMMA_TYPE 0x08
+#define PREFIX_ZERO 0x20
+
+UINTN
+EFIAPI
+UnicodeVSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ );
+
+UINTN
+EFIAPI
+UnicodeSPrint (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ );
+
+UINTN
+EFIAPI
+UnicodeVSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ );
+
+
+UINTN
+EFIAPI
+UnicodeSPrintAsciiFormat (
+ OUT CHAR16 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+UINTN
+EFIAPI
+AsciiVSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ IN VA_LIST Marker
+ );
+
+UINTN
+EFIAPI
+AsciiSPrint (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR8 *FormatString,
+ ...
+ );
+
+UINTN
+EFIAPI
+AsciiVSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ IN VA_LIST Marker
+ );
+
+UINTN
+EFIAPI
+AsciiSPrintUnicodeFormat (
+ OUT CHAR8 *StartOfBuffer,
+ IN UINTN BufferSize,
+ IN CONST CHAR16 *FormatString,
+ ...
+ );
+
+UINTN
+UnicodeValueToString (
+ IN OUT CHAR16 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ );
+
+UINTN
+AsciiValueToString (
+ IN OUT CHAR8 *Buffer,
+ IN UINTN Flags,
+ IN INT64 Value,
+ IN UINTN Width
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/ReportStatusCodeLib.h b/MdePkg/Include/Library/ReportStatusCodeLib.h new file mode 100644 index 0000000000..b05bcc6593 --- /dev/null +++ b/MdePkg/Include/Library/ReportStatusCodeLib.h @@ -0,0 +1,763 @@ +/** @file
+ Report Status Code Library public .h file
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __REPORT_STATUS_CODE_LIB_H__
+#define __REPORT_STATUS_CODE_LIB_H__
+
+//
+// Declare bits for PcdReportStatusCodePropertyMask
+//
+#define REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED 0x00000001
+#define REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED 0x00000002
+#define REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED 0x00000004
+#define REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED 0x00000008
+#define REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTION_ENABLED 0x00000010
+
+//
+// Extended Data structure definitions with EFI_STATUS_CODE_DATA headers removed
+//
+
+///
+/// Voltage Extended Error Data
+///
+typedef struct {
+ EFI_EXP_BASE10_DATA Voltage;
+ EFI_EXP_BASE10_DATA Threshold;
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_VOLTAGE_ERROR_DATA;
+
+///
+/// Microcode Update Extended Error Data
+///
+typedef struct {
+ UINT32 Version;
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_MICROCODE_UPDATE_ERROR_DATA;
+
+///
+/// Asynchronous Timer Extended Error Data
+///
+typedef struct {
+ EFI_EXP_BASE10_DATA TimerLimit;
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_TIMER_EXPIRED_ERROR_DATA;
+
+///
+/// Host Processor Mismatch Extended Error Data
+///
+typedef struct {
+ UINT32 Instance;
+ UINT16 Attributes;
+} REPORT_STATUS_CODE_LIBRARY_HOST_PROCESSOR_MISMATCH_ERROR_DATA;
+
+///
+/// Thermal Extended Error Data
+///
+typedef struct {
+ EFI_EXP_BASE10_DATA Temperature;
+ EFI_EXP_BASE10_DATA Threshold;
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_THERMAL_ERROR_DATA;
+
+///
+/// Processor Disabled Extended Error Data
+///
+typedef struct {
+ UINT32 Cause;
+ BOOLEAN SoftwareDisabled;
+} REPORT_STATUS_CODE_LIBRARY_COMPUTING_UNIT_CPU_DISABLED_ERROR_DATA;
+
+///
+/// Embedded cache init extended data
+///
+typedef struct {
+ UINT32 Level;
+ EFI_INIT_CACHE_TYPE Type;
+} REPORT_STATUS_CODE_LIBRARY_CACHE_INIT_DATA;
+
+///
+/// Memory Extended Error Data
+///
+typedef struct {
+ EFI_MEMORY_ERROR_GRANULARITY Granularity;
+ EFI_MEMORY_ERROR_OPERATION Operation;
+ UINTN Syndrome;
+ EFI_PHYSICAL_ADDRESS Address;
+ UINTN Resolution;
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_EXTENDED_ERROR_DATA;
+
+///
+/// DIMM number
+///
+typedef struct {
+ UINT16 Array;
+ UINT16 Device;
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_DIMM_NUMBER;
+
+///
+/// Memory Module Mismatch Extended Error Data
+///
+typedef struct {
+ EFI_STATUS_CODE_DIMM_NUMBER Instance;
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_MODULE_MISMATCH_ERROR_DATA;
+
+///
+/// Memory Range Extended Data
+///
+typedef struct {
+ EFI_PHYSICAL_ADDRESS Start;
+ EFI_PHYSICAL_ADDRESS Length;
+} REPORT_STATUS_CODE_LIBRARY_MEMORY_RANGE_EXTENDED_DATA;
+
+///
+/// Device handle Extended Data. Used for many
+/// errors and progress codes to point to the device.
+///
+typedef struct {
+ EFI_HANDLE Handle;
+} REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA;
+
+typedef struct {
+ UINT8 *DevicePath;
+} REPORT_STATUS_CODE_LIBRARY_DEVICE_PATH_EXTENDED_DATA;
+
+typedef struct {
+ EFI_HANDLE ControllerHandle;
+ EFI_HANDLE DriverBindingHandle;
+ UINT16 DevicePathSize;
+ UINT8 *RemainingDevicePath;
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_START_EXTENDED_DATA;
+
+///
+/// Resource Allocation Failure Extended Error Data
+///
+typedef struct {
+ UINT32 Bar;
+ UINT16 DevicePathSize;
+ UINT16 ReqResSize;
+ UINT16 AllocResSize;
+ UINT8 *DevicePath;
+ UINT8 *ReqRes;
+ UINT8 *AllocRes;
+} REPORT_STATUS_CODE_LIBRARY_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
+
+///
+/// Extended Error Data for Assert
+///
+typedef struct {
+ UINT32 LineNumber;
+ UINT32 FileNameSize;
+ EFI_STATUS_CODE_STRING_DATA *FileName;
+} REPORT_STATUS_CODE_LIBRARY_DEBUG_ASSERT_DATA;
+
+///
+/// System Context Data EBC/IA32/IPF
+///
+typedef struct {
+ EFI_STATUS_CODE_EXCEP_SYSTEM_CONTEXT Context;
+} REPORT_STATUS_CODE_LIBRARY_STATUS_CODE_EXCEP_EXTENDED_DATA;
+
+///
+/// Legacy Oprom extended data
+///
+typedef struct {
+ EFI_HANDLE DeviceHandle;
+ EFI_PHYSICAL_ADDRESS RomImageBase;
+} REPORT_STATUS_CODE_LIBRARY_LEGACY_OPROM_EXTENDED_DATA;
+
+//
+// Extern for the modules Caller ID GUID
+//
+extern EFI_GUID gEfiCallerIdGuid;
+
+/**
+ Converts a status code to an 8-bit POST code value.
+
+ Converts the status code specified by CodeType and Value to an 8-bit POST code
+ and returns the 8-bit POST code in PostCode. If CodeType is an
+ EFI_PROGRESS_CODE or CodeType is an EFI_ERROR_CODE, then bits 0..4 of PostCode
+ are set to bits 16..20 of Value, and bits 5..7 of PostCode are set to bits
+ 24..26 of Value., and TRUE is returned. Otherwise, FALSE is returned.
+
+ If PostCode is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param PostCode A pointer to the 8-bit POST code value to return.
+
+ @retval TRUE The status code specified by CodeType and Value was converted
+ to an 8-bit POST code and returned in PostCode.
+ @retval FALSE The status code specified by CodeType and Value could not be
+ converted to an 8-bit POST code value.
+
+**/
+BOOLEAN
+EFIAPI
+CodeTypeToPostCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ OUT UINT8 *PostCode
+ );
+
+
+/**
+ Extracts ASSERT() information from a status code structure.
+
+ Converts the status code specified by CodeType, Value, and Data to the ASSERT()
+ arguments specified by Filename, Description, and LineNumber. If CodeType is
+ an EFI_ERROR_CODE, and CodeType has a severity of EFI_ERROR_UNRECOVERED, and
+ Value has an operation mask of EFI_SW_EC_ILLEGAL_SOFTWARE_STATE, extract
+ Filename, Description, and LineNumber from the optional data area of the
+ status code buffer specified by Data. The optional data area of Data contains
+ a Null-terminated ASCII string for the FileName, followed by a Null-terminated
+ ASCII string for the Description, followed by a 32-bit LineNumber. If the
+ ASSERT() information could be extracted from Data, then return TRUE.
+ Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If Filename is NULL, then ASSERT().
+ If Description is NULL, then ASSERT().
+ If LineNumber is NULL, then ASSERT().
+
+ @param CodeType The type of status code being converted.
+ @param Value The status code value being converted.
+ @param Data Pointer to status code data buffer.
+ @param Filename Pointer to the source file name that generated the ASSERT().
+ @param Description Pointer to the description of the ASSERT().
+ @param LineNumber Pointer to source line number that generated the ASSERT().
+
+ @retval TRUE The status code specified by CodeType, Value, and Data was
+ converted ASSERT() arguments specified by Filename, Description,
+ and LineNumber.
+ @retval FALSE The status code specified by CodeType, Value, and Data could
+ not be converted to ASSERT() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractAssertInfo (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT CHAR8 **Filename,
+ OUT CHAR8 **Description,
+ OUT UINT32 *LineNumber
+ );
+
+
+/**
+ Extracts DEBUG() information from a status code structure.
+
+ Converts the status code specified by Data to the DEBUG() arguments specified
+ by ErrorLevel, Marker, and Format. If type GUID in Data is
+ EFI_STATUS_CODE_DATA_TYPE_DEBUG_GUID, then extract ErrorLevel, Marker, and
+ Format from the optional data area of the status code buffer specified by Data.
+ The optional data area of Data contains a 32-bit ErrorLevel followed by Marker
+ which is 12 UINTN parameters, followed by a Null-terminated ASCII string for
+ the Format. If the DEBUG() information could be extracted from Data, then
+ return TRUE. Otherwise, FALSE is returned.
+
+ If Data is NULL, then ASSERT().
+ If ErrorLevel is NULL, then ASSERT().
+ If Marker is NULL, then ASSERT().
+ If Format is NULL, then ASSERT().
+
+ @param Data Pointer to status code data buffer.
+ @param ErrorLevel Pointer to error level mask for a debug message.
+ @param Marker Pointer to the variable argument list associated with Format.
+ @param Format Pointer to a Null-terminated ASCII format string of a
+ debug message.
+
+ @retval TRUE The status code specified by Data was converted DEBUG() arguments
+ specified by ErrorLevel, Marker, and Format.
+ @retval FALSE The status code specified by Data could not be converted to
+ DEBUG() arguments.
+
+**/
+BOOLEAN
+EFIAPI
+ReportStatusCodeExtractDebugInfo (
+ IN EFI_STATUS_CODE_DATA *Data,
+ OUT UINT32 *ErrorLevel,
+ OUT VA_LIST *Marker,
+ OUT CHAR8 **Format
+ );
+
+
+/**
+ Reports a status code.
+
+ Reports the status code specified by the parameters Type and Value. Status
+ code also require an instance, caller ID, and extended data. This function
+ passed in a zero instance, NULL extended data, and a caller ID of
+ gEfiCallerIdGuid, which is the GUID for the module.
+
+ ReportStatusCode()must actively prevent recusrsion. If ReportStatusCode()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCode() must return immediately.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a
+ device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCode (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value
+ );
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data.
+
+ Allocates and fills in the extended data section of a status code with the
+ Device Path Protocol specified by DevicePath. This function is responsible
+ for allocating a buffer large enough for the standard header and the device
+ path. The standard header is filled in with a GUID of
+ gEfiStatusCodeSpecificDataGuid. The status code is reported with a zero
+ instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithDevicePath()must actively prevent recursion. If
+ ReportStatusCodeWithDevicePath() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithDevicePath()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If DevicePath is NULL, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithDevicePath (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ );
+
+
+/**
+ Reports a status code with an extended data buffer.
+
+ Allocates and fills in the extended data section of a status code with the
+ extended data specified by ExtendedData and ExtendedDataSize. ExtendedData
+ is assumed to be one of the data structures specified in Related Definitions.
+ These data structure do not have the standard header, so this function is
+ responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled
+ in with a GUID of gEfiStatusCodeSpecificDataGuid. The status code is reported
+ with a zero instance and a caller ID of gEfiCallerIdGuid.
+
+ ReportStatusCodeWithExtendedData()must actively prevent recursion. If
+ ReportStatusCodeWithExtendedData() is called while processing another any other
+ Report Status Code Library function, then ReportStatusCodeWithExtendedData()
+ must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL, then ASSERT().
+ If ExtendedDataSize is 0, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeWithExtendedData (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN VOID *ExtendedData,
+ IN UINTN ExtendedDataSize
+ );
+
+
+/**
+ Reports a status code with full parameters.
+
+ The function reports a status code. If ExtendedData is NULL and ExtendedDataSize
+ is 0, then an extended data buffer is not reported. If ExtendedData is not
+ NULL and ExtendedDataSize is not 0, then an extended data buffer is allocated.
+ ExtendedData is assumed not have the standard status code header, so this function
+ is responsible for allocating a buffer large enough for the standard header and
+ the extended data passed into this function. The standard header is filled in
+ with a GUID specified by ExtendedDataGuid. If ExtendedDataGuid is NULL, then a
+ GUID of gEfiStatusCodeSpecificDatauid is used. The status code is reported with
+ an instance specified by Instance and a caller ID specified by CallerId. If
+ CallerId is NULL, then a caller ID of gEfiCallerIdGuid is used.
+
+ ReportStatusCodeEx()must actively prevent recursion. If ReportStatusCodeEx()
+ is called while processing another any other Report Status Code Library function,
+ then ReportStatusCodeEx() must return EFI_DEVICE_ERROR immediately.
+
+ If ExtendedData is NULL and ExtendedDataSize is not zero, then ASSERT().
+ If ExtendedData is not NULL and ExtendedDataSize is zero, then ASSERT().
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate
+ the extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+EFI_STATUS
+EFIAPI
+ReportStatusCodeEx (
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_GUID *ExtendedDataGuid OPTIONAL,
+ IN VOID *ExtendedData OPTIONAL,
+ IN UINTN ExtendedDataSize
+ );
+
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ Some implementations of this library function may perform I/O operations
+ directly to a POST card device. Other implementations may send Value to
+ ReportStatusCode(), and the status code reporting mechanism will eventually
+ display the 32-bit value on the status reporting device.
+
+ PostCode() must actively prevent recursion. If PostCode() is called while
+ processing another any other Report Status Code Library function, then
+ PostCode() must return Value immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCode (
+ IN UINT32 Value
+ );
+
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ Sends the 32-bit value specified by Value to a POST card, and returns Value.
+ If Description is not NULL, then the ASCII string specified by Description is
+ also passed to the handler that displays the POST card value. Some
+ implementations of this library function may perform I/O operations directly
+ to a POST card device. Other implementations may send Value to ReportStatusCode(),
+ and the status code reporting mechanism will eventually display the 32-bit
+ value on the status reporting device.
+
+ PostCodeWithDescription()must actively prevent recursion. If
+ PostCodeWithDescription() is called while processing another any other Report
+ Status Code Library function, then PostCodeWithDescription() must return Value
+ immediately.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value. This is an optional parameter that may
+ be NULL.
+
+ @return Value
+
+**/
+UINT32
+EFIAPI
+PostCodeWithDescription (
+ IN UINT32 Value,
+ IN CONST CHAR8 *Description OPTIONAL
+ );
+
+
+/**
+ Returns TRUE if status codes of type EFI_PROGRESS_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_PROGRESS_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportProgressCodeEnabled (
+ VOID
+ );
+
+
+/**
+ Returns TRUE if status codes of type EFI_ERROR_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_ERROR_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportErrorCodeEnabled (
+ VOID
+ );
+
+
+/**
+ Returns TRUE if status codes of type EFI_DEBUG_CODE are enabled
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_DEBUG_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportDebugCodeEnabled (
+ VOID
+ );
+
+
+/**
+ Returns TRUE if POST Codes are enabled.
+
+ This function returns TRUE if the REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_ENABLED bit of
+ PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeEnabled (
+ VOID
+ );
+
+
+/**
+ Returns TRUE if POST code descriptions are enabled.
+
+ This function returns TRUE if the
+ REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED bit of
+ PcdReportStatusCodeProperyMask is set. Otherwise FALSE is returned.
+
+ @retval TRUE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is set.
+ @retval FALSE The REPORT_STATUS_CODE_PROPERTY_POST_CODE_DESCRIPTIONS_ENABLED
+ bit of PcdReportStatusCodeProperyMask is clear.
+
+**/
+BOOLEAN
+EFIAPI
+ReportPostCodeDescriptionEnabled (
+ VOID
+ );
+
+
+/**
+ Reports a status code with minimal parameters if the status code type is enabled.
+
+ If the status code type specified by Type is enabled in
+ PcdReportStatusCodeProperyMask, then call ReportStatusCode() passing in Type
+ and Value.
+
+ @param Type Status code type.
+ @param Value Status code value.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_DEVICE_ERROR There status code could not be reported due to a device error.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+#define REPORT_STATUS_CODE(Type,Value) \
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \
+ ReportStatusCode(Type,Value) : \
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \
+ ReportStatusCode(Type,Value) : \
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \
+ ReportStatusCode(Type,Value) : \
+ EFI_UNSUPPORTED
+
+
+/**
+ Reports a status code with a Device Path Protocol as the extended data if the
+ status code type is enabled.
+
+ If the status code type specified by Type is enabled in
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithDevicePath()
+ passing in Type, Value, and DevicePath.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param DevicePath Pointer to the Device Path Protocol to be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by DevicePath.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+#define REPORT_STATUS_CODE_WITH_DEVICE_PATH(Type,Value,DevicePathParameter) \
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \
+ ReportStatusCodeWithDevicePath(Type,Value,DevicePathParameter) : \
+ EFI_UNSUPPORTED
+
+
+/**
+ Reports a status code with an extended data buffer if the status code type
+ is enabled.
+
+ If the status code type specified by Type is enabled in
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeWithExtendedData()
+ passing in Type, Value, ExtendedData, and ExtendedDataSize.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param ExtendedData Pointer to the extended data buffer to be reported.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer to
+ be reported.
+
+ @retval EFI_SUCCESS The status code was reported with the extended
+ data specified by ExtendedData and ExtendedDataSize.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+#define REPORT_STATUS_CODE_WITH_EXTENDED_DATA(Type,Value,ExtendedData,ExtendedDataSize) \
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \
+ ReportStatusCodeWithExtendedData(Type,Value,ExtendedData,ExtendedDataSize) : \
+ EFI_UNSUPPORTED
+
+/**
+ Reports a status code specifying all parameters if the status code type is enabled.
+
+ If the status code type specified by Type is enabled in
+ PcdReportStatusCodeProperyMask, then call ReportStatusCodeEx() passing in Type,
+ Value, Instance, CallerId, ExtendedDataGuid, ExtendedData, and ExtendedDataSize.
+
+ @param Type Status code type.
+ @param Value Status code value.
+ @param Instance Status code instance number.
+ @param CallerId Pointer to a GUID that identifies the caller of this
+ function. If this parameter is NULL, then a caller
+ ID of gEfiCallerIdGuid is used.
+ @param ExtendedDataGuid Pointer to the GUID for the extended data buffer.
+ If this parameter is NULL, then a the status code
+ standard header is filled in with
+ gEfiStatusCodeSpecificDataGuid.
+ @param ExtendedData Pointer to the extended data buffer. This is an
+ optional parameter that may be NULL.
+ @param ExtendedDataSize The size, in bytes, of the extended data buffer.
+
+ @retval EFI_SUCCESS The status code was reported.
+ @retval EFI_OUT_OF_RESOURCES There were not enough resources to allocate the
+ extended data section if it was specified.
+ @retval EFI_UNSUPPORTED Report status code is not supported
+
+**/
+#define REPORT_STATUS_CODE_EX(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) \
+ (ReportProgressCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) ? \
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \
+ (ReportErrorCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) ? \
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \
+ (ReportDebugCodeEnabled() && ((Type) & EFI_STATUS_CODE_TYPE_MASK) == EFI_DEBUG_CODE) ? \
+ ReportStatusCodeEx(Type,Value,Instance,CallerId,ExtendedDataGuid,ExtendedData,ExtendedDataSize) : \
+ EFI_UNSUPPORTED
+
+/**
+ Sends an 32-bit value to a POST card.
+
+ If POST codes are enabled in PcdReportStatusCodeProperyMask, then call PostCode()
+ passing in Value. Value is returned.
+
+ @param Value The 32-bit value to write to the POST card.
+
+ @return Value
+
+**/
+#define POST_CODE(Value) ReportPostCodeEnabled() ? PostCode(Value) : Value
+
+/**
+ Sends an 32-bit value to a POST and associated ASCII string.
+
+ If POST codes and POST code descriptions are enabled in
+ PcdReportStatusCodeProperyMask, then call PostCodeWithDescription() passing in
+ Value and Description. If only POST codes are enabled, then call PostCode()
+ passing in Value. Value is returned.
+
+ @param Value The 32-bit value to write to the POST card.
+ @param Description Pointer to an ASCII string that is a description of the
+ POST code value.
+
+**/
+#define POST_CODE_WITH_DESCRIPTION(Value,Description) \
+ ReportPostCodeEnabled() ? \
+ (ReportPostCodeDescriptionEnabled() ? \
+ PostCodeWithDescription(Value,Description) : \
+ PostCode(Value)) : \
+ Value
+
+#endif
diff --git a/MdePkg/Include/Library/ResourcePublicationLib.h b/MdePkg/Include/Library/ResourcePublicationLib.h new file mode 100644 index 0000000000..2aa0040bf7 --- /dev/null +++ b/MdePkg/Include/Library/ResourcePublicationLib.h @@ -0,0 +1,44 @@ +/** @file
+ Declare presence of resources in the platform
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ResourcePublicationLib.h
+
+**/
+
+#ifndef __RESOURCE_PUBLICATION_LIB__
+#define __RESOURCE_PUBLICATION_LIB__
+
+/**
+
+ Declares the presence of permanent system memory in the platform.
+
+ Declares that the system memory buffer specified by MemoryBegin and MemoryLength
+ as permanent memory that may be used for general purpose use by software.
+ The amount of memory available to software may be less than MemoryLength
+ if published memory has alignment restrictions.
+
+ @param MemoryBegin The start address of the memory being declared.
+ @param MemoryLength The number of bytes of memory being declared.
+
+ @retval RETURN_SUCCESS The memory buffer was published.
+ @retval RETURN_OUT_OF_RESOURCES There are not enough resources to publish the memory buffer
+
+**/
+RETURN_STATUS
+EFIAPI
+PublishSystemMemory (
+ IN PHYSICAL_ADDRESS MemoryBegin,
+ IN UINT64 MemoryLength
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/SmbusLib.h b/MdePkg/Include/Library/SmbusLib.h new file mode 100644 index 0000000000..55aae1211e --- /dev/null +++ b/MdePkg/Include/Library/SmbusLib.h @@ -0,0 +1,474 @@ +/** @file
+ SMBUS Functions
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmbusLib.h
+
+**/
+
+#ifndef __SMBUS_LIB__
+#define __SMBUS_LIB__
+
+/**
+ Macro that converts SMBUS slave address, SMBUS command, SMBUS data length,
+ and PEC to a value that can be passed to the SMBUS Library functions.
+
+ Computes an address that is compatible with the SMBUS Library functions.
+ The unused upper bits of SlaveAddress, Command, and Length are stripped
+ prior to the generation of the address.
+
+ @param SlaveAddress SMBUS Slave Address. Range 0..127.
+ @param Command SMBUS Command. Range 0..255.
+ @param Length SMBUS Data Length. Range 0..32.
+ @param Pec TRUE if Packet Error Checking is enabled. Otherwise FALSE.
+
+**/
+#define SMBUS_LIB_ADDRESS(SlaveAddress,Command,Length,Pec) \
+ ( ((Pec) ? MAX_BIT : 0) | \
+ (((SlaveAddress) & 0x7f) << 1) | \
+ (((Command) & 0xff) << 8) | \
+ (((Length) & 0x1f) << 16) \
+ )
+
+/**
+ Executes an SMBUS quick read command.
+
+ Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+VOID
+EFIAPI
+SmBusQuickRead (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS quick write command.
+
+ Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If PEC is set in SmBusAddress, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+**/
+BOOLEAN
+EFIAPI
+SmBusQuickWrite (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS receive byte command.
+
+ Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address field of SmBusAddress is required.
+ The byte received from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte received from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReceiveByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS send byte command.
+
+ Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.
+ The byte specified by Value is sent.
+ Only the SMBUS slave address field of SmBusAddress is required. Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to send.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusSendByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS read data byte command.
+
+ Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 8-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT8
+EFIAPI
+SmBusReadDataByte (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS write data byte command.
+
+ Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.
+ The 8-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 8-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT8
+EFIAPI
+SmBusWriteDataByte (
+ IN UINTN SmBusAddress,
+ IN UINT8 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS read data word command.
+
+ Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value read from the SMBUS is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The byte read from the SMBUS.
+
+**/
+UINT16
+EFIAPI
+SmBusReadDataWord (
+ IN UINTN SmBusAddress,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS write data word command.
+
+ Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Value is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The parameter of Value.
+
+**/
+UINT16
+EFIAPI
+SmBusWriteDataWord (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS process call command.
+
+ Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.
+ The 16-bit value specified by Value is written.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ The 16-bit value returned by the process call command is returned.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Value The 16-bit value to write.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The 16-bit value returned by the process call command.
+
+**/
+UINT16
+EFIAPI
+SmBusProcessCall (
+ IN UINTN SmBusAddress,
+ IN UINT16 Value,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS read block command.
+
+ Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.
+ Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.
+ Bytes are read from the SMBUS and stored in Buffer.
+ The number of bytes read is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure Buffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes read.
+
+**/
+UINTN
+EFIAPI
+SmBusReadBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS write block command.
+
+ Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from Buffer.
+ The number of bytes written is returned, and will never return a value larger than 32-bytes.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ If Length in SmBusAddress is zero or greater than 32, then ASSERT().
+ If Buffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusWriteBlock (
+ IN UINTN SmBusAddress,
+ OUT VOID *Buffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Executes an SMBUS block process call command.
+
+ Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.
+ The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.
+ Bytes are written to the SMBUS from OutBuffer. Bytes are then read from the SMBUS into InBuffer.
+ If Status is not NULL, then the status of the executed command is returned in Status.
+ It is the caller¡¯s responsibility to make sure InBuffer is large enough for the total number of bytes read.
+ SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.
+ If OutBuffer is NULL, then ASSERT().
+ If InBuffer is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param OutBuffer Pointer to the buffer of bytes to write to the SMBUS.
+ @param InBuffer Pointer to the buffer of bytes to read from the SMBUS.
+ @param Status Return status for the executed command.
+ This is an optional parameter and may be NULL.
+
+ @return The number of bytes written.
+
+**/
+UINTN
+EFIAPI
+SmBusBlockProcessCall (
+ IN UINTN SmBusAddress,
+ OUT VOID *OutBuffer,
+ OUT VOID *InBuffer,
+ OUT RETURN_STATUS *Status OPTIONAL
+ )
+;
+
+/**
+ Enumerates the SMBUS and assigns slave addresses.
+
+ Executes the SMBUS enumeration algorithm and assigns a valid address to all SMBUS slave devices.
+ The total number of SMBUS slave devices detected is returned.
+ The status of the executed command is returned.
+ If Slave Address in SmBusAddress is not zero, then ASSERT().
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpAll (
+ IN UINTN SmBusAddress
+ )
+;
+
+/**
+ Assigns an SMBUS slave addresses.
+
+ Assigns the SMBUS device specified by Uuid the slave address specified by SmBusAddress.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID of the device to assign a slave address.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusArpDevice (
+ IN UINTN SmBusAddress,
+ IN CONST GUID *Uuid
+ )
+;
+
+/**
+ Retrieves the UUID associated with an SMBUS slave device.
+
+ Retrieves the UUID associated with the slave address specified
+ by SmBusAddress and returns the UUID in Uuid.
+ The status of the executed command is returned.
+ If Command in SmBusAddress is not zero, then ASSERT().
+ If Length in SmBusAddress is not zero, then ASSERT().
+ If PEC in SmBusAddress is set, then ASSERT().
+ If Uuid is NULL, then ASSERT().
+ If any reserved bits of SmBusAddress are set, then ASSERT().
+
+ @param SmBusAddress Address that encodes the SMBUS Slave Address,
+ SMBUS Command, SMBUS Data Length, and PEC.
+ @param Uuid Pointer to the UUID retrieved from the SMBUS slave device.
+
+ @retval RETURN_SUCCESS The SMBUS command was executed.
+ @retval RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.
+ @retval RETURN_DEVICE_ERROR The request was not completed because a failure reflected
+ in the Host Status Register bit.
+ Device errors are a result of a transaction collision, illegal command field,
+ unclaimed cycle (host initiated), or bus errors (collisions).
+
+**/
+RETURN_STATUS
+EFIAPI
+SmBusGetUuid (
+ IN UINTN SmBusAddress,
+ OUT GUID *Uuid
+ )
+;
+
+#endif
diff --git a/MdePkg/Include/Library/TimerLib.h b/MdePkg/Include/Library/TimerLib.h new file mode 100644 index 0000000000..3d0f03eda0 --- /dev/null +++ b/MdePkg/Include/Library/TimerLib.h @@ -0,0 +1,100 @@ +/** @file
+ Timer Library Functions
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: TimerLib.h
+
+**/
+
+#ifndef __TIMER_LIB__
+#define __TIMER_LIB__
+
+/**
+ Stalls the CPU for at least the given number of microseconds.
+
+ Stalls the CPU for the number of microseconds specified by MicroSeconds.
+
+ @param MicroSeconds The minimum number of microseconds to delay.
+
+ @return Return value depends on implementation.
+
+**/
+UINTN
+EFIAPI
+MicroSecondDelay (
+ IN UINTN MicroSeconds
+ );
+
+/**
+ Stalls the CPU for at least the given number of nanoseconds.
+
+ Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
+
+ @param NanoSeconds The minimum number of nanoseconds to delay.
+
+ @return Return value depends on implementation.
+
+**/
+UINTN
+EFIAPI
+NanoSecondDelay (
+ IN UINTN NanoSeconds
+ );
+
+/**
+ Retrieves the current value of a 64-bit free running performance counter.
+
+ Retrieves the current value of a 64-bit free running performance counter. The
+ counter can either count up by 1 or count down by 1. If the physical
+ performance counter counts by a larger increment, then the counter values
+ must be translated. The properties of the counter can be retrieved from
+ GetPerformanceCounterProperties().
+
+ @return The current value of the free running performance counter.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounter (
+ VOID
+ );
+
+/**
+ Retrieves the 64-bit frequency in Hz and the range of performance counter
+ values.
+
+ If StartValue is not NULL, then the value that the performance counter starts
+ with immediately after is it rolls over is returned in StartValue. If
+ EndValue is not NULL, then the value that the performance counter end with
+ immediately before it rolls over is returned in EndValue. The 64-bit
+ frequency of the performance counter in Hz is always returned. If StartValue
+ is less than EndValue, then the performance counter counts up. If StartValue
+ is greater than EndValue, then the performance counter counts down. For
+ example, a 64-bit free running counter that counts up would have a StartValue
+ of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
+ that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
+
+ @param StartValue The value the performance counter starts with when it
+ rolls over.
+ @param EndValue The value that the performance counter ends with before
+ it rolls over.
+
+ @return The frequency in Hz.
+
+**/
+UINT64
+EFIAPI
+GetPerformanceCounterProperties (
+ IN UINT64 *StartValue, OPTIONAL
+ IN UINT64 *EndValue OPTIONAL
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/UefiBootServicesTableLib.h b/MdePkg/Include/Library/UefiBootServicesTableLib.h new file mode 100644 index 0000000000..52b5e23692 --- /dev/null +++ b/MdePkg/Include/Library/UefiBootServicesTableLib.h @@ -0,0 +1,27 @@ +/** @file
+ Library that provides a global pointer to the UEFI Boot Services Tables
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiBootServicesTableLib.h
+
+**/
+
+#ifndef __UEFI_BOOT_SERVICES_TABLE_LIB_H__
+#define __UEFI_BOOT_SERVICES_TABLE_LIB_H__
+
+//
+//
+//
+extern EFI_HANDLE gImageHandle;
+extern EFI_SYSTEM_TABLE *gST;
+extern EFI_BOOT_SERVICES *gBS;
+
+#endif
diff --git a/MdePkg/Include/Library/UefiDecompressLib.h b/MdePkg/Include/Library/UefiDecompressLib.h new file mode 100644 index 0000000000..d2a379310f --- /dev/null +++ b/MdePkg/Include/Library/UefiDecompressLib.h @@ -0,0 +1,37 @@ +/** @file
+ Return UEFI Decompress Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDecompressLib.h
+
+**/
+
+#ifndef __UEFI_DECPOMPRESS_LIB_H__
+#define __UEFI_DECPOMPRESS_LIB_H__
+
+RETURN_STATUS
+EFIAPI
+UefiDecompressGetInfo (
+ IN CONST VOID *Source,
+ IN UINT32 SourceSize,
+ OUT UINT32 *DestinationSize,
+ OUT UINT32 *ScratchSize
+ );
+
+RETURN_STATUS
+EFIAPI
+UefiDecompress (
+ IN CONST VOID *Source,
+ IN OUT VOID *Destination,
+ IN OUT VOID *Scratch
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/UefiDriverEntryPoint.h b/MdePkg/Include/Library/UefiDriverEntryPoint.h new file mode 100644 index 0000000000..6269876738 --- /dev/null +++ b/MdePkg/Include/Library/UefiDriverEntryPoint.h @@ -0,0 +1,154 @@ +/** @file
+ Entry point to a DXE Boot Services Driver
+
+Copyright (c) 2006, Intel Corporation<BR>
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __MODULE_ENTRY_POINT_H__
+#define __MODULE_ENTRY_POINT_H__
+
+//
+// Declare the EFI/UEFI Specification Revision to which this driver is implemented
+//
+extern const UINT32 _gUefiDriverRevision;
+
+//
+// Declare the number of entry points in the image.
+//
+extern const UINT8 _gDriverEntryPointCount;
+
+//
+// Declare the number of unload handler in the image.
+//
+extern const UINT8 _gDriverUnloadImageCount;
+
+//
+// Declare the arrary of Boot Sevice Exit Event callbacks .
+//
+extern const EFI_EVENT_NOTIFY _gDriverExitBootServicesEvent[];
+
+//
+// Declare the arrary of Virtual Address Change Event callbacks .
+//
+extern const EFI_EVENT_NOTIFY _gDriverSetVirtualAddressMapEvent[];
+
+/**
+ Enrty point to DXE SMM Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+_ModuleEntryPoint (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Enrty point wrapper of DXE Driver.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @retval EFI_SUCCESS One or more of the drivers returned a success code.
+ @retval !EFI_SUCESS The return status from the last driver entry point in the list.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiMain (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Computes the cummulative return status for the driver entry point and perform
+ a long jump back into DriverEntryPoint().
+
+ @param Status Status returned by the driver that is exiting.
+
+**/
+VOID
+EFIAPI
+ExitDriver (
+ IN EFI_STATUS Status
+ );
+
+
+/**
+ Call constructs for all libraries. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryConstructorList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Call destructors for all libraries. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+**/
+VOID
+EFIAPI
+ProcessLibraryDestructorList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Call the list of driver entry points. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+ @param SystemTable Pointer to the EFI System Table.
+
+ @return Status returned by entry points of drivers.
+
+**/
+
+EFI_STATUS
+EFIAPI
+ProcessModuleEntryPointList (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+
+/**
+ Call the unload handlers for all the modules. Automatics Generated by tool.
+
+ @param ImageHandle ImageHandle of the loaded driver.
+
+ @return Status returned by unload handlers of drivers.
+
+**/
+EFI_STATUS
+EFIAPI
+ProcessModuleUnloadList (
+ IN EFI_HANDLE ImageHandle
+ );
+
+#endif
diff --git a/MdePkg/Include/Library/UefiDriverModelLib.h b/MdePkg/Include/Library/UefiDriverModelLib.h new file mode 100644 index 0000000000..b6532f15c3 --- /dev/null +++ b/MdePkg/Include/Library/UefiDriverModelLib.h @@ -0,0 +1,48 @@ +/** @file
+ UEFI Driver Model Library Services
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiDriverModelLib.h
+
+**/
+
+#ifndef __UEFI_DRIVER_MODEL_LIB_H__
+#define __UEFI_DRIVER_MODEL_LIB_H__
+
+//
+// Declare bitmask values for the protocols that are enabled
+//
+#define UEFI_DRIVER_MODEL_LIBRARY_COMPONENT_NAME_PROTOCOL_ENABLED 0x01
+#define UEFI_DRIVER_MODEL_LIBRARY_DRIVER_DIAGNOSTICS_PROTOCOL_ENABLED 0x02
+#define UEFI_DRIVER_MODEL_LIBRARY_DRIVER_CONFIGURATION_PROTOCOL_ENABLED 0x04
+
+//
+//
+//
+extern const UINT8 _gDriverModelProtocolBitmask;
+
+//
+//
+//
+typedef struct {
+ const EFI_DRIVER_BINDING_PROTOCOL *DriverBinding;
+ const EFI_COMPONENT_NAME_PROTOCOL *ComponentName;
+ const EFI_DRIVER_CONFIGURATION_PROTOCOL *DriverConfiguration;
+ const EFI_DRIVER_DIAGNOSTICS_PROTOCOL *DriverDiagnostics;
+} EFI_DRIVER_MODEL_PROTOCOL_LIST;
+
+//
+//
+//
+extern const UINTN _gDriverModelProtocolListEntries;
+extern const EFI_DRIVER_MODEL_PROTOCOL_LIST _gDriverModelProtocolList[];
+
+#endif
diff --git a/MdePkg/Include/Library/UefiLib.h b/MdePkg/Include/Library/UefiLib.h new file mode 100644 index 0000000000..73b761f790 --- /dev/null +++ b/MdePkg/Include/Library/UefiLib.h @@ -0,0 +1,486 @@ +/** @file
+ MDE UEFI library functions and macros
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __UEFI_LIB_H__
+#define __UEFI_LIB_H__
+
+//
+// Unicode String Table
+//
+typedef struct {
+ CHAR8 *Language;
+ CHAR16 *UnicodeString;
+} EFI_UNICODE_STRING_TABLE;
+
+//
+// EFI Lock Status
+//
+typedef enum {
+ EfiLockUninitialized = 0,
+ EfiLockReleased = 1,
+ EfiLockAcquired = 2
+} EFI_LOCK_STATE;
+
+//
+// EFI Lock
+//
+typedef struct {
+ EFI_TPL Tpl;
+ EFI_TPL OwnerTpl;
+ EFI_LOCK_STATE Lock;
+} EFI_LOCK;
+
+
+/**
+ This function searches the list of configuration tables stored in the EFI System
+ Table for a table with a GUID that matches TableGuid. If a match is found,
+ then a pointer to the configuration table is returned in Table, and EFI_SUCCESS
+ is returned. If a matching GUID is not found, then EFI_NOT_FOUND is returned.
+
+ @param TableGuid Pointer to table's GUID type..
+ @param Table Pointer to the table associated with TableGuid in the EFI System Table.
+
+ @retval EFI_SUCCESS A configuration table matching TableGuid was found.
+ @retval EFI_NOT_FOUND A configuration table matching TableGuid could not be found.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiGetSystemConfigurationTable (
+ IN EFI_GUID *TableGuid,
+ OUT VOID **Table
+ );
+
+/**
+ This function causes the notification function to be executed for every protocol
+ of type ProtocolGuid instance that exists in the system when this function is
+ invoked. In addition, every time a protocol of type ProtocolGuid instance is
+ installed or reinstalled, the notification function is also executed.
+
+ @param ProtocolGuid Supplies GUID of the protocol upon whose installation the event is fired.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @return The notification event that was created.
+
+**/
+EFI_EVENT
+EFIAPI
+EfiCreateProtocolNotifyEvent(
+ IN EFI_GUID *ProtocolGuid,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration
+ );
+
+/**
+ This function creates an event using NotifyTpl, NoifyFunction, and NotifyContext.
+ This event is signaled with EfiNamedEventSignal(). This provide the ability for
+ one or more listeners on the same event named by the GUID specified by Name.
+
+ @param Name Supplies GUID name of the event.
+ @param NotifyTpl Supplies the task priority level of the event notifications.
+ @param NotifyFunction Supplies the function to notify when the event is signaled.
+ @param NotifyContext The context parameter to pass to NotifyFunction.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @retval EFI_SUCCESS A named event was created.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to create the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventListen (
+ IN CONST EFI_GUID *Name,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN CONST VOID *NotifyContext, OPTIONAL
+ OUT VOID *Registration OPTIONAL
+ );
+
+/**
+ This function signals the named event specified by Name. The named event must
+ have been created with EfiNamedEventListen().
+
+ @param Name Supplies GUID name of the event.
+
+ @retval EFI_SUCCESS A named event was signaled.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resource to signal the named event.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiNamedEventSignal (
+ IN CONST EFI_GUID *Name
+ );
+
+/**
+ This function initializes a basic mutual exclusion lock to the released state
+ and returns the lock. Each lock provides mutual exclusion access at its task
+ priority level. Since there is no preemption or multiprocessor support in EFI,
+ acquiring the lock only consists of raising to the locks TPL.
+
+ @param Lock A pointer to the lock data structure to initialize.
+ @param Priority EFI TPL associated with the lock.
+
+ @return The lock.
+
+**/
+EFI_LOCK *
+EFIAPI
+EfiInitializeLock (
+ IN OUT EFI_LOCK *Lock,
+ IN EFI_TPL Priority
+ );
+
+/**
+ This macro initializes the contents of a basic mutual exclusion lock to the
+ released state. Each lock provides mutual exclusion access at its task
+ priority level. Since there is no preemption or multiprocessor support in EFI,
+ acquiring the lock only consists of raising to the locks TPL.
+
+ @param Lock A pointer to the lock data structure to initialize.
+ @param Priority The task priority level of the lock.
+
+ @return The lock.
+
+**/
+#define EFI_INITIALIZE_LOCK_VARIABLE(Priority) \
+ {Priority, EFI_TPL_APPLICATION, EfiLockReleased }
+
+
+/**
+
+ Macro that calls DebugAssert() if an EFI_LOCK structure is not in the locked state.
+
+ If the DEBUG_PROPERTY_DEBUG_ASSERT_ENABLED bit of PcdDebugProperyMask is set,
+ then this macro evaluates the EFI_LOCK structure specified by Lock. If Lock
+ is not in the locked state, then DebugAssert() is called passing in the source
+ filename, source line number, and Lock.
+
+ If Lock is NULL, then ASSERT().
+
+ @param LockParameter A pointer to the lock to acquire.
+
+**/
+#define ASSERT_LOCKED(LockParameter) \
+ do { \
+ if (DebugAssertEnabled ()) { \
+ ASSERT (LockParameter != NULL); \
+ if ((LockParameter)->Lock != EfiLockAcquired) { \
+ _ASSERT (LockParameter not locked); \
+ } \
+ } \
+ } while (FALSE)
+
+
+/**
+ This function raises the system¡¯s current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it places the lock in the
+ acquired state.
+
+ @param Priority The task priority level of the lock.
+
+**/
+VOID
+EFIAPI
+EfiAcquireLock (
+ IN EFI_LOCK *Lock
+ );
+
+/**
+ This function raises the system¡¯s current task priority level to the task
+ priority level of the mutual exclusion lock. Then, it attempts to place the
+ lock in the acquired state.
+
+ @param Lock A pointer to the lock to acquire.
+
+ @retval EFI_SUCCESS The lock was acquired.
+ @retval EFI_ACCESS_DENIED The lock could not be acquired because it is already owned.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiAcquireLockOrFail (
+ IN EFI_LOCK *Lock
+ );
+
+/**
+ This function transitions a mutual exclusion lock from the acquired state to
+ the released state, and restores the system¡¯s task priority level to its
+ previous level.
+
+ @param Lock A pointer to the lock to release.
+
+**/
+VOID
+EFIAPI
+EfiReleaseLock (
+ IN EFI_LOCK *Lock
+ );
+
+/**
+ This function looks up a Unicode string in UnicodeStringTable. If Language is
+ a member of SupportedLanguages and a Unicode string is found in UnicodeStringTable
+ that matches the language code specified by Language, then it is returned in
+ UnicodeString.
+
+ @param Language A pointer to the ISO 639-2 language code for the
+ Unicode string to look up and return.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports. Language
+ must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string from UnicodeStringTable
+ that matches the language specified by Language.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found
+ in the table of Unicoide strings UnicodeStringTable,
+ and it was returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_UNSUPPORTED UnicodeStringTable is NULL.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+ @retval EFI_UNSUPPORTED The language specified by Language is not
+ supported by UnicodeStringTable.
+
+**/
+EFI_STATUS
+EFIAPI
+LookupUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN CONST EFI_UNICODE_STRING_TABLE *UnicodeStringTable,
+ OUT CHAR16 **UnicodeString
+ );
+
+/**
+ This function adds a Unicode string to UnicodeStringTable.
+ If Language is a member of SupportedLanguages then UnicodeString is added to
+ UnicodeStringTable. New buffers are allocated for both Language and
+ UnicodeString. The contents of Language and UnicodeString are copied into
+ these new buffers. These buffers are automatically freed when
+ FreeUnicodeStringTable() is called.
+
+ @param Language A pointer to the ISO 639-2 language code for the Unicode
+ string to add.
+ @param SupportedLanguages A pointer to the set of ISO 639-2 language codes
+ that the Unicode string table supports.
+ Language must be a member of this set.
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+ @param UnicodeString A pointer to the Unicode string to add.
+
+ @retval EFI_SUCCESS The Unicode string that matches the language
+ specified by Language was found in the table of
+ Unicode strings UnicodeStringTable, and it was
+ returned in UnicodeString.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is NULL.
+ @retval EFI_INVALID_PARAMETER UnicodeString is an empty string.
+ @retval EFI_UNSUPPORTED SupportedLanguages is NULL.
+ @retval EFI_ALREADY_STARTED A Unicode string with language Language is
+ already present in UnicodeStringTable.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory to add another
+ Unicode string to UnicodeStringTable.
+ @retval EFI_UNSUPPORTED The language specified by Language is not a
+ member of SupportedLanguages.
+
+**/
+EFI_STATUS
+EFIAPI
+AddUnicodeString (
+ IN CONST CHAR8 *Language,
+ IN CONST CHAR8 *SupportedLanguages,
+ IN EFI_UNICODE_STRING_TABLE **UnicodeStringTable,
+ IN CONST CHAR16 *UnicodeString
+ );
+
+/**
+ This function frees the table of Unicode strings in UnicodeStringTable.
+ If UnicodeStringTable is NULL, then EFI_SUCCESS is returned.
+ Otherwise, each language code, and each Unicode string in the Unicode string
+ table are freed, and EFI_SUCCESS is returned.
+
+ @param UnicodeStringTable A pointer to the table of Unicode strings.
+
+ @retval EFI_SUCCESS The Unicode string table was freed.
+
+**/
+EFI_STATUS
+EFIAPI
+FreeUnicodeStringTable (
+ IN EFI_UNICODE_STRING_TABLE *UnicodeStringTable
+ );
+
+/**
+ This function computes and returns the width of the Unicode character
+ specified by UnicodeChar.
+
+ @param UnicodeChar A Unicode character.
+
+ @retval 0 The width if UnicodeChar could not be determined.
+ @retval 1 UnicodeChar is a narrow glyph.
+ @retval 2 UnicodeChar is a wide glyph.
+
+**/
+UINTN
+EFIAPI
+GetGlyphWidth (
+ IN CHAR16 UnicodeChar
+ );
+
+/**
+ This function computes and returns the display length of
+ the Null-terminated Unicode string specified by String.
+ If String is NULL, then 0 is returned.
+ If any of the widths of the Unicode characters in String
+ can not be determined, then 0 is returned.
+
+ @param String A pointer to a Null-terminated Unicode string.
+
+ @return The display length of the Null-terminated Unicode string specified by String.
+
+**/
+UINTN
+EFIAPI
+UnicodeStringDisplayLength (
+ IN CONST CHAR16 *String
+ );
+
+//
+// Functions that abstract early Framework contamination of UEFI.
+//
+/**
+ Signal a Ready to Boot Event.
+
+ Create a Ready to Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventReadyToBoot (
+ VOID
+ );
+
+/**
+ Signal a Legacy Boot Event.
+
+ Create a legacy Boot Event. Signal it and close it. This causes other
+ events of the same event group to be signaled in other modules.
+
+**/
+VOID
+EFIAPI
+EfiSignalEventLegacyBoot (
+ VOID
+ );
+
+/**
+ Create a Legacy Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a legacy boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification by
+ declaring a GUID for the legacy boot event class. This library supports
+ the R8.5/EFI 1.10 form and R9/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventLegacyBoot (
+ OUT EFI_EVENT *LegacyBootEvent
+ );
+
+/**
+ Create a Read to Boot Event.
+
+ Tiano extended the CreateEvent Type enum to add a ready to boot event type.
+ This was bad as Tiano did not own the enum. In UEFI 2.0 CreateEventEx was
+ added and now it's possible to not voilate the UEFI specification and use
+ the ready to boot event class defined in UEFI 2.0. This library supports
+ the R8.5/EFI 1.10 form and R9/UEFI 2.0 form and allows common code to
+ work both ways.
+
+ @param LegacyBootEvent Returns the EFI event returned from gBS->CreateEvent(Ex).
+
+ @retval EFI_SUCCESS Event was created.
+ @retval Other Event was not created.
+
+**/
+EFI_STATUS
+EFIAPI
+EfiCreateEventReadyToBoot (
+ OUT EFI_EVENT *ReadyToBootEvent
+ );
+
+/**
+ Initialize a Firmware Volume (FV) Media Device Path node.
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for PIWG extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability.
+
+ @param FvDevicePathNode Pointer to a FV device path node to initialize
+ @param NameGuid FV file name to use in FvDevicePathNode
+
+**/
+VOID
+EFIAPI
+EfiInitializeFwVolDevicepathNode (
+ IN MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode,
+ IN EFI_GUID *NameGuid
+ );
+
+/**
+ Check to see if the Firmware Volume (FV) Media Device Path is valid
+
+ Tiano extended the EFI 1.10 device path nodes. Tiano does not own this enum
+ so as we move to UEFI 2.0 support we must use a mechanism that conforms with
+ the UEFI 2.0 specification to define the FV device path. An UEFI GUIDed
+ device path is defined for PIWG extensions of device path. If the code
+ is compiled to conform with the UEFI 2.0 specification use the new device path
+ else use the old form for backwards compatability. The return value to this
+ function points to a location in FvDevicePathNode and it does not allocate
+ new memory for the GUID pointer that is returned.
+
+ @param FvDevicePathNode Pointer to FV device path to check.
+
+ @retval NULL FvDevicePathNode is not valid.
+ @retval Other FvDevicePathNode is valid and pointer to NameGuid was returned.
+
+**/
+EFI_GUID *
+EFIAPI
+EfiGetNameGuidFromFwVolDevicePathNode (
+ IN MEDIA_FW_VOL_FILEPATH_DEVICE_PATH *FvDevicePathNode
+ );
+
+
+#endif
diff --git a/MdePkg/Include/Library/UefiRuntimeServicesTableLib.h b/MdePkg/Include/Library/UefiRuntimeServicesTableLib.h new file mode 100644 index 0000000000..c59851e435 --- /dev/null +++ b/MdePkg/Include/Library/UefiRuntimeServicesTableLib.h @@ -0,0 +1,25 @@ +/** @file
+ Library that provides a global pointer to the UEFI Runtime Services Tables
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiRuntimeServicesTableLib.h
+
+**/
+
+#ifndef __UEFI_RUNTIME_SERVICES_TABLE_LIB_H__
+#define __UEFI_RUNTIME_SERVICES_TABLE_LIB_H__
+
+//
+//
+//
+extern EFI_RUNTIME_SERVICES *gRT;
+
+#endif
diff --git a/MdePkg/Include/PeiCore.h b/MdePkg/Include/PeiCore.h new file mode 100644 index 0000000000..f0879c7c47 --- /dev/null +++ b/MdePkg/Include/PeiCore.h @@ -0,0 +1,48 @@ +/** @file
+
+ Root include file for PEI Core.
+
+ The PEI Core has its own module type since its entry point definition is
+ unique. This module type should only be used by the PEI core. The build
+ infrastructure automatically sets EDK_RELEASE_VERSION before including
+ this file.
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PEI_CORE_H__
+#define __PEI_CORE_H__
+
+
+//
+// Check to make sure EDK_RELEASE_VERSION is defined
+//
+#if !defined(EDK_RELEASE_VERSION)
+ #error EDK_RELEASE_VERSION not defined
+#elif (EDK_RELEASE_VERSION == 0)
+ #error EDK_RELEASE_VERSION can not be zero
+#endif
+
+
+
+#include <Common/UefiBaseTypes.h>
+#include <Peim/PeiCis.h>
+
+//
+//StatusCodeDataTypeId needs DebugSupport Protocol definition
+//
+#include <Protocol/DebugSupport.h>
+#include <Common/StatusCodeDataTypeId.h>
+#include <Guid/StatusCodeDataTypeId.h>
+
+#include <Ppi/Pcd.h>
+
+#endif
diff --git a/MdePkg/Include/Peim.h b/MdePkg/Include/Peim.h new file mode 100644 index 0000000000..d2773cee4e --- /dev/null +++ b/MdePkg/Include/Peim.h @@ -0,0 +1,53 @@ +/** @file
+
+ Root include file for PEI Modules using the Mde Package.
+
+ PEI Modules follow the public Framwork specifications. This include
+ file supports all the public Framework specificaitons and if you
+ only want to support PIWG specifications you need to use PiwgPeim.h
+ The build infrastructure automatically sets EDK_RELEASE_VERSION
+ before including this file.
+
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __PEIM_H__
+#define __PEIM_H__
+
+
+//
+// Check to make sure EDK_RELEASE_VERSION is defined
+//
+#if !defined(EDK_RELEASE_VERSION)
+ #error EDK_RELEASE_VERSION not defined
+#elif (EDK_RELEASE_VERSION == 0)
+ #error EDK_RELEASE_VERSION can not be zero
+#endif
+
+
+#include <Common/UefiBaseTypes.h>
+#include <Peim/PeiCis.h>
+
+#include <Protocol/Decompress.h>
+
+//
+//StatusCodeDataTypeId needs DebugSupport Protocol definition
+//
+#include <Protocol/DebugSupport.h>
+#include <Common/StatusCodeDataTypeId.h>
+#include <Guid/StatusCodeDataTypeId.h>
+
+#include <Ppi/Pcd.h>
+#include <Common/PcdTemp.h> //This will be removed when PCD PEIM is completed!
+
+#endif
diff --git a/MdePkg/Include/Peim/PeiCis.h b/MdePkg/Include/Peim/PeiCis.h new file mode 100644 index 0000000000..ecc128bda5 --- /dev/null +++ b/MdePkg/Include/Peim/PeiCis.h @@ -0,0 +1,670 @@ +/** @file
+ Framework PEI master include file. This file should match the PEI CIS spec.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PeiCis.h
+
+ @par Revision Reference:
+ Version 0.91.
+
+**/
+
+#ifndef __PEIM_CIS_H__
+#define __PEIM_CIS_H__
+
+#include <Common/MultiPhase.h>
+#include <Common/BootMode.h>
+#include <Common/Hob.h>
+#include <Common/FirmwareVolumeImageFormat.h>
+#include <Common/FirmwareVolumeHeader.h>
+#include <Common/FirmwareFileSystem.h>
+#include <Common/Dependency.h>
+
+#define TIANO_ERROR(a) (MAX_2_BITS | (a))
+
+#if (EFI_SPECIFICATION_VERSION < 0x00020000)
+//
+// Tiano added a couple of return types. These are owned by UEFI specification
+// and Tiano can not use them. Thus for UEFI 2.0/R9 support we moved the values
+// to a UEFI OEM extension range to conform to UEFI specification.
+//
+#define EFI_NOT_AVAILABLE_YET EFIERR (28)
+#define EFI_UNLOAD_IMAGE EFIERR (29)
+#else
+#define EFI_NOT_AVAILABLE_YET TIANO_ERROR (0)
+#define EFI_UNLOAD_IMAGE TIANO_ERROR (1)
+#endif
+
+//
+// Declare forward referenced data structures
+//
+typedef struct _EFI_PEI_SERVICES EFI_PEI_SERVICES;
+typedef struct _EFI_PEI_NOTIFY_DESCRIPTOR EFI_PEI_NOTIFY_DESCRIPTOR;
+
+
+#include <Ppi/CpuIo.h>
+#include <Ppi/PciCfg.h>
+
+//
+// PEI Specification Revision information
+//
+#define PEI_SPECIFICATION_MAJOR_REVISION 0
+#define PEI_SPECIFICATION_MINOR_REVISION 91
+
+/**
+ The PEI Dispatcher will invoke each PEIM one time. During this pass, the PEI
+ Dispatcher will pass control to the PEIM at the AddressOfEntryPoint in the PE Header.
+
+ @param FfsHeader Pointer to the FFS file header.
+
+ @param PeiServices Describes the list of possible PEI Services.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEIM_ENTRY_POINT)(
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ Entry point of the notification callback function itself within the PEIM.
+
+ @param PeiServices Indirect reference to the PEI Services Table.
+
+ @param NotifyDescriptor Address of the notification descriptor data structure.
+
+ @param Ppi Address of the PPI that was installed.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEIM_NOTIFY_ENTRY_POINT) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+//
+// PEI Ppi Services List Descriptors
+//
+#define EFI_PEI_PPI_DESCRIPTOR_PIC 0x00000001
+#define EFI_PEI_PPI_DESCRIPTOR_PPI 0x00000010
+#define EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK 0x00000020
+#define EFI_PEI_PPI_DESCRIPTOR_NOTIFY_DISPATCH 0x00000040
+#define EFI_PEI_PPI_DESCRIPTOR_NOTIFY_TYPES 0x00000060
+#define EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST 0x80000000
+
+typedef struct {
+ UINTN Flags;
+ EFI_GUID *Guid;
+ VOID *Ppi;
+} EFI_PEI_PPI_DESCRIPTOR;
+
+struct _EFI_PEI_NOTIFY_DESCRIPTOR {
+ UINTN Flags;
+ EFI_GUID *Guid;
+ EFI_PEIM_NOTIFY_ENTRY_POINT Notify;
+};
+
+/**
+ This service is the first one provided by the PEI Foundation. This function
+ installs an interface in the PEI PPI database by GUID. The purpose of the
+ service is to publish an interface that other parties can use to call
+ additional PEIMs.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table
+ published by the PEI Foundation.
+
+ @param PpiList A pointer to the list of interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL or Any of the PEI PPI descriptors in the list do not have the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_INSTALL_PPI) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PPI_DESCRIPTOR *PpiList
+ );
+
+/**
+ This function reinstalls an interface in the PEI PPI database by GUID.
+ The purpose of the service is to publish an interface that other parties
+ can use to replace a same-named interface in the protocol database
+ with a different interface.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table
+ published by the PEI Foundation.
+
+ @param OldPpi A pointer to the former PPI in the database.
+
+ @param NewPpi A pointer to the new interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL or Any of the PEI PPI descriptors in the list do not have the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+ @retval EFI_NOT_FOUND The PPI for which the reinstallation was requested has not been installed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_REINSTALL_PPI) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PPI_DESCRIPTOR *OldPpi,
+ IN EFI_PEI_PPI_DESCRIPTOR *NewPpi
+ );
+
+/**
+ This function locates an interface in the PEI PPI database by GUID.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES published by the PEI Foundation.
+
+ @param Guid A pointer to the GUID whose corresponding interface needs to be found.
+
+ @param Instance The N-th instance of the interface that is required.
+
+ @param PpiDescriptor A pointer to instance of the EFI_PEI_PPI_DESCRIPTOR.
+
+ @param Ppi A pointer to the instance of the interface.
+
+ @retval EFI_SUCCESS The interface was successfully returned.
+
+ @retval EFI_NOT_FOUND The PPI descriptor is not found in the database.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_LOCATE_PPI) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_GUID *Guid,
+ IN UINTN Instance,
+ IN OUT EFI_PEI_PPI_DESCRIPTOR **PpiDescriptor,
+ IN OUT VOID **Ppi
+ );
+
+/**
+ This function installs a notification service to be called back when a
+ given interface is installed or reinstalled. The purpose of the service
+ is to publish an interface that other parties can use to call additional PPIs
+ that may materialize later.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation
+
+ @param NotifyList A pointer to the list of notification interfaces that the caller shall install.
+
+ @retval EFI_SUCCESS The interface was successfully installed.
+
+ @retval EFI_INVALID_PARAMETER The PpiList pointer is NULL or Any of the PEI PPI descriptors in the list do not have the EFI_PEI_PPI_DESCRIPTOR_PPI bit set in the Flags field.
+
+ @retval EFI_OUT_OF_RESOURCES There is no additional space in the PPI database.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_NOTIFY_PPI) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyList
+ );
+
+/**
+ This function returns the present value of the boot mode.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param BootMode A pointer to contain the value of the boot mode.
+
+ @retval EFI_SUCCESS The boot mode was returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_BOOT_MODE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ OUT EFI_BOOT_MODE *BootMode
+ );
+
+/**
+ This function sets the value of the boot mode.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation
+
+ @param BootMode The value of the boot mode to set.
+
+ @retval EFI_SUCCESS The boot mode was returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SET_BOOT_MODE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_BOOT_MODE BootMode
+ );
+
+/**
+ This function returns the pointer to the list of Hand-Off Blocks (HOBs) in memory.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation
+
+ @param HobList A pointer to the list of HOBs that the PEI Foundation will initialize
+
+ @retval EFI_SUCCESS The list was successfully returned.
+
+ @retval EFI_NOT_AVAILABLE_YET The HOB list is not yet published.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_HOB_LIST) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID **HobList
+ );
+
+/**
+ This service published by the PEI Foundation abstracts the creation of a Hand-Off Block's (HOB¡¯s) headers.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param Type The type of HOB to be installed.
+
+ @param Length The length of the HOB to be added.
+
+ @param Hob The address of a pointer that will contain the HOB header.
+
+ @retval EFI_SUCCESS The HOB was successfully created.
+
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_CREATE_HOB) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT16 Type,
+ IN UINT16 Length,
+ IN OUT VOID **Hob
+ );
+
+/**
+ The purpose of the service is to abstract the capability of the PEI
+ Foundation to discover instances of firmware volumes in the system.
+ Given the input file pointer, this service searches for the next
+ matching file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param Instance This instance of the firmware volume to find. The value 0 is the Boot Firmware Volume (BFV).
+
+ @param FwVolHeader Pointer to the firmware volume header of the volume to return.
+
+ @retval EFI_SUCCESS The volume was found.
+
+ @retval EFI_NOT_FOUND The volume was not found.
+
+ @retval EFI_INVALID_PARAMETER FwVolHeader is NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_NEXT_VOLUME) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINTN Instance,
+ IN OUT EFI_FIRMWARE_VOLUME_HEADER **FwVolHeader
+ );
+
+/**
+ The purpose of the service is to abstract the capability of the PEI
+ Foundation to discover instances of firmware files in the system.
+ Given the input file pointer, this service searches for the next matching
+ file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param SearchType A filter to find files only of this type.
+
+ @param FwVolHeader Pointer to the firmware volume header of the volume to search.This parameter must point to a valid FFS volume.
+
+ @param FileHeader Pointer to the current file from which to begin searching.This pointer will be updated upon return to reflect the file found.
+
+ @retval EFI_SUCCESS The file was found.
+
+ @retval EFI_NOT_FOUND The file was not found.
+
+ @retval EFI_NOT_FOUND The header checksum was not zero.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_NEXT_FILE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_FV_FILETYPE SearchType,
+ IN EFI_FIRMWARE_VOLUME_HEADER *FwVolHeader,
+ IN OUT EFI_FFS_FILE_HEADER **FileHeader
+ );
+
+/**
+ Given the input file pointer, this service searches for the next
+ matching file in the Firmware File System (FFS) volume.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param SectionType The value of the section type to find.
+
+ @param FfsFileHeader A pointer to the file header that contains the set of sections to be searched.
+
+ @param SectionData A pointer to the discovered section, if successful.
+
+ @retval EFI_SUCCESS The section was found.
+
+ @retval EFI_NOT_FOUND The section was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FFS_FIND_SECTION_DATA) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_SECTION_TYPE SectionType,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT VOID **SectionData
+ );
+
+/**
+ This function registers the found memory configuration with the PEI Foundation.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param MemoryBegin The value of a region of installed memory
+
+ @param MemoryLength The corresponding length of a region of installed memory.
+
+ @retval EFI_SUCCESS The region was successfully installed in a HOB.
+
+ @retval EFI_INVALID_PARAMETER MemoryBegin and MemoryLength are illegal for this system.
+
+ @retval EFI_OUT_OF_RESOURCES There is no additional space for HOB creation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_INSTALL_PEI_MEMORY) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PHYSICAL_ADDRESS MemoryBegin,
+ IN UINT64 MemoryLength
+ );
+
+/**
+ The purpose of the service is to publish an interface that allows
+ PEIMs to allocate memory ranges that are managed by the PEI Foundation.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param MemoryType The type of memory to allocate.
+
+ @param Pages The number of contiguous 4 KB pages to allocate.
+
+ @param Memory Pointer to a physical address. On output, the address is set to the base of the page range that was allocated.
+
+ @retval EFI_SUCCESS The memory range was successfully allocated.
+
+ @retval EFI_OUT_OF_RESOURCES The pages could not be allocated.
+
+ @retval EFI_INVALID_PARAMETER Type is not equal to AllocateAnyPages.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_ALLOCATE_PAGES) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ The purpose of this service is to publish an interface that
+ allows PEIMs to allocate memory ranges that are managed by the PEI Foundation.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param Size The number of bytes to allocate from the pool.
+
+ @param Buffer If the call succeeds, a pointer to a pointer to the allocated buffer; undefined otherwise.
+
+ @retval EFI_SUCCESS The allocation was successful.
+
+ @retval EFI_OUT_OF_RESOURCES There is not enough heap to allocate the requested size.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_ALLOCATE_POOL) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ This service copies the contents of one buffer to another buffer.
+
+ @param Destination Pointer to the destination buffer of the memory copy.
+
+ @param Source Pointer to the source buffer of the memory copy
+
+ @param Length Number of bytes to copy from Source to Destination.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_COPY_MEM) (
+ IN VOID *Destination,
+ IN VOID *Source,
+ IN UINTN Length
+ );
+
+/**
+ The service fills a buffer with a specified value.
+
+ @param Buffer Pointer to the buffer to fill.
+
+ @param Size Number of bytes in Buffer to fill.
+
+ @param Value Value to fill Buffer with
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_SET_MEM) (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ );
+
+/**
+ This service publishes an interface that allows PEIMs to report status codes.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES table published by the PEI Foundation.
+
+ @param Type Indicates the type of status code being reported.
+
+ @param Value Describes the current status of a hardware or
+ software entity. This includes information about the class and
+ subclass that is used to classify the entity as well as an operation.
+ For progress codes, the operation is the current activity.
+ For error codes, it is the exception.For debug codes,it is not defined at this time.
+
+ @param Instance The enumeration of a hardware or software entity within
+ the system. A system may contain multiple entities that match a class/subclass
+ pairing. The instance differentiates between them. An instance of 0 indicates
+ that instance information is unavailable, not meaningful, or not relevant.
+ Valid instance numbers start with 1.
+
+ @param CallerId This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different rules to
+ different callers.
+
+ @param Data This optional parameter may be used to pass additional data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_AVAILABLE_YET No progress code provider has installed an interface in the system.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_REPORT_STATUS_CODE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE Type,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId OPTIONAL,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+/**
+ Resets the entire platform.
+
+ @param PeiServices An indirect pointer to the EFI_PEI_SERVICES
+ table published by the PEI Foundation.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_AVAILABLE_YET The service has not been installed yet.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_RESET_SYSTEM) (
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+//
+// EFI PEI Services Table
+//
+#define PEI_SERVICES_SIGNATURE 0x5652455320494550ULL
+#define PEI_SERVICES_REVISION ((PEI_SPECIFICATION_MAJOR_REVISION << 16) | (PEI_SPECIFICATION_MINOR_REVISION))
+
+struct _EFI_PEI_SERVICES {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // PPI Functions
+ //
+ EFI_PEI_INSTALL_PPI InstallPpi;
+ EFI_PEI_REINSTALL_PPI ReInstallPpi;
+ EFI_PEI_LOCATE_PPI LocatePpi;
+ EFI_PEI_NOTIFY_PPI NotifyPpi;
+
+ //
+ // Boot Mode Functions
+ //
+ EFI_PEI_GET_BOOT_MODE GetBootMode;
+ EFI_PEI_SET_BOOT_MODE SetBootMode;
+
+ //
+ // HOB Functions
+ //
+ EFI_PEI_GET_HOB_LIST GetHobList;
+ EFI_PEI_CREATE_HOB CreateHob;
+
+ //
+ // Filesystem Functions
+ //
+ EFI_PEI_FFS_FIND_NEXT_VOLUME FfsFindNextVolume;
+ EFI_PEI_FFS_FIND_NEXT_FILE FfsFindNextFile;
+ EFI_PEI_FFS_FIND_SECTION_DATA FfsFindSectionData;
+
+ //
+ // Memory Functions
+ //
+ EFI_PEI_INSTALL_PEI_MEMORY InstallPeiMemory;
+ EFI_PEI_ALLOCATE_PAGES AllocatePages;
+ EFI_PEI_ALLOCATE_POOL AllocatePool;
+ EFI_PEI_COPY_MEM CopyMem;
+ EFI_PEI_SET_MEM SetMem;
+
+ //
+ // Status Code
+ //
+ EFI_PEI_REPORT_STATUS_CODE PeiReportStatusCode;
+
+ //
+ // Reset
+ //
+ EFI_PEI_RESET_SYSTEM PeiResetSystem;
+
+ //
+ // Pointer to PPI interface
+ //
+ EFI_PEI_CPU_IO_PPI *CpuIo;
+ EFI_PEI_PCI_CFG_PPI *PciCfg;
+
+};
+
+typedef struct {
+ UINTN BootFirmwareVolume;
+ UINTN SizeOfCacheAsRam;
+ EFI_PEI_PPI_DESCRIPTOR *DispatchTable;
+} EFI_PEI_STARTUP_DESCRIPTOR;
+
+#include <Common/EfiImage.h>
+#include <Common/StatusCode.h>
+#include <Common/BootScript.h>
+#include <Common/Capsule.h>
+
+#include <Guid/Apriori.h>
+#include <Guid/Capsule.h>
+#include <Guid/DxeServices.h>
+#include <Guid/HobList.h>
+#include <Guid/MemoryAllocationHob.h>
+#include <Guid/FirmwareFileSystem.h>
+#include <Guid/SmramMemoryReserve.h>
+
+#include <Ppi/BlockIo.h>
+#include <Ppi/BootInRecoveryMode.h>
+#include <Ppi/BootScriptExecuter.h>
+#include <Ppi/DeviceRecoveryModule.h>
+#include <Ppi/DxeIpl.h>
+#include <Ppi/EndOfPeiPhase.h>
+#include <Ppi/FindFv.h>
+#include <Ppi/LoadFile.h>
+#include <Ppi/MasterBootMode.h>
+#include <Ppi/MemoryDiscovered.h>
+#include <Ppi/Pcd.h>
+#include <Ppi/ReadOnlyVariable.h>
+#include <Ppi/RecoveryModule.h>
+#include <Ppi/Reset.h>
+#include <Ppi/S3Resume.h>
+#include <Ppi/SecPlatformInformation.h>
+#include <Ppi/SectionExtraction.h>
+#include <Ppi/Security.h>
+#include <Ppi/SmBus.h>
+#include <Ppi/Stall.h>
+#include <Ppi/StatusCode.h>
+
+#include <Protocol/FirmwareVolumeBlock.h>
+#include <Protocol/Pcd.h>
+
+#endif
diff --git a/MdePkg/Include/PeimDepex.h b/MdePkg/Include/PeimDepex.h new file mode 100644 index 0000000000..a392e505f8 --- /dev/null +++ b/MdePkg/Include/PeimDepex.h @@ -0,0 +1,54 @@ +/** @file
+
+ Include file for PEI Dependency Expresion *.DXS file.
+
+ This include file is only for Dependency Expression *.DXS files and
+ should not be include directly in modules.
+
+ DEPEX (DEPendency EXpresion) BNF Grammer for PEI:
+ The BNF grammar is thus:
+<pre>
+ <depex> ::= <bool>
+ <bool> ::= <bool> and <term>
+ | <bool> or <term>
+ | <term>
+ <term> ::= not <factor>
+ | <factor>
+ <factor> ::= <bool>
+ | <boolval>
+ | <depinst>
+ | <termval>
+ <boolval> ::= true
+ | false
+ <depinst> ::= push GUID
+ <termval> ::= end
+</pre>
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __PEIM_DEPEX_H__
+#define __PEIM_DEPEX_H__
+
+//
+// The Depex grammer needs the following strings so we must undo
+// any pre-processor redefinitions
+//
+#undef DEPENDENCY_START
+#undef AND
+#undef OR
+#undef NOT
+#undef TRUE
+#undef FALSE
+#undef DEPENDENCY_END
+
+#endif
diff --git a/MdePkg/Include/PiwgDxe.h b/MdePkg/Include/PiwgDxe.h new file mode 100644 index 0000000000..a8310bca38 --- /dev/null +++ b/MdePkg/Include/PiwgDxe.h @@ -0,0 +1,26 @@ +/** @file
+
+ Root include file for Mde Package PIWG DXE modules.
+
+ This file is currently not implement since the PIWG has not yet released
+ an official specificaiton. In the future it will allow the construction
+ of a DXE module that strictly follows PIWG specifications.
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __PIWG_DXE_H__
+#define __PIWG_DXE_H__
+
+#error No Approved PIWG specification exists
+
+#endif
diff --git a/MdePkg/Include/PiwgPeim.h b/MdePkg/Include/PiwgPeim.h new file mode 100644 index 0000000000..aaa5f5a99d --- /dev/null +++ b/MdePkg/Include/PiwgPeim.h @@ -0,0 +1,25 @@ +/** @file
+
+ Root include file for Mde Package PIWG PEIM modules.
+
+ This file is currently not implement since the PIWG has not yet released
+ an official specificaiton. In the future it will allow the construction
+ of a PEIM module that strictly follows PIWG specifications.
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PIWG_PEIM_H__
+#define __PIWG_PEIM_H__
+
+#error No approved PIWG Specification exists
+
+#endif
diff --git a/MdePkg/Include/Ppi/BlockIo.h b/MdePkg/Include/Ppi/BlockIo.h new file mode 100644 index 0000000000..debcc0c8e4 --- /dev/null +++ b/MdePkg/Include/Ppi/BlockIo.h @@ -0,0 +1,161 @@ +/** @file
+ This file declares BlockIo PPI used to access block-oriented storage devices
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BlockIo.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI Recovery Spec
+ Version 0.9
+
+**/
+
+#ifndef _PEI_BLOCK_IO_H_
+#define _PEI_BLOCK_IO_H_
+
+#define EFI_PEI_VIRTUAL_BLOCK_IO_PPI \
+ { \
+ 0x695d8aa1, 0x42ee, 0x4c46, {0x80, 0x5c, 0x6e, 0xa6, 0xbc, 0xe7, 0x99, 0xe3 } \
+ }
+
+typedef struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI EFI_PEI_RECOVERY_BLOCK_IO_PPI;
+
+typedef UINT64 EFI_PEI_LBA;
+
+typedef enum {
+ LegacyFloppy = 0,
+ IdeCDROM = 1,
+ IdeLS120 = 2,
+ UsbMassStorage= 3,
+ MaxDeviceType
+} EFI_PEI_BLOCK_DEVICE_TYPE;
+
+typedef struct {
+ EFI_PEI_BLOCK_DEVICE_TYPE DeviceType;
+ BOOLEAN MediaPresent;
+ UINTN LastBlock;
+ UINTN BlockSize;
+} EFI_PEI_BLOCK_IO_MEDIA;
+
+/**
+ Gets the count of block I/O devices that one specific block driver detects.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+
+ @param NumberBlockDevices The number of block I/O devices discovered.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_NUMBER_BLOCK_DEVICES) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ OUT UINTN *NumberBlockDevices
+ );
+
+/**
+ Gets a block device¡¯s media information.
+
+ @param PeiServices General-purpose services that are available to every PEIM
+
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+
+ @param DeviceIndex Specifies the block device to which the function
+ wants to talk. Because the driver that implements Block I/O PPIs
+ will manage multiple block devices, the PPIs that want to talk to a single
+ device must specify the device index that was assigned during the enumeration
+ process. This index is a number from one to NumberBlockDevices.
+
+ @param MediaInfo The media information of the specified block media.
+
+ @retval EFI_SUCCESS Media information about the specified block device was obtained successfully.
+
+ @retval EFI_DEVICE_ERROR Cannot get the media information due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_DEVICE_MEDIA_INFORMATION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ OUT EFI_PEI_BLOCK_IO_MEDIA *MediaInfo
+ );
+
+/**
+ Reads the requested number of blocks from the specified block device.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+
+ @param This Indicates the EFI_PEI_RECOVERY_BLOCK_IO_PPI instance.
+
+ @param DeviceIndex Specifies the block device to which the function wants to talk.
+
+ @param StartLBA The starting logical block address (LBA) to read from on the device
+
+ @param BufferSize The size of the Buffer in bytes. This number must
+ be a multiple of the intrinsic block size of the device.
+
+ @param Buffer A pointer to the destination buffer for the data.
+ The caller is responsible for the ownership of the buffer.
+
+ @retval EFI_SUCCESS The data was read correctly from the device.
+
+ @retval EFI_DEVICE_ERROR The device reported an error while attempting to perform the read operation.
+
+ @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
+ or the buffer is not properly aligned.
+
+ @retval EFI_BAD_BUFFER_SIZE The BufferSize parameter is not a multiple of
+ the intrinsic block size of the device.
+
+ @retval EFI_NO_MEDIA There is no media in the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_READ_BLOCKS) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_BLOCK_IO_PPI *This,
+ IN UINTN DeviceIndex,
+ IN EFI_PEI_LBA StartLBA,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ @par Ppi Description:
+ EFI_PEI_RECOVERY_BLOCK_IO_PPI provides the services that are required
+ to access a block I/O device during PEI recovery boot mode.
+
+ @param GetNumberOfBlockDevices
+ Gets the number of block I/O devices that the specific block driver manages.
+
+ @param GetBlockDeviceMediaInfo
+ Gets the specified media information.
+
+ @param ReadBlocks
+ Reads the requested number of blocks from the specified block device.
+
+**/
+struct _EFI_PEI_RECOVERY_BLOCK_IO_PPI {
+ EFI_PEI_GET_NUMBER_BLOCK_DEVICES GetNumberOfBlockDevices;
+ EFI_PEI_GET_DEVICE_MEDIA_INFORMATION GetBlockDeviceMediaInfo;
+ EFI_PEI_READ_BLOCKS ReadBlocks;
+};
+
+extern EFI_GUID gEfiPeiBlockIoPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/BootInRecoveryMode.h b/MdePkg/Include/Ppi/BootInRecoveryMode.h new file mode 100644 index 0000000000..f15d570591 --- /dev/null +++ b/MdePkg/Include/Ppi/BootInRecoveryMode.h @@ -0,0 +1,33 @@ +/** @file
+ This PPI is installed by the platform PEIM to designate that a recovery boot
+ is in progress.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootInRecoveryMode.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS spec
+ Version 0.91.
+
+**/
+
+#ifndef __BOOT_IN_RECOVERY_MODE_PPI_H__
+#define __BOOT_IN_RECOVERY_MODE_PPI_H__
+
+#define EFI_PEI_BOOT_IN_RECOVERY_MODE_PEIM_PPI \
+ { \
+ 0x17ee496a, 0xd8e4, 0x4b9a, {0x94, 0xd1, 0xce, 0x82, 0x72, 0x30, 0x8, 0x50 } \
+ }
+
+
+extern EFI_GUID gEfiPeiBootInRecoveryModePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/BootScriptExecuter.h b/MdePkg/Include/Ppi/BootScriptExecuter.h new file mode 100644 index 0000000000..b73396d7fa --- /dev/null +++ b/MdePkg/Include/Ppi/BootScriptExecuter.h @@ -0,0 +1,78 @@ +/** @file
+ This file declares Boot Script Executer PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootScriptExecuter.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI BootScript spec.
+ Version 0.91.
+
+**/
+
+#ifndef _PEI_BOOT_SCRIPT_EXECUTER_PPI_H
+#define _PEI_BOOT_SCRIPT_EXECUTER_PPI_H
+
+#define EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0x0b, 0xfb, 0xff } \
+ }
+
+typedef struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI;
+
+/**
+ Executes the Framework boot script table.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI instance.
+
+ @param Address The physical memory address where the table is stored.
+ It must be zero if the table to be executed is stored in a firmware volume file.
+
+ @param FvFile The firmware volume file name that contains the table to
+ be executed. It must be NULL if the table to be executed is stored in physical memory.
+
+ @retval EFI_SUCCESS The boot script table was executed successfully.
+
+ @retval EFI_INVALID_PARAMETER Address is zero and FvFile is NULL.
+
+ @retval EFI_NOT_FOUND The file name specified in FvFile cannot be found.
+
+ @retval EFI_UNSUPPORTED The format of the boot script table is invalid.
+ Or An unsupported opcode occurred in the table.
+ Or There were opcode execution errors, such as an insufficient dependency.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_BOOT_SCRIPT_EXECUTE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI *This,
+ IN EFI_PHYSICAL_ADDRESS Address,
+ IN EFI_GUID *FvFile OPTIONAL
+ );
+
+/**
+ @par Ppi Description:
+ This PPI produces functions to interpret and execute the Framework boot script table.
+
+ @param Execute
+ Executes a boot script table.
+
+**/
+struct _EFI_PEI_BOOT_SCRIPT_EXECUTER_PPI {
+ EFI_PEI_BOOT_SCRIPT_EXECUTE Execute;
+};
+
+extern EFI_GUID gEfiPeiBootScriptExecuterPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/CpuIo.h b/MdePkg/Include/Ppi/CpuIo.h new file mode 100644 index 0000000000..038703386d --- /dev/null +++ b/MdePkg/Include/Ppi/CpuIo.h @@ -0,0 +1,520 @@ +/** @file
+ This file declares CPU IO PPI that abstracts CPU IO access
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CpuIo.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __PEI_CPUIO_PPI_H__
+#define __PEI_CPUIO_PPI_H__
+
+#define EFI_PEI_CPU_IO_PPI_INSTALLED_GUID \
+ { \
+ 0xe6af1f7b, 0xfc3f, 0x46da, {0xa8, 0x28, 0xa3, 0xb4, 0x57, 0xa4, 0x42, 0x82 } \
+ }
+
+typedef struct _EFI_PEI_CPU_IO_PPI EFI_PEI_CPU_IO_PPI;
+
+//
+// *******************************************************
+// EFI_PEI_CPU_IO_PPI_WIDTH
+// *******************************************************
+//
+typedef enum {
+ EfiPeiCpuIoWidthUint8,
+ EfiPeiCpuIoWidthUint16,
+ EfiPeiCpuIoWidthUint32,
+ EfiPeiCpuIoWidthUint64,
+ EfiPeiCpuIoWidthFifoUint8,
+ EfiPeiCpuIoWidthFifoUint16,
+ EfiPeiCpuIoWidthFifoUint32,
+ EfiPeiCpuIoWidthFifoUint64,
+ EfiPeiCpuIoWidthFillUint8,
+ EfiPeiCpuIoWidthFillUint16,
+ EfiPeiCpuIoWidthFillUint32,
+ EfiPeiCpuIoWidthFillUint64,
+ EfiPeiCpuIoWidthMaximum
+} EFI_PEI_CPU_IO_PPI_WIDTH;
+
+/**
+ Memory-based access services and I/O-based access services.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+
+ @param Address The physical address of the access.
+
+ @param Count The number of accesses to perform.
+
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_MEM) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN EFI_PEI_CPU_IO_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+//
+// *******************************************************
+// EFI_PEI_CPU_IO_PPI_ACCESS
+// *******************************************************
+//
+typedef struct {
+ EFI_PEI_CPU_IO_PPI_IO_MEM Read;
+ EFI_PEI_CPU_IO_PPI_IO_MEM Write;
+} EFI_PEI_CPU_IO_PPI_ACCESS;
+
+/**
+ 8-bit I/O read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT8
+
+**/
+typedef
+UINT8
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_READ8) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 16-bit I/O read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT16
+
+**/
+typedef
+UINT16
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_READ16) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 32-bit I/O read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT32
+
+**/
+typedef
+UINT32
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_READ32) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 64-bit I/O read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT64
+
+**/
+typedef
+UINT64
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_READ64) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 8-bit I/O write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_WRITE8) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT8 Data
+ );
+
+/**
+ 16-bit I/O write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_WRITE16) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT16 Data
+ );
+
+/**
+ 32-bit I/O write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_WRITE32) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT32 Data
+ );
+
+/**
+ 64-bit I/O write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_IO_WRITE64) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT64 Data
+ );
+
+/**
+ 8-bit Memory read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT8
+
+**/
+typedef
+UINT8
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_READ8) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 16-bit Memory read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT16
+
+**/
+typedef
+UINT16
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_READ16) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 32-bit Memory read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT32
+
+**/
+typedef
+UINT32
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_READ32) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 64-bit Memory read operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @return UINT64
+
+**/
+typedef
+UINT64
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_READ64) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address
+ );
+
+/**
+ 8-bit Memory write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_WRITE8) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT8 Data
+ );
+
+/**
+ 16-bit Memory write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_WRITE16) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT16 Data
+ );
+
+/**
+ 32-bit Memory write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_WRITE32) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT32 Data
+ );
+
+/**
+ 64-bit Memory write operations.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Address The physical address of the access.
+
+ @param Data The data to write.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_PEI_CPU_IO_PPI_MEM_WRITE64) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_CPU_IO_PPI *This,
+ IN UINT64 Address,
+ IN UINT64 Data
+ );
+
+/**
+ @par Ppi Description:
+ EFI_PEI_CPU_IO_PPI provides a set of memory and I/O-based services.
+ The perspective of the services is that of the processor, not the bus or system.
+
+ @param Mem
+ Collection of memory-access services.
+
+ @param I/O
+ Collection of I/O-access services.
+
+ @param IoRead8
+ 8-bit read service.
+
+ @param IoRead16
+ 16-bit read service.
+
+ @param IoRead32
+ 32-bit read service.
+
+ @param IoRead64
+ 64-bit read service.
+
+ @param IoWrite8
+ 8-bit write service.
+
+ @param IoWrite16
+ 16-bit write service.
+
+ @param IoWrite32
+ 32-bit write service.
+
+ @param IoWrite64
+ 64-bit write service.
+
+ @param MemRead8
+ 8-bit read service.
+
+ @param MemRead16
+ 16-bit read service.
+
+ @param MemRead32
+ 32-bit read service.
+
+ @param MemRead64
+ 64-bit read service.
+
+ @param MemWrite8
+ 8-bit write service.
+
+ @param MemWrite16
+ 16-bit write service.
+
+ @param MemWrite32
+ 32-bit write service.
+
+ @param MemWrite64
+ 64-bit write service.
+
+**/
+struct _EFI_PEI_CPU_IO_PPI {
+ EFI_PEI_CPU_IO_PPI_ACCESS Mem;
+ EFI_PEI_CPU_IO_PPI_ACCESS Io;
+ EFI_PEI_CPU_IO_PPI_IO_READ8 IoRead8;
+ EFI_PEI_CPU_IO_PPI_IO_READ16 IoRead16;
+ EFI_PEI_CPU_IO_PPI_IO_READ32 IoRead32;
+ EFI_PEI_CPU_IO_PPI_IO_READ64 IoRead64;
+ EFI_PEI_CPU_IO_PPI_IO_WRITE8 IoWrite8;
+ EFI_PEI_CPU_IO_PPI_IO_WRITE16 IoWrite16;
+ EFI_PEI_CPU_IO_PPI_IO_WRITE32 IoWrite32;
+ EFI_PEI_CPU_IO_PPI_IO_WRITE64 IoWrite64;
+ EFI_PEI_CPU_IO_PPI_MEM_READ8 MemRead8;
+ EFI_PEI_CPU_IO_PPI_MEM_READ16 MemRead16;
+ EFI_PEI_CPU_IO_PPI_MEM_READ32 MemRead32;
+ EFI_PEI_CPU_IO_PPI_MEM_READ64 MemRead64;
+ EFI_PEI_CPU_IO_PPI_MEM_WRITE8 MemWrite8;
+ EFI_PEI_CPU_IO_PPI_MEM_WRITE16 MemWrite16;
+ EFI_PEI_CPU_IO_PPI_MEM_WRITE32 MemWrite32;
+ EFI_PEI_CPU_IO_PPI_MEM_WRITE64 MemWrite64;
+};
+
+extern EFI_GUID gEfiPeiCpuIoPpiInServiceTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/DeviceRecoveryModule.h b/MdePkg/Include/Ppi/DeviceRecoveryModule.h new file mode 100644 index 0000000000..3847686b04 --- /dev/null +++ b/MdePkg/Include/Ppi/DeviceRecoveryModule.h @@ -0,0 +1,143 @@ +/** @file
+ This file declares Device Recovery Module PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DeviceRecoveryModule.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI Recovery spec.
+ Version 0.9
+
+**/
+
+#ifndef _PEI_DEVICE_RECOVERY_MODULE_PPI_H
+#define _PEI_DEVICE_RECOVERY_MODULE_PPI_H
+
+#define EFI_PEI_DEVICE_RECOVERY_MODULE_PPI_GUID \
+ { \
+ 0x0DE2CE25, 0x446A, 0x45a7, {0xBF, 0xC9, 0x37, 0xDA, 0x26, 0x34, 0x4B, 0x37 } \
+ }
+
+typedef struct _EFI_PEI_DEVICE_RECOVERY_MODULE_PPI EFI_PEI_DEVICE_RECOVERY_MODULE_PPI;
+
+/**
+ This function, by whatever mechanism, searches for DXE capsules from the
+ associated device and returns the number and maximum size in bytes of
+ the capsules discovered. Entry 1 is assumed to be the highest load priority
+ and entry N is assumed to be the lowest priority.
+
+ @param PeiServices General-purpose services that are available to every PEIM
+
+ @param This Indicates the EFI_PEI_DEVICE_RECOVERY_MODULE_PPI instance.
+
+ @param NumberRecoveryCapsules Pointer to a caller-allocated UINTN. On output,
+ *NumberRecoveryCapsules contains the number of recovery capsule images available
+ for retrieval from this PEIM instance.
+
+ @retval EFI_SUCCESS One or more capsules were discovered.
+
+ @retval EFI_DEVICE_ERROR A device error occurred.
+
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This,
+ OUT UINTN *NumberRecoveryCapsules
+ );
+
+/**
+ This function gets the size and type of the requested recovery capsule.
+
+ @param PeiServices General-purpose services that are available to every PEIM
+
+ @param This Indicates the EFI_PEI_DEVICE_RECOVERY_MODULE_PPI instance.
+
+ @param CapsuleInstance Specifies for which capsule instance to retrieve the information.
+
+ @param Size A pointer to a caller-allocated UINTN in which the size of
+ the requested recovery module is returned.
+
+ @param CapsuleType A pointer to a caller-allocated EFI_GUID in
+ which the type of the requested recovery capsule is returned.
+
+ @retval EFI_SUCCESS One or more capsules were discovered.
+
+ @retval EFI_DEVICE_ERROR A device error occurred.
+
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This,
+ IN UINTN CapsuleInstance,
+ OUT UINTN *Size,
+ OUT EFI_GUID *CapsuleType
+ );
+
+/**
+ This function, by whatever mechanism, retrieves a DXE capsule from some device
+ and loads it into memory. Note that the published interface is device neutral.
+
+ @param PeiServices General-purpose services that are available to every PEIM
+
+ @param This Indicates the EFI_PEI_DEVICE_RECOVERY_MODULE_PPI instance.
+
+ @param CapsuleInstance Specifies which capsule instance to retrieve.
+
+ @param Buffer Specifies a caller-allocated buffer in which the requested recovery capsule will be returned.
+
+ @retval EFI_SUCCESS One or more capsules were discovered.
+
+ @retval EFI_DEVICE_ERROR A device error occurred.
+
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE) (
+ IN OUT EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_DEVICE_RECOVERY_MODULE_PPI *This,
+ IN UINTN CapsuleInstance,
+ OUT VOID *Buffer
+ );
+
+/**
+ @par Ppi Description:
+ Presents a standard interface to EFI_PEI_DEVICE_RECOVERY_MODULE_PPI,
+ regardless of the underlying device(s).
+
+ @param GetNumberRecoveryCapsules
+ Returns the number of DXE capsules that were found.
+
+ @param GetRecoveryCapsuleInfo
+ Returns the capsule image type and the size of a given image.
+
+ @param LoadRecoveryCapsule
+ Loads a DXE capsule into memory
+
+**/
+struct _EFI_PEI_DEVICE_RECOVERY_MODULE_PPI {
+ EFI_PEI_DEVICE_GET_NUMBER_RECOVERY_CAPSULE GetNumberRecoveryCapsules;
+ EFI_PEI_DEVICE_GET_RECOVERY_CAPSULE_INFO GetRecoveryCapsuleInfo;
+ EFI_PEI_DEVICE_LOAD_RECOVERY_CAPSULE LoadRecoveryCapsule;
+};
+
+extern EFI_GUID gEfiPeiDeviceRecoveryModulePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/DxeIpl.h b/MdePkg/Include/Ppi/DxeIpl.h new file mode 100644 index 0000000000..bed579522c --- /dev/null +++ b/MdePkg/Include/Ppi/DxeIpl.h @@ -0,0 +1,70 @@ +/** @file
+ This file declares DXE Initial Program Load PPI.
+ When the PEI core is done it calls the DXE IPL via this PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DxeIpl.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __DXE_IPL_H__
+#define __DXE_IPL_H__
+
+#define EFI_DXE_IPL_PPI_GUID \
+ { \
+ 0xae8ce5d, 0xe448, 0x4437, {0xa8, 0xd7, 0xeb, 0xf5, 0xf1, 0x94, 0xf7, 0x31 } \
+ }
+
+typedef struct _EFI_DXE_IPL_PPI EFI_DXE_IPL_PPI;
+
+/**
+ The architectural PPI that the PEI Foundation invokes when
+ there are no additional PEIMs to invoke.
+
+ @param This Pointer to the DXE IPL PPI instance
+
+ @param PeiServices Pointer to the PEI Services Table.
+
+ @param HobList Pointer to the list of Hand-Off Block (HOB) entries.
+
+ @retval EFI_SUCCESS Upon this return code, the PEI Foundation should enter
+ some exception handling.Under normal circumstances, the DXE IPL PPI should not return.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DXE_IPL_ENTRY) (
+ IN EFI_DXE_IPL_PPI *This,
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_HOB_POINTERS HobList
+ );
+
+/**
+ @par Ppi Description:
+ Final service to be invoked by the PEI Foundation.
+ The DXE IPL PPI is responsible for locating and loading the DXE Foundation.
+ The DXE IPL PPI may use PEI services to locate and load the DXE Foundation.
+
+ @param Entry
+ The entry point to the DXE IPL PPI.
+
+**/
+struct _EFI_DXE_IPL_PPI {
+ EFI_DXE_IPL_ENTRY Entry;
+};
+
+extern EFI_GUID gEfiDxeIplPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/EndOfPeiPhase.h b/MdePkg/Include/Ppi/EndOfPeiPhase.h new file mode 100644 index 0000000000..e58fa03b09 --- /dev/null +++ b/MdePkg/Include/Ppi/EndOfPeiPhase.h @@ -0,0 +1,31 @@ +/** @file
+ PPI to be used to signal when the PEI ownership of the memory map
+ officially ends and DXE will take over
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EndOfPeiSignal.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS spec Version 0.91.
+
+**/
+
+#ifndef __END_OF_PEI_SIGNAL_PPI_H__
+#define __END_OF_PEI_SIGNAL_PPI_H__
+
+#define EFI_PEI_END_OF_PEI_PHASE_PPI_GUID \
+ { \
+ 0x605EA650, 0xC65C, 0x42e1, {0xBA, 0x80, 0x91, 0xA5, 0x2A, 0xB6, 0x18, 0xC6 } \
+ }
+
+extern EFI_GUID gEfiEndOfPeiSignalPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/FindFv.h b/MdePkg/Include/Ppi/FindFv.h new file mode 100644 index 0000000000..971512558b --- /dev/null +++ b/MdePkg/Include/Ppi/FindFv.h @@ -0,0 +1,76 @@ +/** @file
+ This file declares FindFv PPI used to locate FVs that contain PEIMs in PEI
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FindFv.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91
+
+**/
+
+#ifndef __FIND_FV_H__
+#define __FIND_FV_H__
+
+#define EFI_PEI_FIND_FV_PPI_GUID \
+ { \
+ 0x36164812, 0xa023, 0x44e5, {0xbd, 0x85, 0x5, 0xbf, 0x3c, 0x77, 0x0, 0xaa } \
+ }
+
+typedef struct _EFI_PEI_FIND_FV_PPI EFI_PEI_FIND_FV_PPI;
+
+/**
+ This interface returns the base address of the firmware volume whose index
+ was passed in FvNumber.Once this function reports a firmware volume
+ index/base address pair, that index/address pairing must continue throughout PEI.
+
+ @param PeiServices Pointer to the PEI Services Table.
+
+ @param This Interface pointer that implements the Find FV service.
+
+ @param FvNumber The index of the firmware volume to locate.
+
+ @param FvAddress The address of the volume to discover.
+
+ @retval EFI_SUCCESS An additional firmware volume was found.
+
+ @retval EFI_OUT_OF_RESOURCES There are no firmware volumes for the given FvNumber.
+
+ @retval EFI_INVALID_PARAMETER *FvAddress is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FIND_FV_FINDFV) (
+ IN EFI_PEI_FIND_FV_PPI *This,
+ IN EFI_PEI_SERVICES **PeiServices,
+ UINT8 *FvNumber,
+ EFI_FIRMWARE_VOLUME_HEADER **FVAddress
+ );
+
+/**
+ @par Ppi Description:
+ Hardware mechanisms for locating FVs in a platform vary widely.
+ EFI_PEI_FIND_FV_PPI serves to abstract this variation so that the
+ PEI Foundation can remain standard across a wide variety of platforms.
+
+ @param FindFv
+ Service that abstracts the location of additional firmware volumes.
+
+**/
+struct _EFI_PEI_FIND_FV_PPI {
+ EFI_PEI_FIND_FV_FINDFV FindFv;
+};
+
+extern EFI_GUID gEfiFindFvPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/LoadFile.h b/MdePkg/Include/Ppi/LoadFile.h new file mode 100644 index 0000000000..af02be7c9e --- /dev/null +++ b/MdePkg/Include/Ppi/LoadFile.h @@ -0,0 +1,78 @@ +/** @file
+ Load image file from fv to memory.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LoadFile.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS spec Version 0.91.
+
+**/
+
+#ifndef __FV_FILE_LOADER_PPI_H__
+#define __FV_FILE_LOADER_PPI_H__
+
+#define EFI_PEI_FV_FILE_LOADER_GUID \
+ { \
+ 0x7e1f0d85, 0x4ff, 0x4bb2, {0x86, 0x6a, 0x31, 0xa2, 0x99, 0x6a, 0x48, 0xa8 } \
+ }
+
+typedef struct _EFI_PEI_FV_FILE_LOADER_PPI EFI_PEI_FV_FILE_LOADER_PPI;
+
+/**
+ Loads a PEIM into memory for subsequent execution.
+
+ @param This Interface pointer that implements the Load File PPI instance.
+
+ @param FfsHeader Pointer to the FFS header of the file to load.
+
+ @param ImageAddress Pointer to the address of the loaded Image
+
+ @param ImageSize Pointer to the size of the loaded image.
+
+ @param EntryPoint Pointer to the entry point of the image.
+
+ @retval EFI_SUCCESS The image was loaded successfully.
+
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory.
+
+ @retval EFI_INVALID_PARAMETER The contents of the FFS file did not
+ contain a valid PE/COFF image that could be loaded.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_FV_LOAD_FILE) (
+ IN EFI_PEI_FV_FILE_LOADER_PPI *This,
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ OUT EFI_PHYSICAL_ADDRESS *ImageAddress,
+ OUT UINT64 *ImageSize,
+ OUT EFI_PHYSICAL_ADDRESS *EntryPoint
+ );
+
+/**
+ @par Ppi Description:
+ This PPI is a pointer to the Load File service. This service will be
+ published by a PEIM.The PEI Foundation will use this service to
+ launch the known non-XIP PE/COFF PEIM images. This service may
+ depend upon the presence of the EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI.
+
+ @param FvLoadFile
+ Loads a PEIM into memory for subsequent execution
+
+**/
+struct _EFI_PEI_FV_FILE_LOADER_PPI {
+ EFI_PEI_FV_LOAD_FILE FvLoadFile;
+};
+
+extern EFI_GUID gEfiPeiFvFileLoaderPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/MasterBootMode.h b/MdePkg/Include/Ppi/MasterBootMode.h new file mode 100644 index 0000000000..010055c7fd --- /dev/null +++ b/MdePkg/Include/Ppi/MasterBootMode.h @@ -0,0 +1,34 @@ +/** @file
+ This file declares Boot Mode PPI
+ The Master Boot Mode PPI is installed by a PEIM to signal that a final
+ boot has been determined and set. This signal is useful in that PEIMs
+ with boot-mode-specific behavior can put this PPI in their dependency expression.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MasterBootMode.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __MASTER_BOOT_MODE_PPI_H__
+#define __MASTER_BOOT_MODE_PPI_H__
+
+#define EFI_PEI_MASTER_BOOT_MODE_PEIM_PPI \
+ { \
+ 0x7408d748, 0xfc8c, 0x4ee6, {0x92, 0x88, 0xc4, 0xbe, 0xc0, 0x92, 0xa4, 0x10 } \
+ }
+
+extern EFI_GUID gEfiPeiMasterBootModePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/MemoryDiscovered.h b/MdePkg/Include/Ppi/MemoryDiscovered.h new file mode 100644 index 0000000000..414926c265 --- /dev/null +++ b/MdePkg/Include/Ppi/MemoryDiscovered.h @@ -0,0 +1,34 @@ +/** @file
+ This file declares Memory Discovered PPI.
+ This PPI is installed by the PEI Foundation at the point of system
+ evolution when the permanent memory size has been registered and
+ waiting PEIMs can use the main memory store.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: MemoryDiscovered.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __PEI_MEMORY_DISCOVERED_PPI_H__
+#define __PEI_MEMORY_DISCOVERED_PPI_H__
+
+#define EFI_PEI_PERMANENT_MEMORY_INSTALLED_PPI_GUID \
+ { \
+ 0xf894643d, 0xc449, 0x42d1, {0x8e, 0xa8, 0x85, 0xbd, 0xd8, 0xc6, 0x5b, 0xde } \
+ }
+
+extern EFI_GUID gEfiPeiMemoryDiscoveredPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/Pcd.h b/MdePkg/Include/Ppi/Pcd.h new file mode 100644 index 0000000000..2b968f0d80 --- /dev/null +++ b/MdePkg/Include/Ppi/Pcd.h @@ -0,0 +1,294 @@ +/** @file
+ Platform Configuration Database (PCD) Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Pcd.h
+
+**/
+
+#ifndef __PCD_H__
+#define __PCD_H__
+
+extern EFI_GUID gPcdPpiGuid;
+
+#define PCD_PPI_GUID \
+ { 0x632df884, 0x8023, 0x4872, { 0xb6, 0x70, 0xb7, 0x4a, 0x30, 0x19, 0x16, 0xe9 } }
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_SKU) (
+ IN UINTN SkuId
+ );
+
+typedef
+UINT8
+(EFIAPI *PCD_PPI_GET8) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT16
+(EFIAPI *PCD_PPI_GET16) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT32
+(EFIAPI *PCD_PPI_GET32) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT64
+(EFIAPI *PCD_PPI_GET64) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+VOID *
+(EFIAPI *PCD_PPI_GET_POINTER) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+BOOLEAN
+(EFIAPI *PCD_PPI_GET_BOOLEAN) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINTN
+(EFIAPI *PCD_PPI_GET_SIZE) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT8
+(EFIAPI *PCD_PPI_GET_EX_8) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT16
+(EFIAPI *PCD_PPI_GET_EX_16) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT32
+(EFIAPI *PCD_PPI_GET_EX_32) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT64
+(EFIAPI *PCD_PPI_GET_EX_64) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+VOID *
+(EFIAPI *PCD_PPI_GET_EX_POINTER) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+BOOLEAN
+(EFIAPI *PCD_PPI_GET_EX_BOOLEAN) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINTN
+(EFIAPI *PCD_PPI_GET_EX_SIZE) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET8) (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET16) (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET32) (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET64) (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_POINTER) (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_BOOLEAN) (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_8) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_16) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_32) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_64) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_POINTER) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_SET_EX_BOOLEAN) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+/**
+ Callback on SET function prototype definition.
+
+ @param[in] CallBackGuid The PCD token GUID being set.
+ @param[in] CallBackToken The PCD token number being set.
+ @param[in] TokenData A pointer to the token data being set.
+ @param[in] TokenDataSize The size, in bytes, of the data being set.
+
+ @retval VOID
+
+--*/
+typedef
+VOID
+(EFIAPI *PCD_PPI_CALLBACK) (
+ IN CONST EFI_GUID *CallBackGuid, OPTIONAL
+ IN UINTN CallBackToken,
+ IN VOID *TokenData,
+ IN UINTN TokenDataSize
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_CALLBACK_ONSET) (
+ IN UINTN TokenNumber,
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN PCD_PPI_CALLBACK CallBackFunction
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_CANCEL_CALLBACK) (
+ IN UINTN TokenNumber,
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN PCD_PPI_CALLBACK CallBackFunction
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PPI_GET_NEXT_TOKEN) (
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN OUT UINTN *TokenNumber
+ );
+
+typedef struct {
+ PCD_PPI_SET_SKU SetSku;
+
+ PCD_PPI_GET8 Get8;
+ PCD_PPI_GET16 Get16;
+ PCD_PPI_GET32 Get32;
+ PCD_PPI_GET64 Get64;
+ PCD_PPI_GET_POINTER GetPtr;
+ PCD_PPI_GET_BOOLEAN GetBool;
+ PCD_PPI_GET_SIZE GetSize;
+
+ PCD_PPI_GET_EX_8 Get8Ex;
+ PCD_PPI_GET_EX_16 Get16Ex;
+ PCD_PPI_GET_EX_32 Get32Ex;
+ PCD_PPI_GET_EX_64 Get64Ex;
+ PCD_PPI_GET_EX_POINTER GetPtrEx;
+ PCD_PPI_GET_EX_BOOLEAN GetBoolEx;
+ PCD_PPI_GET_EX_SIZE GetSizeEx;
+
+ PCD_PPI_SET8 Set8;
+ PCD_PPI_SET16 Set16;
+ PCD_PPI_SET32 Set32;
+ PCD_PPI_SET64 Set64;
+ PCD_PPI_SET_POINTER SetPtr;
+ PCD_PPI_SET_BOOLEAN SetBool;
+
+ PCD_PPI_SET_EX_8 Set8Ex;
+ PCD_PPI_SET_EX_16 Set16Ex;
+ PCD_PPI_SET_EX_32 Set32Ex;
+ PCD_PPI_SET_EX_64 Set64Ex;
+ PCD_PPI_SET_EX_POINTER SetPtrEx;
+ PCD_PPI_SET_EX_BOOLEAN SetBoolEx;
+
+ PCD_PPI_CALLBACK_ONSET CallbackOnSet;
+ PCD_PPI_CANCEL_CALLBACK CancelCallback;
+ PCD_PPI_GET_NEXT_TOKEN GetNextToken;
+} PCD_PPI;
+
+
+#endif
diff --git a/MdePkg/Include/Ppi/PciCfg.h b/MdePkg/Include/Ppi/PciCfg.h new file mode 100644 index 0000000000..b38a0db3ce --- /dev/null +++ b/MdePkg/Include/Ppi/PciCfg.h @@ -0,0 +1,133 @@ +/** @file
+ This file declares PciCfg PPI used to access PCI configuration space in PEI
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciCfg.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __PEI_PCI_CFG_H__
+#define __PEI_PCI_CFG_H__
+
+#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \
+ { \
+ 0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \
+ }
+
+typedef struct _EFI_PEI_PCI_CFG_PPI EFI_PEI_PCI_CFG_PPI;
+
+#define PEI_PCI_CFG_ADDRESS(bus, dev, func, reg) ( \
+ (UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)) \
+ ) & 0x00000000ffffffff
+
+typedef enum {
+ EfiPeiPciCfgWidthUint8 = 0,
+ EfiPeiPciCfgWidthUint16 = 1,
+ EfiPeiPciCfgWidthUint32 = 2,
+ EfiPeiPciCfgWidthUint64 = 3,
+ EfiPeiPciCfgWidthMaximum
+} EFI_PEI_PCI_CFG_PPI_WIDTH;
+
+typedef struct {
+ UINT8 Register;
+ UINT8 Function;
+ UINT8 Device;
+ UINT8 Bus;
+ UINT8 Reserved[4];
+} EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;
+
+/**
+ PCI read and write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+
+ @param Address The physical address of the access.
+
+ @param Buffer A pointer to the buffer of data.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_YET_AVAILABLE The service has not been installed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN OUT VOID *Buffer
+ );
+
+/**
+ PCI read-modify-write operation.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+
+ @param This Pointer to local data for the interface.
+
+ @param Width The width of the access. Enumerated in bytes.
+
+ @param Address The physical address of the access.
+
+ @param SetBits Value of the bits to set.
+
+ @param ClearBits Value of the bits to clear.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_PCI_CFG_PPI *This,
+ IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN SetBits,
+ IN UINTN ClearBits
+ );
+
+/**
+ @par Ppi Description:
+ The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI
+ controllers behind a PCI root bridge controller.
+
+ @param Read
+ PCI read services. See the Read() function description.
+
+ @param Write
+ PCI write services. See the Write() function description.
+
+ @param Modify
+PCI read-modify-write services. See the Modify() function description.
+
+**/
+struct _EFI_PEI_PCI_CFG_PPI {
+ EFI_PEI_PCI_CFG_PPI_IO Read;
+ EFI_PEI_PCI_CFG_PPI_IO Write;
+ EFI_PEI_PCI_CFG_PPI_RW Modify;
+};
+
+extern EFI_GUID gEfiPciCfgPpiInServiceTableGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/ReadOnlyVariable.h b/MdePkg/Include/Ppi/ReadOnlyVariable.h new file mode 100644 index 0000000000..3ea3c77535 --- /dev/null +++ b/MdePkg/Include/Ppi/ReadOnlyVariable.h @@ -0,0 +1,136 @@ +/** @file
+ This file declares Read-only Variable Service PPI
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ReadOnlyVariable.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __PEI_READ_ONLY_VARIABLE_PPI_H__
+#define __PEI_READ_ONLY_VARIABLE_PPI_H__
+
+#define EFI_PEI_READ_ONLY_VARIABLE_ACCESS_PPI_GUID \
+ { \
+ 0x3cdc90c6, 0x13fb, 0x4a75, {0x9e, 0x79, 0x59, 0xe9, 0xdd, 0x78, 0xb9, 0xfa } \
+ }
+
+typedef struct _EFI_PEI_READ_ONLY_VARIABLE_PPI EFI_PEI_READ_ONLY_VARIABLE_PPI;
+
+//
+// Variable attributes
+//
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+#define EFI_VARIABLE_READ_ONLY 0x00000008
+
+/**
+ Get Variable value by Name and GUID pair
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param VariableName A NULL-terminated Unicode string that is the name of the vendor¡¯s variable.
+
+ @param VendorGuid A unique identifier for the vendor.
+
+ @param Attributes If not NULL, a pointer to the memory location to return
+ the attributes bitmask for the variable.
+
+ @param DataSize On input, the size in bytes of the return Data buffer.
+ On output, the size of data returned in Data.
+
+ @param Data The buffer to return the contents of the variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_FOUND The variable was not found.
+
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small for the result.
+
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+
+ @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_VARIABLE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes OPTIONAL,
+ IN OUT UINTN *DataSize,
+ OUT VOID *Data
+ );
+
+/**
+ This function can be called multiple times to retrieve the VariableName
+ and VendorGuid of all variables currently available in the system. On each call
+ to GetNextVariableName() the previous results are passed into the interface,
+ and on output the interface returns the next variable name data. When the
+ entire variable list has been returned, the error EFI_NOT_FOUND is returned.
+
+ @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.
+
+ @param VariableNameSize The size of the VariableName buffer.
+
+ @param VariableName On input, supplies the last VariableName that was
+ returned by GetNextVariableName(). On output, returns the Null-terminated
+ Unicode string of the current variable.
+
+ @param VendorGuid On input, supplies the last VendorGuid that was
+ returned by GetNextVariableName(). On output, returns the VendorGuid
+ of the current variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_FOUND The next variable was not found.
+
+ @retval EFI_BUFFER_TOO_SMALL The VariableNameSize is too small for the result.
+
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+
+ @retval EFI_DEVICE_ERROR The variable name could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_NEXT_VARIABLE_NAME) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINTN *VariableNameSize,
+ IN OUT CHAR16 *VariableName,
+ IN OUT EFI_GUID *VendorGuid
+ );
+
+/**
+ @par Ppi Description:
+ This PPI provides a lightweight, read-only variant of the full EFI
+ variable services.
+
+ @param GetVariable
+ A service to ascertain a given variable name.
+
+ @param GetNextVariableName
+ A service to ascertain a variable based upon a given, known variable
+
+**/
+struct _EFI_PEI_READ_ONLY_VARIABLE_PPI {
+ EFI_PEI_GET_VARIABLE PeiGetVariable;
+ EFI_PEI_GET_NEXT_VARIABLE_NAME PeiGetNextVariableName;
+};
+
+extern EFI_GUID gEfiPeiReadOnlyVariablePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/RecoveryModule.h b/MdePkg/Include/Ppi/RecoveryModule.h new file mode 100644 index 0000000000..044a68aa72 --- /dev/null +++ b/MdePkg/Include/Ppi/RecoveryModule.h @@ -0,0 +1,67 @@ +/** @file
+ This file declares Recovery Module PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: RecoveryModule.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI Recovery Spec.
+ Version 0.9
+
+**/
+
+#ifndef __PEI_RECOVERY_MODULE_PPI_H__
+#define __PEI_RECOVERY_MODULE_PPI_H__
+
+#define EFI_PEI_RECOVERY_MODULE_PPI_GUID \
+ { \
+ 0xFB6D9542, 0x612D, 0x4f45, {0x87, 0x2F, 0x5C, 0xFF, 0x52, 0xE9, 0x3D, 0xCF } \
+ }
+
+typedef struct _EFI_PEI_RECOVERY_MODULE_PPI EFI_PEI_RECOVERY_MODULE_PPI;
+
+/**
+ Loads a DXE capsule from some media into memory and updates the HOB table
+ with the DXE firmware volume information.
+
+ @param PeiServices General-purpose services that are available to every PEIM.
+
+ @param This Indicates the EFI_PEI_RECOVERY_MODULE_PPI instance.
+
+ @retval EFI_SUCCESS The capsule was loaded correctly.
+
+ @retval EFI_DEVICE_ERROR A device error occurred.
+
+ @retval EFI_NOT_FOUND A recovery DXE capsule cannot be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_LOAD_RECOVERY_CAPSULE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_RECOVERY_MODULE_PPI *This
+ );
+
+/**
+ @par Ppi Description:
+ Finds and loads the recovery files.
+
+ @param LoadRecoveryCapsule
+ Loads a DXE binary capsule into memory.
+
+**/
+struct _EFI_PEI_RECOVERY_MODULE_PPI {
+ EFI_PEI_LOAD_RECOVERY_CAPSULE LoadRecoveryCapsule;
+};
+
+extern EFI_GUID gEfiPeiRecoveryModulePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/Reset.h b/MdePkg/Include/Ppi/Reset.h new file mode 100644 index 0000000000..be35e70d9a --- /dev/null +++ b/MdePkg/Include/Ppi/Reset.h @@ -0,0 +1,35 @@ +/** @file
+ This file declares Reset PPI used to reset the platform
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Reset.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS
+ Version 0.91.
+
+**/
+
+#ifndef __RESET_PPI_H__
+#define __RESET_PPI_H__
+
+#define EFI_PEI_RESET_PPI_GUID \
+ { \
+ 0xef398d58, 0x9dfd, 0x4103, {0xbf, 0x94, 0x78, 0xc6, 0xf4, 0xfe, 0x71, 0x2f } \
+ }
+
+typedef struct {
+ EFI_PEI_RESET_SYSTEM ResetSystem;
+} EFI_PEI_RESET_PPI;
+
+extern EFI_GUID gEfiPeiResetPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/S3Resume.h b/MdePkg/Include/Ppi/S3Resume.h new file mode 100644 index 0000000000..c458430b98 --- /dev/null +++ b/MdePkg/Include/Ppi/S3Resume.h @@ -0,0 +1,65 @@ +/** @file
+ This file declares S3 Resume PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: S3Resume.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI S3 Resume Boot Path spec.
+ Version 0.9
+
+**/
+
+#ifndef __PEI_S3_RESUME_PPI_H__
+#define __PEI_S3_RESUME_PPI_H__
+
+#define EFI_PEI_S3_RESUME_PPI_GUID \
+ { \
+ 0x4426CCB2, 0xE684, 0x4a8a, {0xAE, 0x40, 0x20, 0xD4, 0xB0, 0x25, 0xB7, 0x10 } \
+ }
+
+typedef struct _EFI_PEI_S3_RESUME_PPI EFI_PEI_S3_RESUME_PPI;
+
+/**
+ Restores the platform to its preboot configuration for an S3 resume and
+ jumps to the OS waking vector.
+
+ @param PeiServices Pointer to the PEI Services Table
+
+ @retval EFI_ABORTED Execution of the S3 resume boot script table failed.
+
+ @retval EFI_NOT_FOUND Some necessary information that is used for
+ the S3 resume boot path could not be located.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG) (
+ IN EFI_PEI_SERVICES **PeiServices
+ );
+
+/**
+ @par Ppi Description:
+ EFI_PEI_S3_RESUME_PPI accomplishes the firmware S3 resume boot
+ path and transfers control to OS.
+
+ @param S3RestoreConfig
+ Restores the platform to its preboot configuration for an S3 resume and
+ jumps to the OS waking vector.
+
+**/
+struct _EFI_PEI_S3_RESUME_PPI {
+ EFI_PEI_S3_RESUME_PPI_RESTORE_CONFIG S3RestoreConfig;
+};
+
+extern EFI_GUID gEfiPeiS3ResumePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/SecPlatformInformation.h b/MdePkg/Include/Ppi/SecPlatformInformation.h new file mode 100644 index 0000000000..1e9625923c --- /dev/null +++ b/MdePkg/Include/Ppi/SecPlatformInformation.h @@ -0,0 +1,86 @@ +/** @file
+ This file declares Sec Platform Information PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SecPlatformInformation.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
+#define __SEC_PLATFORM_INFORMATION_PPI_H__
+
+#define EFI_SEC_PLATFORM_INFORMATION_GUID \
+ { \
+ 0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
+ }
+
+typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
+
+extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
+
+///
+/// EFI_HEALTH_FLAGS
+///
+typedef union {
+ struct {
+ UINT32 Status : 2;
+ UINT32 Tested : 1;
+ UINT32 Reserved1 :13;
+ UINT32 VirtualMemoryUnavailable : 1;
+ UINT32 Ia32ExecutionUnavailable : 1;
+ UINT32 FloatingPointUnavailable : 1;
+ UINT32 MiscFeaturesUnavailable : 1;
+ UINT32 Reserved2 :12;
+ } Bits;
+ UINT32 Uint32;
+} EFI_HEALTH_FLAGS;
+
+typedef struct {
+ EFI_HEALTH_FLAGS HealthFlags;
+} EFI_SEC_PLATFORM_INFORMATION_RECORD;
+
+/**
+ This interface conveys state information out of the Security (SEC) phase into PEI.
+
+ @param PeiServices Pointer to the PEI Services Table.
+
+ @param StructureSize Pointer to the variable describing size of the input buffer.
+
+ @param PlatformInformationRecord Pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
+
+ @retval EFI_SUCCESS The data was successfully returned.
+
+ @retval EFI_BUFFER_TOO_SMALL The buffer was too small.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEC_PLATFORM_INFORMATION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN OUT UINT64 *StructureSize,
+ OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
+ );
+
+/**
+ @par Ppi Description:
+
+ @param Name
+
+**/
+struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
+ EFI_SEC_PLATFORM_INFORMATION PlatformInformation;
+};
+
+#endif
diff --git a/MdePkg/Include/Ppi/SectionExtraction.h b/MdePkg/Include/Ppi/SectionExtraction.h new file mode 100644 index 0000000000..afa473d9ef --- /dev/null +++ b/MdePkg/Include/Ppi/SectionExtraction.h @@ -0,0 +1,118 @@ +/** @file
+ This file declares Section Extraction PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SectionExtraction.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __SECTION_EXTRACTION_PPI_H__
+#define __SECTION_EXTRACTION_PPI_H__
+
+#define EFI_PEI_SECTION_EXTRACTION_PPI_GUID \
+ { \
+ 0x4F89E208, 0xE144, 0x4804, {0x9E, 0xC8, 0x0F, 0x89, 0x4F, 0x7E, 0x36, 0xD7 } \
+ }
+
+typedef struct _EFI_PEI_SECTION_EXTRACTION_PPI EFI_PEI_SECTION_EXTRACTION_PPI;
+
+//
+// Bit values for AuthenticationStatus
+//
+#define EFI_PEI_AUTH_STATUS_PLATFORM_OVERRIDE 0x01
+#define EFI_PEI_AUTH_STATUS_IMAGE_SIGNED 0x02
+#define EFI_PEI_AUTH_STATUS_NOT_TESTED 0x04
+#define EFI_PEI_AUTH_STATUS_TEST_FAILED 0x08
+
+/**
+ The function is used to retrieve a section from within a section file.
+ It will retrieve both encapsulation sections and leaf sections in their entirety,
+ exclusive of the section header.
+
+ @param PeiServices Pointer to the PEI Services Table.
+
+ @param This Indicates the calling context
+
+ @param SectionType Pointer to an EFI_SECTION_TYPE. If SectionType == NULL,
+ the contents of the entire section are returned in Buffer. If SectionType
+ is not NULL, only the requested section is returned.
+
+ @param SectionDefinitionGuid Pointer to an EFI_GUID.
+ If SectionType == EFI_SECTION_GUID_DEFINED, SectionDefinitionGuid
+ indicates for which section GUID to search.
+ If SectionType != EFI_SECTION_GUID_DEFINED, SectionDefinitionGuid
+ is unused and is ignored.
+
+ @param SectionInstance If SectionType is not NULL, indicates which
+ instance of the requested section type to return.
+
+ @param Buffer Pointer to a pointer to a buffer in which the section
+ contents are returned.
+
+ @param BufferSize A pointer to a caller-allocated UINT32.On input, *BufferSize
+ indicates the size in bytes of the memory region pointed to by Buffer.On output,
+ *BufferSize contains the number of bytes required to read the section.
+
+ @param AuthenticationStatus A pointer to a caller-allocated UINT32 in
+ which any metadata from encapsulating GUID-defined sections is returned.
+
+ @retval EFI_SUCCESS The section was successfully processed and the section
+ contents were returned in Buffer.
+
+ @retval EFI_PROTOCOL_ERROR A GUID-defined section was encountered in
+ the file with its EFI_GUIDED_SECTION_PROCESSING_REQUIRED bit set, but
+ there was no corresponding GUIDed Section Extraction Protocol in the
+ handle database.*Buffer is unmodified.
+
+ @retval EFI_NOT_FOUND The requested section does not exist.*Buffer is unmodified.
+
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to process the request.
+
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+
+ @retval EFI_WARN_TOO_SMALL The size of the input buffer is insufficient to
+ contain the requested section. The input buffer is filled and contents are
+ section contents are truncated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_GET_SECTION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SECTION_EXTRACTION_PPI *This,
+ IN EFI_SECTION_TYPE *SectionType,
+ IN EFI_GUID *SectionDefinitionGuid, OPTIONAL
+ IN UINTN SectionInstance,
+ IN VOID **Buffer,
+ IN OUT UINT32 *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ @par Ppi Description:
+ This PPI supports encapsulating sections, such as GUIDed sections used to
+ authenticate the file encapsulation of other domain-specific wrapping.
+
+ @param GetSection
+ Retrieves a section from within a section file.
+
+**/
+struct _EFI_PEI_SECTION_EXTRACTION_PPI {
+ EFI_PEI_GET_SECTION PeiGetSection;
+};
+
+extern EFI_GUID gEfiPeiSectionExtractionPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/Security.h b/MdePkg/Include/Ppi/Security.h new file mode 100644 index 0000000000..cc59023bf5 --- /dev/null +++ b/MdePkg/Include/Ppi/Security.h @@ -0,0 +1,77 @@ +/** @file
+ This file declares Security Architectural PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Security.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __SECURITY_PPI_H__
+#define __SECURITY_PPI_H__
+
+#define EFI_PEI_SECURITY_PPI_GUID \
+ { \
+ 0x1388066e, 0x3a57, 0x4efa, {0x98, 0xf3, 0xc1, 0x2f, 0x3a, 0x95, 0x8a, 0x29 } \
+ }
+
+typedef struct _EFI_PEI_SECURITY_PPI EFI_PEI_SECURITY_PPI;
+
+/**
+ Allows the platform builder to implement a security policy in response
+ to varying file authentication states.
+
+ @param PeiServices Pointer to the PEI Services Table.
+
+ @param This Interface pointer that implements the particular EFI_PEI_SECURITY_PPI instance.
+
+ @param AuthenticationStatus Status returned by the verification service as part of section extraction.
+
+ @param FfsFileHeader Pointer to the file under review.
+
+ @param DeferExecution Pointer to a variable that alerts the PEI Foundation to defer execution of a PEIM.
+
+ @retval EFI_SUCCESS The service performed its action successfully.
+
+ @retval EFI_SECURITY_VIOLATION The object cannot be trusted
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SECURITY_AUTHENTICATION_STATE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SECURITY_PPI *This,
+ IN UINT32 AuthenticationStatus,
+ IN EFI_FFS_FILE_HEADER *FfsFileHeader,
+ IN OUT BOOLEAN *StartCrisisRecovery
+ );
+
+/**
+ @par Ppi Description:
+ This PPI is installed by some platform PEIM that abstracts the security
+ policy to the PEI Foundation, namely the case of a PEIM¡¯s authentication
+ state being returned during the PEI section extraction process.
+
+ @param AuthenticationState
+ Allows the platform builder to implement a security policy in response
+ to varying file authentication states.
+
+**/
+struct _EFI_PEI_SECURITY_PPI {
+ EFI_PEI_SECURITY_AUTHENTICATION_STATE AuthenticationState;
+};
+
+extern EFI_GUID gEfiPeiSecurityPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/Smbus.h b/MdePkg/Include/Ppi/Smbus.h new file mode 100644 index 0000000000..7360e5b12f --- /dev/null +++ b/MdePkg/Include/Ppi/Smbus.h @@ -0,0 +1,258 @@ +/** @file
+ This file declares Smbus PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Smbus.h
+
+ @par Revision Reference:
+ This PPI is defined in Framework of EFI SmBus PPI spec.
+ Version 0.9
+
+**/
+
+#ifndef _PEI_SMBUS_PPI_H
+#define _PEI_SMBUS_PPI_H
+
+#define EFI_PEI_SMBUS_PPI_GUID \
+ { \
+ 0xabd42895, 0x78cf, 0x4872, {0x84, 0x44, 0x1b, 0x5c, 0x18, 0xb, 0xfb, 0xda } \
+ }
+
+typedef struct _EFI_PEI_SMBUS_PPI EFI_PEI_SMBUS_PPI;
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+
+ @param SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+
+ @param Command This command is transmitted by the SMBus host
+ controller to the SMBus slave device and the interpretation is
+ SMBus slave device specific.
+
+ @param Operation Signifies which particular SMBus hardware protocol
+ instance that it will use to execute the SMBus transactions.
+
+ @param PecCheck Defines if Packet Error Code (PEC) checking is required
+ for this operation.
+
+ @param Length Signifies the number of bytes that this operation will do.
+
+ @param Buffer Contains the value of data to execute to the SMBus slave device.
+
+ @retval EFI_SUCCESS The last data that was returned from the access
+ matched the poll exit criteria.
+
+ @retval EFI_CRC_ERROR The checksum is not correct (PEC is incorrect)
+
+ @retval EFI_TIMEOUT Timeout expired before the operation was completed.
+ Timeout is determined by the SMBus host controller device.
+
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+
+ @retval EFI_DEVICE_ERROR The request was not completed because
+ a failure reflected in the Host Status Register bit.
+
+ @retval EFI_INVALID_PARAMETER Operation is not defined in EFI_SMBUS_OPERATION.
+ Or Length/Buffer is NULL for operations except for EfiSmbusQuickRead and
+ EfiSmbusQuickWrite. Length is outside the range of valid values.
+
+ @retval EFI_UNSUPPORTED The SMBus operation or PEC is not supported.
+
+ @retval EFI_BUFFER_TOO_SMALL Buffer is not sufficient for this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ UINT32 VendorSpecificId;
+ UINT16 SubsystemDeviceId;
+ UINT16 SubsystemVendorId;
+ UINT16 Interface;
+ UINT16 DeviceId;
+ UINT16 VendorId;
+ UINT8 VendorRevision;
+ UINT8 DeviceCapabilities;
+} EFI_SMBUS_UDID;
+
+/**
+ CallBack function can be registered in EFI_PEI_SMBUS_PPI_NOTIFY.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+
+ @param SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+
+ @param Data Data of the SMBus host notify command that
+ the caller wants to be called.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_NOTIFY_FUNCTION) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *SmbusPpi,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data
+ );
+
+/**
+ The ArpDevice() function enumerates the entire bus or enumerates a specific
+ device that is identified by SmbusUdid.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+
+ @param ArpAll A Boolean expression that indicates if the host drivers need
+ to enumerate all the devices or enumerate only the device that is identified
+ by SmbusUdid. If ArpAll is TRUE, SmbusUdid and SlaveAddress are optional.
+ If ArpAll is FALSE, ArpDevice will enumerate SmbusUdid and the address
+ will be at SlaveAddress.
+
+ @param SmbusUdid The targeted SMBus Unique Device Identifier (UDID).
+ The UDID may not exist for SMBus devices with fixed addresses.
+
+ @param SlaveAddress The new SMBus address for the slave device for
+ which the operation is targeted.
+
+ @retval EFI_SUCCESS The SMBus slave device address was set.
+
+ @retval EFI_INVALID_PARAMETER SlaveAddress is NULL.
+
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+
+ @retval EFI_TIMEOUT The SMBus slave device did not respond.
+
+ @retval EFI_DEVICE_ERROR The request was not completed because the transaction failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_ARP_DEVICE) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL
+ );
+
+typedef struct {
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+ EFI_SMBUS_UDID SmbusDeviceUdid;
+} EFI_SMBUS_DEVICE_MAP;
+
+/**
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+
+ @param SmbusDeviceMap The pointer to the device map as enumerated
+ by the SMBus controller driver.
+
+ @retval EFI_SUCCESS The device map was returned correctly in the buffer.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_GET_ARP_MAP) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+/**
+ The Notify() function registers all the callback functions to allow the
+ bus driver to call these functions when the SlaveAddress/Data pair happens.
+
+ @param PeiServices A pointer to the system PEI Services Table.
+
+ @param This A pointer to the EFI_PEI_SMBUS_PPI instance.
+
+ @param SlaveAddress Address that the host controller detects as
+ sending a message and calls all the registered functions.
+
+ @param Data Data that the host controller detects as sending a message
+ and calls all the registered functions.
+
+ @param NotifyFunction The function to call when the bus driver
+ detects the SlaveAddress and Data pair.
+
+ @retval EFI_SUCCESS NotifyFunction has been registered.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_SMBUS_PPI_NOTIFY) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_SMBUS_PPI *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_PEI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ );
+
+/**
+ @par Ppi Description:
+ Provides the basic I/O interfaces that a PEIM uses to access
+ its SMBus controller and the slave devices attached to it.
+
+ @param Execute
+ Executes the SMBus operation to an SMBus slave device.
+
+ @param ArpDevice
+ Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP)
+
+ @param GetArpMap
+ Allows a PEIM to retrieve the address that was allocated by the SMBus
+ host controller during enumeration/ARP.
+
+ @param Notify
+ Allows a driver to register for a callback to the SMBus host
+ controller driver when the bus issues a notification to the bus controller PEIM.
+
+**/
+struct _EFI_PEI_SMBUS_PPI {
+ EFI_PEI_SMBUS_PPI_EXECUTE_OPERATION Execute;
+ EFI_PEI_SMBUS_PPI_ARP_DEVICE ArpDevice;
+ EFI_PEI_SMBUS_PPI_GET_ARP_MAP GetArpMap;
+ EFI_PEI_SMBUS_PPI_NOTIFY Notify;
+};
+
+extern EFI_GUID gEfiPeiSmbusPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/Stall.h b/MdePkg/Include/Ppi/Stall.h new file mode 100644 index 0000000000..363baa6d39 --- /dev/null +++ b/MdePkg/Include/Ppi/Stall.h @@ -0,0 +1,73 @@ +/** @file
+ This file declares Stall PPI.
+
+ This code abstracts the PEI core to provide Stall services.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Stall.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __STALL_PPI_H__
+#define __STALL_PPI_H__
+
+#define EFI_PEI_STALL_PPI_GUID \
+ { \
+ 0x1f4c6f90, 0xb06b, 0x48d8, {0xa2, 0x01, 0xba, 0xe5, 0xf1, 0xcd, 0x7d, 0x56 } \
+ }
+
+typedef struct _EFI_PEI_STALL_PPI EFI_PEI_STALL_PPI;
+
+/**
+ The Stall() function provides a blocking stall for at least the number
+ of microseconds stipulated in the final argument of the API.
+
+ @param PeiServices An indirect pointer to the PEI Services Table
+ published by the PEI Foundation.
+
+ @param This Pointer to the local data for the interface.
+
+ @param Microseconds Number of microseconds for which to stall.
+
+ @retval EFI_SUCCESS The service provided at least the required delay.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PEI_STALL) (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_STALL_PPI *This,
+ IN UINTN Microseconds
+ );
+
+/**
+ @par Ppi Description:
+ This service provides a simple, blocking stall with platform-specific resolution.
+
+ @param Resolution
+ The resolution in microseconds of the stall services.
+
+ @param Stall
+ The actual stall procedure call.
+
+**/
+struct _EFI_PEI_STALL_PPI {
+ UINTN Resolution;
+ EFI_PEI_STALL Stall;
+};
+
+extern EFI_GUID gEfiPeiStallPpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Ppi/StatusCode.h b/MdePkg/Include/Ppi/StatusCode.h new file mode 100644 index 0000000000..5470222c5b --- /dev/null +++ b/MdePkg/Include/Ppi/StatusCode.h @@ -0,0 +1,42 @@ +/** @file
+ This file declares Status Code PPI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: StatusCode.h
+
+ @par Revision Reference:
+ This PPI is defined in PEI CIS.
+ Version 0.91.
+
+**/
+
+#ifndef __STATUS_CODE_PPI_H__
+#define __STATUS_CODE_PPI_H__
+
+#define EFI_PEI_REPORT_PROGRESS_CODE_PPI_GUID \
+ { 0x229832d3, 0x7a30, 0x4b36, {0xb8, 0x27, 0xf4, 0xc, 0xb7, 0xd4, 0x54, 0x36 } }
+
+/**
+ @par Ppi Description:
+ This ppi provides the sevice to report status code. There can be only one instance
+ of this service in the system.
+
+ @param ReportStatusCode
+ Service that allows PEIMs to report status codes. This function is defined in Peicis.h
+
+**/
+typedef struct {
+ EFI_PEI_REPORT_STATUS_CODE ReportStatusCode;
+} EFI_PEI_PROGRESS_CODE_PPI;
+
+extern EFI_GUID gEfiPeiStatusCodePpiGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/AcpiSupport.h b/MdePkg/Include/Protocol/AcpiSupport.h new file mode 100644 index 0000000000..8602b67f85 --- /dev/null +++ b/MdePkg/Include/Protocol/AcpiSupport.h @@ -0,0 +1,173 @@ +/** @file
+ Definition of the ACPI Support protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: AcpiSupport.h
+
+ @par Revision Reference:
+ This is defined in the ACPI Specification 0.9.
+
+**/
+
+#ifndef _ACPI_SUPPORT_PROTOCOL_H_
+#define _ACPI_SUPPORT_PROTOCOL_H_
+
+typedef struct _EFI_ACPI_SUPPORT_PROTOCOL EFI_ACPI_SUPPORT_PROTOCOL;
+
+//
+// ACPI Support Protocol GUID
+//
+#define EFI_ACPI_SUPPORT_GUID \
+ { \
+ 0xdbff9d55, 0x89b7, 0x46da, {0xbd, 0xdf, 0x67, 0x7d, 0x3d, 0xc0, 0x24, 0x1d } \
+ }
+
+//
+// Protocol Data Definitions
+//
+//
+// ACPI Version bitmap definition:
+//
+// EFI_ACPI_TABLE_VERSION_1_0B - ACPI Version 1.0b
+// EFI_ACPI_TABLE_VERSION_2_0 - ACPI Version 2.0
+// EFI_ACPI_TABLE_VERSION_3_0 - ACPI Version 3.0
+// EFI_ACPI_TABLE_VERSION_NONE - No ACPI Versions. This might be used
+// to create memory-based operation regions or other information
+// that is not part of the ACPI "tree" but must still be found
+// in ACPI memory space and/or managed by the core ACPI driver.
+//
+// Note that EFI provides discrete GUIDs for each version of ACPI
+// that is supported. It is expected that each EFI GUIDed
+// version of ACPI will also have a corresponding bitmap
+// definition. This allows maintenance of separate ACPI trees
+// for each distinctly different version of ACPI.
+//
+#define EFI_ACPI_TABLE_VERSION UINT32
+
+#define EFI_ACPI_TABLE_VERSION_NONE (1 << 0)
+#define EFI_ACPI_TABLE_VERSION_1_0B (1 << 1)
+#define EFI_ACPI_TABLE_VERSION_2_0 (1 << 2)
+#define EFI_ACPI_TABLE_VERSION_3_0 (1 << 3)
+
+//
+// Protocol Member Functions
+//
+
+/**
+ Returns a requested ACPI table.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+
+ @param Index The zero-based index of the table to retrieve.
+
+ @param Table Pointer for returning the table buffer.
+
+ @param Version Updated with the ACPI versions to which this table belongs.
+
+ @param Handle Pointer for identifying the table.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_FOUND The requested index is too large and a table was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_GET_ACPI_TABLE) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN INTN Index,
+ OUT VOID **Table,
+ OUT EFI_ACPI_TABLE_VERSION *Version,
+ OUT UINTN *Handle
+ );
+
+/**
+ Used to add, remove, or update ACPI tables.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+
+ @param Table Pointer to the new table to add or update.
+
+ @param Checksum If TRUE, indicates that the checksum should be
+ calculated for this table.
+
+ @param Version Indicates to which version(s) of ACPI the table should be added.
+
+ @param Pointer to the handle of the table to remove or update.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_INVALID_PARAMETER *Handle was zero and Table was NULL.
+
+ @retval EFI_ABORTED Could not complete the desired action.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_SET_ACPI_TABLE) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN VOID *Table OPTIONAL,
+ IN BOOLEAN Checksum,
+ IN EFI_ACPI_TABLE_VERSION Version,
+ IN OUT UINTN *Handle
+ );
+
+/**
+ Causes one or more versions of the ACPI tables to be published in
+ the EFI system configuration tables.
+
+ @param This A pointer to the EFI_ACPI_SUPPORT_PROTOCOL instance.
+
+ @param Version Indicates to which version(s) of ACPI that the table should be published.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_ABORTED An error occurred and the function could not complete successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ACPI_PUBLISH_TABLES) (
+ IN EFI_ACPI_SUPPORT_PROTOCOL *This,
+ IN EFI_ACPI_TABLE_VERSION Version
+ );
+
+//
+// ACPI Support Protocol
+//
+/**
+ @par Protocol Description:
+ This protocol provides some basic services to support publishing ACPI system
+ tables. The services handle many of the more mundane tasks that are required
+ to publish a set of tables.
+
+ @param GetAcpiTable
+ Returns a table specified by an index if it exists.
+
+ @param SetAcpiTable
+ Adds, removes, or updates ACPI tables
+
+ @param PublishTables
+ Publishes the ACPI tables.
+
+**/
+struct _EFI_ACPI_SUPPORT_PROTOCOL {
+ EFI_ACPI_GET_ACPI_TABLE GetAcpiTable;
+ EFI_ACPI_SET_ACPI_TABLE SetAcpiTable;
+ EFI_ACPI_PUBLISH_TABLES PublishTables;
+};
+
+//
+// Extern the GUID for protocol users.
+//
+extern EFI_GUID gEfiAcpiSupportGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Arp.h b/MdePkg/Include/Protocol/Arp.h new file mode 100644 index 0000000000..7394f3fb6a --- /dev/null +++ b/MdePkg/Include/Protocol/Arp.h @@ -0,0 +1,259 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Arp.h
+
+**/
+
+#ifndef __EFI_ARP_PROTOCOL_H__
+#define __EFI_ARP_PROTOCOL_H__
+
+#define EFI_ARP_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0xf44c00ee, 0x1f2c, 0x4a00, {0xaa, 0x9, 0x1c, 0x9f, 0x3e, 0x8, 0x0, 0xa3 } \
+ }
+
+#define EFI_ARP_PROTOCOL_GUID \
+ { \
+ 0xf4b427bb, 0xba21, 0x4f16, {0xbc, 0x4e, 0x43, 0xe4, 0x16, 0xab, 0x61, 0x9c } \
+ }
+
+typedef struct _EFI_ARP_PROTOCOL EFI_ARP_PROTOCOL;
+
+typedef struct {
+UINT32 Size;
+BOOLEAN DenyFlag;
+BOOLEAN StaticFlag;
+UINT16 HwAddressType;
+UINT16 SwAddressType;
+UINT8 HwAddressLength;
+UINT8 SwAddressLength;
+} EFI_ARP_FIND_DATA;
+
+typedef struct {
+ UINT16 SwAddressType; // Host byte order
+ UINT8 SwAddressLength;
+ VOID *StationAddress; // Network byte order
+ UINT32 EntryTimeOut;
+ UINT32 RetryCount;
+ UINT32 RetryTimeOut;
+} EFI_ARP_CONFIG_DATA;
+
+
+/**
+ Assigns a station address (protocol type and network address) to this instance of the ARP cache.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param ConfigData A pointer to the EFI_ARP_CONFIG_DATA structure.Buffer
+
+ @retval EFI_SUCCESS The new station address was successfully registered.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_ACCESS_DENIED The SwAddressType, SwAddressLength, or
+ StationAddress is different from the one that is already
+ registered.
+ @retval EFI_OUT_OF_RESOURCES Storage for the new StationAddress could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_CONFIGURE) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN EFI_ARP_CONFIG_DATA *ConfigData OPTIONAL
+ )
+;
+
+/**
+ Inserts an entry to the ARP cache.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param DenyFlag Set to TRUE if this entry is a ¡°deny¡± entry. Set to FALSE if this
+ entry is a ¡°normal¡± entry.
+ @param TargetSwAddress Pointer to a protocol address to add (or deny). May be set to
+ NULL if DenyFlag is TRUE.
+ @param TargetHwAddress Pointer to a hardware address to add (or deny). May be set to
+ NULL if DenyFlag is TRUE.
+ @param TimeoutValue Time in 100-ns units that this entry will remain in the ARP
+ cache. A value of zero means that the entry is permanent. A
+ nonzero value will override the one given by Configure() if
+ the entry to be added is dynamic entry.
+ @param Overwrite If TRUE, the matching cache entry will be overwritten with the
+ supplied parameters. If FALSE, EFI_ACCESS_DENIED
+
+ @retval EFI_SUCCESS The entry has been added or updated.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_OUT_OF_RESOURCES The new ARP cache entry could not be allocated.
+ @retval EFI_ACCESS_DENIED The ARP cache entry already exists and Overwrite is not true.
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_ADD) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN BOOLEAN DenyFlag,
+ IN VOID *TargetSwAddress OPTIONAL,
+ IN VOID *TargetHwAddress OPTIONAL,
+ IN UINT32 TimeoutValue,
+ IN BOOLEAN Overwrite
+ )
+;
+
+/**
+ Locates one or more entries in the ARP cache.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param BySwAddress Set to TRUE to look for matching software protocol addresses.
+ Set to FALSE to look for matching hardware protocol addresses.
+ @param AddressBuffer Pointer to address buffer. Set to NULL to match all addresses.
+ @param EntryLength The size of an entry in the entries buffer. To keep the
+ EFI_ARP_FIND_DATA structure properly aligned, this field
+ may be longer than sizeof(EFI_ARP_FIND_DATA) plus
+ the length of the software and hardware addresses.
+ @param EntryCount The number of ARP cache entries that are found by the specified criteria.
+ @param Entries Pointer to the buffer that will receive the ARP cache entries.
+ @param Refresh Set to TRUE to refresh the timeout value of the matching ARP
+ cache entry.
+
+ @retval EFI_SUCCESS The requested ARP cache entries were copied into the buffer.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_NOT_FOUND No matching entries were found.
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_FIND) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN BOOLEAN BySwAddress,
+ IN VOID *AddressBuffer OPTIONAL,
+ OUT UINT32 *EntryLength OPTIONAL,
+ OUT UINT32 *EntryCount OPTIONAL,
+ OUT EFI_ARP_FIND_DATA **Entries OPTIONAL,
+ IN BOOLEAN Refresh
+ )
+;
+
+
+/**
+ Removes entries from the ARP cache.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param BySwAddress Set to TRUE to delete matching protocol addresses.
+ Set to FALSE to delete matching hardware addresses.
+ @param AddressBuffer Pointer to the address buffer that is used as a key to look for the
+ cache entry. Set to NULL to delete all entries.
+
+ @retval EFI_SUCCESS The entry was removed from the ARP cache.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_FOUND The specified deletion key was not found.
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_DELETE) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN BOOLEAN BySwAddress,
+ IN VOID *AddressBuffer OPTIONAL
+ )
+;
+
+/**
+ Removes all dynamic ARP cache entries that were added by this interface.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The cache has been flushed.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_FOUND There are no matching dynamic cache entries.
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_FLUSH) (
+ IN EFI_ARP_PROTOCOL *This
+ )
+;
+
+/**
+ Starts an ARP request session.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param TargetSwAddress Pointer to the protocol address to resolve.
+ @param ResolvedEvent Pointer to the event that will be signaled when the address is
+ resolved or some error occurs.
+ @param TargetHwAddress Pointer to the buffer for the resolved hardware address in
+ network byte order. The buffer must be large enough to hold the
+ resulting hardware address. TargetHwAddress must not be
+ NULL.
+
+ @retval EFI_SUCCESS The data was copied from the ARP cache into the
+ TargetHwAddress buffer.
+ @retval EFI_INVALID_PARAMETER This or TargetHwAddress is NULL.
+ @retval EFI_ACCESS_DENIED The requested address is not present in the normal ARP cache but
+ is present in the deny address list. Outgoing traffic to that address is
+ forbidden.
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+ @retval EFI_NOT_READY The request has been started and is not finished.
+ @retval EFI_UNSUPPORTED The requested conversion is not supported in this implementation or
+ configuration.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_REQUEST) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN VOID *TargetSwAddress OPTIONAL,
+ IN EFI_EVENT ResolvedEvent OPTIONAL,
+ OUT VOID *TargetHwAddress
+ )
+;
+
+/**
+ Cancels an ARP request session.
+
+ @param This A pointer to the EFI_ARP_PROTOCOL instance.
+ @param TargetSwAddress Pointer to the protocol address in previous request session.
+ @param ResolvedEvent Pointer to the event that is used as the notification event in
+ previous request session.
+
+ @retval EFI_SUCCESS The pending request session(s) is/are aborted and corresponding
+ event(s) is/are signaled.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_NOT_STARTED The ARP driver instance has not been configured.
+ @retval EFI_NOT_FOUND The request is not issued by
+ EFI_ARP_PROTOCOL.Request().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ARP_CANCEL) (
+ IN EFI_ARP_PROTOCOL *This,
+ IN VOID *TargetSwAddress OPTIONAL,
+ IN EFI_EVENT ResolvedEvent OPTIONAL
+ )
+;
+
+struct _EFI_ARP_PROTOCOL {
+ EFI_ARP_CONFIGURE Configure;
+ EFI_ARP_ADD Add;
+ EFI_ARP_FIND Find;
+ EFI_ARP_DELETE Delete;
+ EFI_ARP_FLUSH Flush;
+ EFI_ARP_REQUEST Request;
+ EFI_ARP_CANCEL Cancel;
+};
+
+
+extern EFI_GUID gEfiArpServiceBindingProtocolGuid;
+extern EFI_GUID gEfiArpProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/AuthenticationInfo.h b/MdePkg/Include/Protocol/AuthenticationInfo.h new file mode 100644 index 0000000000..f80dbf362b --- /dev/null +++ b/MdePkg/Include/Protocol/AuthenticationInfo.h @@ -0,0 +1,125 @@ +/** @file
+ EFI_AUTHENTICATION_INFO_PROTOCOL as defined in UEFI 2.0.
+ This protocol is used on any device handle to obtain authentication information
+ associated with the physical or logical device.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: AuthenticationInfo.h
+
+**/
+
+#ifndef __AUTHENTICATION_INFO_H__
+#define __AUTHENTICATION_INFO_H__
+
+#define EFI_AUTHENTICATION_INFO_PROTOCOL_GUID \
+ { \
+ 0x7671d9d0, 0x53db, 0x4173, {0xaa, 0x69, 0x23, 0x27, 0xf2, 0x1f, 0x0b, 0xc7 } \
+ }
+
+#define EFI_AUTHENTICATION_CHAP_RADIUS_GUID \
+ { \
+ 0xd6062b50, 0x15ca, 0x11da, {0x92, 0x19, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \
+ }
+
+#define EFI_AUTHENTICATION_CHAP_LOCAL_GUID \
+ { \
+ 0xc280c73e, 0x15ca, 0x11da, {0xb0, 0xca, 0x00, 0x10, 0x83, 0xff, 0xca, 0x4d } \
+ }
+
+typedef struct _EFI_AUTHENTICATION_INFO_PROTOCOL EFI_AUTHENTICATION_INFO_PROTOCOL;
+
+typedef struct {
+ EFI_GUID Guid;
+ UINT16 Length;
+} AUTH_NODE_HEADER;
+
+typedef struct {
+ AUTH_NODE_HEADER Header;
+ EFI_IPv6_ADDRESS RadiusIpAddr; // IPv4 or IPv6 address
+ UINT16 Reserved;
+ EFI_IPv6_ADDRESS NasIpAddr; // IPv4 or IPv6 address
+ UINT16 NasSecretLength;
+ UINT8 *NasSecret;
+ UINT16 ChapSecretLength;
+ UINT8 *ChapSecret;
+ UINT16 ChapNameLength;
+ UINT8 *ChapName;
+} CHAP_RADIUS_AUTH_NODE;
+
+typedef struct {
+ AUTH_NODE_HEADER Header;
+ UINT16 Reserved;
+ UINT16 UserSecretLength;
+ UINT8 *UserSecret;
+ UINT16 UserNameLength;
+ UINT8 *UserName;
+ UINT16 ChapSecretLength;
+ UINT8 *ChapSecret;
+ UINT16 ChapNameLength;
+ UINT8 *ChapName;
+} CHAP_LOCAL_AUTH_NODE;
+
+/**
+ Retrieves the Authentication information associated with a particular controller handle.
+
+ @param This Pointer to the EFI_AUTHENTICATION_INFO_PROTOCOL
+ @param ControllerHandle Handle to the Controller
+ @param Buffer Pointer to the authentication information.
+
+ @retval EFI_SUCCESS Successfully retrieved Authentication information for the given ControllerHandle
+ @retval EFI_INVALID_PARAMETER No matching Authentication information found for the given ControllerHandle
+ @retval EFI_DEVICE_ERROR The authentication information could not be retrieved due to a
+ hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_AUTHENTICATION_PROTOCOL_INFO_GET) (
+ IN EFI_AUTHENTICATION_INFO_PROTOCOL *This,
+ IN EFI_HANDLE *ControllerHandle,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Set the Authentication information for a given controller handle.
+
+ @param This Pointer to the EFI_AUTHENTICATION_INFO_PROTOCOL
+ @param ControllerHandle Handle to the Controller
+ @param Buffer Pointer to the authentication information.
+
+ @retval EFI_SUCCESS Successfully set Authentication information for the given ControllerHandle
+ @retval EFI_UNSUPPORTED If the platform policies do not allow setting of the Authentication
+ information.
+ @retval EFI_DEVICE_ERROR The authentication information could not be configured due to a
+ hardware error.
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_AUTHENTICATION_PROTOCOL_INFO_SET) (
+ IN EFI_AUTHENTICATION_INFO_PROTOCOL *This,
+ IN EFI_HANDLE *ControllerHandle,
+ IN VOID *Buffer
+ )
+;
+
+struct _EFI_AUTHENTICATION_INFO_PROTOCOL {
+ EFI_AUTHENTICATION_PROTOCOL_INFO_GET Get;
+ EFI_AUTHENTICATION_PROTOCOL_INFO_SET Set;
+};
+
+extern EFI_GUID gEfiAuthenticationInfoProtocolGuid;
+extern EFI_GUID gEfiAuthenticationChapRadiusGuid;
+extern EFI_GUID gEfiAuthenticationChapLocalGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Bis.h b/MdePkg/Include/Protocol/Bis.h new file mode 100644 index 0000000000..ffc66f622a --- /dev/null +++ b/MdePkg/Include/Protocol/Bis.h @@ -0,0 +1,418 @@ +/** @file
+ This file defines the BIS protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Bis.h
+
+**/
+
+#ifndef __BIS_H__
+#define __BIS_H__
+
+#define EFI_BIS_PROTOCOL_GUID \
+ { \
+ 0x0b64aab0, 0x5429, 0x11d4, {0x98, 0x16, 0x00, 0xa0, 0xc9, 0x1f, 0xad, 0xcf } \
+ }
+
+typedef struct _EFI_BIS_PROTOCOL EFI_BIS_PROTOCOL;
+
+
+//
+// Basic types
+//
+typedef VOID *BIS_APPLICATION_HANDLE;
+typedef UINT16 BIS_ALG_ID;
+typedef UINT32 BIS_CERT_ID;
+
+//
+// EFI_BIS_DATA type.
+//
+// EFI_BIS_DATA instances obtained from BIS must be freed by calling Free( ).
+//
+typedef struct {
+ UINT32 Length; // Length of Data in 8 bit bytes.
+ UINT8 *Data; // 32 Bit Flat Address of data.
+} EFI_BIS_DATA;
+
+//
+// EFI_BIS_VERSION type.
+//
+typedef struct {
+ UINT32 Major; // BIS Interface version number.
+ UINT32 Minor; // Build number.
+} EFI_BIS_VERSION;
+
+//
+// ----------------------------------------------------//
+// Use these values to initialize EFI_BIS_VERSION.Major
+// and to interpret results of Initialize.
+// ----------------------------------------------------//
+//
+#define BIS_CURRENT_VERSION_MAJOR BIS_VERSION_1
+#define BIS_VERSION_1 1
+
+//
+// EFI_BIS_SIGNATURE_INFO type.
+//
+typedef struct {
+ BIS_CERT_ID CertificateID; // Truncated hash of platform Boot Object
+ // authorization certificate.
+ //
+ BIS_ALG_ID AlgorithmID; // A signature algorithm number.
+ UINT16 KeyLength; // Length of alg. keys in bits.
+} EFI_BIS_SIGNATURE_INFO;
+
+//
+// Currently defined values for EFI_BIS_SIGNATURE_INFO.AlgorithmID.
+// The exact numeric values come from
+// "Common Data Security Architecture (CDSA) Specification".
+//
+#define BIS_ALG_DSA (41) // CSSM_ALGID_DSA
+#define BIS_ALG_RSA_MD5 (42) // CSSM_ALGID_MD5_WITH_RSA
+// Currently defined values for EFI_BIS_SIGNATURE_INFO.CertificateId.
+//
+#define BIS_CERT_ID_DSA BIS_ALG_DSA // CSSM_ALGID_DSA
+#define BIS_CERT_ID_RSA_MD5 BIS_ALG_RSA_MD5 // CSSM_ALGID_MD5_WITH_RSA
+// The following is a mask value that gets applied to the truncated hash of a
+// platform Boot Object Authorization Certificate to create the certificateID.
+// A certificateID must not have any bits set to the value 1 other than bits in
+// this mask.
+//
+#define BIS_CERT_ID_MASK (0xFF7F7FFF)
+
+//
+// Macros for dealing with the EFI_BIS_DATA object obtained
+// from BIS_GetSignatureInfo()
+// BIS_GET_SIGINFO_COUNT - tells how many EFI_BIS_SIGNATURE_INFO
+// elements are contained in a EFI_BIS_DATA struct pointed to
+// by the provided EFI_BIS_DATA*.
+//
+#define BIS_GET_SIGINFO_COUNT(BisDataPtr) ((BisDataPtr)->Length / sizeof (EFI_BIS_SIGNATURE_INFO))
+
+//
+// BIS_GET_SIGINFO_ARRAY - produces a EFI_BIS_SIGNATURE_INFO*
+// from a given EFI_BIS_DATA*.
+//
+#define BIS_GET_SIGINFO_ARRAY(BisDataPtr) ((EFI_BIS_SIGNATURE_INFO *) (BisDataPtr)->Data)
+
+//
+// Binary Value of "X-Intel-BIS-ParameterSet" Attribute.
+// (Value is Base64 encoded in actual signed manifest).
+// {EDD35E31-07B9-11d2-83A3-00A0C91FADCF}
+//
+#define BOOT_OBJECT_AUTHORIZATION_PARMSET_GUID \
+ { \
+ 0xedd35e31, 0x7b9, 0x11d2, \
+ { \
+ 0x83, 0xa3, 0x0, 0xa0, 0xc9, 0x1f, 0xad, 0xcf \
+ } \
+ }
+
+//
+// Support old name for backward compatible
+//
+#define BOOT_OBJECT_AUTHORIZATION_PARMSET_GUIDVALUE \
+ BOOT_OBJECT_AUTHORIZATION_PARMSET_GUID
+
+/**
+ Initializes the BIS service, checking that it is compatible with the version requested by the caller.
+ After this call, other BIS functions may be invoked.
+
+ @param This A pointer to the EFI_BIS_PROTOCOL object.
+ @param AppHandle The function writes the new BIS_APPLICATION_HANDLE if
+ successful, otherwise it writes NULL. The caller must eventually
+ destroy this handle by calling Shutdown().
+ @param InterfaceVersion On input, the caller supplies the major version number of the
+ interface version desired.
+ On output, both the major and minor
+ version numbers are updated with the major and minor version
+ numbers of the interface
+ @param TargetAddress Indicates a network or device address of the BIS platform to connect to.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INCOMPATIBLE_VERSION The InterfaceVersion.Major requested by the
+ caller was not compatible with the interface version of the
+ @retval EFI_UNSUPPORTED This is a local-platform implementation and
+ TargetAddress.Data was not NULL, or
+ TargetAddress.Data was any other value that was not
+ supported by the implementation.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_DEVICE_ERROR The function encountered an unexpected internal failure.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_INITIALIZE) (
+ IN EFI_BIS_PROTOCOL *This,
+ OUT BIS_APPLICATION_HANDLE *AppHandle,
+ IN OUT EFI_BIS_VERSION *InterfaceVersion,
+ IN EFI_BIS_DATA *TargetAddress
+ );
+
+/**
+ Frees memory structures allocated and returned by other functions in the EFI_BIS protocol.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param ToFree An EFI_BIS_DATA* and associated memory block to be freed.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER The ToFree parameter is not or is no longer a memory resource
+ associated with this AppHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_FREE) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ IN EFI_BIS_DATA *ToFree
+ );
+
+/**
+ Shuts down an application¡¯s instance of the BIS service, invalidating the application handle. After
+ this call, other BIS functions may no longer be invoked using the application handle value.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_DEVICE_ERROR The function encountered an unexpected internal failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_SHUTDOWN) (
+ IN BIS_APPLICATION_HANDLE AppHandle
+ );
+
+/**
+ Retrieves the certificate that has been configured as the identity of the organization designated as
+ the source of authorization for signatures of boot objects.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param Certificate The function writes an allocated EFI_BIS_DATA* containing the Boot
+ Object Authorization Certificate object.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_NOT_FOUND There is no Boot Object Authorization Certificate currently installed.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER The Certificate parameter supplied by the caller is NULL or
+ an invalid memory reference.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_CERTIFICATE) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ OUT EFI_BIS_DATA **Certificate
+ );
+
+/**
+ Verifies the integrity and authorization of the indicated data object according to the
+ indicated credentials.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param Credentials A Signed Manifest containing verification information for the indicated
+ data object.
+ @param DataObject An in-memory copy of the raw data object to be verified.
+ @param IsVerified The function writes TRUE if the verification succeeded, otherwise
+ FALSE.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_SECURITY_VIOLATION The signed manifest supplied as the Credentials parameter
+ was invalid (could not be parsed) or Platform-specific authorization failed, etc.
+ @retval EFI_DEVICE_ERROR An unexpected internal error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_VERIFY_BOOT_OBJECT) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ IN EFI_BIS_DATA *Credentials,
+ IN EFI_BIS_DATA *DataObject,
+ OUT BOOLEAN *IsVerified
+ );
+
+/**
+ Retrieves the current status of the Boot Authorization Check Flag.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param CheckIsRequired The function writes the value TRUE if a Boot Authorization Check is
+ currently required on this platform, otherwise the function writes
+ FALSE.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER The CheckIsRequired parameter supplied by the caller is
+ NULL or an invalid memory reference.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_CHECKFLAG) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ OUT BOOLEAN *CheckIsRequired
+ );
+
+/**
+ Retrieves a unique token value to be included in the request credential for the next update of any
+ parameter in the Boot Object Authorization set
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param UpdateToken The function writes an allocated EFI_BIS_DATA* containing the new
+ unique update token value.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER The UpdateToken parameter supplied by the caller is NULL or
+ an invalid memory reference.
+ @retval EFI_DEVICE_ERROR An unexpected internal error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_UPDATE_TOKEN) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ OUT EFI_BIS_DATA **UpdateToken
+ );
+
+/**
+ Updates one of the configurable parameters of the Boot Object Authorization set.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param RequestCredential This is a Signed Manifest with embedded attributes that carry the details
+ of the requested update.
+ @param NewUpdateToken The function writes an allocated EFI_BIS_DATA* containing the new
+ unique update token value.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_SECURITY_VIOLATION The signed manifest supplied as the RequestCredential parameter
+ was invalid (could not be parsed) or Platform-specific authorization failed, etc.
+ @retval EFI_DEVICE_ERROR An unexpected internal error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_UPDATE_BOOT_OBJECT_AUTHORIZATION) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ IN EFI_BIS_DATA *RequestCredential,
+ OUT EFI_BIS_DATA **NewUpdateToken
+ );
+
+/**
+ Verifies the integrity and authorization of the indicated data object according to the indicated
+ credentials and authority certificate.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param Credentials A Signed Manifest containing verification information for the
+ indicated data object.
+ @param DataObject An in-memory copy of the raw data object to be verified.
+ @param SectionName An ASCII (not Unicode) string giving the section name in the
+ manifest holding the verification information (in other words,
+ hash value) that corresponds to DataObject.
+ @param AuthorityCertificate A digital certificate whose public key must match the signer¡¯s
+ public key which is found in the credentials.
+ @param IsVerified The function writes TRUE if the verification was successful.
+ Otherwise, the function writes FALSE.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_SECURITY_VIOLATION The Credentials.Data supplied by the caller is NULL,
+ or the AuthorityCertificate supplied by the caller was
+ invalid (could not be parsed),
+ or Platform-specific authorization failed, etc.
+ @retval EFI_DEVICE_ERROR An unexpected internal error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_VERIFY_OBJECT_WITH_CREDENTIAL) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ IN EFI_BIS_DATA *Credentials,
+ IN EFI_BIS_DATA *DataObject,
+ IN EFI_BIS_DATA *SectionName,
+ IN EFI_BIS_DATA *AuthorityCertificate,
+ OUT BOOLEAN *IsVerified
+ );
+
+/**
+ Retrieves a list of digital certificate identifier, digital signature algorithm, hash algorithm, and keylength
+ combinations that the platform supports.
+
+ @param AppHandle An opaque handle that identifies the caller¡¯s instance of initialization
+ of the BIS service.
+ @param SignatureInfo The function writes an allocated EFI_BIS_DATA* containing the array
+ of EFI_BIS_SIGNATURE_INFO structures representing the supported
+ digital certificate identifier, algorithm, and key length combinations.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NO_MAPPING The AppHandle parameter is not or is no longer a valid
+ application instance handle associated with the EFI_BIS protocol.
+ @retval EFI_OUT_OF_RESOURCES The function failed due to lack of memory or other resources.
+ @retval EFI_INVALID_PARAMETER The SignatureInfo parameter supplied by the caller is NULL
+ or an invalid memory reference.
+ @retval EFI_DEVICE_ERROR An unexpected internal error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BIS_GET_SIGNATURE_INFO) (
+ IN BIS_APPLICATION_HANDLE AppHandle,
+ OUT EFI_BIS_DATA **SignatureInfo
+ );
+
+struct _EFI_BIS_PROTOCOL {
+ EFI_BIS_INITIALIZE Initialize;
+ EFI_BIS_SHUTDOWN Shutdown;
+ EFI_BIS_FREE Free;
+ EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_CERTIFICATE GetBootObjectAuthorizationCertificate;
+ EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_CHECKFLAG GetBootObjectAuthorizationCheckFlag;
+ EFI_BIS_GET_BOOT_OBJECT_AUTHORIZATION_UPDATE_TOKEN GetBootObjectAuthorizationUpdateToken;
+ EFI_BIS_GET_SIGNATURE_INFO GetSignatureInfo;
+ EFI_BIS_UPDATE_BOOT_OBJECT_AUTHORIZATION UpdateBootObjectAuthorization;
+ EFI_BIS_VERIFY_BOOT_OBJECT VerifyBootObject;
+ EFI_BIS_VERIFY_OBJECT_WITH_CREDENTIAL VerifyObjectWithCredential;
+};
+
+extern EFI_GUID gEfiBisProtocolGuid;
+extern EFI_GUID gBootObjectAuthorizationParmsetGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/BlockIo.h b/MdePkg/Include/Protocol/BlockIo.h new file mode 100644 index 0000000000..4c7e8b4270 --- /dev/null +++ b/MdePkg/Include/Protocol/BlockIo.h @@ -0,0 +1,173 @@ +/** @file
+ Block IO protocol as defined in the EFI 1.0 specification.
+
+ The Block IO protocol is used to abstract block devices like hard drives,
+ DVD-ROMs and floppy drives.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BlockIo.h
+
+**/
+
+#ifndef __BLOCK_IO_H__
+#define __BLOCK_IO_H__
+
+#define EFI_BLOCK_IO_PROTOCOL_GUID \
+ { \
+ 0x964e5b21, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_BLOCK_IO_PROTOCOL EFI_BLOCK_IO_PROTOCOL;
+
+/**
+ Reset the Block Device.
+
+ @param This Protocol instance pointer.
+ @param ExtendedVerification Driver may perform diagnostics on reset.
+
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_DEVICE_ERROR The device is not functioning properly and could
+ not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BLOCK_RESET) (
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ )
+;
+
+/**
+ Read BufferSize bytes from Lba into Buffer.
+
+ @param This Protocol instance pointer.
+ @param MediaId Id of the media, changes every time the media is replaced.
+ @param Lba The starting Logical Block Address to read from
+ @param BufferSize Size of Buffer, must be a multiple of device block size.
+ @param Buffer Buffer containing read data
+
+ @retval EFI_SUCCESS The data was read correctly from the device.
+ @retval EFI_DEVICE_ERROR The device reported an error while performing the read.
+ @retval EFI_NO_MEDIA There is no media in the device.
+ @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device.
+ @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
+ @retval EFI_INVALID_PARAMETER The read request contains device addresses that are not
+ valid for the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BLOCK_READ) (
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Write BufferSize bytes from Lba into Buffer.
+
+ @param This Protocol instance pointer.
+ @param MediaId Id of the media, changes every time the media is replaced.
+ @param Lba The starting Logical Block Address to read from
+ @param BufferSize Size of Buffer, must be a multiple of device block size.
+ @param Buffer Buffer containing read data
+
+ @retval EFI_SUCCESS The data was written correctly to the device.
+ @retval EFI_WRITE_PROTECTED The device can not be written to.
+ @retval EFI_DEVICE_ERROR The device reported an error while performing the write.
+ @retval EFI_NO_MEDIA There is no media in the device.
+ @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device.
+ @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
+ @retval EFI_INVALID_PARAMETER The write request contains a LBA that is not
+ valid for the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BLOCK_WRITE) (
+ IN EFI_BLOCK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN EFI_LBA Lba,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ Flush the Block Device.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS All outstanding data was written to the device
+ @retval EFI_DEVICE_ERROR The device reported an error while writting back the data
+ @retval EFI_NO_MEDIA There is no media in the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BLOCK_FLUSH) (
+ IN EFI_BLOCK_IO_PROTOCOL *This
+ )
+;
+
+/**
+ Block IO read only mode data and updated only via members of BlockIO
+
+**/
+typedef struct {
+ UINT32 MediaId; ///< The curent media Id. If the media changes, this value is changed.
+ BOOLEAN RemovableMedia; ///< TRUE if the media is removable; otherwise, FALSE.
+ BOOLEAN MediaPresent; /**< TRUE if there is a media currently present in the device;
+ othersise, FALSE. THis field shows the media present status
+ as of the most recent ReadBlocks() or WriteBlocks() call.
+ **/
+ BOOLEAN LogicalPartition; /**< TRUE if LBA 0 is the first block of a partition; otherwise
+ FALSE. For media with only one partition this would be TRUE.
+ **/
+ BOOLEAN ReadOnly; /**< TRUE if the media is marked read-only otherwise, FALSE.
+ This field shows the read-only status as of the most recent WriteBlocks () call.
+ **/
+ BOOLEAN WriteCaching; ///< TRUE if the WriteBlock () function caches write data.
+
+ UINT32 BlockSize; /**< The intrinsic block size of the device. If the media changes, then
+ this field is updated.
+ **/
+ UINT32 IoAlign; ///< Supplies the alignment requirement for any buffer to read or write block(s).
+
+ EFI_LBA LastBlock; /**< The last logical block address on the device.
+ If the media changes, then this field is updated.
+ **/
+} EFI_BLOCK_IO_MEDIA;
+
+#define EFI_BLOCK_IO_PROTOCOL_REVISION 0x00010000
+
+struct _EFI_BLOCK_IO_PROTOCOL {
+ UINT64 Revision;
+
+ EFI_BLOCK_IO_MEDIA *Media;
+
+ EFI_BLOCK_RESET Reset;
+ EFI_BLOCK_READ ReadBlocks;
+ EFI_BLOCK_WRITE WriteBlocks;
+ EFI_BLOCK_FLUSH FlushBlocks;
+
+};
+
+extern EFI_GUID gEfiBlockIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/BootScriptSave.h b/MdePkg/Include/Protocol/BootScriptSave.h new file mode 100644 index 0000000000..496f79f012 --- /dev/null +++ b/MdePkg/Include/Protocol/BootScriptSave.h @@ -0,0 +1,110 @@ +/** @file
+ Definition of the Boot Script Save protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BootScriptSave.h
+
+ @par Revision Reference:
+ This protocol defined in the Boot Script Specification, Version 0.91.
+
+**/
+
+#ifndef _BOOT_SCRIPT_SAVE_PROTOCOL_H
+#define _BOOT_SCRIPT_SAVE_PROTOCOL_H
+
+//
+// S3 Save Protocol GUID
+//
+#define EFI_BOOT_SCRIPT_SAVE_PROTOCOL_GUID \
+ { \
+ 0x470e1529, 0xb79e, 0x4e32, {0xa0, 0xfe, 0x6a, 0x15, 0x6d, 0x29, 0xf9, 0xb2 } \
+ }
+
+typedef struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL EFI_BOOT_SCRIPT_SAVE_PROTOCOL;
+
+//
+// Protocol Member_Function
+//
+/**
+ Adds a record into a specified Framework boot script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+
+ @param TableName Name of the script table.Currently, the only meaningful
+ value is EFI_ACPI_S3_RESUME_SCRIPT_TABLE.
+
+ @param OpCode The operation code (opcode) number.
+
+ @param ... Argument list that is specific to each opcode.
+
+ @retval EFI_SUCCESS The operation succeeded. A record was added into the specified script table.
+
+ @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported.
+
+ @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_WRITE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ IN UINT16 OpCode,
+ ...
+ );
+
+/**
+ Closes the specified script table.
+
+ @param This A pointer to the EFI_BOOT_SCRIPT_SAVE_PROTOCOL instance.
+
+ @param TableName Name of the script table.
+
+ @param Address A pointer to the physical address where the table begins.
+
+ @retval EFI_SUCCESS The table was successfully returned.
+
+ @retval EFI_NOT_FOUND The specified table was not created previously.
+
+ @retval EFI_OUT_OF_RESOURCES Memory is insufficient to hold the reorganized boot script table.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BOOT_SCRIPT_CLOSE_TABLE) (
+ IN EFI_BOOT_SCRIPT_SAVE_PROTOCOL *This,
+ IN UINT16 TableName,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ );
+
+//
+// S3 Save Protocol data structure
+//
+/**
+ @par Protocol Description:
+ The EFI_BOOT_SCRIPT_SAVE_PROTOCOL publishes the Framework boot script abstractions
+ to store or record various boot scripts into boot script tables.
+
+ @param Write
+ Writes various boot scripts to a boot script table.
+
+ @param CloseTable
+ Retrieves and closes a script table.
+
+**/
+struct _EFI_BOOT_SCRIPT_SAVE_PROTOCOL {
+ EFI_BOOT_SCRIPT_WRITE Write;
+ EFI_BOOT_SCRIPT_CLOSE_TABLE CloseTable;
+};
+
+extern EFI_GUID gEfiBootScriptSaveGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/BusSpecificDriverOverride.h b/MdePkg/Include/Protocol/BusSpecificDriverOverride.h new file mode 100644 index 0000000000..c446940567 --- /dev/null +++ b/MdePkg/Include/Protocol/BusSpecificDriverOverride.h @@ -0,0 +1,66 @@ +/** @file
+ Bus Specific Driver Override protocol as defined in the EFI 1.1 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: BusSpecificDriverOverride.h
+
+**/
+
+#ifndef _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_
+#define _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_H_
+
+//
+// Global ID for the Bus Specific Driver Override Protocol
+//
+#define EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL_GUID \
+ { \
+ 0x3bc1b285, 0x8a15, 0x4a82, {0xaa, 0xbf, 0x4d, 0x7d, 0x13, 0xfb, 0x32, 0x65 } \
+ }
+
+typedef struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL;
+
+//
+// Prototypes for the Bus Specific Driver Override Protocol
+//
+
+/**
+ Uses a bus specific algorithm to retrieve a driver image handle for a controller.
+
+ @param This A pointer to the EFI_BUS_SPECIFIC_DRIVER_
+ OVERRIDE_PROTOCOL instance.
+ @param DriverImageHandle On input, a pointer to the previous driver image handle returned
+ by GetDriver(). On output, a pointer to the next driver
+ image handle. Passing in a NULL, will return the first driver
+ image handle.
+
+ @retval EFI_SUCCESS A bus specific override driver is returned in DriverImageHandle.
+ @retval EFI_NOT_FOUND The end of the list of override drivers was reached.
+ @retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
+ previous call to GetDriver().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER) (
+ IN EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN OUT EFI_HANDLE *DriverImageHandle
+ );
+
+//
+// Interface structure for the Bus Specific Driver Override Protocol
+//
+struct _EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL {
+ EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_GET_DRIVER GetDriver;
+};
+
+extern EFI_GUID gEfiBusSpecificDriverOverrideProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/ComponentName.h b/MdePkg/Include/Protocol/ComponentName.h new file mode 100644 index 0000000000..68fd31ba8b --- /dev/null +++ b/MdePkg/Include/Protocol/ComponentName.h @@ -0,0 +1,123 @@ +/** @file
+ EFI Component Name Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ComponentName.h
+
+**/
+
+#ifndef __EFI_COMPONENT_NAME_H__
+#define __EFI_COMPONENT_NAME_H__
+
+//
+// Global ID for the Component Name Protocol
+//
+#define EFI_COMPONENT_NAME_PROTOCOL_GUID \
+ { \
+ 0x107a772c, 0xd5e1, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_COMPONENT_NAME_PROTOCOL EFI_COMPONENT_NAME_PROTOCOL;
+
+
+/**
+ Retrieves a Unicode string that is the user readable name of the EFI Driver.
+
+ @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
+ @param Language A pointer to a three character ISO 639-2 language identifier.
+ This is the language of the driver name that that the caller
+ is requesting, and it must match one of the languages specified
+ in SupportedLanguages. The number of languages supported by a
+ driver is up to the driver writer.
+ @param DriverName A pointer to the Unicode string to return. This Unicode string
+ is the name of the driver specified by This in the language
+ specified by Language.
+
+ @retval EFI_SUCCESS The Unicode string for the Driver specified by This
+ and the language specified by Language was returned
+ in DriverName.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER DriverName is NULL.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the
+ language specified by Language.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_COMPONENT_NAME_GET_DRIVER_NAME) (
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN CHAR8 *Language,
+ OUT CHAR16 **DriverName
+ );
+
+
+/**
+ Retrieves a Unicode string that is the user readable name of the controller
+ that is being managed by an EFI Driver.
+
+ @param This A pointer to the EFI_COMPONENT_NAME_PROTOCOL instance.
+ @param ControllerHandle The handle of a controller that the driver specified by
+ This is managing. This handle specifies the controller
+ whose name is to be returned.
+ @param ChildHandle The handle of the child controller to retrieve the name
+ of. This is an optional parameter that may be NULL. It
+ will be NULL for device drivers. It will also be NULL
+ for a bus drivers that wish to retrieve the name of the
+ bus controller. It will not be NULL for a bus driver
+ that wishes to retrieve the name of a child controller.
+ @param Language A pointer to a three character ISO 639-2 language
+ identifier. This is the language of the controller name
+ that that the caller is requesting, and it must match one
+ of the languages specified in SupportedLanguages. The
+ number of languages supported by a driver is up to the
+ driver writer.
+ @param ControllerName A pointer to the Unicode string to return. This Unicode
+ string is the name of the controller specified by
+ ControllerHandle and ChildHandle in the language specified
+ by Language from the point of view of the driver specified
+ by This.
+
+ @retval EFI_SUCCESS The Unicode string for the user readable name in the
+ language specified by Language for the driver
+ specified by This was returned in DriverName.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER ControllerName is NULL.
+ @retval EFI_UNSUPPORTED The driver specified by This is not currently managing
+ the controller specified by ControllerHandle and
+ ChildHandle.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the
+ language specified by Language.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_COMPONENT_NAME_GET_CONTROLLER_NAME) (
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT CHAR16 **ControllerName
+ );
+
+//
+// Interface structure for the Component Name Protocol
+//
+struct _EFI_COMPONENT_NAME_PROTOCOL {
+ EFI_COMPONENT_NAME_GET_DRIVER_NAME GetDriverName;
+ EFI_COMPONENT_NAME_GET_CONTROLLER_NAME GetControllerName;
+ CHAR8 *SupportedLanguages;
+};
+
+extern EFI_GUID gEfiComponentNameProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/CpuIo.h b/MdePkg/Include/Protocol/CpuIo.h new file mode 100644 index 0000000000..619878c042 --- /dev/null +++ b/MdePkg/Include/Protocol/CpuIo.h @@ -0,0 +1,131 @@ +/** @file
+ This code abstracts the CPU IO Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: CpuIO.h
+
+ @par Revision Reference:
+ CPU IO Protocol is defined in Framework of EFI CPU IO Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _CPUIO_H_
+#define _CPUIO_H_
+
+#define EFI_CPU_IO_PROTOCOL_GUID \
+ { \
+ 0xB0732526, 0x38C8, 0x4b40, {0x88, 0x77, 0x61, 0xC7, 0xB0, 0x6A, 0xAC, 0x45 } \
+ }
+
+typedef struct _EFI_CPU_IO_PROTOCOL EFI_CPU_IO_PROTOCOL;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_WIDTH
+// *******************************************************
+//
+typedef enum {
+ EfiCpuIoWidthUint8,
+ EfiCpuIoWidthUint16,
+ EfiCpuIoWidthUint32,
+ EfiCpuIoWidthUint64,
+ EfiCpuIoWidthFifoUint8,
+ EfiCpuIoWidthFifoUint16,
+ EfiCpuIoWidthFifoUint32,
+ EfiCpuIoWidthFifoUint64,
+ EfiCpuIoWidthFillUint8,
+ EfiCpuIoWidthFillUint16,
+ EfiCpuIoWidthFillUint32,
+ EfiCpuIoWidthFillUint64,
+ EfiCpuIoWidthMaximum
+} EFI_CPU_IO_PROTOCOL_WIDTH;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_IO_MEM
+// *******************************************************
+//
+/**
+ Enables a driver to access memory-mapped registers in the EFI system memory space.
+ Or, Enables a driver to access registers in the EFI CPU I/O space.
+
+ @param This A pointer to the EFI_CPU_IO_PROTOCOL instance.
+
+ @param Width Signifies the width of the I/O or Memory operation.
+
+ @param Address The base address of the I/O or Memoryoperation.
+
+ @param Count The number of I/O or Memory operations to perform.
+ The number of bytes moved is Width size * Count, starting at Address.
+
+ @param Buffer For read operations, the destination buffer to store the results.
+ For write operations, the source buffer from which to write data.
+
+ @retval EFI_SUCCESS The data was read from or written to the EFI system.
+
+ @retval EFI_INVALID_PARAMETER Width is invalid for this EFI system.Or Buffer is NULL.
+
+ @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width.
+ Or,The address range specified by Address, Width, and Count is not valid for this EFI system.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CPU_IO_PROTOCOL_IO_MEM) (
+ IN EFI_CPU_IO_PROTOCOL *This,
+ IN EFI_CPU_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL_ACCESS
+// *******************************************************
+//
+typedef struct {
+ EFI_CPU_IO_PROTOCOL_IO_MEM Read;
+ EFI_CPU_IO_PROTOCOL_IO_MEM Write;
+} EFI_CPU_IO_PROTOCOL_ACCESS;
+
+//
+// *******************************************************
+// EFI_CPU_IO_PROTOCOL
+// *******************************************************
+//
+/**
+ @par Protocol Description:
+ Provides the basic memory and I/O interfaces that are used to abstract
+ accesses to devices in a system.
+
+ @param Mem.Read
+ Allows reads from memory-mapped I/O space.
+
+ @param Mem.Write
+ Allows writes to memory-mapped I/O space.
+
+ @param Io.Read
+ Allows reads from I/O space.
+
+ @param Io.Write
+ Allows writes to I/O space.
+
+**/
+struct _EFI_CPU_IO_PROTOCOL {
+ EFI_CPU_IO_PROTOCOL_ACCESS Mem;
+ EFI_CPU_IO_PROTOCOL_ACCESS Io;
+};
+
+extern EFI_GUID gEfiCpuIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DataHub.h b/MdePkg/Include/Protocol/DataHub.h new file mode 100644 index 0000000000..15d3cc618e --- /dev/null +++ b/MdePkg/Include/Protocol/DataHub.h @@ -0,0 +1,233 @@ +/** @file
+ The data hub protocol is used both by agents wishing to log
+ data and those wishing to be made aware of all information that
+ has been logged.
+
+ For more information please look at Intel Platform Innovation
+ Framework for EFI Data Hub Specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DataHub.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Data Hub Specification.
+ Version 0.9.
+
+**/
+
+#ifndef __DATA_HUB_H__
+#define __DATA_HUB_H__
+
+#define EFI_DATA_HUB_PROTOCOL_GUID \
+ { \
+ 0xae80d021, 0x618e, 0x11d4, {0xbc, 0xd7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81 } \
+ }
+
+//
+// EFI generic Data Hub Header
+//
+// A Data Record is an EFI_DATA_RECORD_HEADER followed by RecordSize bytes of
+// data. The format of the data is defined by the DataRecordGuid.
+//
+// If EFI_DATA_RECORD_HEADER is extended in the future the Version number must
+// change and the HeaderSize will change if the definition of
+// EFI_DATA_RECORD_HEADER is extended.
+//
+// The logger is responcible for initializing:
+// Version, HeaderSize, RecordSize, DataRecordGuid, DataRecordClass
+//
+// The Data Hub driver is responcible for initializing:
+// LogTime and LogMonotonicCount.
+//
+#define EFI_DATA_RECORD_HEADER_VERSION 0x0100
+typedef struct {
+ UINT16 Version;
+ UINT16 HeaderSize;
+ UINT32 RecordSize;
+ EFI_GUID DataRecordGuid;
+ EFI_GUID ProducerName;
+ UINT64 DataRecordClass;
+ EFI_TIME LogTime;
+ UINT64 LogMonotonicCount;
+} EFI_DATA_RECORD_HEADER;
+
+//
+// Definition of DataRecordClass. These are used to filter out class types
+// at a very high level. The DataRecordGuid still defines the format of
+// the data. See DateHub.doc for rules on what can and can not be a
+// new DataRecordClass
+//
+#define EFI_DATA_RECORD_CLASS_DEBUG 0x0000000000000001
+#define EFI_DATA_RECORD_CLASS_ERROR 0x0000000000000002
+#define EFI_DATA_RECORD_CLASS_DATA 0x0000000000000004
+#define EFI_DATA_RECORD_CLASS_PROGRESS_CODE 0x0000000000000008
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_DATA_HUB_PROTOCOL EFI_DATA_HUB_PROTOCOL;
+
+/**
+ Logs a data record to the system event log.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+
+ @param description
+
+ @param DataRecordGuid A GUID that indicates the format of the data passed into RawData.
+
+ @param ProducerName A GUID that indicates the identity of the caller to this API.
+
+ @param DataRecordClass This class indicates the generic type of the data record.
+
+ @param RawData The DataRecordGuid-defined data to be logged.
+
+ @param RawDataSize The size in bytes of RawData.
+
+ @retval EFI_SUCCESS Data was logged.
+
+ @retval EFI_OUT_OF_RESOURCES Data was not logged due to lack of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_LOG_DATA) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_GUID *DataRecordGuid,
+ IN EFI_GUID *ProducerName,
+ IN UINT64 DataRecordClass,
+ IN VOID *RawData,
+ IN UINT32 RawDataSize
+ );
+
+/**
+ Allows the system data log to be searched.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+
+ @param MonotonicCount On input, it specifies the Record to return.
+ An input of zero means to return the first record.
+
+ @param FilterDriver If FilterDriver is not passed in a MonotonicCount of zero,
+ it means to return the first data record. If FilterDriver is passed in,
+ then a MonotonicCount of zero means to return the first data not yet read
+ by FilterDriver.
+
+ @param Record Returns a dynamically allocated memory buffer with a data
+ record that matches MonotonicCount.
+
+ @retval EFI_SUCCESS Data was returned in Record.
+
+ @retval EFI_INVALID_PARAMETER FilterDriver was passed in but does not exist.
+
+ @retval EFI_NOT_FOUND MonotonicCount does not match any data record
+ in the system. If a MonotonicCount of zero was passed in, then no
+ data records exist in the system.
+
+ @retval EFI_OUT_OF_RESOURCES Record was not returned due to lack
+ of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_GET_NEXT_RECORD) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN OUT UINT64 *MonotonicCount,
+ IN EFI_EVENT *FilterDriver OPTIONAL,
+ OUT EFI_DATA_RECORD_HEADER **Record
+ );
+
+/**
+ Registers an event to be signaled every time a data record is logged in the system.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+
+ @param FilterEvent The EFI_EVENT to signal whenever data that matches
+ FilterClass is logged in the system.
+
+ @param FilterTpl The maximum EFI_TPL at which FilterEvent can be signaled.
+ It is strongly recommended that you use the lowest EFI_TPL possible.
+
+ @param FilterClass FilterEvent will be signaled whenever a bit
+ in EFI_DATA_RECORD_HEADER.DataRecordClass is also set in FilterClass.
+ If FilterClass is zero, no class-based filtering will be performed.
+
+ @param FilterDataRecordGuid FilterEvent will be signaled whenever
+ FilterDataRecordGuid matches EFI_DATA_RECORD_HEADER.DataRecordGuid.
+ If FilterDataRecordGuid is NULL, then no GUID-based filtering will be performed.
+
+ @retval EFI_SUCCESS The filter driver event was registered
+
+ @retval EFI_ALREADY_STARTED FilterEvent was previously registered and cannot be registered again.
+
+ @retval EFI_OUT_OF_RESOURCES The filter driver event was not registered
+ due to lack of system resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_REGISTER_FILTER_DRIVER) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent,
+ IN EFI_TPL FilterTpl,
+ IN UINT64 FilterClass,
+ IN EFI_GUID *FilterDataRecordGuid OPTIONAL
+ );
+
+/**
+ Stops a filter driver from being notified when data records are logged.
+
+ @param This The EFI_DATA_HUB_PROTOCOL instance.
+
+ @param FilterEvent The EFI_EVENT to remove from the list of events to be
+ signaled every time errors are logged.
+
+ @retval EFI_SUCCESS The filter driver represented by FilterEvent was shut off.
+
+ @retval EFI_NOT_FOUND FilterEvent did not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER) (
+ IN EFI_DATA_HUB_PROTOCOL *This,
+ IN EFI_EVENT FilterEvent
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used to log information and register filter drivers
+ to receive data records.
+
+ @param LogData
+ Logs a data record.
+
+ @param GetNextDataRecord
+ Gets a data record. Used both to view the memory-based log and to
+ get information about which data records have been consumed by a filter driver.
+
+ @param RegisterFilterDriver
+ Allows the registration of an EFI event to act as a filter driver for all data records that are logged.
+
+ @param UnregisterFilterDriver
+ Used to remove a filter driver that was added with RegisterFilterDriver().
+
+**/
+struct _EFI_DATA_HUB_PROTOCOL {
+ EFI_DATA_HUB_LOG_DATA LogData;
+ EFI_DATA_HUB_GET_NEXT_RECORD GetNextRecord;
+ EFI_DATA_HUB_REGISTER_FILTER_DRIVER RegisterFilterDriver;
+ EFI_DATA_HUB_UNREGISTER_FILTER_DRIVER UnregisterFilterDriver;
+};
+
+extern EFI_GUID gEfiDataHubProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DebugPort.h b/MdePkg/Include/Protocol/DebugPort.h new file mode 100644 index 0000000000..ceffaf6954 --- /dev/null +++ b/MdePkg/Include/Protocol/DebugPort.h @@ -0,0 +1,141 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DebugPort.h
+
+**/
+
+#ifndef __DEBUG_PORT_H__
+#define __DEBUG_PORT_H__
+
+
+//
+// DebugPortIo protocol {EBA4E8D2-3858-41EC-A281-2647BA9660D0}
+//
+#define EFI_DEBUGPORT_PROTOCOL_GUID \
+ { \
+ 0xEBA4E8D2, 0x3858, 0x41EC, {0xA2, 0x81, 0x26, 0x47, 0xBA, 0x96, 0x60, 0xD0 } \
+ }
+
+extern EFI_GUID gEfiDebugPortProtocolGuid;
+
+typedef struct _EFI_DEBUGPORT_PROTOCOL EFI_DEBUGPORT_PROTOCOL;
+
+//
+// DebugPort member functions
+//
+
+/**
+ Resets the debugport.
+
+ @param This A pointer to the EFI_DEBUGPORT_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The debugport device was reset and is in usable state.
+ @retval EFI_DEVICE_ERROR The debugport device could not be reset and is unusable.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DEBUGPORT_RESET) (
+ IN EFI_DEBUGPORT_PROTOCOL *This
+ );
+
+/**
+ Writes data to the debugport.
+
+ @param This A pointer to the EFI_DEBUGPORT_PROTOCOL instance.
+ @param Timeout The number of microseconds to wait before timing out a write operation.
+ @param BufferSize On input, the requested number of bytes of data to write. On output, the
+ number of bytes of data actually written.
+ @param Buffer A pointer to a buffer containing the data to write.
+
+ @retval EFI_SUCCESS The data was written.
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_TIMEOUT The data write was stopped due to a timeout.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DEBUGPORT_WRITE) (
+ IN EFI_DEBUGPORT_PROTOCOL *This,
+ IN UINT32 Timeout,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ );
+
+/**
+ Reads data from the debugport.
+
+ @param This A pointer to the EFI_DEBUGPORT_PROTOCOL instance.
+ @param Timeout The number of microseconds to wait before timing out a read operation.
+ @param BufferSize On input, the requested number of bytes of data to read. On output, the
+ number of bytes of data actually number of bytes
+ of data read and returned in Buffer.
+ @param Buffer A pointer to a buffer into which the data read will be saved.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_TIMEOUT The operation was stopped due to a timeout or overrun.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DEBUGPORT_READ) (
+ IN EFI_DEBUGPORT_PROTOCOL *This,
+ IN UINT32 Timeout,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Checks to see if any data is available to be read from the debugport device.
+
+ @param This A pointer to the EFI_DEBUGPORT_PROTOCOL instance.
+
+ @retval EFI_SUCCESS At least one byte of data is available to be read.
+ @retval EFI_DEVICE_ERROR The debugport device is not functioning correctly.
+ @retval EFI_NOT_READY No data is available to be read.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DEBUGPORT_POLL) (
+ IN EFI_DEBUGPORT_PROTOCOL *This
+ );
+
+//
+// DebugPort protocol definition
+//
+struct _EFI_DEBUGPORT_PROTOCOL {
+ EFI_DEBUGPORT_RESET Reset;
+ EFI_DEBUGPORT_WRITE Write;
+ EFI_DEBUGPORT_READ Read;
+ EFI_DEBUGPORT_POLL Poll;
+};
+
+//
+// DEBUGPORT variable definitions...
+//
+#define EFI_DEBUGPORT_VARIABLE_NAME L"DEBUGPORT"
+#define EFI_DEBUGPORT_VARIABLE_GUID EFI_DEBUGPORT_PROTOCOL_GUID
+#define gEfiDebugPortVariableGuid gEfiDebugPortProtocolGuid
+
+//
+// DebugPort device path definitions...
+//
+#define DEVICE_PATH_MESSAGING_DEBUGPORT EFI_DEBUGPORT_PROTOCOL_GUID
+#define gEfiDebugPortDevicePathGuid gEfiDebugPortProtocolGuid
+
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID Guid;
+} DEBUGPORT_DEVICE_PATH;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DebugSupport.h b/MdePkg/Include/Protocol/DebugSupport.h new file mode 100644 index 0000000000..1b782cf6a5 --- /dev/null +++ b/MdePkg/Include/Protocol/DebugSupport.h @@ -0,0 +1,517 @@ +/** @file
+ DebugSupport protocol and supporting definitions as defined in the EFI 1.1
+ specification.
+
+ The DebugSupport protocol is used by source level debuggers to abstract the
+ processor and handle context save and restore operations.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DebugSupport.h
+
+**/
+
+#ifndef __DEBUG_SUPPORT_H__
+#define __DEBUG_SUPPORT_H__
+
+typedef struct _EFI_DEBUG_SUPPORT_PROTOCOL EFI_DEBUG_SUPPORT_PROTOCOL;
+
+//
+// Debug Support protocol {2755590C-6F3C-42FA-9EA4-A3BA543CDA25}
+//
+#define EFI_DEBUG_SUPPORT_PROTOCOL_GUID \
+ { \
+ 0x2755590C, 0x6F3C, 0x42FA, {0x9E, 0xA4, 0xA3, 0xBA, 0x54, 0x3C, 0xDA, 0x25 } \
+ }
+
+//
+// Debug Support definitions
+//
+typedef INTN EFI_EXCEPTION_TYPE;
+
+//
+// IA-32 processor exception types
+//
+#define EXCEPT_IA32_DIVIDE_ERROR 0
+#define EXCEPT_IA32_DEBUG 1
+#define EXCEPT_IA32_NMI 2
+#define EXCEPT_IA32_BREAKPOINT 3
+#define EXCEPT_IA32_OVERFLOW 4
+#define EXCEPT_IA32_BOUND 5
+#define EXCEPT_IA32_INVALID_OPCODE 6
+#define EXCEPT_IA32_DOUBLE_FAULT 8
+#define EXCEPT_IA32_INVALID_TSS 10
+#define EXCEPT_IA32_SEG_NOT_PRESENT 11
+#define EXCEPT_IA32_STACK_FAULT 12
+#define EXCEPT_IA32_GP_FAULT 13
+#define EXCEPT_IA32_PAGE_FAULT 14
+#define EXCEPT_IA32_FP_ERROR 16
+#define EXCEPT_IA32_ALIGNMENT_CHECK 17
+#define EXCEPT_IA32_MACHINE_CHECK 18
+#define EXCEPT_IA32_SIMD 19
+
+//
+// IA-32 processor context definition
+//
+//
+// FXSAVE_STATE
+// FP / MMX / XMM registers (see fxrstor instruction definition)
+//
+typedef struct {
+ UINT16 Fcw;
+ UINT16 Fsw;
+ UINT16 Ftw;
+ UINT16 Opcode;
+ UINT32 Eip;
+ UINT16 Cs;
+ UINT16 Reserved1;
+ UINT32 DataOffset;
+ UINT16 Ds;
+ UINT8 Reserved2[10];
+ UINT8 St0Mm0[10], Reserved3[6];
+ UINT8 St0Mm1[10], Reserved4[6];
+ UINT8 St0Mm2[10], Reserved5[6];
+ UINT8 St0Mm3[10], Reserved6[6];
+ UINT8 St0Mm4[10], Reserved7[6];
+ UINT8 St0Mm5[10], Reserved8[6];
+ UINT8 St0Mm6[10], Reserved9[6];
+ UINT8 St0Mm7[10], Reserved10[6];
+ UINT8 Reserved11[22 * 16];
+} EFI_FX_SAVE_STATE_IA32;
+
+typedef struct {
+ UINT32 ExceptionData;
+ EFI_FX_SAVE_STATE_IA32 FxSaveState;
+ UINT32 Dr0;
+ UINT32 Dr1;
+ UINT32 Dr2;
+ UINT32 Dr3;
+ UINT32 Dr6;
+ UINT32 Dr7;
+ UINT32 Cr0;
+ UINT32 Cr1;
+ UINT32 Cr2;
+ UINT32 Cr3;
+ UINT32 Cr4;
+ UINT32 Eflags;
+ UINT32 Ldtr;
+ UINT32 Tr;
+ UINT32 Gdtr[2];
+ UINT32 Idtr[2];
+ UINT32 Eip;
+ UINT32 Gs;
+ UINT32 Fs;
+ UINT32 Es;
+ UINT32 Ds;
+ UINT32 Cs;
+ UINT32 Ss;
+ UINT32 Edi;
+ UINT32 Esi;
+ UINT32 Ebp;
+ UINT32 Esp;
+ UINT32 Ebx;
+ UINT32 Edx;
+ UINT32 Ecx;
+ UINT32 Eax;
+} EFI_SYSTEM_CONTEXT_IA32;
+
+//
+// IPF processor exception types
+//
+#define EXCEPT_IPF_VHTP_TRANSLATION 0
+#define EXCEPT_IPF_INSTRUCTION_TLB 1
+#define EXCEPT_IPF_DATA_TLB 2
+#define EXCEPT_IPF_ALT_INSTRUCTION_TLB 3
+#define EXCEPT_IPF_ALT_DATA_TLB 4
+#define EXCEPT_IPF_DATA_NESTED_TLB 5
+#define EXCEPT_IPF_INSTRUCTION_KEY_MISSED 6
+#define EXCEPT_IPF_DATA_KEY_MISSED 7
+#define EXCEPT_IPF_DIRTY_BIT 8
+#define EXCEPT_IPF_INSTRUCTION_ACCESS_BIT 9
+#define EXCEPT_IPF_DATA_ACCESS_BIT 10
+#define EXCEPT_IPF_BREAKPOINT 11
+#define EXCEPT_IPF_EXTERNAL_INTERRUPT 12
+//
+// 13 - 19 reserved
+//
+#define EXCEPT_IPF_PAGE_NOT_PRESENT 20
+#define EXCEPT_IPF_KEY_PERMISSION 21
+#define EXCEPT_IPF_INSTRUCTION_ACCESS_RIGHTS 22
+#define EXCEPT_IPF_DATA_ACCESS_RIGHTS 23
+#define EXCEPT_IPF_GENERAL_EXCEPTION 24
+#define EXCEPT_IPF_DISABLED_FP_REGISTER 25
+#define EXCEPT_IPF_NAT_CONSUMPTION 26
+#define EXCEPT_IPF_SPECULATION 27
+//
+// 28 reserved
+//
+#define EXCEPT_IPF_DEBUG 29
+#define EXCEPT_IPF_UNALIGNED_REFERENCE 30
+#define EXCEPT_IPF_UNSUPPORTED_DATA_REFERENCE 31
+#define EXCEPT_IPF_FP_FAULT 32
+#define EXCEPT_IPF_FP_TRAP 33
+#define EXCEPT_IPF_LOWER_PRIVILEGE_TRANSFER_TRAP 34
+#define EXCEPT_IPF_TAKEN_BRANCH 35
+#define EXCEPT_IPF_SINGLE_STEP 36
+//
+// 37 - 44 reserved
+//
+#define EXCEPT_IPF_IA32_EXCEPTION 45
+#define EXCEPT_IPF_IA32_INTERCEPT 46
+#define EXCEPT_IPF_IA32_INTERRUPT 47
+
+//
+// IPF processor context definition
+//
+typedef struct {
+ //
+ // The first reserved field is necessary to preserve alignment for the correct
+ // bits in UNAT and to insure F2 is 16 byte aligned..
+ //
+ UINT64 Reserved;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 R8;
+ UINT64 R9;
+ UINT64 R10;
+ UINT64 R11;
+ UINT64 R12;
+ UINT64 R13;
+ UINT64 R14;
+ UINT64 R15;
+ UINT64 R16;
+ UINT64 R17;
+ UINT64 R18;
+ UINT64 R19;
+ UINT64 R20;
+ UINT64 R21;
+ UINT64 R22;
+ UINT64 R23;
+ UINT64 R24;
+ UINT64 R25;
+ UINT64 R26;
+ UINT64 R27;
+ UINT64 R28;
+ UINT64 R29;
+ UINT64 R30;
+ UINT64 R31;
+
+ UINT64 F2[2];
+ UINT64 F3[2];
+ UINT64 F4[2];
+ UINT64 F5[2];
+ UINT64 F6[2];
+ UINT64 F7[2];
+ UINT64 F8[2];
+ UINT64 F9[2];
+ UINT64 F10[2];
+ UINT64 F11[2];
+ UINT64 F12[2];
+ UINT64 F13[2];
+ UINT64 F14[2];
+ UINT64 F15[2];
+ UINT64 F16[2];
+ UINT64 F17[2];
+ UINT64 F18[2];
+ UINT64 F19[2];
+ UINT64 F20[2];
+ UINT64 F21[2];
+ UINT64 F22[2];
+ UINT64 F23[2];
+ UINT64 F24[2];
+ UINT64 F25[2];
+ UINT64 F26[2];
+ UINT64 F27[2];
+ UINT64 F28[2];
+ UINT64 F29[2];
+ UINT64 F30[2];
+ UINT64 F31[2];
+
+ UINT64 Pr;
+
+ UINT64 B0;
+ UINT64 B1;
+ UINT64 B2;
+ UINT64 B3;
+ UINT64 B4;
+ UINT64 B5;
+ UINT64 B6;
+ UINT64 B7;
+
+ //
+ // application registers
+ //
+ UINT64 ArRsc;
+ UINT64 ArBsp;
+ UINT64 ArBspstore;
+ UINT64 ArRnat;
+
+ UINT64 ArFcr;
+
+ UINT64 ArEflag;
+ UINT64 ArCsd;
+ UINT64 ArSsd;
+ UINT64 ArCflg;
+ UINT64 ArFsr;
+ UINT64 ArFir;
+ UINT64 ArFdr;
+
+ UINT64 ArCcv;
+
+ UINT64 ArUnat;
+
+ UINT64 ArFpsr;
+
+ UINT64 ArPfs;
+ UINT64 ArLc;
+ UINT64 ArEc;
+
+ //
+ // control registers
+ //
+ UINT64 CrDcr;
+ UINT64 CrItm;
+ UINT64 CrIva;
+ UINT64 CrPta;
+ UINT64 CrIpsr;
+ UINT64 CrIsr;
+ UINT64 CrIip;
+ UINT64 CrIfa;
+ UINT64 CrItir;
+ UINT64 CrIipa;
+ UINT64 CrIfs;
+ UINT64 CrIim;
+ UINT64 CrIha;
+
+ //
+ // debug registers
+ //
+ UINT64 Dbr0;
+ UINT64 Dbr1;
+ UINT64 Dbr2;
+ UINT64 Dbr3;
+ UINT64 Dbr4;
+ UINT64 Dbr5;
+ UINT64 Dbr6;
+ UINT64 Dbr7;
+
+ UINT64 Ibr0;
+ UINT64 Ibr1;
+ UINT64 Ibr2;
+ UINT64 Ibr3;
+ UINT64 Ibr4;
+ UINT64 Ibr5;
+ UINT64 Ibr6;
+ UINT64 Ibr7;
+
+ //
+ // virtual registers - nat bits for R1-R31
+ //
+ UINT64 IntNat;
+
+} EFI_SYSTEM_CONTEXT_IPF;
+
+//
+// EBC processor exception types
+//
+#define EXCEPT_EBC_UNDEFINED 0
+#define EXCEPT_EBC_DIVIDE_ERROR 1
+#define EXCEPT_EBC_DEBUG 2
+#define EXCEPT_EBC_BREAKPOINT 3
+#define EXCEPT_EBC_OVERFLOW 4
+#define EXCEPT_EBC_INVALID_OPCODE 5 // opcode out of range
+#define EXCEPT_EBC_STACK_FAULT 6
+#define EXCEPT_EBC_ALIGNMENT_CHECK 7
+#define EXCEPT_EBC_INSTRUCTION_ENCODING 8 // malformed instruction
+#define EXCEPT_EBC_BAD_BREAK 9 // BREAK 0 or undefined BREAK
+#define EXCEPT_EBC_STEP 10 // to support debug stepping
+//
+// For coding convenience, define the maximum valid EBC exception.
+//
+#define MAX_EBC_EXCEPTION EXCEPT_EBC_STEP
+
+//
+// EBC processor context definition
+//
+typedef struct {
+ UINT64 R0;
+ UINT64 R1;
+ UINT64 R2;
+ UINT64 R3;
+ UINT64 R4;
+ UINT64 R5;
+ UINT64 R6;
+ UINT64 R7;
+ UINT64 Flags;
+ UINT64 ControlFlags;
+ UINT64 Ip;
+} EFI_SYSTEM_CONTEXT_EBC;
+
+//
+// Universal EFI_SYSTEM_CONTEXT definition
+//
+typedef union {
+ EFI_SYSTEM_CONTEXT_EBC *SystemContextEbc;
+ EFI_SYSTEM_CONTEXT_IA32 *SystemContextIa32;
+ EFI_SYSTEM_CONTEXT_IPF *SystemContextIpf;
+} EFI_SYSTEM_CONTEXT;
+
+//
+// DebugSupport callback function prototypes
+//
+
+/**
+ Registers and enables an exception callback function for the specified exception.
+
+ @param ExceptionType Exception types in EBC, IA-32, X64, or IPF
+ @param SystemContext Exception content.
+
+**/
+typedef
+VOID
+(*EFI_EXCEPTION_CALLBACK) (
+ IN EFI_EXCEPTION_TYPE ExceptionType,
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ );
+
+/**
+ Registers and enables the on-target debug agent¡¯s periodic entry point.
+
+ @param SystemContext Exception content.
+
+**/
+typedef
+VOID
+(*EFI_PERIODIC_CALLBACK) (
+ IN OUT EFI_SYSTEM_CONTEXT SystemContext
+ );
+
+//
+// Machine type definition
+//
+typedef enum {
+ IsaIa32 = IMAGE_FILE_MACHINE_I386, // 0x014C
+ IsaX64 = IMAGE_FILE_MACHINE_X64, // 0x8664
+ IsaIpf = IMAGE_FILE_MACHINE_IA64, // 0x0200
+ IsaEbc = IMAGE_FILE_MACHINE_EBC // 0x0EBC
+} EFI_INSTRUCTION_SET_ARCHITECTURE;
+
+
+//
+// DebugSupport member function definitions
+//
+
+/**
+ Returns the maximum value that may be used for the ProcessorIndex parameter in
+ RegisterPeriodicCallback() and RegisterExceptionCallback().
+
+ @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
+ @param MaxProcessorIndex Pointer to a caller-allocated UINTN in which the maximum supported
+ processor index is returned.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_MAXIMUM_PROCESSOR_INDEX) (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ OUT UINTN *MaxProcessorIndex
+ );
+
+/**
+ Registers a function to be called back periodically in interrupt context.
+
+ @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
+ @param ProcessorIndex Specifies which processor the callback function applies to.
+ @param PeriodicCallback A pointer to a function of type PERIODIC_CALLBACK that is the main
+ periodic entry point of the debug agent.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
+ function was previously registered.
+ @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
+ function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REGISTER_PERIODIC_CALLBACK) (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_PERIODIC_CALLBACK PeriodicCallback
+ );
+
+/**
+ Registers a function to be called when a given processor exception occurs.
+
+ @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
+ @param ProcessorIndex Specifies which processor the callback function applies to.
+ @param PeriodicCallback A pointer to a function of type EXCEPTION_CALLBACK that is called
+ when the processor exception specified by ExceptionType occurs.
+ @param ExceptionType Specifies which processor exception to hook.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_ALREADY_STARTED Non-NULL PeriodicCallback parameter when a callback
+ function was previously registered.
+ @retval EFI_OUT_OF_RESOURCES System has insufficient memory resources to register new callback
+ function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REGISTER_EXCEPTION_CALLBACK) (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN EFI_EXCEPTION_CALLBACK ExceptionCallback,
+ IN EFI_EXCEPTION_TYPE ExceptionType
+ );
+
+/**
+ Invalidates processor instruction cache for a memory range. Subsequent execution in this range
+ causes a fresh memory fetch to retrieve code to be executed.
+
+ @param This A pointer to the EFI_DEBUG_SUPPORT_PROTOCOL instance.
+ @param ProcessorIndex Specifies which processor¡¯s instruction cache is to be invalidated.
+ @param Start Specifies the physical base of the memory range to be invalidated.
+ @param Length Specifies the minimum number of bytes in the processor¡¯s instruction
+ cache to invalidate.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INVALIDATE_INSTRUCTION_CACHE) (
+ IN EFI_DEBUG_SUPPORT_PROTOCOL *This,
+ IN UINTN ProcessorIndex,
+ IN VOID *Start,
+ IN UINT64 Length
+ );
+
+//
+// DebugSupport protocol definition
+//
+struct _EFI_DEBUG_SUPPORT_PROTOCOL {
+ EFI_INSTRUCTION_SET_ARCHITECTURE Isa;
+ EFI_GET_MAXIMUM_PROCESSOR_INDEX GetMaximumProcessorIndex;
+ EFI_REGISTER_PERIODIC_CALLBACK RegisterPeriodicCallback;
+ EFI_REGISTER_EXCEPTION_CALLBACK RegisterExceptionCallback;
+ EFI_INVALIDATE_INSTRUCTION_CACHE InvalidateInstructionCache;
+};
+
+extern EFI_GUID gEfiDebugSupportProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Decompress.h b/MdePkg/Include/Protocol/Decompress.h new file mode 100644 index 0000000000..7c295f310e --- /dev/null +++ b/MdePkg/Include/Protocol/Decompress.h @@ -0,0 +1,121 @@ +/** @file
+ The Decompress Protocol Interface
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Decompress.h
+
+**/
+
+#ifndef __DECOMPRESS_H__
+#define __DECOMPRESS_H__
+
+#define EFI_DECOMPRESS_PROTOCOL_GUID \
+ { \
+ 0xd8117cfe, 0x94a6, 0x11d4, {0x9a, 0x3a, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_DECOMPRESS_PROTOCOL EFI_DECOMPRESS_PROTOCOL;
+
+/**
+ The GetInfo() function retrieves the size of the uncompressed buffer
+ and the temporary scratch buffer required to decompress the buffer
+ specified by Source and SourceSize. If the size of the uncompressed
+ buffer or the size of the scratch buffer cannot be determined from
+ the compressed data specified by Source and SourceData, then
+ EFI_INVALID_PARAMETER is returned. Otherwise, the size of the uncompressed
+ buffer is returned in DestinationSize, the size of the scratch buffer is
+ returned in ScratchSize, and EFI_SUCCESS is returned.
+
+ The GetInfo() function does not have scratch buffer available to perform
+ a thorough checking of the validity of the source data. It just retrieves
+ the 'Original Size' field from the beginning bytes of the source data and
+ output it as DestinationSize. And ScratchSize is specific to the decompression
+ implementation.
+
+ @param This The protocol instance pointer
+ @param Source The source buffer containing the compressed data.
+ @param SourceSize The size, in bytes, of source buffer.
+ @param DestinationSize A pointer to the size, in bytes, of the uncompressed buffer
+ that will be generated when the compressed buffer specified
+ by Source and SourceSize is decompressed.
+ @param ScratchSize A pointer to the size, in bytes, of the scratch buffer that
+ is required to decompress the compressed buffer specified by
+ Source and SourceSize.
+
+ @retval EFI_SUCCESS The size of the uncompressed data was returned in DestinationSize
+ and the size of the scratch buffer was returned in ScratchSize.
+ @retval EFI_INVALID_PARAMETER The size of the uncompressed data or the size of the scratch
+ buffer cannot be determined from the compressed data specified by
+ Source and SourceData.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DECOMPRESS_GET_INFO) (
+ IN EFI_DECOMPRESS_PROTOCOL *This,
+ IN VOID *Source,
+ IN UINT32 SourceSize,
+ OUT UINT32 *DestinationSize,
+ OUT UINT32 *ScratchSize
+ );
+
+/**
+ The Decompress() function extracts decompressed data to its original form.
+
+ This protocol is designed so that the decompression algorithm can be
+ implemented without using any memory services. As a result, the
+ Decompress() function is not allowed to call AllocatePool() or
+ AllocatePages() in its implementation. It is the caller's responsibility
+ to allocate and free the Destination and Scratch buffers.
+
+ If the compressed source data specified by Source and SourceSize is
+ sucessfully decompressed into Destination, then EFI_SUCCESS is returned.
+ If the compressed source data specified by Source and SourceSize is not in
+ a valid compressed data format, then EFI_INVALID_PARAMETER is returned.
+
+ @param This The protocol instance pointer
+ @param Source The source buffer containing the compressed data.
+ @param SourceSize The size of source data.
+ @param Destination On output, the destination buffer that contains
+ the uncompressed data.
+ @param DestinationSize The size of destination buffer. The size of destination
+ buffer needed is obtained from GetInfo().
+ @param Scratch A temporary scratch buffer that is used to perform the
+ decompression.
+ @param ScratchSize The size of scratch buffer. The size of scratch buffer needed
+ is obtained from GetInfo().
+
+ @retval EFI_SUCCESS Decompression completed successfully, and the uncompressed
+ buffer is returned in Destination.
+ @retval EFI_INVALID_PARAMETER The source buffer specified by Source and SourceSize is
+ corrupted (not in a valid compressed format).
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DECOMPRESS_DECOMPRESS) (
+ IN EFI_DECOMPRESS_PROTOCOL *This,
+ IN VOID *Source,
+ IN UINT32 SourceSize,
+ IN OUT VOID *Destination,
+ IN UINT32 DestinationSize,
+ IN OUT VOID *Scratch,
+ IN UINT32 ScratchSize
+ );
+
+struct _EFI_DECOMPRESS_PROTOCOL {
+ EFI_DECOMPRESS_GET_INFO GetInfo;
+ EFI_DECOMPRESS_DECOMPRESS Decompress;
+};
+
+extern EFI_GUID gEfiDecompressProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DeviceIo.h b/MdePkg/Include/Protocol/DeviceIo.h new file mode 100644 index 0000000000..0d70632fd9 --- /dev/null +++ b/MdePkg/Include/Protocol/DeviceIo.h @@ -0,0 +1,222 @@ +/** @file
+ Device IO protocol as defined in the EFI 1.0 specification.
+
+ Device IO is used to abstract hardware access to devices. It includes
+ memory mapped IO, IO, PCI Config space, and DMA.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DeviceIo.h
+
+**/
+
+#ifndef __DEVICE_IO_H__
+#define __DEVICE_IO_H__
+
+#define EFI_DEVICE_IO_PROTOCOL_GUID \
+ { \
+ 0xaf6ac311, 0x84c3, 0x11d2, {0x8e, 0x3c, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct _EFI_DEVICE_IO_PROTOCOL EFI_DEVICE_IO_PROTOCOL;
+
+typedef enum {
+ IO_UINT8,
+ IO_UINT16,
+ IO_UINT32,
+ IO_UINT64,
+ MMIO_COPY_UINT8,
+ MMIO_COPY_UINT16,
+ MMIO_COPY_UINT32,
+ MMIO_COPY_UINT64
+} EFI_IO_WIDTH;
+
+/**
+ Enables a driver to access device registers in the appropriate memory or I/O space.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param Width Signifies the width of the I/O operations.
+ @param Address The base address of the I/O operations.
+ @param Count The number of I/O operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results. For write
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the device.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Width is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DEVICE_IO) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN EFI_IO_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_DEVICE_IO Read;
+ EFI_DEVICE_IO Write;
+} EFI_IO_ACCESS;
+
+/**
+ Provides an EFI Device Path for a PCI device with the given PCI configuration space address.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param PciAddress The PCI configuration space address of the device whose Device Path
+ is going to be returned.
+ @param PciDevicePath A pointer to the pointer for the EFI Device Path for PciAddress.
+ Memory for the Device Path is allocated from the pool.
+
+ @retval EFI_SUCCESS The PciDevicePath returns a pointer to a valid EFI Device Path.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_UNSUPPORTED The PciAddress does not map to a valid EFI Device Path.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_DEVICE_PATH) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN UINT64 PciAddress,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **PciDevicePath
+ );
+
+typedef enum {
+ EfiBusMasterRead,
+ EfiBusMasterWrite,
+ EfiBusMasterCommonBuffer
+} EFI_IO_OPERATION_TYPE;
+
+/**
+ Provides the device-specific addresses needed to access system memory.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param Operation Indicates if the bus master is going to read or write to system memory.
+ @param HostAddress The system memory address to map to the device.
+ @param NumberOfBytes On input the number of bytes to map.
+ @param DeviceAddress The resulting map address for the bus master device to use to access the
+ hosts HostAddress.
+ @param Mapping A resulting value to pass to Unmap().
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
+ @retval EFI_INVALID_PARAMETER The Operation or HostAddress is undefined.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IO_MAP) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN EFI_IO_OPERATION_TYPE Operation,
+ IN EFI_PHYSICAL_ADDRESS *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
+ );
+
+/**
+ Completes the Map() operation and releases any corresponding resources.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param Mapping A resulting value to pass to Unmap().
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IO_UNMAP) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN VOID *Mapping
+ );
+
+/**
+ Allocates pages that are suitable for an EFIBusMasterCommonBuffer mapping.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param Type The type allocation to perform.
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or
+ EfiRuntimeServicesData.
+ @param Pages The number of pages to allocate.
+ @param HostAddress A pointer to store the base address of the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+ @retval EFI_INVALID_PARAMETER The requested memory type is invalid.
+ @retval EFI_UNSUPPORTED The requested HostAddress is not supported on
+ this platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IO_ALLOCATE_BUFFER) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT EFI_PHYSICAL_ADDRESS *HostAddress
+ );
+
+/**
+ Flushes any posted write data to the device.
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+
+ @retval EFI_SUCCESS The buffers were flushed.
+ @retval EFI_DEVICE_ERROR The buffers were not flushed due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IO_FLUSH) (
+ IN EFI_DEVICE_IO_PROTOCOL *This
+ );
+
+/**
+ Frees pages that were allocated with AllocateBuffer().
+
+ @param This A pointer to the EFI_DEVICE_IO_INTERFACE instance.
+ @param Pages The number of pages to free.
+ @param HostAddress The base address of the range to free.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with
+ AllocateBuffer().
+ @retval EFI_INVALID_PARAMETER HostAddress is not page aligned or Pages is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IO_FREE_BUFFER) (
+ IN EFI_DEVICE_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN EFI_PHYSICAL_ADDRESS HostAddress
+ );
+
+struct _EFI_DEVICE_IO_PROTOCOL {
+ EFI_IO_ACCESS Mem;
+ EFI_IO_ACCESS Io;
+ EFI_IO_ACCESS Pci;
+ EFI_IO_MAP Map;
+ EFI_PCI_DEVICE_PATH PciDevicePath;
+ EFI_IO_UNMAP Unmap;
+ EFI_IO_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_IO_FLUSH Flush;
+ EFI_IO_FREE_BUFFER FreeBuffer;
+};
+
+extern EFI_GUID gEfiDeviceIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DevicePath.h b/MdePkg/Include/Protocol/DevicePath.h new file mode 100644 index 0000000000..d01999904f --- /dev/null +++ b/MdePkg/Include/Protocol/DevicePath.h @@ -0,0 +1,94 @@ +/** @file
+ The device path protocol as defined in EFI 1.0.
+
+ The device path represents a programatic path to a device. It's the view
+ from a software point of view. It also must persist from boot to boot, so
+ it can not contain things like PCI bus numbers that change from boot to boot.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DevicePath.h
+
+**/
+
+#ifndef __EFI_DEVICE_PATH_PROTOCOL_H__
+#define __EFI_DEVICE_PATH_PROTOCOL_H__
+
+//
+// Device Path protocol
+//
+#define EFI_DEVICE_PATH_PROTOCOL_GUID \
+ { \
+ 0x9576e91, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+#pragma pack(1)
+
+typedef struct {
+ UINT8 Type;
+ UINT8 SubType;
+ UINT8 Length[2];
+} EFI_DEVICE_PATH_PROTOCOL;
+
+#pragma pack()
+
+#define EFI_DP_TYPE_MASK 0x7F
+#define EFI_DP_TYPE_UNPACKED 0x80
+#define END_DEVICE_PATH_TYPE 0x7f
+
+#define EFI_END_ENTIRE_DEVICE_PATH 0xff
+#define EFI_END_ENTIRE_DEVICE_PATH_SUBTYPE 0xff
+#define EFI_END_INSTANCE_DEVICE_PATH 0x01
+#define END_ENTIRE_DEVICE_PATH_SUBTYPE EFI_END_ENTIRE_DEVICE_PATH_SUBTYPE
+#define END_INSTANCE_DEVICE_PATH_SUBTYPE EFI_END_INSTANCE_DEVICE_PATH
+
+#define EFI_END_DEVICE_PATH_LENGTH (sizeof (EFI_DEVICE_PATH_PROTOCOL))
+#define END_DEVICE_PATH_LENGTH EFI_END_DEVICE_PATH_LENGTH
+
+#define DP_IS_END_TYPE(a)
+#define DP_IS_END_SUBTYPE(a) (((a)->SubType == END_ENTIRE_DEVICE_PATH_SUBTYPE)
+#define DevicePathSubType(a) ((a)->SubType)
+#define IsDevicePathUnpacked(a) ((a)->Type & EFI_DP_TYPE_UNPACKED)
+
+#define EfiDevicePathNodeLength(a) (((a)->Length[0]) | ((a)->Length[1] << 8))
+#define DevicePathNodeLength(a) (EfiDevicePathNodeLength(a))
+#define EfiNextDevicePathNode(a) ((EFI_DEVICE_PATH_PROTOCOL *) (((UINT8 *) (a)) + EfiDevicePathNodeLength (a)))
+#define NextDevicePathNode(a) (EfiNextDevicePathNode(a))
+
+#define EfiDevicePathType(a) (((a)->Type) & EFI_DP_TYPE_MASK)
+#define DevicePathType(a) (EfiDevicePathType(a))
+#define EfiIsDevicePathEndType(a) (EfiDevicePathType (a) == END_DEVICE_PATH_TYPE)
+#define IsDevicePathEndType(a) (EfiIsDevicePathEndType(a))
+
+
+#define EfiIsDevicePathEndSubType(a) ((a)->SubType == EFI_END_ENTIRE_DEVICE_PATH_SUBTYPE)
+#define IsDevicePathEndSubType(a) (EfiIsDevicePathEndSubType(a))
+#define EfiIsDevicePathEndInstanceSubType(a) ((a)->SubType == EFI_END_INSTANCE_DEVICE_PATH)
+
+#define EfiIsDevicePathEnd(a) (EfiIsDevicePathEndType (a) && EfiIsDevicePathEndSubType (a))
+#define IsDevicePathEnd(a) (EfiIsDevicePathEnd(a))
+#define EfiIsDevicePathEndInstance(a) (EfiIsDevicePathEndType (a) && EfiIsDevicePathEndInstanceSubType (a))
+
+
+#define SetDevicePathNodeLength(a,l) { \
+ (a)->Length[0] = (UINT8) (l); \
+ (a)->Length[1] = (UINT8) ((l) >> 8); \
+ }
+
+#define SetDevicePathEndNode(a) { \
+ (a)->Type = END_DEVICE_PATH_TYPE; \
+ (a)->SubType = END_ENTIRE_DEVICE_PATH_SUBTYPE; \
+ (a)->Length[0] = sizeof(EFI_DEVICE_PATH_PROTOCOL); \
+ (a)->Length[1] = 0; \
+ }
+
+extern EFI_GUID gEfiDevicePathProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DevicePathFromText.h b/MdePkg/Include/Protocol/DevicePathFromText.h new file mode 100644 index 0000000000..a3a6c431ca --- /dev/null +++ b/MdePkg/Include/Protocol/DevicePathFromText.h @@ -0,0 +1,73 @@ +/** @file
+ EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL as defined in UEFI 2.0.
+ This protocol provides service to convert text to device paths and device nodes.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DevicePathFromText.h
+
+**/
+
+#ifndef __DEVICE_PATH_FROM_TEXT_PROTOCOL_H__
+#define __DEVICE_PATH_FROM_TEXT_PROTOCOL_H__
+
+//
+// Device Path From Text protocol
+//
+#define EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL_GUID \
+ { \
+ 0x5c99a21, 0xc70f, 0x4ad2, {0x8a, 0x5f, 0x35, 0xdf, 0x33, 0x43, 0xf5, 0x1e } \
+ }
+
+/**
+ Convert text to the binary representation of a device node.
+
+ @param TextDeviceNode TextDeviceNode points to the text representation of a device
+ node. Conversion starts with the first character and continues
+ until the first non-device node character.
+
+ @retval a_pointer Pointer to the EFI device node.
+ @retval NULL if TextDeviceNode is NULL or there was insufficient memory.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_FROM_TEXT_NODE) (
+ IN CONST CHAR16 *TextDeviceNode
+ )
+;
+
+
+/**
+ Convert text to the binary representation of a device node.
+
+ @param TextDeviceNode TextDevicePath points to the text representation of a device
+ path. Conversion starts with the first character and continues
+ until the first non-device path character.
+
+ @retval a_pointer Pointer to the allocated device path.
+ @retval NULL if TextDeviceNode is NULL or there was insufficient memory.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_FROM_TEXT_PATH) (
+ IN CONST CHAR16 *TextDevicePath
+ )
+;
+
+typedef struct {
+ EFI_DEVICE_PATH_FROM_TEXT_NODE ConvertDeviceNodeFromText;
+ EFI_DEVICE_PATH_FROM_TEXT_PATH ConvertDevicePathFromText;
+} EFI_DEVICE_PATH_FROM_TEXT_PROTOCOL;
+
+extern EFI_GUID gEfiDevicePathFromTextProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DevicePathToText.h b/MdePkg/Include/Protocol/DevicePathToText.h new file mode 100644 index 0000000000..d888562b12 --- /dev/null +++ b/MdePkg/Include/Protocol/DevicePathToText.h @@ -0,0 +1,86 @@ +/** @file
+ EFI_DEVICE_PATH_TO_TEXT_PROTOCOL as defined in UEFI 2.0.
+ This protocol provides service to convert device nodes and paths to text.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DevicePathToText.h
+
+**/
+
+#ifndef __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
+#define __DEVICE_PATH_TO_TEXT_PROTOCOL_H__
+
+//
+// Device Path To Text protocol
+//
+#define EFI_DEVICE_PATH_TO_TEXT_PROTOCOL_GUID \
+ { \
+ 0x8b843e20, 0x8132, 0x4852, {0x90, 0xcc, 0x55, 0x1a, 0x4e, 0x4a, 0x7f, 0x1c } \
+ }
+
+/**
+ Convert a device node to its text representation.
+
+ @param DeviceNode Points to the device node to be converted.
+ @param DisplayOnly If DisplayOnly is TRUE, then the shorter text representation
+ of the display node is used, where applicable. If DisplayOnly
+ is FALSE, then the longer text representation of the display node
+ is used.
+ @param AllowShortcuts If AllowShortcuts is TRUE, then the shortcut forms of text
+ representation for a device node can be used, where applicable.
+
+ @retval a_pointer a pointer to the allocated text representation of the device node data
+ @retval NULL if DeviceNode is NULL or there was insufficient memory.
+
+**/
+typedef
+CHAR16*
+(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_NODE) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DeviceNode,
+ IN BOOLEAN DisplayOnly,
+ IN BOOLEAN AllowShortcuts
+ )
+;
+
+/**
+ Convert a device path to its text representation.
+
+ @param DevicePath Points to the device path to be converted.
+ @param DisplayOnly If DisplayOnly is TRUE, then the shorter text representation
+ of the display node is used, where applicable. If DisplayOnly
+ is FALSE, then the longer text representation of the display node
+ is used.
+ @param AllowShortcuts The AllowShortcuts is FALSE, then the shortcut forms of
+ text representation for a device node cannot be used.
+
+ @retval a_pointer a pointer to the allocated text representation of the device node.
+ @retval NULL if DevicePath is NULL or there was insufficient memory.
+
+**/
+typedef
+CHAR16*
+(EFIAPI *EFI_DEVICE_PATH_TO_TEXT_PATH) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN BOOLEAN DisplayOnly,
+ IN BOOLEAN AllowShortcuts
+ )
+;
+
+typedef struct {
+ EFI_DEVICE_PATH_TO_TEXT_NODE ConvertDeviceNodeToText;
+ EFI_DEVICE_PATH_TO_TEXT_PATH ConvertDevicePathToText;
+} EFI_DEVICE_PATH_TO_TEXT_PROTOCOL;
+
+extern EFI_GUID gEfiDevicePathToTextProtocolGuid;
+
+#endif
+
+
diff --git a/MdePkg/Include/Protocol/DevicePathUtilities.h b/MdePkg/Include/Protocol/DevicePathUtilities.h new file mode 100644 index 0000000000..e72f57cf8f --- /dev/null +++ b/MdePkg/Include/Protocol/DevicePathUtilities.h @@ -0,0 +1,194 @@ +/** @file
+ EFI_DEVICE_PATH_UTILITIES_PROTOCOL as defined in UEFI 2.0.
+ Use to create and manipulate device paths and device nodes.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DevicePathUtilities.h
+
+**/
+
+#ifndef __DEVICE_PATH_UTILITIES_PROTOCOL_H__
+#define __DEVICE_PATH_UTILITIES_PROTOCOL_H__
+
+//
+// Device Path Utilities protocol
+//
+#define EFI_DEVICE_PATH_UTILITIES_PROTOCOL_GUID \
+ { \
+ 0x379be4e, 0xd706, 0x437d, {0xb0, 0x37, 0xed, 0xb8, 0x2f, 0xb7, 0x72, 0xa4 } \
+ }
+
+/**
+ Returns the size of the device path, in bytes.
+
+ @param DevicePath Points to the start of the EFI device path.
+
+ @revtal Size Size of the specified device path, in bytes, including the end-of-path tag.
+
+**/
+typedef
+UINTN
+(EFIAPI *EFI_DEVICE_PATH_UTILS_GET_DEVICE_PATH_SIZE) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+
+/**
+ Create a duplicate of the specified path.
+
+ @param DevicePath Points to the source EFI device path.
+
+ @retval Pointer A pointer to the duplicate device path.
+ @retval NULL insufficient memory
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_UTILS_DUP_DEVICE_PATH) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+/**
+ Create a new path by appending the second device path to the first.
+
+ @param Src1 Points to the first device path. If NULL, then it is ignored.
+ @param Src2 Points to the second device path. If NULL, then it is ignored.
+
+ @retval Pointer A pointer to the newly created device path.
+ @retval NULL Memory could not be allocated
+ or either DevicePath or DeviceNode is NULL.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_UTILS_APPEND_PATH) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Src1,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *Src2
+ )
+;
+
+/**
+ Creates a new path by appending the device node to the device path.
+
+ @param DevicePath Points to the device path.
+ @param DeviceNode Points to the device node.
+
+ @retval Pointer A pointer to the allocated device node.
+ @retval NULL Memory could not be allocated
+ or either DevicePath or DeviceNode is NULL.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_UTILS_APPEND_NODE) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DeviceNode
+ )
+;
+
+/**
+ Creates a new path by appending the specified device path instance to the specified device path.
+
+ @param DevicePath Points to the device path. If NULL, then ignored.
+ @param DevicePathInstance Points to the device path instance.
+
+ @retval Pointer A pointer to the newly created device path
+ @retval NULL Memory could not be allocated or DevicePathInstance is NULL.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_UTILS_APPEND_INSTANCE) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePathInstance
+ )
+;
+
+/**
+ Creates a copy of the current device path instance and returns a pointer to the next device path
+ instance.
+
+ @param DevicePathInstance On input, this holds the pointer to the current device path
+ instance. On output, this holds the pointer to the next
+ device path instance or NULL if there are no more device
+ path instances in the device path.
+ @param DevicePathInstanceSize On output, this holds the size of the device path instance,
+ in bytes or zero, if DevicePathInstance is zero.
+
+ @retval Pointer A pointer to the copy of the current device path instance.
+ @retval NULL DevicePathInstace was NULL on entry or there was insufficient memory.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_UTILS_GET_NEXT_INSTANCE) (
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePathInstance,
+ OUT UINTN *DevicePathInstanceSize
+ )
+;
+
+/**
+ Creates a device node
+
+ @param NodeType NodeType is the device node type (EFI_DEVICE_PATH.Type) for
+ the new device node.
+ @param NodeSubType NodeSubType is the device node sub-type
+ EFI_DEVICE_PATH.SubType) for the new device node.
+ @param NodeLength NodeLength is the length of the device node
+ (EFI_DEVICE_PATH.Length) for the new device node.
+
+ @retval Pointer A pointer to the newly created device node.
+ @retval NULL NodeLength is less than
+ the size of the header or there was insufficient memory.
+
+**/
+typedef
+EFI_DEVICE_PATH_PROTOCOL*
+(EFIAPI *EFI_DEVICE_PATH_CREATE_NODE) (
+ IN UINT8 NodeType,
+ IN UINT8 NodeSubType,
+ IN UINT16 NodeLength
+)
+;
+
+/**
+ Returns whether a device path is multi-instance.
+
+ @param DevicePath Points to the device path. If NULL, then ignored.
+
+ @retval TRUE The device path has more than one instance
+ @retval FALSE The device path is empty or contains only a single instance.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_DEVICE_PATH_UTILS_IS_MULTI_INSTANCE) (
+ IN CONST EFI_DEVICE_PATH_PROTOCOL *DevicePath
+ )
+;
+
+
+typedef struct {
+ EFI_DEVICE_PATH_UTILS_GET_DEVICE_PATH_SIZE GetDevicePathSize;
+ EFI_DEVICE_PATH_UTILS_DUP_DEVICE_PATH DuplicateDevicePath;
+ EFI_DEVICE_PATH_UTILS_APPEND_PATH AppendDevicePath;
+ EFI_DEVICE_PATH_UTILS_APPEND_NODE AppendDeviceNode;
+ EFI_DEVICE_PATH_UTILS_APPEND_INSTANCE AppendDevicePathInstance;
+ EFI_DEVICE_PATH_UTILS_GET_NEXT_INSTANCE GetNextDevicePathInstance;
+ EFI_DEVICE_PATH_UTILS_IS_MULTI_INSTANCE IsDevicePathMultiInstance;
+ EFI_DEVICE_PATH_CREATE_NODE CreateDeviceNode;
+} EFI_DEVICE_PATH_UTILITIES_PROTOCOL;
+
+extern EFI_GUID gEfiDevicePathUtilitiesProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Dhcp4.h b/MdePkg/Include/Protocol/Dhcp4.h new file mode 100644 index 0000000000..3adce1a04a --- /dev/null +++ b/MdePkg/Include/Protocol/Dhcp4.h @@ -0,0 +1,442 @@ +/** @file
+ EFI_DHCP4_PROTOCOL as defined in UEFI 2.0.
+ EFI_DHCP4_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0.
+ These protocols are used to collect configuration information for the EFI IPv4 Protocol
+ drivers and to provide DHCPv4 server and PXE boot server discovery services.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DHCP4.h
+
+**/
+
+#ifndef __EFI_DHCP4_PROTOCOL_H__
+#define __EFI_DHCP4_PROTOCOL_H__
+
+#define EFI_DHCP4_PROTOCOL_GUID \
+ { \
+ 0x8a219718, 0x4ef5, 0x4761, {0x91, 0xc8, 0xc0, 0xf0, 0x4b, 0xda, 0x9e, 0x56 } \
+ }
+
+#define EFI_DHCP4_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0x9d9a39d8, 0xbd42, 0x4a73, {0xa4, 0xd5, 0x8e, 0xe9, 0x4b, 0xe1, 0x13, 0x80 } \
+ }
+
+typedef struct _EFI_DHCP4_PROTOCOL EFI_DHCP4_PROTOCOL;
+
+
+#pragma pack(1)
+typedef struct {
+ UINT8 OpCode;
+ UINT8 Length;
+ UINT8 Data[1];
+} EFI_DHCP4_PACKET_OPTION;
+#pragma pack()
+
+
+#pragma pack(1)
+typedef struct {
+ UINT8 OpCode;
+ UINT8 HwType;
+ UINT8 HwAddrLen;
+ UINT8 Hops;
+ UINT32 Xid;
+ UINT16 Seconds;
+ UINT16 Reserved;
+ EFI_IPv4_ADDRESS ClientAddr; //Client IP address from client
+ EFI_IPv4_ADDRESS YourAddr; //Client IP address from server
+ EFI_IPv4_ADDRESS ServerAddr; //IP address of next server in bootstrap
+ EFI_IPv4_ADDRESS GatewayAddr; //Relay agent IP address
+ UINT8 ClientHwAddr[16]; //Client hardware address
+ CHAR8 ServerName[64];
+ CHAR8 BootFileName[128];
+}EFI_DHCP4_HEADER;
+#pragma pack()
+
+
+#pragma pack(1)
+typedef struct {
+ UINT32 Size;
+ UINT32 Length;
+
+ struct {
+ EFI_DHCP4_HEADER Header;
+ UINT32 Magik;
+ UINT8 Option[1];
+ } Dhcp4;
+} EFI_DHCP4_PACKET;
+#pragma pack()
+
+
+typedef enum {
+ Dhcp4Stopped = 0x0,
+ Dhcp4Init = 0x1,
+ Dhcp4Selecting = 0x2,
+ Dhcp4Requesting = 0x3,
+ Dhcp4Bound = 0x4,
+ Dhcp4Renewing = 0x5,
+ Dhcp4Rebinding = 0x6,
+ Dhcp4InitReboot = 0x7,
+ Dhcp4Rebooting = 0x8
+} EFI_DHCP4_STATE;
+
+
+typedef enum{
+ Dhcp4SendDiscover = 0x01,
+ Dhcp4RcvdOffer = 0x02,
+ Dhcp4SelectOffer = 0x03,
+ Dhcp4SendRequest = 0x04,
+ Dhcp4RcvdAck = 0x05,
+ Dhcp4RcvdNak = 0x06,
+ Dhcp4SendDecline = 0x07,
+ Dhcp4BoundCompleted = 0x08,
+ Dhcp4EnterRenewing = 0x09,
+ Dhcp4EnterRebinding = 0x0a,
+ Dhcp4AddressLost = 0x0b,
+ Dhcp4Fail = 0x0c
+} EFI_DHCP4_EVENT;
+
+/**
+ Callback routine
+
+ @param This Pointer to the EFI DHCPv4 Protocol instance that is used to
+ configure this callback function.
+ @param Context Pointer to the context that is initialized by
+ EFI_DHCP4_PROTOCOL.Configure().
+ @param CurrentState The current operational state of the EFI DHCPv4 Protocol
+ driver.
+ @param Dhcp4Event The event that occurs in the current state, which usually means a
+ state transition.
+ @param Packet The DHCP packet that is going to be sent or already received.
+ @param NewPacket The packet that is used to replace the above Packet.
+
+ @retval EFI_SUCCESS Tells the EFI DHCPv4 Protocol driver to continue the DHCP process.
+ @retval EFI_NOT_READY Only used in the Dhcp4Selecting state. The EFI DHCPv4 Protocol
+ driver will continue to wait for more DHCPOFFER packets until the retry
+ timeout expires.
+ @retval EFI_ABORTED Tells the EFI DHCPv4 Protocol driver to abort the current process and
+ return to the Dhcp4Init or Dhcp4InitReboot state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_CALLBACK) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN VOID *Context,
+ IN EFI_DHCP4_STATE CurrentState,
+ IN EFI_DHCP4_EVENT Dhcp4Event,
+ IN EFI_DHCP4_PACKET *Packet OPTIONAL,
+ OUT EFI_DHCP4_PACKET **NewPacket OPTIONAL
+ );
+
+
+typedef struct {
+ UINT32 DiscoverTryCount;
+ UINT32 *DiscoverTimeout;
+ UINT32 RequestTryCount;
+ UINT32 *RequestTimeout;
+ EFI_IPv4_ADDRESS ClientAddress;
+ EFI_DHCP4_CALLBACK Dhcp4Callback;
+ void *CallbackContext;
+ UINT32 OptionCount;
+ EFI_DHCP4_PACKET_OPTION **OptionList;
+} EFI_DHCP4_CONFIG_DATA;
+
+
+typedef struct {
+ EFI_DHCP4_STATE State;
+ EFI_DHCP4_CONFIG_DATA ConfigData;
+ EFI_IPv4_ADDRESS ClientAddress;
+ EFI_MAC_ADDRESS ClientMacAddress;
+ EFI_IPv4_ADDRESS ServerAddress;
+ EFI_IPv4_ADDRESS RouterAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT32 LeaseTime;
+ EFI_DHCP4_PACKET *ReplyPacket;
+} EFI_DHCP4_MODE_DATA;
+
+
+typedef struct {
+ EFI_IPv4_ADDRESS ListenAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 ListenPort;
+} EFI_DHCP4_LISTEN_POINT;
+
+
+typedef struct {
+ OUT EFI_STATUS Status;
+ IN EFI_EVENT CompletionEvent;
+ IN EFI_IPv4_ADDRESS RemoteAddress;
+ IN UINT16 RemotePort;
+ IN EFI_IPv4_ADDRESS GatewayAddress;
+ IN UINT32 ListenPointCount;
+ IN EFI_DHCP4_LISTEN_POINT *ListenPoints;
+ IN UINT32 TimeoutValue;
+ IN EFI_DHCP4_PACKET *Packet;
+ OUT UINT32 ResponseCount;
+ OUT EFI_DHCP4_PACKET *ResponseList;
+} EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN;
+
+
+/**
+ Returns the current operating mode and cached data packet for the EFI DHCPv4 Protocol driver.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param Dhcp4ModeData Pointer to storage for the EFI_DHCP4_MODE_DATA structure.
+
+ @retval EFI_SUCCESS The mode data was returned.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_GET_MODE_DATA)(
+ IN EFI_DHCP4_PROTOCOL *This,
+ OUT EFI_DHCP4_MODE_DATA *Dhcp4ModeData
+ )
+;
+
+/**
+ Initializes, changes, or resets the operational settings for the EFI DHCPv4 Protocol driver.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param Dhcp4CfgData Pointer to the EFI_DHCP4_CONFIG_DATA.
+
+ @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Init or
+ Dhcp4InitReboot state, if the original state of this driver
+ was Dhcp4Stopped and the value of Dhcp4CfgData was
+ not NULL. Otherwise, the state was left unchanged.
+ @retval EFI_ACCESS_DENIED This instance of the EFI DHCPv4 Protocol driver was not in the
+ Dhcp4Stopped, Dhcp4Init, Dhcp4InitReboot, or Dhcp4Bound state;
+ Or onother instance of this EFI DHCPv4 Protocol driver is already
+ in a valid configured state.
+ @retval EFI_INVALID_PARAMETER Some parameter is NULL.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_CONFIGURE) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN EFI_DHCP4_CONFIG_DATA *Dhcp4CfgData OPTIONAL
+ )
+;
+
+
+/**
+ Starts the DHCP configuration process.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param CompletionEvent If not NULL, indicates the event that will be signaled when the
+ EFI DHCPv4 Protocol driver is transferred into the
+ Dhcp4Bound state or when the DHCP process is aborted.
+ EFI_DHCP4_PROTOCOL.GetModeData() can be called to
+ check the completion status. If NULL,
+ EFI_DHCP4_PROTOCOL.Start() will wait until the driver
+ is transferred into the Dhcp4Bound state or the process fails.
+
+ @retval EFI_SUCCESS The DHCP configuration process has started, or it has completed
+ when CompletionEvent is NULL.
+ @retval EFI_NOT_STARTED The EFI DHCPv4 Protocol driver is in the Dhcp4Stopped
+ state. EFI_DHCP4_PROTOCOL. Configure() needs to be called.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_TIMEOUT The DHCP configuration process failed because no response was
+ received from the server within the specified timeout value.
+ @retval EFI_ABORTED The user aborted the DHCP process.
+ @retval EFI_ALREADY_STARTED Some other EFI DHCPv4 Protocol instance already started the
+ DHCP process.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_START) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN EFI_EVENT CompletionEvent OPTIONAL
+ )
+;
+
+/**
+ Extends the lease time by sending a request packet.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param RebindRequest If TRUE, this function broadcasts the request packets and enters
+ the Dhcp4Rebinding state. Otherwise, it sends a unicast
+ request packet and enters the Dhcp4Renewing state.
+ @param CompletionEvent If not NULL, this event is signaled when the renew/rebind phase
+ completes or some error occurs.
+ EFI_DHCP4_PROTOCOL.GetModeData() can be called to
+ check the completion status. If NULL,
+ EFI_DHCP4_PROTOCOL.RenewRebind() will busy-wait
+ until the DHCP process finishes.
+
+ @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the
+ Dhcp4Renewing state or is back to the Dhcp4Bound state.
+ @retval EFI_NOT_STARTED The EFI DHCPv4 Protocol driver is in the Dhcp4Stopped
+ state. EFI_DHCP4_PROTOCOL.Configure() needs to
+ be called.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_TIMEOUT There was no response from the server when the try count was
+ exceeded.
+ @retval EFI_ACCESS_DENIED The driver is not in the Dhcp4Bound state.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_RENEW_REBIND) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN BOOLEAN RebindRequest,
+ IN EFI_EVENT CompletionEvent OPTIONAL
+ )
+;
+
+/**
+ Releases the current address configuration.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Init phase.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_ACCESS_DENIED The EFI DHCPv4 Protocol driver is not Dhcp4InitReboot state.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_RELEASE) (
+ IN EFI_DHCP4_PROTOCOL *This
+ )
+;
+
+/**
+ Stops the current address configuration.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The EFI DHCPv4 Protocol driver is now in the Dhcp4Stopped phase.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_STOP) (
+ IN EFI_DHCP4_PROTOCOL *This
+ )
+;
+
+/**
+ Builds a DHCP packet, given the options to be appended or deleted or replaced.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param SeedPacket Initial packet to be used as a base for building new packet.
+ @param DeleteCount Number of opcodes in the DeleteList.
+ @param DeleteList List of opcodes to be deleted from the seed packet.
+ Ignored if DeleteCount is zero.
+ @param AppendCount Number of entries in the OptionList.
+ @param AppendList Pointer to a DHCP option list to be appended to SeedPacket.
+ If SeedPacket also contains options in this list, they are
+ replaced by new options (except pad option). Ignored if
+ AppendCount is zero. Type EFI_DHCP4_PACKET_OPTION
+ @param NewPacket Pointer to storage for the pointer to the new allocated packet.
+ Use the EFI Boot Service FreePool() on the resulting pointer
+ when done with the packet.
+
+ @retval EFI_SUCCESS The new packet was built.
+ @retval EFI_OUT_OF_RESOURCES Storage for the new packet could not be allocated.
+ @retval EFI_INVALID_PARAMETER Some parameter is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_BUILD) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN EFI_DHCP4_PACKET *SeedPacket,
+ IN UINT32 DeleteCount,
+ IN UINT8 *DeleteList OPTIONAL,
+ IN UINT32 AppendCount,
+ IN EFI_DHCP4_PACKET_OPTION *AppendList[] OPTIONAL,
+ OUT EFI_DHCP4_PACKET **NewPacket
+ );
+;
+
+/**
+ Transmits a DHCP formatted packet and optionally waits for responses.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param Token Pointer to the EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN structure.
+
+ @retval EFI_SUCCESS The packet was successfully queued for transmission.
+ @retval EFI_INVALID_PARAMETER Some parameter is NULL.
+ @retval EFI_NOT_READY The previous call to this function has not finished yet. Try to call
+ this function after collection process completes.
+ @retval EFI_NO_MAPPING The default station address is not available yet.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval Others Some other unexpected error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_TRANSMIT_RECEIVE) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN EFI_DHCP4_TRANSMIT_RECEIVE_TOKEN *Token
+ )
+;
+
+
+/**
+ Parses the packed DHCP option data.
+
+ @param This Pointer to the EFI_DHCP4_PROTOCOL instance.
+ @param Packet Pointer to packet to be parsed.
+ @param OptionCount On input, the number of entries in the PacketOptionList.
+ On output, the number of entries that were written into the
+ PacketOptionList.
+ @param PacketOptionList List of packet option entries to be filled in. End option or pad
+ options are not included.
+
+ @retval EFI_SUCCESS The packet was successfully parsed.
+ @retval EFI_INVALID_PARAMETER Some parameter is NULL.
+ @retval EFI_BUFFER_TOO_SMALL One or more of the following conditions is TRUE:
+ 1) *OptionCount is smaller than the number of options that
+ were found in the Packet.
+ 2) PacketOptionList is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DHCP4_PARSE) (
+ IN EFI_DHCP4_PROTOCOL *This,
+ IN EFI_DHCP4_PACKET *Packet,
+ IN OUT UINT32 *OptionCount,
+ OUT EFI_DHCP4_PACKET_OPTION *PacketOptionList[] OPTIONAL
+ )
+;
+
+
+struct _EFI_DHCP4_PROTOCOL {
+ EFI_DHCP4_GET_MODE_DATA GetModeData;
+ EFI_DHCP4_CONFIGURE Configure;
+ EFI_DHCP4_START Start;
+ EFI_DHCP4_RENEW_REBIND RenewRebind;
+ EFI_DHCP4_RELEASE Release;
+ EFI_DHCP4_STOP Stop;
+ EFI_DHCP4_BUILD Build;
+ EFI_DHCP4_TRANSMIT_RECEIVE TransmitReceive;
+ EFI_DHCP4_PARSE Parse;
+};
+
+extern EFI_GUID gEfiDhcp4ProtocolGuid;
+extern EFI_GUID gEfiDhcp4ServiceBindingProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DiskIo.h b/MdePkg/Include/Protocol/DiskIo.h new file mode 100644 index 0000000000..e36792c7cd --- /dev/null +++ b/MdePkg/Include/Protocol/DiskIo.h @@ -0,0 +1,98 @@ +/** @file
+ Disk IO protocol as defined in the EFI 1.0 specification.
+
+ The Disk IO protocol is used to convert block oriented devices into byte
+ oriented devices. The Disk IO protocol is intended to layer on top of the
+ Block IO protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DiskIo.h
+
+**/
+
+#ifndef __DISK_IO_H__
+#define __DISK_IO_H__
+
+#define EFI_DISK_IO_PROTOCOL_GUID \
+ { \
+ 0xce345171, 0xba0b, 0x11d2, {0x8e, 0x4f, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct _EFI_DISK_IO_PROTOCOL EFI_DISK_IO_PROTOCOL;
+
+/**
+ Read BufferSize bytes from Offset into Buffer.
+
+ @param This Protocol instance pointer.
+ @param MediaId Id of the media, changes every time the media is replaced.
+ @param Offset The starting byte offset to read from
+ @param BufferSize Size of Buffer
+ @param Buffer Buffer containing read data
+
+ @retval EFI_SUCCESS The data was read correctly from the device.
+ @retval EFI_DEVICE_ERROR The device reported an error while performing the read.
+ @retval EFI_NO_MEDIA There is no media in the device.
+ @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device.
+ @retval EFI_INVALID_PARAMETER The read request contains device addresses that are not
+ valid for the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DISK_READ) (
+ IN EFI_DISK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Offset,
+ IN UINTN BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Read BufferSize bytes from Offset into Buffer.
+
+ @param This Protocol instance pointer.
+ @param MediaId Id of the media, changes every time the media is replaced.
+ @param Offset The starting byte offset to read from
+ @param BufferSize Size of Buffer
+ @param Buffer Buffer containing read data
+
+ @retval EFI_SUCCESS The data was written correctly to the device.
+ @retval EFI_WRITE_PROTECTED The device can not be written to.
+ @retval EFI_DEVICE_ERROR The device reported an error while performing the write.
+ @retval EFI_NO_MEDIA There is no media in the device.
+ @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device.
+ @retval EFI_INVALID_PARAMETER The write request contains device addresses that are not
+ valid for the device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DISK_WRITE) (
+ IN EFI_DISK_IO_PROTOCOL *This,
+ IN UINT32 MediaId,
+ IN UINT64 Offset,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+#define EFI_DISK_IO_PROTOCOL_REVISION 0x00010000
+
+struct _EFI_DISK_IO_PROTOCOL {
+ UINT64 Revision;
+ EFI_DISK_READ ReadDisk;
+ EFI_DISK_WRITE WriteDisk;
+};
+
+extern EFI_GUID gEfiDiskIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DriverBinding.h b/MdePkg/Include/Protocol/DriverBinding.h new file mode 100644 index 0000000000..5f5d90963e --- /dev/null +++ b/MdePkg/Include/Protocol/DriverBinding.h @@ -0,0 +1,111 @@ +/** @file
+ EFI ControllerHandle Driver Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DriverBinding.h
+
+**/
+
+#ifndef __EFI_DRIVER_BINDING_H__
+#define __EFI_DRIVER_BINDING_H__
+
+//
+// Global ID for the ControllerHandle Driver Protocol
+//
+#define EFI_DRIVER_BINDING_PROTOCOL_GUID \
+ { \
+ 0x18a031ab, 0xb443, 0x4d1a, {0xa5, 0xc0, 0xc, 0x9, 0x26, 0x1e, 0x9f, 0x71 } \
+ }
+
+typedef struct _EFI_DRIVER_BINDING_PROTOCOL EFI_DRIVER_BINDING_PROTOCOL;
+
+/**
+ Test to see if this driver supports ControllerHandle.
+
+ @param This Protocol instance pointer.
+ @param ControllerHandle Handle of device to test
+ @param RemainingDevicePath Optional parameter use to pick a specific child
+ device to start.
+
+ @retval EFI_SUCCESS This driver supports this device
+ @retval EFI_ALREADY_STARTED This driver is already running on this device
+ @retval other This driver does not support this device
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_BINDING_SUPPORTED) (
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+ )
+;
+
+/**
+ Start this driver on ControllerHandle.
+
+ @param This Protocol instance pointer.
+ @param ControllerHandle Handle of device to bind driver to
+ @param RemainingDevicePath Optional parameter use to pick a specific child
+ device to start.
+
+ @retval EFI_SUCCESS This driver is added to ControllerHandle
+ @retval EFI_ALREADY_STARTED This driver is already running on ControllerHandle
+ @retval other This driver does not support this device
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_BINDING_START) (
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath OPTIONAL
+ )
+;
+
+/**
+ Stop this driver on ControllerHandle.
+
+ @param This Protocol instance pointer.
+ @param ControllerHandle Handle of device to stop driver on
+ @param NumberOfChildren Number of Handles in ChildHandleBuffer. If number of
+ children is zero stop the entire bus driver.
+ @param ChildHandleBuffer List of Child Handles to Stop.
+
+ @retval EFI_SUCCESS This driver is removed ControllerHandle
+ @retval other This driver was not removed from this device
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_BINDING_STOP) (
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN UINTN NumberOfChildren,
+ IN EFI_HANDLE *ChildHandleBuffer OPTIONAL
+ )
+;
+
+//
+// Interface structure for the ControllerHandle Driver Protocol
+//
+struct _EFI_DRIVER_BINDING_PROTOCOL {
+ EFI_DRIVER_BINDING_SUPPORTED Supported;
+ EFI_DRIVER_BINDING_START Start;
+ EFI_DRIVER_BINDING_STOP Stop;
+ UINT32 Version;
+ EFI_HANDLE ImageHandle;
+ EFI_HANDLE DriverBindingHandle;
+};
+
+extern EFI_GUID gEfiDriverBindingProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DriverConfiguration.h b/MdePkg/Include/Protocol/DriverConfiguration.h new file mode 100644 index 0000000000..f4f0c7aeb2 --- /dev/null +++ b/MdePkg/Include/Protocol/DriverConfiguration.h @@ -0,0 +1,203 @@ +/** @file
+ EFI Driver Configuration Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DriverConfiguration.h
+
+**/
+
+#ifndef __EFI_DRIVER_CONFIGURATION_H__
+#define __EFI_DRIVER_CONFIGURATION_H__
+
+//
+// Global ID for the Driver Configuration Protocol defined in EFI 1.10
+//
+#define EFI_DRIVER_CONFIGURATION_PROTOCOL_GUID \
+ { \
+ 0x107a772b, 0xd5e1, 0x11d4, {0x9a, 0x46, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+//
+// Global ID for the Driver Configuration Protocol defined in UEFI 2.0
+//
+#define UEFI_DRIVER_CONFIGURATION_PROTOCOL_GUID \
+ { \
+ 0xbfd7dc1d, 0x24f1, 0x40d9, {0x82, 0xe7, 0x2e, 0x09, 0xbb, 0x6b, 0x4e, 0xbe } \
+ }
+
+typedef struct _EFI_DRIVER_CONFIGURATION_PROTOCOL EFI_DRIVER_CONFIGURATION_PROTOCOL;
+
+typedef enum {
+ EfiDriverConfigurationActionNone = 0,
+ EfiDriverConfigurationActionStopController = 1,
+ EfiDriverConfigurationActionRestartController = 2,
+ EfiDriverConfigurationActionRestartPlatform = 3,
+ EfiDriverConfigurationActionMaximum
+} EFI_DRIVER_CONFIGURATION_ACTION_REQUIRED;
+
+#define EFI_DRIVER_CONFIGURATION_SAFE_DEFAULTS 0x00000000
+#define EFI_DRIVER_CONFIGURATION_MANUFACTURING_DEFAULTS 0x00000001
+#define EFI_DRIVER_CONFIGURATION_CUSTOM_DEFAULTS 0x00000002
+#define EFI_DRIVER_CONFIGURATION_PERORMANCE_DEFAULTS 0x00000003
+
+/**
+ Allows the user to set controller specific options for a controller that a
+ driver is currently managing.
+
+ @param This A pointer to the EFI_DRIVER_CONFIGURATION_ PROTOCOL instance.
+ @param ControllerHandle The handle of the controller to set options on.
+ @param ChildHandle The handle of the child controller to set options on. This
+ is an optional parameter that may be NULL. It will be NULL
+ for device drivers, and for a bus drivers that wish to set
+ options for the bus controller. It will not be NULL for a
+ bus driver that wishes to set options for one of its child
+ controllers.
+ @param Language A pointer to a three character ISO 639-2 language identifier.
+ This is the language of the user interface that should be
+ presented to the user, and it must match one of the languages
+ specified in SupportedLanguages. The number of languages
+ supported by a driver is up to the driver writer.
+ @param ActionRequired A pointer to the action that the calling agent is required
+ to perform when this function returns. See "Related
+ Definitions" for a list of the actions that the calling
+ agent is required to perform prior to accessing
+ ControllerHandle again.
+
+ @retval EFI_SUCCESS The driver specified by This successfully set the
+ configuration options for the controller specified
+ by ControllerHandle..
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ActionRequired is NULL.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support setting
+ configuration options for the controller specified by
+ ControllerHandle and ChildHandle.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the
+ language specified by Language.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempt to set the
+ configuration options for the controller specified
+ by ControllerHandle and ChildHandle.
+ @retval EFI_OUT_RESOURCES There are not enough resources available to set the
+ configuration options for the controller specified
+ by ControllerHandle and ChildHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_CONFIGURATION_SET_OPTIONS) (
+ IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN CHAR8 *Language,
+ OUT EFI_DRIVER_CONFIGURATION_ACTION_REQUIRED *ActionRequired
+ );
+
+/**
+ Tests to see if a controller's current configuration options are valid.
+
+ @param This A pointer to the EFI_DRIVER_CONFIGURATION_PROTOCOL instance.
+ @param ControllerHandle The handle of the controller to test if it's current
+ configuration options are valid.
+ @param ChildHandle The handle of the child controller to test if it's current
+ configuration options are valid. This is an optional
+ parameter that may be NULL. It will be NULL for device
+ drivers. It will also be NULL for a bus drivers that wish
+ to test the configuration options for the bus controller.
+ It will not be NULL for a bus driver that wishes to test
+ configuration options for one of its child controllers.
+
+ @retval EFI_SUCCESS The controller specified by ControllerHandle and
+ ChildHandle that is being managed by the driver
+ specified by This has a valid set of configuration
+ options.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE.
+ @retval EFI_UNSUPPORTED The driver specified by This is not currently
+ managing the controller specified by ControllerHandle
+ and ChildHandle.
+ @retval EFI_DEVICE_ERROR The controller specified by ControllerHandle and
+ ChildHandle that is being managed by the driver
+ specified by This has an invalid set of configuration
+ options.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_CONFIGURATION_OPTIONS_VALID) (
+ IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL
+ );
+
+/**
+ Forces a driver to set the default configuration options for a controller.
+
+ @param This A pointer to the EFI_DRIVER_CONFIGURATION_ PROTOCOL instance.
+ @param ControllerHandle The handle of the controller to force default configuration options on.
+ @param ChildHandle The handle of the child controller to force default configuration options on This is an optional parameter that may be NULL. It will be NULL for device drivers. It will also be NULL for a bus drivers that wish to force default configuration options for the bus controller. It will not be NULL for a bus driver that wishes to force default configuration options for one of its child controllers.
+ @param DefaultType The type of default configuration options to force on the controller specified by ControllerHandle and ChildHandle. See Table 9-1 for legal values. A DefaultType of 0x00000000 must be supported by this protocol.
+ @param ActionRequired A pointer to the action that the calling agent is required to perform when this function returns. See "Related Definitions" in Section 9.1for a list of the actions that the calling agent is required to perform prior to accessing ControllerHandle again.
+
+ @retval EFI_SUCCESS The driver specified by This successfully forced the default configuration options on the controller specified by ControllerHandle and ChildHandle.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ActionRequired is NULL.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support forcing the default configuration options on the controller specified by ControllerHandle and ChildHandle.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the configuration type specified by DefaultType.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempt to force the default configuration options on the controller specified by ControllerHandle and ChildHandle.
+ @retval EFI_OUT_RESOURCES There are not enough resources available to force the default configuration options on the controller specified by ControllerHandle and ChildHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_CONFIGURATION_FORCE_DEFAULTS) (
+ IN EFI_DRIVER_CONFIGURATION_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN UINT32 DefaultType,
+ OUT EFI_DRIVER_CONFIGURATION_ACTION_REQUIRED *ActionRequired
+ );
+
+
+//
+//
+struct _EFI_DRIVER_CONFIGURATION_PROTOCOL {
+ EFI_DRIVER_CONFIGURATION_SET_OPTIONS SetOptions;
+ EFI_DRIVER_CONFIGURATION_OPTIONS_VALID OptionsValid;
+ EFI_DRIVER_CONFIGURATION_FORCE_DEFAULTS ForceDefaults;
+ CHAR8 *SupportedLanguages;
+};
+
+/**
+ Interface structure for the Driver Configuration Protocol.
+
+ @par Protocol Description:
+ Used to set configuration options for a controller that an EFI Driver is managing.
+
+ @param SetOptions Allows the use to set drivers specific configuration
+ options for a controller that the driver is currently managing.
+
+ @param OptionsValid Tests to see if a controller's current configuration
+ options are valid.
+
+ @param ForceDefaults Forces a driver to set the default configuration options
+ for a controller.
+
+ @param SupportedLanguages A Null-terminated ASCII string that contains one or more
+ ISO 639-2 language codes. This is the list of language
+ codes that this protocol supports.
+
+**/
+
+extern EFI_GUID gEfiDriverConfigurationProtocolGuid;
+extern EFI_GUID gUefiDriverConfigurationProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/DriverDiagnostics.h b/MdePkg/Include/Protocol/DriverDiagnostics.h new file mode 100644 index 0000000000..c0a0cbc63b --- /dev/null +++ b/MdePkg/Include/Protocol/DriverDiagnostics.h @@ -0,0 +1,134 @@ +/** @file
+ EFI Driver Diagnostics Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: DriverDiagnostics.h
+
+**/
+
+#ifndef __EFI_DRIVER_DIAGNOSTICS_H__
+#define __EFI_DRIVER_DIAGNOSTICS_H__
+
+//
+// Global ID for the Driver Diagnostics Protocol as defined in EFI 1.10.
+//
+#define EFI_DRIVER_DIAGNOSTICS_PROTOCOL_GUID \
+ { \
+ 0x0784924f, 0xe296, 0x11d4, {0x9a, 0x49, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+//
+// Global ID for the Driver Diagnostics Protocol as defined in UEFI 2.0.
+//
+#define UEFI_DRIVER_DIAGNOSTICS_PROTOCOL_GUID \
+ { \
+ 0x4d330321, 0x025f, 0x4aac, {0x90, 0xd8, 0x5e, 0xd9, 0x00, 0x17, 0x3b, 0x63 } \
+ }
+
+typedef struct _EFI_DRIVER_DIAGNOSTICS_PROTOCOL EFI_DRIVER_DIAGNOSTICS_PROTOCOL;
+
+typedef enum {
+ EfiDriverDiagnosticTypeStandard = 0,
+ EfiDriverDiagnosticTypeExtended = 1,
+ EfiDriverDiagnosticTypeManufacturing= 2,
+ EfiDriverDiagnosticTypeMaximum
+} EFI_DRIVER_DIAGNOSTIC_TYPE;
+
+/**
+ Runs diagnostics on a controller.
+
+ @param This A pointer to the EFI_DRIVER_DIAGNOSTICS_PROTOCOL instance.
+ @param ControllerHandle The handle of the controller to run diagnostics on.
+ @param ChildHandle The handle of the child controller to run diagnostics on
+ This is an optional parameter that may be NULL. It will
+ be NULL for device drivers. It will also be NULL for a
+ bus drivers that wish to run diagnostics on the bus
+ controller. It will not be NULL for a bus driver that
+ wishes to run diagnostics on one of its child controllers.
+ @param DiagnosticType Indicates type of diagnostics to perform on the controller
+ specified by ControllerHandle and ChildHandle. See
+ "Related Definitions" for the list of supported types.
+ @param Language A pointer to a three character ISO 639-2 language
+ identifier. This is the language in which the optional
+ error message should be returned in Buffer, and it must
+ match one of the languages specified in SupportedLanguages.
+ The number of languages supported by a driver is up to
+ the driver writer.
+ @param ErrorType A GUID that defines the format of the data returned in Buffer.
+ @param BufferSize The size, in bytes, of the data returned in Buffer.
+ @param Buffer A buffer that contains a Null-terminated Unicode string
+ plus some additional data whose format is defined by
+ ErrorType. Buffer is allocated by this function with
+ AllocatePool(), and it is the caller's responsibility
+ to free it with a call to FreePool().
+
+ @retval EFI_SUCCESS The controller specified by ControllerHandle and
+ ChildHandle passed the diagnostic.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid EFI_HANDLE.
+ @retval EFI_INVALID_PARAMETER Language is NULL.
+ @retval EFI_INVALID_PARAMETER ErrorType is NULL.
+ @retval EFI_INVALID_PARAMETER BufferType is NULL.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support
+ running diagnostics for the controller specified
+ by ControllerHandle and ChildHandle.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the
+ type of diagnostic specified by DiagnosticType.
+ @retval EFI_UNSUPPORTED The driver specified by This does not support the
+ language specified by Language.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to complete
+ the diagnostics.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to return
+ the status information in ErrorType, BufferSize,
+ and Buffer.
+ @retval EFI_DEVICE_ERROR The controller specified by ControllerHandle and
+ ChildHandle did not pass the diagnostic.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DRIVER_DIAGNOSTICS_RUN_DIAGNOSTICS) (
+ IN EFI_DRIVER_DIAGNOSTICS_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE ChildHandle OPTIONAL,
+ IN EFI_DRIVER_DIAGNOSTIC_TYPE DiagnosticType,
+ IN CHAR8 *Language,
+ OUT EFI_GUID **ErrorType,
+ OUT UINTN *BufferSize,
+ OUT CHAR16 **Buffer
+ );
+
+
+//
+//
+
+/**
+ Interface structure for the Driver Diagnostics Protocol.
+
+ @par Protocol Description:
+ Used to perform diagnostics on a controller that an EFI Driver is managing.
+
+ @param RunDiagnostics Runs diagnostics on a controller.
+ @param SupportedLanguages A Null-terminated ASCII string that contains one or more
+ ISO 639-2 language codes. This is the list of language
+ codes that this protocol supports.
+
+**/
+struct _EFI_DRIVER_DIAGNOSTICS_PROTOCOL {
+ EFI_DRIVER_DIAGNOSTICS_RUN_DIAGNOSTICS RunDiagnostics;
+ CHAR8 *SupportedLanguages;
+};
+
+extern EFI_GUID gEfiDriverDiagnosticsProtocolGuid;
+extern EFI_GUID gUefiDriverDiagnosticsProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Ebc.h b/MdePkg/Include/Protocol/Ebc.h new file mode 100644 index 0000000000..c1abcbac5b --- /dev/null +++ b/MdePkg/Include/Protocol/Ebc.h @@ -0,0 +1,148 @@ +/** @file
+ Describes the protocol interface to the EBC interpreter.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Ebc.h
+
+**/
+
+#ifndef __EFI_EBC_PROTOCOL_H__
+#define __EFI_EBC_PROTOCOL_H__
+
+#define EFI_EBC_INTERPRETER_PROTOCOL_GUID \
+ { \
+ 0x13AC6DD1, 0x73D0, 0x11D4, {0xB0, 0x6B, 0x00, 0xAA, 0x00, 0xBD, 0x6D, 0xE7 } \
+ }
+
+//
+// Protocol Guid Name defined in spec.
+//
+#define EFI_EBC_PROTOCOL_GUID EFI_EBC_INTERPRETER_PROTOCOL_GUID
+
+//
+// Define for forward reference.
+//
+typedef struct _EFI_EBC_PROTOCOL EFI_EBC_PROTOCOL;
+
+/**
+ Create a thunk for an image entry point. In short, given the physical address
+ of the entry point for a loaded image, create a thunk that does some
+ fixup of arguments (and perform any other necessary overhead) and then
+ calls the original entry point. The caller can then use the returned pointer
+ to the created thunk as the new entry point to image.
+
+ @param This protocol instance pointer
+ @param ImageHandle handle to the image. The EBC interpreter may use this to keep
+ track of any resource allocations performed in loading and
+ executing the image.
+ @param EbcEntryPoint the entry point for the image (as defined in the file header)
+ @param Thunk pointer to thunk pointer where the address of the created
+ thunk is returned.
+
+ @return Standard EFI_STATUS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EBC_CREATE_THUNK) (
+ IN EFI_EBC_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle,
+ IN VOID *EbcEntryPoint,
+ OUT VOID **Thunk
+ );
+
+/**
+ Perform any cleanup necessary when an image is unloaded. Basically it gives
+ the EBC interpreter the chance to free up any resources allocated during
+ load and execution of an EBC image.
+
+ @param This protocol instance pointer
+ @param ImageHandle the handle of the image being unloaded.
+
+ @return Standard EFI_STATUS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EBC_UNLOAD_IMAGE) (
+ IN EFI_EBC_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle
+ );
+
+/**
+ The I-Cache-flush registration service takes a pointer to a function to
+ call to flush the I-Cache. Here's the prototype for that function pointer.
+
+ @param Start physical start address of CPU instruction cache to flush.
+ @param Length how many bytes to flush of the instruction cache.
+
+ @return Standard EFI_STATUS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EBC_ICACHE_FLUSH) (
+ IN EFI_PHYSICAL_ADDRESS Start,
+ IN UINT64 Length
+ );
+
+/**
+ This routine is called by the core firmware to provide the EBC driver with
+ a function to call to flush the CPU's instruction cache following creation
+ of a thunk. It is not required.
+
+ @param This protocol instance pointer
+ @param Flush pointer to the function to call to flush the CPU instruction
+ cache.
+
+ @return Standard EFI_STATUS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EBC_REGISTER_ICACHE_FLUSH) (
+ IN EFI_EBC_PROTOCOL *This,
+ IN EBC_ICACHE_FLUSH Flush
+ );
+
+/**
+ This routine can be called to get the VM revision. It returns the same
+ value as the EBC BREAK 1 instruction returns.
+
+ @param This protocol instance pointer
+ @param Version pointer to where to return the VM version
+
+ @return Standard EFI_STATUS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EBC_GET_VERSION) (
+ IN EFI_EBC_PROTOCOL *This,
+ IN OUT UINT64 *Version
+ );
+
+//
+// Prototype for the actual EBC protocol interface
+//
+struct _EFI_EBC_PROTOCOL {
+ EFI_EBC_CREATE_THUNK CreateThunk;
+ EFI_EBC_UNLOAD_IMAGE UnloadImage;
+ EFI_EBC_REGISTER_ICACHE_FLUSH RegisterICacheFlush;
+ EFI_EBC_GET_VERSION GetVersion;
+};
+
+//
+// Extern the global EBC protocol GUID
+//
+extern EFI_GUID gEfiEbcProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/EdidActive.h b/MdePkg/Include/Protocol/EdidActive.h new file mode 100644 index 0000000000..0562cbec36 --- /dev/null +++ b/MdePkg/Include/Protocol/EdidActive.h @@ -0,0 +1,34 @@ +/** @file
+ EDID Active Protocol from the UEFI 2.0 specification.
+
+ Placed on the video output device child handle that are actively displaying output.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EdidActive.h
+
+**/
+
+#ifndef __EDID_ACTIVE_H__
+#define __EDID_ACTIVE_H__
+
+#define EFI_EDID_ACTIVE_PROTOCOL_GUID \
+ { \
+ 0xbd8c1056, 0x9f36, 0x44ec, {0x92, 0xa8, 0xa6, 0x33, 0x7f, 0x81, 0x79, 0x86 } \
+ }
+
+typedef struct {
+ UINT32 SizeOfEdid;
+ UINT8 *Edid;
+} EFI_EDID_ACTIVE_PROTOCOL;
+
+extern EFI_GUID gEfiEdidActiveProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/EdidDiscovered.h b/MdePkg/Include/Protocol/EdidDiscovered.h new file mode 100644 index 0000000000..6790666b67 --- /dev/null +++ b/MdePkg/Include/Protocol/EdidDiscovered.h @@ -0,0 +1,35 @@ +/** @file
+ EDID Discovered Protocol from the UEFI 2.0 specification.
+
+ This protocol is placed on the video output device child handle and it represents
+ the EDID information being used for output device represented by the child handle.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EdidDiscovered.h
+
+**/
+
+#ifndef __EDID_DISCOVERED_H__
+#define __EDID_DISCOVERED_H__
+
+#define EFI_EDID_DISCOVERED_PROTOCOL_GUID \
+ { \
+ 0x1c0c34f6, 0xd380, 0x41fa, {0xa0, 0x49, 0x8a, 0xd0, 0x6c, 0x1a, 0x66, 0xaa } \
+ }
+
+typedef struct {
+ UINT32 SizeOfEdid;
+ UINT8 *Edid;
+} EFI_EDID_DISCOVERED_PROTOCOL;
+
+extern EFI_GUID gEfiEdidDiscoveredProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/EdidOverride.h b/MdePkg/Include/Protocol/EdidOverride.h new file mode 100644 index 0000000000..3f4c5762e7 --- /dev/null +++ b/MdePkg/Include/Protocol/EdidOverride.h @@ -0,0 +1,66 @@ +/** @file
+ EDID Override Protocol from the UEFI 2.0 specification.
+
+ Allow platform to provide EDID information to producer of the Graphics Output
+ protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: EdidOverride.h
+
+**/
+
+#ifndef __EDID_OVERRIDE_H__
+#define __EDID_OVERRIDE_H__
+
+#define EFI_EDID_OVERRIDE_PROTOCOL_GUID \
+ { \
+ 0x48ecb431, 0xfb72, 0x45c0, {0xa9, 0x22, 0xf4, 0x58, 0xfe, 0x4, 0xb, 0xd5 } \
+ }
+
+typedef struct _EFI_EDID_OVERRIDE_PROTOCOL EFI_EDID_OVERRIDE_PROTOCOL;
+
+#define EFI_EDID_OVERRIDE_DONT_OVERRIDE 0x01
+#define EFI_EDID_OVERRIDE_ENABLE_HOT_PLUG 0x02
+
+/**
+ Return the current video mode information.
+
+ @param This Protocol instance pointer.
+ @param ChildHandle A child handle produced by the Graphics Output EFI
+ driver that represents a video output device.
+ @param Attributes The attributes associated with ChildHandle video output device.
+ @param EdidSize A pointer to the size, in bytes, of the Edid buffer.
+ @param Edid A pointer to callee allocated buffer that contains the EDID that
+ should be used for ChildHandle. A value of NULL
+ represents no EDID override for ChildHandle.
+
+ @retval EFI_SUCCESS Valid overrides returned for ChildHandle.
+ @retval EFI_UNSUPPORTED ChildHandle has no overrides.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EDID_OVERRIDE_PROTOCOL_GET_EDID) (
+ IN EFI_EDID_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE *ChildHandle,
+ OUT UINT32 *Attributes,
+ IN OUT UINTN *EdidSize,
+ IN OUT UINT8 **Edid
+ )
+;
+
+struct _EFI_EDID_OVERRIDE_PROTOCOL {
+ EFI_EDID_OVERRIDE_PROTOCOL_GET_EDID GetEdid;
+};
+
+extern EFI_GUID gEfiEdidOverrideProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/EfiNetworkInterfaceIdentifier.h b/MdePkg/Include/Protocol/EfiNetworkInterfaceIdentifier.h new file mode 100644 index 0000000000..98f1c597a4 --- /dev/null +++ b/MdePkg/Include/Protocol/EfiNetworkInterfaceIdentifier.h @@ -0,0 +1,92 @@ +/** @file
+ Revision history:
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module name:
+
+ EfiNetworkInterfaceIdentifier.h
+
+**/
+
+#ifndef __EFI_NETWORK_INTERFACE_IDENTIFER_H__
+#define __EFI_NETWORK_INTERFACE_IDENTIFER_H__
+
+
+#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_GUID \
+ { \
+ 0xE18541CD, 0xF755, 0x4f73, {0x92, 0x8D, 0x64, 0x3C, 0x8A, 0x79, 0xB2, 0x29 } \
+ }
+
+#define EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL_REVISION 0x00010000
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL;
+
+typedef enum {
+ EfiNetworkInterfaceUndi = 1
+} EFI_NETWORK_PROTOCOL_TYPE;
+
+struct _EFI_NETWORK_INTERFACE_IDENTIFIER_PROTOCOL {
+
+ UINT64 Revision;
+ //
+ // Revision of the network interface identifier protocol interface.
+ //
+ UINT64 ID;
+ //
+ // Address of the first byte of the identifying structure for this
+ // network interface. This is set to zero if there is no structure.
+ //
+ // For PXE/UNDI this is the first byte of the !PXE structure.
+ //
+ UINT64 ImageAddr;
+ //
+ // Address of the UNrelocated driver/ROM image. This is set
+ // to zero if there is no driver/ROM image.
+ //
+ // For 16-bit UNDI, this is the first byte of the option ROM in
+ // upper memory.
+ //
+ // For 32/64-bit S/W UNDI, this is the first byte of the EFI ROM
+ // image.
+ //
+ // For H/W UNDI, this is set to zero.
+ //
+ UINT32 ImageSize;
+ //
+ // Size of the UNrelocated driver/ROM image of this network interface.
+ // This is set to zero if there is no driver/ROM image.
+ //
+ CHAR8 StringId[4];
+ //
+ // 4 char ASCII string to go in class identifier (option 60) in DHCP
+ // and Boot Server discover packets.
+ // For EfiNetworkInterfaceUndi this field is "UNDI".
+ // For EfiNetworkInterfaceSnp this field is "SNPN".
+ //
+ UINT8 Type;
+ UINT8 MajorVer;
+ UINT8 MinorVer;
+ //
+ // Information to be placed into the PXE DHCP and Discover packets.
+ // This is the network interface type and version number that will
+ // be placed into DHCP option 94 (client network interface identifier).
+ //
+ BOOLEAN Ipv6Supported;
+ UINT8 IfNum; // interface number to be used with pxeid structure
+};
+
+extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid;
+extern EFI_GUID gEfiNetworkInterfaceIdentifierProtocolGuid_31;
+
+#endif // _EFI_NII_H
diff --git a/MdePkg/Include/Protocol/FileInfo.h b/MdePkg/Include/Protocol/FileInfo.h new file mode 100644 index 0000000000..55cf6ae38e --- /dev/null +++ b/MdePkg/Include/Protocol/FileInfo.h @@ -0,0 +1,53 @@ +/** @file
+ SimpleFileSystem protocol as defined in the EFI 1.0 specification.
+
+ The SimpleFileSystem protocol is the programatic access to the FAT (12,16,32)
+ file system specified in EFI 1.0. It can also be used to abstract any
+ file system other than FAT.
+
+ EFI 1.0 can boot from any valid EFI image contained in a SimpleFileSystem
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FileInfo.c
+
+**/
+
+#ifndef __FILE_INFO_H__
+#define __FILE_INFO_H__
+
+#define EFI_FILE_INFO_ID \
+ { \
+ 0x9576e92, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct {
+ UINT64 Size;
+ UINT64 FileSize;
+ UINT64 PhysicalSize;
+ EFI_TIME CreateTime;
+ EFI_TIME LastAccessTime;
+ EFI_TIME ModificationTime;
+ UINT64 Attribute;
+ CHAR16 FileName[1];
+} EFI_FILE_INFO;
+
+//
+// The FileName field of the EFI_FILE_INFO data structure is variable length.
+// Whenever code needs to know the size of the EFI_FILE_INFO data structure, it needs to
+// be the size of the data structure without the FileName field. The following macro
+// computes this size correctly no matter how big the FileName array is declared.
+// This is required to make the EFI_FILE_INFO data structure ANSI compilant.
+//
+#define SIZE_OF_EFI_FILE_INFO EFI_FIELD_OFFSET (EFI_FILE_INFO, FileName)
+
+extern EFI_GUID gEfiFileInfoGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FileSystemInfo.h b/MdePkg/Include/Protocol/FileSystemInfo.h new file mode 100644 index 0000000000..f6e7488a08 --- /dev/null +++ b/MdePkg/Include/Protocol/FileSystemInfo.h @@ -0,0 +1,45 @@ +/** @file
+ FileSystemInfo protocol as defined in the EFI 1.0 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FileSystemInfo.h
+
+**/
+
+#ifndef __FILE_SYSTEM_INFO_H__
+#define __FILE_SYSTEM_INFO_H__
+
+#define EFI_FILE_SYSTEM_INFO_ID_GUID \
+ { \
+ 0x9576e93, 0x6d3f, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct {
+ UINT64 Size;
+ BOOLEAN ReadOnly;
+ UINT64 VolumeSize;
+ UINT64 FreeSpace;
+ UINT32 BlockSize;
+ CHAR16 VolumeLabel[1];
+} EFI_FILE_SYSTEM_INFO;
+
+//
+// The VolumeLabel field of the EFI_FILE_SYSTEM_INFO data structure is variable length.
+// Whenever code needs to know the size of the EFI_FILE_SYSTEM_INFO data structure, it needs
+// to be the size of the data structure without the VolumeLable field. The following macro
+// computes this size correctly no matter how big the VolumeLable array is declared.
+// This is required to make the EFI_FILE_SYSTEM_INFO data structure ANSI compilant.
+//
+#define SIZE_OF_EFI_FILE_SYSTEM_INFO EFI_FIELD_OFFSET (EFI_FILE_SYSTEM_INFO, VolumeLabel)
+
+extern EFI_GUID gEfiFileSystemInfoGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FileSystemVolumeLabelInfo.h b/MdePkg/Include/Protocol/FileSystemVolumeLabelInfo.h new file mode 100644 index 0000000000..baba2764db --- /dev/null +++ b/MdePkg/Include/Protocol/FileSystemVolumeLabelInfo.h @@ -0,0 +1,42 @@ +/** @file
+ FileSystemVolumeLabelInfo protocol as defined in the EFI 1.0 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FileSystemVolumeLabelInfo.h
+
+**/
+
+#ifndef __FILE_SYSTEM_VOLUME_LABEL_INFO_H__
+#define __FILE_SYSTEM_VOLUME_LABEL_INFO_H__
+
+#define EFI_FILE_SYSTEM_VOLUME_LABEL_INFO_ID_GUID \
+ { \
+ 0xDB47D7D3, 0xFE81, 0x11d3, {0x9A, 0x35, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \
+ }
+
+//
+// Protocol Name defined in spec.
+//
+#define EFI_FILE_SYSTEM_VOLUME_LABEL_ID \
+ EFI_FILE_SYSTEM_VOLUME_LABEL_INFO_ID_GUID
+
+typedef struct {
+ CHAR16 VolumeLabel[1];
+} EFI_FILE_SYSTEM_VOLUME_LABEL_INFO;
+
+typedef EFI_FILE_SYSTEM_VOLUME_LABEL_INFO EFI_FILE_SYSTEM_VOLUME_LABEL;
+
+#define SIZE_OF_EFI_FILE_SYSTEM_VOLUME_LABEL_INFO \
+ EFI_FIELD_OFFSET (EFI_FILE_SYSTEM_VOLUME_LABEL_INFO, VolumeLabel)
+
+extern EFI_GUID gEfiFileSystemVolumeLabelInfoIdGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FirmwareVolume.h b/MdePkg/Include/Protocol/FirmwareVolume.h new file mode 100644 index 0000000000..7f86dbb853 --- /dev/null +++ b/MdePkg/Include/Protocol/FirmwareVolume.h @@ -0,0 +1,321 @@ +/** @file
+ This file declares Firmware Volume protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolume.h
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume specification.
+ Version 0.9
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_H__
+#define __FIRMWARE_VOLUME_H__
+
+
+//
+// Firmware Volume Protocol GUID definition
+//
+#define EFI_FIRMWARE_VOLUME_PROTOCOL_GUID \
+ { \
+ 0x389F751F, 0x1838, 0x4388, {0x83, 0x90, 0xCD, 0x81, 0x54, 0xBD, 0x27, 0xF8 } \
+ }
+
+#define FV_DEVICE_SIGNATURE EFI_SIGNATURE_32 ('_', 'F', 'V', '_')
+
+typedef struct _EFI_FIRMWARE_VOLUME_PROTOCOL EFI_FIRMWARE_VOLUME_PROTOCOL;
+
+//
+// EFI_FV_ATTRIBUTES bit definitions
+//
+typedef UINT64 EFI_FV_ATTRIBUTES;
+
+//
+// ************************************************************
+// EFI_FV_ATTRIBUTES bit definitions
+// ************************************************************
+//
+#define EFI_FV_READ_DISABLE_CAP 0x0000000000000001ULL
+#define EFI_FV_READ_ENABLE_CAP 0x0000000000000002ULL
+#define EFI_FV_READ_STATUS 0x0000000000000004ULL
+
+#define EFI_FV_WRITE_DISABLE_CAP 0x0000000000000008ULL
+#define EFI_FV_WRITE_ENABLE_CAP 0x0000000000000010ULL
+#define EFI_FV_WRITE_STATUS 0x0000000000000020ULL
+
+#define EFI_FV_LOCK_CAP 0x0000000000000040ULL
+#define EFI_FV_LOCK_STATUS 0x0000000000000080ULL
+#define EFI_FV_WRITE_POLICY_RELIABLE 0x0000000000000100ULL
+
+#define EFI_FV_ALIGNMENT_CAP 0x0000000000008000ULL
+#define EFI_FV_ALIGNMENT_2 0x0000000000010000ULL
+#define EFI_FV_ALIGNMENT_4 0x0000000000020000ULL
+#define EFI_FV_ALIGNMENT_8 0x0000000000040000ULL
+#define EFI_FV_ALIGNMENT_16 0x0000000000080000ULL
+#define EFI_FV_ALIGNMENT_32 0x0000000000100000ULL
+#define EFI_FV_ALIGNMENT_64 0x0000000000200000ULL
+#define EFI_FV_ALIGNMENT_128 0x0000000000400000ULL
+#define EFI_FV_ALIGNMENT_256 0x0000000000800000ULL
+#define EFI_FV_ALIGNMENT_512 0x0000000001000000ULL
+#define EFI_FV_ALIGNMENT_1K 0x0000000002000000ULL
+#define EFI_FV_ALIGNMENT_2K 0x0000000004000000ULL
+#define EFI_FV_ALIGNMENT_4K 0x0000000008000000ULL
+#define EFI_FV_ALIGNMENT_8K 0x0000000010000000ULL
+#define EFI_FV_ALIGNMENT_16K 0x0000000020000000ULL
+#define EFI_FV_ALIGNMENT_32K 0x0000000040000000ULL
+#define EFI_FV_ALIGNMENT_64K 0x0000000080000000ULL
+
+//
+// Protocol API definitions
+//
+
+/**
+ Retrieves attributes, insures positive polarity of attribute bits, returns
+ resulting attributes in output parameter
+
+ @param This Calling context
+ @param Attributes output buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_GET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ OUT EFI_FV_ATTRIBUTES *Attributes
+ );
+
+/**
+ Sets volume attributes
+
+ @param This Calling context
+ @param Attributes Buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_SET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT EFI_FV_ATTRIBUTES *Attributes
+ );
+
+typedef UINT32 EFI_FV_FILE_ATTRIBUTES;
+
+#define EFI_FV_FILE_ATTRIB_ALIGNMENT 0x0000001F
+
+/**
+ Read the requested file (NameGuid) and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying which file to read
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param FoundType Indicates the type of the file who's data is returned
+ @param FileAttributes Indicates the attributes of the file who's data is resturned
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS
+ @retval EFI_WARN_BUFFER_TOO_SMALL
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_READ_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT EFI_FV_FILETYPE *FoundType,
+ OUT EFI_FV_FILE_ATTRIBUTES *FileAttributes,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Read the requested section from the specified file and returns data in Buffer.
+
+ @param This Calling context
+ @param NameGuid Filename identifying the file from which to read
+ @param SectionType Indicates what section type to retrieve
+ @param SectionInstance Indicates which instance of SectionType to retrieve
+ @param Buffer Pointer to pointer to buffer in which contents of file are returned.
+ <br>
+ If Buffer is NULL, only type, attributes, and size are returned as
+ there is no output buffer.
+ <br>
+ If Buffer != NULL and *Buffer == NULL, the output buffer is allocated
+ from BS pool by ReadFile
+ <br>
+ If Buffer != NULL and *Buffer != NULL, the output buffer has been
+ allocated by the caller and is being passed in.
+
+ @param BufferSize Indicates the buffer size passed in, and on output the size
+ required to complete the read
+ @param AuthenticationStatus Indicates the authentication status of the data
+
+ @retval EFI_SUCCESS
+ @retval EFI_WARN_BUFFER_TOO_SMALL
+ @retval EFI_OUT_OF_RESOURCES
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_READ_SECTION) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN EFI_GUID *NameGuid,
+ IN EFI_SECTION_TYPE SectionType,
+ IN UINTN SectionInstance,
+ IN OUT VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+typedef UINT32 EFI_FV_WRITE_POLICY;
+
+#define EFI_FV_UNRELIABLE_WRITE 0x00000000
+#define EFI_FV_RELIABLE_WRITE 0x00000001
+
+typedef struct {
+ EFI_GUID *NameGuid;
+ EFI_FV_FILETYPE Type;
+ EFI_FV_FILE_ATTRIBUTES FileAttributes;
+ VOID *Buffer;
+ UINT32 BufferSize;
+} EFI_FV_WRITE_FILE_DATA;
+
+/**
+ Write the supplied file (NameGuid) to the FV.
+
+ @param This Calling context
+ @param NumberOfFiles Indicates the number of file records pointed to by FileData
+ @param WritePolicy Indicates the level of reliability of the write with respect to
+ things like power failure events.
+ @param FileData A pointer to an array of EFI_FV_WRITE_FILE_DATA structures. Each
+ element in the array indicates a file to write, and there are
+ NumberOfFiles elements in the input array.
+
+ @retval EFI_SUCCESS
+ @retval EFI_OUT_OF_RESOURCES
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_WRITE_PROTECTED
+ @retval EFI_NOT_FOUND
+ @retval EFI_INVALID_PARAMETER
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_WRITE_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN UINT32 NumberOfFiles,
+ IN EFI_FV_WRITE_POLICY WritePolicy,
+ IN EFI_FV_WRITE_FILE_DATA *FileData
+ );
+
+/**
+ Given the input key, search for the next matching file in the volume.
+
+ @param This Calling context
+ @param Key Pointer to a caller allocated buffer that contains an implementation
+ specific key that is used to track where to begin searching on
+ successive calls.
+ @param FileType Indicates the file type to filter for
+ @param NameGuid Guid filename of the file found
+ @param Attributes Attributes of the file found
+ @param Size Size in bytes of the file found
+
+ @retval EFI_SUCCESS
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FV_GET_NEXT_FILE) (
+ IN EFI_FIRMWARE_VOLUME_PROTOCOL *This,
+ IN OUT VOID *Key,
+ IN OUT EFI_FV_FILETYPE *FileType,
+ OUT EFI_GUID *NameGuid,
+ OUT EFI_FV_FILE_ATTRIBUTES *Attributes,
+ OUT UINTN *Size
+ );
+
+/**
+ @par Protocol Description:
+ The Firmware Volume Protocol provides file-level access to the firmware volume.
+ Each firmware volume driver must produce an instance of the Firmware Volume
+ Protocol if the firmware volume is to be visible to the system. The Firmware
+ Volume Protocol also provides mechanisms for determining and modifying some
+ attributes of the firmware volume.
+
+ @param GetVolumeAttributes
+ Retrieves volume capabilities and current settings.
+
+ @param SetVolumeAttributes
+ Modifies the current settings of the firmware volume.
+
+ @param ReadFile
+ Reads an entire file from the firmware volume.
+
+ @param ReadSection
+ Reads a single section from a file into a buffer.
+
+ @param WriteFile
+ Writes an entire file into the firmware volume.
+
+ @param GetNextFile
+ Provides service to allow searching the firmware volume.
+
+ @param KeySize
+ Data field that indicates the size in bytes of the Key input buffer for
+ the GetNextFile() API.
+
+ @param ParentHandle
+ Handle of the parent firmware volume.
+
+**/
+struct _EFI_FIRMWARE_VOLUME_PROTOCOL {
+ EFI_FV_GET_ATTRIBUTES GetVolumeAttributes;
+ EFI_FV_SET_ATTRIBUTES SetVolumeAttributes;
+ EFI_FV_READ_FILE ReadFile;
+ EFI_FV_READ_SECTION ReadSection;
+ EFI_FV_WRITE_FILE WriteFile;
+ EFI_FV_GET_NEXT_FILE GetNextFile;
+ UINT32 KeySize;
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FirmwareVolumeBlock.h b/MdePkg/Include/Protocol/FirmwareVolumeBlock.h new file mode 100644 index 0000000000..ee849a141e --- /dev/null +++ b/MdePkg/Include/Protocol/FirmwareVolumeBlock.h @@ -0,0 +1,251 @@ +/** @file
+ This file declares Firmware Volume Block protocol.
+
+ Low level firmware device access routines to abstract firmware device
+ hardware.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolumeBlock.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Firmware Volume Block specification.
+ Version 0.9
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_BLOCK_H__
+#define __FIRMWARE_VOLUME_BLOCK_H__
+
+
+#define EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL_GUID \
+ { \
+ 0xDE28BC59, 0x6228, 0x41BD, {0xBD, 0xF6, 0xA3, 0xB9, 0xAD, 0xB5, 0x8D, 0xA1 } \
+ }
+
+typedef struct _EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL;
+
+/**
+ Retrieves Volume attributes. No polarity translations are done.
+
+ @param This Calling context
+ @param Attributes output buffer which contains attributes
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_FVB_ATTRIBUTES *Attributes
+ )
+;
+
+/**
+ Sets Volume attributes. No polarity translations are done.
+
+ @param This Calling context
+ @param Attributes On input: contains new attributes
+ On output: contains current attributes of FV
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_SET_ATTRIBUTES) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN OUT EFI_FVB_ATTRIBUTES *Attributes
+ )
+;
+
+/**
+ Retrieves the physical address of a memory mapped FV.
+
+ @param This Calling context
+ @param Attributes Address is a pointer to a caller allocated EFI_PHYSICAL_ADDRESS
+ that on successful return from GetPhysicalAddress() contains the
+ base address of the firmware volume.
+
+ @retval EFI_UNSUPPORTED
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_PHYSICAL_ADDRESS) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ OUT EFI_PHYSICAL_ADDRESS *Address
+ )
+;
+
+/**
+ Retrieves the size in bytes of a specific block within an FV.
+
+ @param This Calling context.
+ @param Lba Indicates which block to return the size for.
+ @param BlockSize BlockSize is a pointer to a caller allocated
+ UINTN in which the size of the block is returned.
+ @param NumberOfBlocks NumberOfBlocks is a pointer to a caller allocated
+ UINTN in which the number of consecutive blocks
+ starting with Lba is returned. All blocks in this
+ range have a size of BlockSize.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_GET_BLOCK_SIZE) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ OUT UINTN *BlockSize,
+ OUT UINTN *NumberOfBlocks
+ )
+;
+
+/**
+ Reads data beginning at Lba:Offset from FV and places the data in Buffer.
+ The read terminates either when *NumBytes of data have been read, or when
+ a block boundary is reached. *NumBytes is updated to reflect the actual
+ number of bytes read.
+
+ @param This Calling context
+ @param Lba Block in which to begin read
+ @param Offset Offset in the block at which to begin read
+ @param NumBytes At input, indicates the requested read size. At output, indicates
+ the actual number of bytes read.
+ @param Buffer Data buffer in which to place data read.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_READ) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ OUT UINT8 *Buffer
+ )
+;
+
+/**
+ Writes data beginning at Lba:Offset from FV. The write terminates either
+ when *NumBytes of data have been written, or when a block boundary is
+ reached. *NumBytes is updated to reflect the actual number of bytes
+ written.
+
+ @param This Calling context
+ @param Lba Block in which to begin write
+ @param Offset Offset in the block at which to begin write
+ @param NumBytes At input, indicates the requested write size. At output, indicates
+ the actual number of bytes written.
+ @param Buffer Buffer containing source data for the write.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_NOT_FOUND
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_WRITE) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ IN EFI_LBA Lba,
+ IN UINTN Offset,
+ IN OUT UINTN *NumBytes,
+ IN UINT8 *Buffer
+ )
+;
+
+#define EFI_LBA_LIST_TERMINATOR 0xFFFFFFFFFFFFFFFFULL
+
+/**
+ The EraseBlock() function erases one or more blocks as denoted by the
+ variable argument list. The entire parameter list of blocks must be verified
+ prior to erasing any blocks. If a block is requested that does not exist
+ within the associated firmware volume (it has a larger index than the last
+ block of the firmware volume), the EraseBlock() function must return
+ EFI_INVALID_PARAMETER without modifying the contents of the firmware volume.
+
+ @param This Calling context
+ @param ... Starting LBA followed by Number of Lba to erase. a -1 to terminate
+ the list.
+
+ @retval EFI_INVALID_PARAMETER
+ @retval EFI_DEVICE_ERROR
+ @retval EFI_SUCCESS
+ @retval EFI_ACCESS_DENIED
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FVB_ERASE_BLOCKS) (
+ IN EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL *This,
+ ...
+ )
+;
+
+/**
+ @par Protocol Description:
+ This protocol provides control over block-oriented firmware devices.
+ Typically, the FFS (or an alternate file system) driver consumes the
+ Firmware Volume Block Protocol and produces the Firmware Volume Protocol.
+
+ @param GetAttributes
+ Retrieves the current volume attributes.
+
+ @param SetAttributes
+ Sets the current volume attributes.
+
+ @param GetPhysicalAddress
+ Retrieves the memory-mapped address of the firmware volume.
+
+ @param GetBlockSize
+ Retrieves the size for a specific block.
+
+ @param Read
+ Reads n bytes into a buffer from the firmware volume hardware.
+
+ @param Write
+ Writes n bytes from a buffer into the firmware volume hardware.
+
+ @param EraseBlocks
+ Erases specified block(s) and sets all values as indicated by
+ the EFI_FVB_ERASE_POLARITY bit.
+
+ @param ParentHandle
+ Handle of the parent firmware volume.
+
+**/
+struct _EFI_FIRMWARE_VOLUME_BLOCK_PROTOCOL {
+ EFI_FVB_GET_ATTRIBUTES GetVolumeAttributes;
+ EFI_FVB_SET_ATTRIBUTES SetVolumeAttributes;
+ EFI_FVB_GET_PHYSICAL_ADDRESS GetPhysicalAddress;
+ EFI_FVB_GET_BLOCK_SIZE GetBlockSize;
+ EFI_FVB_READ Read;
+ EFI_FVB_WRITE Write;
+ EFI_FVB_ERASE_BLOCKS EraseBlocks;
+ EFI_HANDLE ParentHandle;
+};
+
+extern EFI_GUID gEfiFirmwareVolumeBlockProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FirmwareVolumeDispatch.h b/MdePkg/Include/Protocol/FirmwareVolumeDispatch.h new file mode 100644 index 0000000000..249a476b77 --- /dev/null +++ b/MdePkg/Include/Protocol/FirmwareVolumeDispatch.h @@ -0,0 +1,33 @@ +/** @file
+ This file declares Firmware Volume Dispatch protocol.
+
+ Presence of this protocol tells the dispatch to dispatch from this Firmware
+ Volume
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FirmwareVolumeDispatch.h
+
+ @par Revision Reference:
+ This protol will be defined in DXE CIS Spec.
+ Version 0.91C.
+
+**/
+
+#ifndef __FIRMWARE_VOLUME_DISPATCH_H__
+#define __FIRMWARE_VOLUME_DISPATCH_H__
+
+#define EFI_FIRMWARE_VOLUME_DISPATCH_PROTOCOL_GUID \
+ { 0x7aa35a69, 0x506c, 0x444f, {0xa7, 0xaf, 0x69, 0x4b, 0xf5, 0x6f, 0x71, 0xc8 } }
+
+
+extern EFI_GUID gEfiFirmwareVolumeDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FormBrowser.h b/MdePkg/Include/Protocol/FormBrowser.h new file mode 100644 index 0000000000..c0ee94ad65 --- /dev/null +++ b/MdePkg/Include/Protocol/FormBrowser.h @@ -0,0 +1,180 @@ +/** @file
+ The EFI_FORM_BROWSER_PROTOCOL is the interface to the EFI
+ Configuration Driver. This will allow the caller to direct the
+ configuration driver to use either the HII database or use the passed
+ in packet of data. This will also allow the caller to post messages
+ into the configuration drivers internal mailbox.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FormBrowser.h
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef __FORM_BROWSER_H__
+#define __FORM_BROWSER_H__
+
+
+#define EFI_FORM_BROWSER_PROTOCOL_GUID \
+ { \
+ 0xe5a1333e, 0xe1b4, 0x4d55, {0xce, 0xeb, 0x35, 0xc3, 0xef, 0x13, 0x34, 0x43 } \
+ }
+
+typedef struct _EFI_FORM_BROWSER_PROTOCOL EFI_FORM_BROWSER_PROTOCOL;
+
+typedef struct {
+ UINT32 Length;
+ UINT16 Type;
+ UINT8 Data[1];
+} EFI_HII_PACKET;
+
+typedef struct {
+ EFI_HII_IFR_PACK *IfrData;
+ EFI_HII_STRING_PACK *StringData;
+} EFI_IFR_PACKET;
+
+typedef struct {
+ UINTN LeftColumn;
+ UINTN RightColumn;
+ UINTN TopRow;
+ UINTN BottomRow;
+} EFI_SCREEN_DESCRIPTOR;
+
+/**
+ Provides direction to the configuration driver whether to use the HII
+ database or a passed-in set of data. This function also establishes a
+ pointer to the calling driver¡¯s callback interface.
+
+ @param This A pointer to the EFI_FORM_BROWSER_PROTOCOL instance.
+
+ @param UseDatabase Determines whether the HII database is to be
+ used to gather information. If the value is FALSE, the configuration
+ driver will get the information provided in the passed-in Packet parameters.
+
+ @param Handle A pointer to an array of HII handles to display. This value
+ should correspond to the value of the HII form package that is required to
+ be displayed.
+
+ @param HandleCount The number of handles in the array specified by Handle.
+
+ @param Packet A pointer to a set of data containing pointers to IFR
+ and/or string data.
+
+ @param CallbackHandle The handle to the driver¡¯s callback interface.
+ This parameter is used only when the UseDatabase parameter is FALSE
+ and an application wants to register a callback with the browser
+
+ @param NvMapOverride This buffer is used only when there is no NV variable
+ to define the current settings and the caller needs to provide to the browser
+ the current settings for the "fake" NV variable.
+
+ @param ScreenDimensions Allows the browser to be called so that it occupies
+ a portion of the physical screen instead of dynamically determining the
+ screen dimensions.
+
+ @param ResetRequired This BOOLEAN value will tell the caller if a reset
+ is required based on the data that might have been changed. The ResetRequired
+ parameter is primarily applicable for configuration applications, and is an
+ optional parameter.
+
+ @retval EFI_SUCCESS The function completed successfully
+
+ @retval EFI_NOT_FOUND The variable was not found.
+
+ @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result.
+ DataSize has been updated with the size needed to complete the request.
+
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SEND_FORM) (
+ IN EFI_FORM_BROWSER_PROTOCOL *This,
+ IN BOOLEAN UseDatabase,
+ IN EFI_HII_HANDLE *Handle,
+ IN UINTN HandleCount,
+ IN EFI_IFR_PACKET *Packet, OPTIONAL
+ IN EFI_HANDLE CallbackHandle, OPTIONAL
+ IN UINT8 *NvMapOverride, OPTIONAL
+ IN EFI_SCREEN_DESCRIPTOR *ScreenDimensions, OPTIONAL
+ OUT BOOLEAN *ResetRequired OPTIONAL
+ );
+
+/**
+ Routine used to abstract a generic dialog interface and return the selected
+ key or string.
+
+ @param NumberOfLines The number of lines for the dialog box.
+
+ @param HotKey Defines whether a single character is parsed (TRUE)
+ and returned in KeyValue or if a string is returned in StringBuffer.
+
+ @param MaximumStringSize The maximum size in bytes of a typed-in string.
+ Because each character is a CHAR16, the minimum string returned is two bytes.
+
+ @param StringBuffer The passed-in pointer to the buffer that will hold
+ the typed in string if HotKey is FALSE.
+
+ @param KeyValue The EFI_INPUT_KEY value returned if HotKey is TRUE.
+
+ @param String The pointer to the first string in the list of strings
+ that comprise the dialog box.
+
+ @param ... A series of NumberOfLines text strings that will be used
+ to construct the dialog box.
+
+ @retval EFI_SUCCESS The dialog was displayed and user interaction was received.
+
+ @retval EFI_DEVICE_ERROR The user typed in an ESC character to exit the routine.
+
+ @retval EFI_INVALID_PARAMETER One of the parameters was invalid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CREATE_POP_UP) (
+ IN UINTN NumberOfLines,
+ IN BOOLEAN HotKey,
+ IN UINTN MaximumStringSize,
+ OUT CHAR16 *StringBuffer,
+ OUT EFI_INPUT_KEY *KeyValue,
+ IN CHAR16 *String,
+ ...
+ );
+
+/**
+ @par Protocol Description:
+ The EFI_FORM_BROWSER_PROTOCOL is the interface to call for drivers to
+ leverage the EFI configuration driver interface.
+
+ @param SendForm
+ Provides direction to the configuration driver whether to use the HII
+ database or to use a passed-in set of data. This functions also establishes
+ a pointer to the calling driver¡¯s callback interface.
+
+ @param CreatePopUp
+ Routine used to abstract a generic dialog interface and return the
+ selected key or string.
+
+**/
+struct _EFI_FORM_BROWSER_PROTOCOL {
+ EFI_SEND_FORM SendForm;
+ EFI_CREATE_POP_UP CreatePopUp;
+};
+
+extern EFI_GUID gEfiFormBrowserProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/FormCallback.h b/MdePkg/Include/Protocol/FormCallback.h new file mode 100644 index 0000000000..7a1c5398b8 --- /dev/null +++ b/MdePkg/Include/Protocol/FormCallback.h @@ -0,0 +1,227 @@ +/** @file
+ The EFI_FORM_CALLBACK_PROTOCOL is the defined interface for access to custom
+ NV storage devices as well as communication of user selections in a more
+ interactive environment. This protocol should be published by hardware
+ specific drivers which want to export access to custom hardware storage or
+ publish IFR which has a requirement to call back the original driver.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: FormCallback.h
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef __FORM_CALLBACK_H__
+#define __FORM_CALLBACK_H__
+
+
+#define EFI_FORM_CALLBACK_PROTOCOL_GUID \
+ { \
+ 0xf3e4543d, 0xcf35, 0x6cef, {0x35, 0xc4, 0x4f, 0xe6, 0x34, 0x4d, 0xfc, 0x54 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_FORM_CALLBACK_PROTOCOL EFI_FORM_CALLBACK_PROTOCOL;
+
+
+#define RESET_REQUIRED 1 // Flags setting to signify that the callback operation resulted in an eventual
+// reset to be done upon exit of the browser
+//
+#define EXIT_REQUIRED 2 // Flags setting to signify that after the processing of the callback results - exit the browser
+#define SAVE_REQUIRED 4 // Flags setting to signify that after the processing of the callback results - save the NV data
+#define NV_CHANGED 8 // Flags setting to signify that after the processing of the callback results - turn the NV flag on
+#define NV_NOT_CHANGED 16 // Flags setting to signify that after the processing of the callback results - turn the NV flag off
+#pragma pack(1)
+typedef struct {
+ UINT8 OpCode; // Likely a string, numeric, or one-of
+ UINT8 Length; // Length of the EFI_IFR_DATA_ENTRY packet
+ UINT16 Flags; // Flags settings to determine what behavior is desired from the browser after the callback
+ VOID *Data; // The data in the form based on the op-code type - this is not a pointer to the data, the data follows immediately
+ // If the OpCode is a OneOf or Numeric type - Data is a UINT16 value
+ // If the OpCode is a String type - Data is a CHAR16[x] type
+ // If the OpCode is a Checkbox type - Data is a UINT8 value
+ // If the OpCode is a NV Access type - Data is a EFI_IFR_NV_DATA structure
+ //
+} EFI_IFR_DATA_ENTRY;
+
+typedef struct {
+ VOID *NvRamMap; // If the flag of the op-code specified retrieval of a copy of the NVRAM map,
+ // this is a pointer to a buffer copy
+ //
+ UINT32 EntryCount; // How many EFI_IFR_DATA_ENTRY entries
+ //
+ // EFI_IFR_DATA_ENTRY Data[1]; // The in-line Data entries.
+ //
+} EFI_IFR_DATA_ARRAY;
+
+typedef union {
+ EFI_IFR_DATA_ARRAY DataArray; // Primarily used by those who call back to their drivers and use HII as a repository
+ EFI_IFR_PACKET DataPacket; // Primarily used by those which do not use HII as a repository
+ CHAR16 *String; // If returning an error - fill the string with null-terminated contents
+} EFI_HII_CALLBACK_PACKET;
+
+typedef struct {
+ EFI_IFR_OP_HEADER Header;
+ UINT16 QuestionId; // Offset into the map
+ UINT8 StorageWidth; // Width of the value
+ //
+ // CHAR8 Data[1]; // The Data itself
+ //
+} EFI_IFR_NV_DATA;
+
+#pragma pack()
+//
+// The following types are currently defined:
+//
+/**
+ Returns the value of a variable.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+
+ @param VariableName A NULL-terminated Unicode string that is the
+ name of the vendor¡¯s variable.
+
+ @param VendorGuid A unique identifier for the vendor.
+
+ @param Attributes If not NULL, a pointer to the memory location to
+ return the attribute's bit-mask for the variable.
+
+ @param DataSize The size in bytes of the Buffer. A size of zero causes
+ the variable to be deleted.
+
+ @param Buffer The buffer to return the contents of the variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+ @retval EFI_NOT_FOUND The variable was not found.
+
+ @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result.
+ DataSize has been updated with the size needed to complete the request.
+
+ @retval EFI_INVALID_PARAMETER One of the parameters has an invalid value.
+
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_NV_READ) (
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes OPTIONAL,
+ IN OUT UINTN *DataSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Sets the value of a variable.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+
+ @param VariableName A NULL-terminated Unicode string that is the
+ name of the vendor's variable. Each VariableName is unique for each VendorGuid.
+
+ @param VendorGuid A unique identifier for the vendor.
+
+ @param Attributes Attributes bit-mask to set for the variable.
+
+ @param DataSize The size in bytes of the Buffer. A size of zero causes
+ the variable to be deleted.
+
+ @param Buffer The buffer containing the contents of the variable.
+
+ @param ResetRequired Returns a value from the driver that abstracts
+ this information and will enable a system to know if a system reset
+ is required to achieve the configuration changes being enabled through
+ this function.
+
+ @retval EFI_SUCCESS The firmware has successfully stored the variable and
+ its data as defined by the Attributes.
+
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold
+ the variable and its data.
+
+ @retval EFI_INVALID_PARAMETER An invalid combination of Attributes bits
+ was supplied, or the DataSize exceeds the maximum allowed.
+
+ @retval EFI_DEVICE_ERROR The variable could not be saved due to a hardware failure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_NV_WRITE) (
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ IN UINT32 Attributes,
+ IN UINTN DataSize,
+ IN VOID *Buffer,
+ OUT BOOLEAN *ResetRequired
+ );
+
+/**
+ This function is called to provide results data to the driver.
+
+ @param This A pointer to the EFI_FORM_CALLBACK_PROTOCOL instance.
+
+ @param KeyValue A unique value which is sent to the original exporting
+ driver so that it can identify the type of data to expect. The format of
+ the data tends to vary based on the opcode that generated the callback.
+
+ @param Data A pointer to the data being sent to the original exporting driver.
+
+ @param Packet A pointer to a packet of information which a driver passes
+ back to the browser.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FORM_CALLBACK) (
+ IN EFI_FORM_CALLBACK_PROTOCOL *This,
+ IN UINT16 KeyValue,
+ IN EFI_IFR_DATA_ARRAY *Data,
+ OUT EFI_HII_CALLBACK_PACKET **Packet
+ );
+
+/**
+ @par Protocol Description:
+ The EFI_FORM_CALLBACK_PROTOCOL is the defined interface for access to
+ custom NVS devices as well as communication of user selections in a more
+ interactive environment. This protocol should be published by hardware-specific
+ drivers that want to export access to custom hardware storage or publish IFR
+ that has a requirement to call back the original driver.
+
+ @param NvRead
+ The read operation to access the NV data serviced by a hardware-specific driver.
+
+ @param NvWrite
+ The write operation to access the NV data serviced by a hardware-specific driver.
+
+ @param Callback
+ The function that is called from the configuration browser to communicate key value pairs.
+
+**/
+struct _EFI_FORM_CALLBACK_PROTOCOL {
+ EFI_NV_READ NvRead;
+ EFI_NV_WRITE NvWrite;
+ EFI_FORM_CALLBACK Callback;
+};
+
+extern EFI_GUID gEfiFormCallbackProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/GraphicsOutput.h b/MdePkg/Include/Protocol/GraphicsOutput.h new file mode 100644 index 0000000000..1b4e1fca06 --- /dev/null +++ b/MdePkg/Include/Protocol/GraphicsOutput.h @@ -0,0 +1,194 @@ +/** @file
+ Graphics Output Protocol from the UEFI 2.0 specification.
+
+ Abstraction of a very simple graphics device.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: GraphicsOutput.h
+
+**/
+
+#ifndef __GRAPHICS_OUTPUT_H__
+#define __GRAPHICS_OUTPUT_H__
+
+#define EFI_GRAPHICS_OUTPUT_PROTOCOL_GUID \
+ { \
+ 0x9042a9de, 0x23dc, 0x4a38, {0x96, 0xfb, 0x7a, 0xde, 0xd0, 0x80, 0x51, 0x6a } \
+ }
+
+typedef struct _EFI_GRAPHICS_OUTPUT_PROTOCOL EFI_GRAPHICS_OUTPUT_PROTOCOL;
+
+typedef struct {
+ UINT32 RedMask;
+ UINT32 GreenMask;
+ UINT32 BlueMask;
+ UINT32 ReservedMask;
+} EFI_PIXEL_BITMASK;
+
+typedef enum {
+ PixelRedGreenBlueReserved8BitPerColor,
+ PixelBlueGreenRedReserved8BitPerColor,
+ PixelBitMask,
+ PixelBltOnly,
+ PixelFormatMax
+} EFI_GRAPHICS_PIXEL_FORMAT;
+
+typedef struct {
+ UINT32 Version;
+ UINT32 HorizontalResolution;
+ UINT32 VerticalResolution;
+ EFI_GRAPHICS_PIXEL_FORMAT PixelFormat;
+ EFI_PIXEL_BITMASK PixelInformation;
+ UINT32 PixelsPerScanLine;
+} EFI_GRAPHICS_OUTPUT_MODE_INFORMATION;
+
+/**
+ Return the current video mode information.
+
+ @param This Protocol instance pointer.
+ @param ModeNumber The mode number to return information on.
+ @param SizeOfInfo A pointer to the size, in bytes, of the Info buffer.
+ @param Info A pointer to callee allocated buffer that returns information about ModeNumber.
+
+ @retval EFI_SUCCESS Mode information returned.
+ @retval EFI_BUFFER_TOO_SMALL The Info buffer was too small.
+ @retval EFI_DEVICE_ERROR A hardware error occurred trying to retrieve the video mode.
+ @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()
+ @retval EFI_INVALID_PARAMETER One of the input args was NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE) (
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
+ IN UINT32 ModeNumber,
+ OUT UINTN *SizeOfInfo,
+ OUT EFI_GRAPHICS_OUTPUT_MODE_INFORMATION **Info
+ )
+;
+
+/**
+ Return the current video mode information.
+
+ @param This Protocol instance pointer.
+ @param ModeNumber The mode number to be set.
+
+ @retval EFI_SUCCESS Graphics mode was changed.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED ModeNumber is not supported by this device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE) (
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
+ IN UINT32 ModeNumber
+ )
+;
+
+typedef struct {
+ UINT8 Blue;
+ UINT8 Green;
+ UINT8 Red;
+ UINT8 Reserved;
+} EFI_GRAPHICS_OUTPUT_BLT_PIXEL;
+
+typedef union {
+ EFI_GRAPHICS_OUTPUT_BLT_PIXEL Pixel;
+ UINT32 Raw;
+} EFI_GRAPHICS_OUTPUT_BLT_PIXEL_UNION;
+
+typedef enum {
+ EfiBltVideoFill,
+ EfiBltVideoToBltBuffer,
+ EfiBltBufferToVideo,
+ EfiBltVideoToVideo,
+ EfiGraphicsOutputBltOperationMax
+} EFI_GRAPHICS_OUTPUT_BLT_OPERATION;
+
+/**
+ The following table defines actions for BltOperations:
+
+ <B>EfiBltVideoFill</B> - Write data from the BltBuffer pixel (SourceX, SourceY)
+ directly to every pixel of the video display rectangle
+ (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height).
+ Only one pixel will be used from the BltBuffer. Delta is NOT used.
+
+ <B>EfiBltVideoToBltBuffer</B> - Read data from the video display rectangle
+ (SourceX, SourceY) (SourceX + Width, SourceY + Height) and place it in
+ the BltBuffer rectangle (DestinationX, DestinationY )
+ (DestinationX + Width, DestinationY + Height). If DestinationX or
+ DestinationY is not zero then Delta must be set to the length in bytes
+ of a row in the BltBuffer.
+
+ <B>EfiBltBufferToVideo</B> - Write data from the BltBuffer rectangle
+ (SourceX, SourceY) (SourceX + Width, SourceY + Height) directly to the
+ video display rectangle (DestinationX, DestinationY)
+ (DestinationX + Width, DestinationY + Height). If SourceX or SourceY is
+ not zero then Delta must be set to the length in bytes of a row in the
+ BltBuffer.
+
+ <B>EfiBltVideoToVideo</B> - Copy from the video display rectangle (SourceX, SourceY)
+ (SourceX + Width, SourceY + Height) .to the video display rectangle
+ (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height).
+ The BltBuffer and Delta are not used in this mode.
+
+ @param This Protocol instance pointer.
+ @param BltBuffer Buffer containing data to blit into video buffer. This
+ buffer has a size of Width*Height*sizeof(EFI_GRAPHICS_OUTPUT_BLT_PIXEL)
+ @param BltOperation Operation to perform on BlitBuffer and video memory
+ @param SourceX X coordinate of source for the BltBuffer.
+ @param SourceY Y coordinate of source for the BltBuffer.
+ @param DestinationX X coordinate of destination for the BltBuffer.
+ @param DestinationY Y coordinate of destination for the BltBuffer.
+ @param Width Width of rectangle in BltBuffer in pixels.
+ @param Height Hight of rectangle in BltBuffer in pixels.
+ @param Delta OPTIONAL
+
+ @retval EFI_SUCCESS The Blt operation completed.
+ @retval EFI_INVALID_PARAMETER BltOperation is not valid.
+ @retval EFI_DEVICE_ERROR A hardware error occured writting to the video buffer.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT) (
+ IN EFI_GRAPHICS_OUTPUT_PROTOCOL *This,
+ IN EFI_GRAPHICS_OUTPUT_BLT_PIXEL *BltBuffer, OPTIONAL
+ IN EFI_GRAPHICS_OUTPUT_BLT_OPERATION BltOperation,
+ IN UINTN SourceX,
+ IN UINTN SourceY,
+ IN UINTN DestinationX,
+ IN UINTN DestinationY,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN UINTN Delta OPTIONAL
+ );
+
+typedef struct {
+ UINT32 MaxMode;
+ UINT32 Mode;
+ EFI_GRAPHICS_OUTPUT_MODE_INFORMATION *Info;
+ UINTN SizeOfInfo;
+ EFI_PHYSICAL_ADDRESS FrameBufferBase;
+ UINTN FrameBufferSize;
+} EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE;
+
+struct _EFI_GRAPHICS_OUTPUT_PROTOCOL {
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_QUERY_MODE QueryMode;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_SET_MODE SetMode;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_BLT Blt;
+ EFI_GRAPHICS_OUTPUT_PROTOCOL_MODE *Mode;
+};
+
+extern EFI_GUID gEfiGraphicsOutputProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/GuidedSectionExtraction.h b/MdePkg/Include/Protocol/GuidedSectionExtraction.h new file mode 100644 index 0000000000..d98c56a7bc --- /dev/null +++ b/MdePkg/Include/Protocol/GuidedSectionExtraction.h @@ -0,0 +1,102 @@ +/** @file
+ This file declares GUIDed section extraction protocol.
+
+ This interface provides a means of decoding a GUID defined encapsulation
+ section. There may be multiple different GUIDs associated with the GUIDed
+ section extraction protocol. That is, all instances of the GUIDed section
+ extraction protocol must have the same interface structure.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: GuidedSectionExtraction.h
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume Specification.
+ Version 0.9
+
+**/
+
+#ifndef __GUIDED_SECTION_EXTRACTION_PROTOCOL_H__
+#define __GUIDED_SECTION_EXTRACTION_PROTOCOL_H__
+
+
+//
+// Protocol GUID definition. Each GUIDed section extraction protocol has the
+// same interface but with different GUID. All the GUIDs is defined here.
+// May add multiple GUIDs here.
+//
+#define EFI_CRC32_GUIDED_SECTION_EXTRACTION_PROTOCOL_GUID \
+ { \
+ 0xFC1BCDB0, 0x7D31, 0x49aa, {0x93, 0x6A, 0xA4, 0x60, 0x0D, 0x9D, 0xD0, 0x83 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL;
+
+//
+// Protocol member functions
+//
+/**
+ Processes the input section and returns the data contained therein along
+ with the authentication status.
+
+ @param This Indicates the EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL instance.
+ @param InputSection Buffer containing the input GUIDed section to be processed.
+ @param OutputBuffer *OutputBuffer is allocated from boot services pool memory
+ and contains the new section stream.
+ @param OutputSize A pointer to a caller-allocated UINTN in which the size
+ of *OutputBuffer allocation is stored.
+ @param AuthenticationStatus A pointer to a caller-allocated UINT32 that
+ indicates the authentication status of the output buffer.
+
+ @retval EFI_SUCCESS The InputSection was successfully processed and the
+ section contents were returned.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to
+ process the request.
+ @retval EFI_INVALID_PARAMETER The GUID in InputSection does not match
+ this instance of the GUIDed Section Extraction Protocol.
+
+**/
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXTRACT_GUIDED_SECTION) (
+ IN EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL *This,
+ IN VOID *InputSection,
+ OUT VOID **OutputBuffer,
+ OUT UINTN *OutputSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+//
+// Protocol definition
+//
+/**
+ @par Protocol Description:
+ If a GUID-defined section is encountered when doing section extraction,
+ the section extraction driver calls the appropriate instance of the GUIDed
+ Section Extraction Protocol to extract the section stream contained therein.
+
+ @param ExtractSection
+ Takes the GUIDed section as input and produces the section stream data.
+
+**/
+struct _EFI_GUIDED_SECTION_EXTRACTION_PROTOCOL {
+ EFI_EXTRACT_GUIDED_SECTION ExtractSection;
+};
+
+//
+// may add other GUID here
+//
+extern EFI_GUID gEfiCrc32GuidedSectionExtractionProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Hash.h b/MdePkg/Include/Protocol/Hash.h new file mode 100644 index 0000000000..7007c78142 --- /dev/null +++ b/MdePkg/Include/Protocol/Hash.h @@ -0,0 +1,149 @@ +/** @file
+ EFI_HASH_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0.
+ EFI_HASH_PROTOCOL as defined in UEFI 2.0.
+ The EFI Hash Service Binding Protocol is used to locate hashing services support
+ provided by a driver and create and destroy instances of the EFI Hash Protocol
+ so that a multiple drivers can use the underlying hashing services.
+ The EFI Service Binding Protocol defines the generic Service Binding Protocol functions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Hash.h
+
+**/
+
+#ifndef __EFI_HASH_PROTOCOL_H__
+#define __EFI_HASH_PROTOCOL_H__
+
+#define EFI_HASH_SERVICE_BINDING_PROTOCOL \
+ { \
+ 0x42881c98, 0xa4f3, 0x44b0, {0xa3, 0x9d, 0xdf, 0xa1, 0x86, 0x67, 0xd8, 0xcd } \
+ }
+
+#define EFI_HASH_PROTOCOL_GUID \
+ { \
+ 0xc5184932, 0xdba5, 0x46db, {0xa5, 0xba, 0xcc, 0x0b, 0xda, 0x9c, 0x14, 0x35 } \
+ }
+
+#define EFI_HASH_ALGORITHM_SHA1_GUID \
+ { \
+ 0x2ae9d80f, 0x3fb2, 0x4095, {0xb7, 0xb1, 0xe9, 0x31, 0x57, 0xb9, 0x46, 0xb6 } \
+ }
+
+#define EFI_HASH_ALGORITHM_SHA224_GUID \
+ { \
+ 0x8df01a06, 0x9bd5, 0x4bf7, {0xb0, 0x21, 0xdb, 0x4f, 0xd9, 0xcc, 0xf4, 0x5b } \
+ }
+
+#define EFI_HASH_ALGORITHM_SHA256_GUID \
+ { \
+ 0x51aa59de, 0xfdf2, 0x4ea3, {0xbc, 0x63, 0x87, 0x5f, 0xb7, 0x84, 0x2e, 0xe9 } \
+ }
+
+#define EFI_HASH_ALGORITHM_SHA384_GUID \
+ { \
+ 0xefa96432, 0xde33, 0x4dd2, {0xae, 0xe6, 0x32, 0x8c, 0x33, 0xdf, 0x77, 0x7a } \
+ }
+
+#define EFI_HASH_ALGORITHM_SHA512_GUID \
+ { \
+ 0xcaa4381e, 0x750c, 0x4770, {0xb8, 0x70, 0x7a, 0x23, 0xb4, 0xe4, 0x21, 0x30 } \
+ }
+
+#define EFI_HASH_ALGORTIHM_MD5_GUID \
+ { \
+ 0xaf7c79c, 0x65b5, 0x4319, {0xb0, 0xae, 0x44, 0xec, 0x48, 0x4e, 0x4a, 0xd7 } \
+ }
+
+typedef struct _EFI_HASH_PROTOCOL EFI_HASH_PROTOCOL;
+
+typedef UINT8 EFI_MD5_HASH[16];
+typedef UINT8 EFI_SHA1_HASH[20];
+typedef UINT8 EFI_SHA224_HASH[28];
+typedef UINT8 EFI_SHA256_HASH[32];
+typedef UINT8 EFI_SHA384_HASH[48];
+typedef UINT8 EFI_SHA512_HASH[64];
+
+typedef union {
+ EFI_MD5_HASH *Md5Hash;
+ EFI_SHA1_HASH *Sha1Hash;
+ EFI_SHA224_HASH *Sha224Hash;
+ EFI_SHA256_HASH *Sha256Hash;
+ EFI_SHA384_HASH *Sha384Hash;
+ EFI_SHA512_HASH *Sha512Hash;
+} EFI_HASH_OUTPUT;
+
+/**
+ Returns the size of the hash which results from a specific algorithm.
+
+ @param This Points to this instance of EFI_HASH_PROTOCOL.
+ @param HashAlgorithm Points to the EFI_GUID which identifies the algorithm to use.
+ @param HashSize Holds the returned size of the algorithm¡¯s hash.
+
+ @retval EFI_SUCCESS Hash size returned successfully.
+ @retval EFI_INVALID_PARAMETER HashSize is NULL
+ @retval EFI_UNSUPPORTED The algorithm specified by HashAlgorithm is not supported
+ by this driver.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HASH_GET_HASH_SIZE) (
+ IN CONST EFI_HASH_PROTOCOL *This,
+ IN CONST EFI_GUID *HashAlgorithm,
+ OUT UINTN *HashSize
+ )
+;
+
+/**
+ Returns the size of the hash which results from a specific algorithm.
+
+ @param This Points to this instance of EFI_HASH_PROTOCOL.
+ @param HashAlgorithm Points to the EFI_GUID which identifies the algorithm to use.
+ @param Extend Specifies whether to create a new hash (FALSE) or extend the specified
+ existing hash (TRUE).
+ @param Message Points to the start of the message.
+ @param MessageSize The size of Message, in bytes.
+ @param Hash On input, if Extend is TRUE, then this holds the hash to extend. On
+ output, holds the resulting hash computed from the message.
+
+ @retval EFI_SUCCESS Hash returned successfully.
+ @retval EFI_INVALID_PARAMETER Message or Hash is NULL
+ @retval EFI_UNSUPPORTED The algorithm specified by HashAlgorithm is not supported by this
+ driver. Or extend is TRUE and the algorithm doesn¡¯t support extending the hash.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HASH_HASH) (
+ IN CONST EFI_HASH_PROTOCOL *This,
+ IN CONST EFI_GUID *HashAlgorithm,
+ IN BOOLEAN Extend,
+ IN CONST UINT8 *Message,
+ IN UINT64 MessageSize,
+ IN OUT EFI_HASH_OUTPUT *Hash
+ )
+;
+
+struct _EFI_HASH_PROTOCOL {
+ EFI_HASH_GET_HASH_SIZE GetHashSize;
+ EFI_HASH_HASH Hash;
+};
+
+extern EFI_GUID gEfiHashServiceBindingProtocolGuid;
+extern EFI_GUID gEfiHashProtocolGuid;
+extern EFI_GUID gEfiHashAlgorithmSha1Guid;
+extern EFI_GUID gEfiHashAlgorithmSha224Guid;
+extern EFI_GUID gEfiHashAlgorithmSha256Guid;
+extern EFI_GUID gEfiHashAlgorithmSha384Guid;
+extern EFI_GUID gEfiHashAlgorithmSha512Guid;
+extern EFI_GUID gEfiHashAlgorithmMD5Guid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Hii.h b/MdePkg/Include/Protocol/Hii.h new file mode 100644 index 0000000000..ceeba1c7fb --- /dev/null +++ b/MdePkg/Include/Protocol/Hii.h @@ -0,0 +1,1024 @@ +/** @file
+ This file defines the Human Interface Infrastructure protocol which will
+ be used by resources which want to publish IFR/Font/String data and have it
+ collected by the Configuration engine.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Hii.h
+
+ @par Revision Reference:
+ This protocol is defined in HII spec 0.92.
+
+**/
+
+#ifndef __HII_H__
+#define __HII_H__
+
+
+#define EFI_HII_PROTOCOL_GUID \
+ { \
+ 0xea816d2c, 0xcee5, 0x4f02, {0x99, 0xb5, 0xd3, 0x90, 0x5c, 0xbb, 0xd0, 0x77 } \
+ }
+
+// BugBug:
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+// If UGA goes away we need to put this some place. I'm not sure where?
+//
+//typedef struct {
+// UINT8 Blue;
+// UINT8 Green;
+// UINT8 Red;
+// UINT8 Reserved;
+//} EFI_UGA_PIXEL;
+
+//++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
+//
+
+typedef struct _EFI_HII_PROTOCOL EFI_HII_PROTOCOL;
+
+//
+// Global definition
+//
+#define NARROW_CHAR 0xFFF0
+#define WIDE_CHAR 0xFFF1
+#define NON_BREAKING_CHAR 0xFFF2
+#define GLYPH_WIDTH 8
+#define GLYPH_HEIGHT 19
+
+#define EFI_HII_FONT 1
+#define EFI_HII_STRING 2
+#define EFI_HII_IFR 3
+#define EFI_HII_KEYBOARD 4
+#define EFI_HII_HANDLES 5
+#define EFI_HII_VARIABLE 6
+#define EFI_HII_DEVICE_PATH 7
+
+
+// References to string tokens must use this macro to enable scanning for
+// token usages.
+//
+#define STRING_TOKEN(t) t
+
+//
+// The following types are currently defined:
+//
+typedef UINT16 EFI_FORM_ID;
+typedef UINT16 EFI_FORM_LABEL;
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Length;
+ UINT16 Type;
+} EFI_HII_PACK_HEADER;
+
+//
+// A form list consists of a large variety of structure
+// possibilities so to represent the binary blob of data
+// associated with a package of forms, we will assume a
+// pointer to a self-describing data buffer.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+} EFI_HII_IFR_PACK;
+
+typedef struct {
+ EFI_HII_PACK_HEADER Header; // Must be filled in
+ EFI_HANDLE ImageHandle; // Must be filled in
+ EFI_HANDLE DeviceHandle; // Optional
+ EFI_HANDLE ControllerHandle; // Optional
+ EFI_HANDLE CallbackHandle; // Optional
+ EFI_HANDLE COBExportHandle; // Optional
+} EFI_HII_HANDLE_PACK;
+
+//
+// ********************************************************
+// EFI_VARIABLE_CONTENTS
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ EFI_GUID VariableGuid;
+ UINT32 VariableNameLength;
+ UINT16 VariableId;
+ //
+ // CHAR16 VariableName[]; //Null-terminated
+ //
+} EFI_HII_VARIABLE_PACK;
+
+//
+// ********************************************************
+// EFI_DEVICE_PATH_PACK
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ //
+ // EFI_DEVICE_PATH DevicePath[];
+ //
+} EFI_HII_DEVICE_PATH_PACK;
+
+//
+// ********************************************************
+// EFI_HII_DATA_TABLE
+// ********************************************************
+//
+typedef struct {
+ EFI_HII_HANDLE HiiHandle;
+ EFI_GUID PackageGuid;
+ UINT32 DataTableSize;
+ UINT32 IfrDataOffset;
+ UINT32 StringDataOffset;
+ UINT32 VariableDataOffset;
+ UINT32 DevicePathOffset;
+ UINT32 NumberOfVariableData;
+ UINT32 NumberOfLanguages;
+ //
+ // EFI_HII_DEVICE_PATH_PACK DevicePath[];
+ // EFI_HII_VARIABLE_PACK VariableData[];
+ // EFI_HII_IFR_PACK IfrData;
+ // EFI_HII_STRING_PACK StringData[];
+ //
+} EFI_HII_DATA_TABLE;
+
+//
+// ********************************************************
+// EFI_HII_EXPORT_TABLE
+// ********************************************************
+//
+typedef struct {
+ UINT32 NumberOfHiiDataTables;
+ EFI_GUID Revision;
+ //
+ // EFI_HII_DATA_TABLE HiiDataTable[];
+ //
+} EFI_HII_EXPORT_TABLE;
+
+typedef struct {
+ BOOLEAN FormSetUpdate; // If TRUE, next variable is significant
+ EFI_PHYSICAL_ADDRESS FormCallbackHandle; // If not 0, will update Formset with this info
+ BOOLEAN FormUpdate; // If TRUE, next variable is significant
+ UINT16 FormValue; // specify which form is to be updated if FormUpdate value is TRUE.
+ STRING_REF FormTitle; // If not 0, will update Form with this info
+ UINT16 DataCount; // The number of Data entries in this structure
+ UINT8 *Data; // An array of 1+ op-codes, specified by DataCount
+} EFI_HII_UPDATE_DATA;
+
+//
+// String attributes
+//
+#define LANG_RIGHT_TO_LEFT 0x00000001
+
+//
+// A string package is used to localize strings to a particular
+// language. The package is associated with a particular driver
+// or set of drivers. Tools are used to associate tokens with
+// string references in forms and in programs. These tokens are
+// language agnostic. When paired with a language pack (directly
+// or indirectly), the string token resolves into an actual
+// UNICODE string. The NumStringPointers determines how many
+// StringPointers (offset values) there are as well as the total
+// number of Strings that are defined.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ RELOFST LanguageNameString;
+ RELOFST PrintableLanguageName;
+ UINT32 NumStringPointers;
+ UINT32 Attributes;
+ //
+ // RELOFST StringPointers[];
+ // EFI_STRING Strings[];
+ //
+} EFI_HII_STRING_PACK;
+
+//
+// Glyph Attributes
+//
+#define EFI_GLYPH_NON_SPACING 1
+#define EFI_GLYPH_WIDE 2
+
+typedef struct {
+ CHAR16 UnicodeWeight;
+ UINT8 Attributes;
+ UINT8 GlyphCol1[GLYPH_HEIGHT];
+} EFI_NARROW_GLYPH;
+
+typedef struct {
+ CHAR16 UnicodeWeight;
+ UINT8 Attributes;
+ UINT8 GlyphCol1[GLYPH_HEIGHT];
+ UINT8 GlyphCol2[GLYPH_HEIGHT];
+ UINT8 Pad[3];
+} EFI_WIDE_GLYPH;
+
+//
+// A font list consists of a font header followed by a series
+// of glyph structures. Note that fonts are not language specific.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ UINT16 NumberOfNarrowGlyphs;
+ UINT16 NumberOfWideGlyphs;
+} EFI_HII_FONT_PACK;
+
+//
+// The IfrData in the EFI_HII_IFR_PACK structure definition
+// is variable length, and not really part of the header. To
+// simplify from code the size of the header, define an
+// identical structure that does not include the IfrData field.
+// Then use sizeof() this new structure to determine the
+// actual size of the header.
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+} EFI_HII_IFR_PACK_HEADER;
+
+//
+// pedef EFI_HII_PACK_HEADER EFI_HII_IFR_PACK_HEADER;
+//
+typedef enum {
+ EfiKeyLCtrl,
+ EfiKeyA0,
+ EfiKeyLAlt,
+ EfiKeySpaceBar,
+ EfiKeyA2,
+ EfiKeyA3,
+ EfiKeyA4,
+ EfiKeyRCtrl,
+ EfiKeyLeftArrow,
+ EfiKeyDownArrow,
+ EfiKeyRightArrow,
+ EfiKeyZero,
+ EfiKeyPeriod,
+ EfiKeyEnter,
+ EfiKeyLShift,
+ EfiKeyB0,
+ EfiKeyB1,
+ EfiKeyB2,
+ EfiKeyB3,
+ EfiKeyB4,
+ EfiKeyB5,
+ EfiKeyB6,
+ EfiKeyB7,
+ EfiKeyB8,
+ EfiKeyB9,
+ EfiKeyB10,
+ EfiKeyRshift,
+ EfiKeyUpArrow,
+ EfiKeyOne,
+ EfiKeyTwo,
+ EfiKeyThree,
+ EfiKeyCapsLock,
+ EfiKeyC1,
+ EfiKeyC2,
+ EfiKeyC3,
+ EfiKeyC4,
+ EfiKeyC5,
+ EfiKeyC6,
+ EfiKeyC7,
+ EfiKeyC8,
+ EfiKeyC9,
+ EfiKeyC10,
+ EfiKeyC11,
+ EfiKeyC12,
+ EfiKeyFour,
+ EfiKeyFive,
+ EfiKeySix,
+ EfiKeyPlus,
+ EfiKeyTab,
+ EfiKeyD1,
+ EfiKeyD2,
+ EfiKeyD3,
+ EfiKeyD4,
+ EfiKeyD5,
+ EfiKeyD6,
+ EfiKeyD7,
+ EfiKeyD8,
+ EfiKeyD9,
+ EfiKeyD10,
+ EfiKeyD11,
+ EfiKeyD12,
+ EfiKeyD13,
+ EfiKeyDel,
+ EfiKeyEnd,
+ EfiKeyPgDn,
+ EfiKeySeven,
+ EfiKeyEight,
+ EfiKeyNine,
+ EfiKeyE0,
+ EfiKeyE1,
+ EfiKeyE2,
+ EfiKeyE3,
+ EfiKeyE4,
+ EfiKeyE5,
+ EfiKeyE6,
+ EfiKeyE7,
+ EfiKeyE8,
+ EfiKeyE9,
+ EfiKeyE10,
+ EfiKeyE11,
+ EfiKeyE12,
+ EfiKeyBackSpace,
+ EfiKeyIns,
+ EfiKeyHome,
+ EfiKeyPgUp,
+ EfiKeyNLck,
+ EfiKeySlash,
+ EfiKeyAsterisk,
+ EfiKeyMinus,
+ EfiKeyEsc,
+ EfiKeyF1,
+ EfiKeyF2,
+ EfiKeyF3,
+ EfiKeyF4,
+ EfiKeyF5,
+ EfiKeyF6,
+ EfiKeyF7,
+ EfiKeyF8,
+ EfiKeyF9,
+ EfiKeyF10,
+ EfiKeyF11,
+ EfiKeyF12,
+ EfiKeyPrint,
+ EfiKeySLck,
+ EfiKeyPause
+} EFI_KEY;
+
+typedef struct {
+ EFI_KEY Key;
+ CHAR16 Unicode;
+ CHAR16 ShiftedUnicode;
+ CHAR16 AltGrUnicode;
+ CHAR16 ShiftedAltGrUnicode;
+ UINT16 Modifier;
+} EFI_KEY_DESCRIPTOR;
+
+//
+// This structure allows a sparse set of keys to be redefined
+// or a complete redefinition of the keyboard layout. Most
+// keyboards have a lot of commonality in their layouts, therefore
+// only defining those keys that need to change from the default
+// minimizes the passed in information.
+//
+// Additionally, when an update occurs, the active keyboard layout
+// will be switched to the newly updated keyboard layout. This
+// allows for situations that when a keyboard layout driver is
+// loaded as part of system initialization, the system will default
+// the keyboard behavior to the new layout.
+//
+// Each call to update the keyboard mapping should contain the
+// complete set of key descriptors to be updated, since every
+// call to the HII which contains an EFI_HII_KEYBOARD_PACK will
+// wipe the previous set of overrides. A call to
+//
+typedef struct {
+ EFI_HII_PACK_HEADER Header;
+ EFI_KEY_DESCRIPTOR *Descriptor;
+ UINT8 DescriptorCount;
+} EFI_HII_KEYBOARD_PACK;
+
+//
+// The EFI_HII_PACKAGES can contain different types of packages just
+// after the structure as inline data.
+//
+typedef struct {
+ UINTN NumberOfPackages;
+ EFI_GUID *GuidId;
+ //
+ // EFI_HII_HANDLE_PACK *HandlePack; // Only one pack.
+ // EFI_HII_IFR_PACK *IfrPack; // Only one pack.
+ // EFI_HII_FONT_PACK *FontPack[]; // Multiple packs ok
+ // EFI_HII_STRING_PACK *StringPack[]; // Multiple packs ok
+ // EFI_HII_KEYBOARD_PACK *KeyboardPack[]; // Multiple packs ok
+ //
+} EFI_HII_PACKAGES;
+
+typedef struct _EFI_HII_VARIABLE_PACK_LIST {
+ struct _EFI_HII_VARIABLE_PACK_LIST *NextVariablePack;
+ EFI_HII_VARIABLE_PACK *VariablePack;
+} EFI_HII_VARIABLE_PACK_LIST;
+
+#pragma pack()
+
+/**
+ Registers the various packs that are passed in via the Packages parameter.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Packages A pointer to an EFI_HII_PACKAGES package instance.
+
+ @param Handle A pointer to the EFI_HII_HANDLE instance.
+
+ @retval EFI_SUCCESS Data was extracted from Packages, the database
+ was updated with the data, and Handle returned successfully.
+
+ @retval EFI_INVALID_PARAMETER The content of Packages was invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_NEW_PACK) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_PACKAGES *Packages,
+ OUT EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Removes a package from the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle that was registered to the data that is requested
+ for removal.
+
+ @retval EFI_SUCCESS The data associated with the Handle was removed
+ from the HII database.
+
+ @retval EFI_INVALID_PARAMETER The Handle was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_REMOVE_PACK) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle
+ );
+
+/**
+ Determines the handles that are currently active in the database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param HandleBufferLength On input, a pointer to the length of the handle
+ buffer. On output, the length of the handle buffer that is required
+ for the handles found.
+
+ @param Handle An array of EFI_HII_HANDLE instances returned.
+
+ @retval EFI_SUCCESS Handle was updated successfully.
+
+ @retval EFI_BUFFER_TOO_SMALL The HandleBufferLength parameter indicates
+ that Handle is too small to support the number of handles.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_FIND_HANDLES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN OUT UINT16 *HandleBufferLength,
+ OUT EFI_HII_HANDLE *Handle
+ );
+
+/**
+ Exports the contents of the database into a buffer.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle An EFI_HII_HANDLE that corresponds to the desired
+ handle to export. If the value is 0, the entire database will be exported.
+ In either case, the data will be exported in a format described by the
+ structure definition of EFI_HII_EXPORT_TABLE.
+
+ @param BufferSize
+ On input, a pointer to the length of the buffer. On output, the length
+ of the buffer that is required for the export data.
+
+ @param Buffer A pointer to a buffer that will contain the results of the export function.
+
+ @retval EFI_SUCCESS The buffer was successfully filled with BufferSize amount of data.
+
+ @retval EFI_BUFFER_TOO_SMALL The value in BufferSize was too small to contain the export data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_EXPORT) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ );
+
+/**
+ Remove any new strings that were added after the initial string export
+ for this handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle on which the string resides.
+
+ @retval EFI_SUCCESS Remove strings from the handle successfully.
+
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_RESET_STRINGS) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle
+ );
+
+/**
+ Tests if all of the characters in a string have corresponding font characters.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param StringToTest A pointer to a Unicode string.
+
+ @param FirstMissing A pointer to an index into the string. On input,
+ the index of the first character in the StringToTest to examine. On exit,
+ the index of the first character encountered for which a glyph is unavailable.
+ If all glyphs in the string are available, the index is the index of the
+ terminator of the string.
+
+ @param GlyphBufferSize A pointer to a value. On output, if the function
+ returns EFI_SUCCESS, it contains the amount of memory that is required to
+ store the string¡¯s glyph equivalent.
+
+ @retval EFI_SUCCESS All glyphs are available. Note that an empty string
+ always returns this value.
+
+ @retval EFI_NOT_FOUND A glyph was not found for a character.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_TEST_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *StringToTest,
+ IN OUT UINT32 *FirstMissing,
+ OUT UINT32 *GlyphBufferSize
+ );
+
+/**
+ Translates a Unicode character into the corresponding font glyph.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Source A pointer to a Unicode string.
+
+ @param Index On input, the offset into the string from which to fetch
+ the character.On successful completion, the index is updated to the first
+ character past the character(s) making up the just extracted glyph.
+
+ @param GlyphBuffer Pointer to an array where the glyphs corresponding
+ to the characters in the source may be stored. GlyphBuffer is assumed
+ to be wide enough to accept a wide glyph character.
+
+ @param BitWidth If EFI_SUCCESS was returned, the UINT16 pointed to by
+ this value is filled with the length of the glyph in pixels. It is unchanged
+ if the call was unsuccessful.
+
+ @param InternalStatus The cell pointed to by this parameter must be
+ initialized to zero prior to invoking the call the first time for any string.
+
+ @retval EFI_SUCCESS It worked.
+
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_GLYPH) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Source,
+ IN OUT UINT16 *Index,
+ OUT UINT8 **GlyphBuffer,
+ OUT UINT16 *BitWidth,
+ IN OUT UINT32 *InternalStatus
+ );
+
+/**
+ Translates a glyph into the format required for input to the Universal
+ Graphics Adapter (UGA) Block Transfer (BLT) routines.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param GlyphBuffer A pointer to the buffer that contains glyph data.
+
+ @param Foreground The foreground setting requested to be used for the
+ generated BltBuffer data.
+
+ @param Background The background setting requested to be used for the
+ generated BltBuffer data.
+
+ @param Count The entry in the BltBuffer upon which to act.
+
+ @param Width The width in bits of the glyph being converted.
+
+ @param Height The height in bits of the glyph being converted
+
+ @param BltBuffer A pointer to the buffer that contains the data that is
+ ready to be used by the UGA BLT routines.
+
+ @retval EFI_SUCCESS It worked.
+
+ @retval EFI_NOT_FOUND A glyph for a character was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GLYPH_TO_BLT) (
+ IN EFI_HII_PROTOCOL *This,
+ IN UINT8 *GlyphBuffer,
+ IN EFI_UGA_PIXEL Foreground,
+ IN EFI_UGA_PIXEL Background,
+ IN UINTN Count,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN OUT EFI_UGA_PIXEL *BltBuffer
+ );
+
+/**
+ Allows a new string to be added to an already existing string package.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Pointer to a NULL-terminated string containing a single ISO 639-2
+ language identifier, indicating the language in which the string is translated.
+
+ @param Handle The handle of the language pack to which the string is to be added.
+
+ @param Reference The identifier of the string to be added. If the reference
+ value is zero, then the string will be assigned a new identifier on that
+ handle for the language specified. Otherwise, the string will be updated
+ with the NewString Value.
+
+ @param NewString The string to be added.
+
+ @retval EFI_SUCCESS The string was effectively registered.
+
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_NEW_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN CHAR16 *Language,
+ IN EFI_HII_HANDLE Handle,
+ IN OUT STRING_REF *Reference,
+ IN CHAR16 *NewString
+ );
+
+/**
+ Allows a program to determine the primary languages that are supported
+ on a given handle.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle on which the strings reside.
+
+ @param LanguageString A string allocated by GetPrimaryLanguages() that
+ contains a list of all primary languages registered on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_PRI_LANGUAGES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Allows a program to determine which secondary languages are supported
+ on a given handle for a given primary language.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle on which the strings reside.
+
+ @param PrimaryLanguage Pointer to a NULL-terminated string containing a single
+ ISO 639-2 language identifier, indicating the primary language.
+
+ @param LanguageString A string allocated by GetSecondaryLanguages()
+ containing a list of all secondary languages registered on the handle.
+
+ @retval EFI_SUCCESS LanguageString was correctly returned.
+
+ @retval EFI_INVALID_PARAMETER The Handle was unknown.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_SEC_LANGUAGES) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN CHAR16 *PrimaryLanguage,
+ OUT EFI_STRING *LanguageString
+ );
+
+/**
+ Extracts a string from a package already registered with the EFI HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle on which the string resides.
+
+ @param Token The string token assigned to the string.
+
+ @param Raw If TRUE, the string is returned unedited in the internal
+ storage format described above. If false, the string returned is edited
+ by replacing <cr> with <space> and by removing special characters such
+ as the <wide> prefix.
+
+ @param LanguageString Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating the language to print.
+ If the LanguageString is empty (starts with a NULL), the default system
+ language will be used to determine the language.
+
+ @param BufferLength Length of the StringBuffer.
+
+ @param StringBuffer The buffer designed to receive the characters in the string.
+
+ @retval EFI_SUCCESS StringBuffer is filled with a NULL-terminated string.
+
+ @retval EFI_INVALID_PARAMETER The handle or string token is unknown.
+
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough to
+ allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_STRING) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN BOOLEAN Raw,
+ IN CHAR16 *LanguageString,
+ IN OUT UINTN *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a part of a string of not more than a given width.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The handle on which the string resides.
+
+ @param Token The string token assigned to the string.
+
+ @param Index On input, the offset into the string where the line is to start.
+ On output, the index is updated to point to beyond the last character returned
+ in the call.
+
+ @param LineWidth The maximum width of the line in units of narrow glyphs.
+
+ @param LanguageString Pointer to a NULL-terminated string containing a
+ single ISO 639-2 language identifier, indicating the language to print.
+
+ @param BufferLength Pointer to the length of the StringBuffer.
+
+ @param StringBuffer The buffer designed to receive the characters in the string.
+
+ @retval EFI_SUCCESS StringBuffer filled with characters that will fit on the line.
+
+ @retval EFI_NOT_FOUND The font glyph for at least one of the characters in
+ the string is not in the font database.
+
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the entire string to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_LINE) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN STRING_REF Token,
+ IN OUT UINT16 *Index,
+ IN UINT16 LineWidth,
+ IN CHAR16 *LanguageString,
+ IN OUT UINT16 *BufferLength,
+ OUT EFI_STRING StringBuffer
+ );
+
+/**
+ Allows a program to extract a form or form package that has previously
+ been registered with the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle Handle on which the form resides.
+
+ @param FormId The ID of the form to return. If the ID is zero,
+ the entire form package is returned.
+
+ @param BufferLength On input, the length of the Buffer. On output,
+ the length of the returned buffer,
+
+ @param Buffer The buffer designed to receive the form(s).
+
+ @retval EFI_SUCCESS Buffer filled with the requested forms. BufferLength
+ was updated.
+
+ @retval EFI_INVALID_PARAMETER The handle is unknown.
+
+ @retval EFI_NOT_FOUND A form on the requested handle cannot be found with
+ the requested FormId.
+
+ @retval EFI_BUFFER_TOO_SMALL The buffer provided was not large enough
+ to allow the form to be stored.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_FORMS) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN EFI_FORM_ID FormId,
+ IN OUT UINTN *BufferLength,
+ OUT UINT8 *Buffer
+ );
+
+/**
+ Extracts the defaults that are associated with a given handle in the HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle The HII handle from which will have default data retrieved.
+
+ @param DefaultMask The mask used to specify some type of default override when extracting
+ the default image data.
+
+ @param VariablePackList A indirect pointer to the first entry of a link list with
+ type EFI_HII_VARIABLE_PACK_LIST.
+
+ @retval EFI_SUCCESS The VariablePackList was populated with the appropriate
+ default setting data.
+
+ @retval EFI_NOT_FOUND The IFR does not have any explicit or default map(s).
+
+ @retval EFI_INVALID_PARAMETER The HII database entry associated with Handle
+ contain invalid data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_DEFAULT_IMAGE) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN UINTN DefaultMask,
+ OUT EFI_HII_VARIABLE_PACK_LIST **VariablePackList
+ );
+
+/**
+ Allows the caller to update a form or form package that has previously been
+ registered with the EFI HII database.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param Handle Handle of the package where the form to be updated resides.
+
+ @param Label The label inside the form package where the update is to take place.
+
+ @param AddData If TRUE, adding data at a given Label; otherwise,
+ if FALSE, removing data at a given Label.
+
+ @param Data The buffer containing the new tags to insert after the Label
+
+ @retval EFI_SUCCESS The form was updated with the new tags.
+
+ @retval EFI_INVALID_PARAMETER The buffer for the buffer length does not
+ contain an integral number of tags.
+
+ @retval EFI_NOT_FOUND The Handle, Label, or FormId was not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_UPDATE_FORM) (
+ IN EFI_HII_PROTOCOL *This,
+ IN EFI_HII_HANDLE Handle,
+ IN EFI_FORM_LABEL Label,
+ IN BOOLEAN AddData,
+ IN EFI_HII_UPDATE_DATA *Data
+ );
+
+/**
+ Retrieves the current keyboard layout.
+
+ @param This A pointer to the EFI_HII_PROTOCOL instance.
+
+ @param DescriptorCount A pointer to the number of Descriptor entries being
+ described in the keyboard layout being retrieved.
+
+ @param Descriptor A pointer to a buffer containing an array of EFI_KEY_DESCRIPTOR
+ entries. Each entry will reflect the definition of a specific physical key.
+
+ @retval EFI_SUCCESS The keyboard layout was retrieved successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HII_GET_KEYBOARD_LAYOUT) (
+ IN EFI_HII_PROTOCOL *This,
+ OUT UINT16 *DescriptorCount,
+ OUT EFI_KEY_DESCRIPTOR *Descriptor
+ );
+
+/**
+ @par Protocol Description:
+ The HII Protocol manages the HII database, which is a repository for data
+ having to do with fonts, strings, forms, keyboards, and other future human
+ interface items.
+
+ @param NewPack
+ Extracts the various packs from a package list.
+
+ @param RemovePack
+ Removes a package from the HII database.
+
+ @param FindHandles
+ Determines the handles that are currently active in the database.
+
+ @param ExportDatabase
+ Export the entire contents of the database to a buffer.
+
+ @param TestString
+ Tests if all of the characters in a string have corresponding font characters.
+
+ @param GetGlyph
+ Translates a Unicode character into the corresponding font glyph.
+
+ @param GlyphToBlt
+ Converts a glyph value into a format that is ready for a UGA BLT command.
+
+ @param NewString
+ Allows a new string to be added to an already existing string package.
+
+ @param GetPrimaryLanguages
+ Allows a program to determine the primary languages that are supported
+ on a given handle.
+
+ @param GetSecondaryLanguages
+ Allows a program to determine which secondary languages are supported
+ on a given handle for a given primary language.
+
+ @param GetString
+ Extracts a string from a package that is already registered with the
+ EFI HII database.
+
+ @param ResetString
+ Remove any new strings that were added after the initial string export
+ for this handle.
+
+ @param GetLine
+ Allows a program to extract a part of a string of not more than a given width.
+
+ @param GetForms
+ Allows a program to extract a form or form package that has been previously registered.
+
+ @param GetDefaultImage
+ Allows a program to extract the nonvolatile image that represents the default storage image.
+
+ @param UpdateForm
+ Allows a program to update a previously registered form.
+
+ @param GetKeyboardLayout
+ Allows a program to extract the current keyboard layout.
+
+**/
+struct _EFI_HII_PROTOCOL {
+ EFI_HII_NEW_PACK NewPack;
+ EFI_HII_REMOVE_PACK RemovePack;
+ EFI_HII_FIND_HANDLES FindHandles;
+ EFI_HII_EXPORT ExportDatabase;
+
+ EFI_HII_TEST_STRING TestString;
+ EFI_HII_GET_GLYPH GetGlyph;
+ EFI_HII_GLYPH_TO_BLT GlyphToBlt;
+
+ EFI_HII_NEW_STRING NewString;
+ EFI_HII_GET_PRI_LANGUAGES GetPrimaryLanguages;
+ EFI_HII_GET_SEC_LANGUAGES GetSecondaryLanguages;
+ EFI_HII_GET_STRING GetString;
+ EFI_HII_RESET_STRINGS ResetStrings;
+ EFI_HII_GET_LINE GetLine;
+ EFI_HII_GET_FORMS GetForms;
+ EFI_HII_GET_DEFAULT_IMAGE GetDefaultImage;
+ EFI_HII_UPDATE_FORM UpdateForm;
+
+ EFI_HII_GET_KEYBOARD_LAYOUT GetKeyboardLayout;
+};
+
+extern EFI_GUID gEfiHiiProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/IP4.h b/MdePkg/Include/Protocol/IP4.h new file mode 100644 index 0000000000..0decc176d4 --- /dev/null +++ b/MdePkg/Include/Protocol/IP4.h @@ -0,0 +1,411 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IP4.h
+
+**/
+
+#ifndef __EFI_IP4_PROTOCOL_H__
+#define __EFI_IP4_PROTOCOL_H__
+
+#define EFI_IP4_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0xc51711e7, 0xb4bf, 0x404a, {0xbf, 0xb8, 0x0a, 0x04, 0x8e, 0xf1, 0xff, 0xe4 } \
+ }
+
+#define EFI_IP4_PROTOCOL_GUID \
+ { \
+ 0x41d94cd2, 0x35b6, 0x455a, {0x82, 0x58, 0xd4, 0xe5, 0x13, 0x34, 0xaa, 0xdd } \
+ }
+
+typedef struct _EFI_IP4_PROTOCOL EFI_IP4_PROTOCOL;
+
+typedef struct {
+ EFI_IPv4_ADDRESS Ip4Address;
+ EFI_IPv4_ADDRESS SubnetMask;
+} EFI_IP4_ADDRESS_PAIR;
+
+typedef struct {
+ EFI_HANDLE DriverHandle;
+ UINT32 AddressCount;
+ EFI_IP4_ADDRESS_PAIR AddressPairs[1];
+} EFI_IP4_VARIABLE_DATA;
+
+typedef struct {
+ UINT8 DefaultProtocol;
+ BOOLEAN AcceptAnyProtocol;
+ BOOLEAN AcceptIcmpErrors;
+ BOOLEAN AcceptBroadcast;
+ BOOLEAN AcceptPromiscuous;
+ BOOLEAN UseDefaultAddress;
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+ BOOLEAN DoNotFragment;
+ BOOLEAN RawData;
+ UINT32 ReceiveTimeout;
+ UINT32 TransmitTimeout;
+} EFI_IP4_CONFIG_DATA;
+
+
+typedef struct {
+ EFI_IPv4_ADDRESS SubnetAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ EFI_IPv4_ADDRESS GatewayAddress;
+} EFI_IP4_ROUTE_TABLE;
+
+typedef struct {
+ UINT8 Type;
+ UINT8 Code;
+} EFI_IP4_ICMP_TYPE;
+
+typedef struct {
+ BOOLEAN IsStarted;
+ EFI_IP4_CONFIG_DATA ConfigData;
+ BOOLEAN IsConfigured;
+ UINT32 GroupCount;
+ EFI_IPv4_ADDRESS *GroupTable;
+ UINT32 RouteCount;
+ EFI_IP4_ROUTE_TABLE *RouteTable;
+ UINT32 IcmpTypeCount;
+ EFI_IP4_ICMP_TYPE *IcmpTypeList;
+} EFI_IP4_MODE_DATA;
+
+#pragma pack(1)
+
+typedef struct {
+#ifdef EFI_NET_LITTLE_ENDIAN
+ UINT8 HeaderLength:4;
+ UINT8 Version:4;
+#else
+ UINT8 Version:4;
+ UINT8 HeaderLength:4;
+#endif
+ UINT8 TypeOfService;
+ UINT16 TotalLength;
+ UINT16 Identification;
+ UINT16 Fragmentation;
+ UINT8 TimeToLive;
+ UINT8 Protocol;
+ UINT16 Checksum;
+ EFI_IPv4_ADDRESS SourceAddress;
+ EFI_IPv4_ADDRESS DestinationAddress;
+} EFI_IP4_HEADER;
+#pragma pack()
+
+
+typedef struct {
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
+} EFI_IP4_FRAGMENT_DATA;
+
+
+typedef struct {
+ EFI_TIME TimeStamp;
+ EFI_EVENT RecycleSignal;
+ UINT32 HeaderLength;
+ EFI_IP4_HEADER *Header;
+ UINT32 OptionsLength;
+ VOID *Options;
+ UINT32 DataLength;
+ UINT32 FragmentCount;
+ EFI_IP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_IP4_RECEIVE_DATA;
+
+
+typedef struct {
+ EFI_IPv4_ADDRESS SourceAddress;
+ EFI_IPv4_ADDRESS GatewayAddress;
+ UINT8 Protocol;
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+ BOOLEAN DoNotFragment;
+} EFI_IP4_OVERRIDE_DATA;
+
+typedef struct {
+ EFI_IPv4_ADDRESS DestinationAddress;
+ EFI_IP4_OVERRIDE_DATA *OverrideData; //OPTIONAL
+ UINT32 OptionsLength; //OPTIONAL
+ VOID *OptionsBuffer; //OPTIONAL
+ UINT32 TotalDataLength;
+ UINT32 FragmentCount;
+ EFI_IP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_IP4_TRANSMIT_DATA;
+
+typedef struct {
+ EFI_EVENT Event;
+ EFI_STATUS Status;
+ union {
+ EFI_IP4_RECEIVE_DATA *RxData;
+ EFI_IP4_TRANSMIT_DATA *TxData;
+ } Packet;
+} EFI_IP4_COMPLETION_TOKEN;
+
+/**
+ Gets the current operational settings for this instance of the EFI IPv4 Protocol driver.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param Ip4ModeData Pointer to the EFI IPv4 Protocol mode data structure.
+ @param MnpConfigData Pointer to the managed network configuration data structure.
+ @param SnpData Pointer to the simple network mode data structure.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_OUT_OF_RESOURCES The required mode data could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_GET_MODE_DATA) (
+ IN EFI_IP4_PROTOCOL *This,
+ OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL,
+ OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL,
+ OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL
+ )
+;
+
+/**
+ Assigns an IPv4 address and subnet mask to this EFI IPv4 Protocol driver instance.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param IpConfigData Pointer to the EFI IPv4 Protocol configuration data structure.
+
+ @retval EFI_SUCCESS The driver instance was successfully opened.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_UNSUPPORTED One or more of the following conditions is TRUE:
+ A configuration protocol (DHCP, BOOTP, RARP, etc.) could
+ not be located when clients choose to use the default IPv4
+ address. This EFI IPv4 Protocol implementation does not
+ support this requested filter or timeout setting.
+ @retval EFI_OUT_OF_RESOURCES The EFI IPv4 Protocol driver instance data could not be allocated.
+ @retval EFI_ALREADY_STARTED The interface is already open and must be stopped before the
+ IPv4 address or subnet mask can be changed. The interface must
+ also be stopped when switching to/from raw packet mode.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. The EFI IPv4
+ Protocol driver instance is not opened.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_CONFIGURE) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN EFI_IP4_CONFIG_DATA *IpConfigData OPTIONAL
+ )
+;
+
+/**
+ Joins and leaves multicast groups.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param JoinFlag Set to TRUE to join the multicast group session and FALSE to leave.
+ @param GroupAddress Pointer to the IPv4 multicast address.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One or more of the following is TRUE:
+ - This is NULL.
+ - JoinFlag is TRUE and GroupAddress is NULL.
+ - GroupAddress is not NULL and *GroupAddress is
+ not a multicast IPv4 address.
+ @retval EFI_NOT_STARTED This instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_OUT_OF_RESOURCES System resources could not be allocated.
+ @retval EFI_UNSUPPORTED This EFI IPv4 Protocol implementation does not support multicast groups.
+ @retval EFI_ALREADY_STARTED The group address is already in the group table (when
+ JoinFlag is TRUE).
+ @retval EFI_NOT_FOUND The group address is not in the group table (when JoinFlag is FALSE).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_GROUPS) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN BOOLEAN JoinFlag,
+ IN EFI_IPv4_ADDRESS *GroupAddress OPTIONAL
+ )
+;
+
+/**
+ Adds and deletes routing table entries.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param DeleteRoute Set to TRUE to delete this route from the routing table. Set to
+ FALSE to add this route to the routing table. SubnetAddress
+ and SubnetMask are used as the key to each route entry.
+ @param SubnetAddress The address of the subnet that needs to be routed.
+ @param SubnetMask The subnet mask of SubnetAddress.
+ @param GatewayAddress The unicast gateway IPv4 address for this route.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_NOT_STARTED The driver instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - SubnetAddress is NULL.
+ - SubnetMask is NULL.
+ - GatewayAddress is NULL.
+ - *SubnetAddress is not a valid subnet address.
+ - *SubnetMask is not a valid subnet mask.
+ - *GatewayAddress is not a valid unicast IPv4 address.
+ @retval EFI_OUT_OF_RESOURCES Could not add the entry to the routing table.
+ @retval EFI_NOT_FOUND This route is not in the routing table (when DeleteRoute is TRUE).
+ @retval EFI_ACCESS_DENIED The route is already defined in the routing table (when
+ DeleteRoute is FALSE).
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_ROUTES) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN BOOLEAN DeleteRoute,
+ IN EFI_IPv4_ADDRESS *SubnetAddress,
+ IN EFI_IPv4_ADDRESS *SubnetMask,
+ IN EFI_IPv4_ADDRESS *GatewayAddress
+ )
+;
+
+/**
+ Places outgoing data packets into the transmit queue.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param Token Pointer to the transmit token.
+
+ @retval EFI_SUCCESS The data has been queued for transmission.
+ @retval EFI_NOT_STARTED This instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more pameters are invalid.
+ @retval EFI_ACCESS_DENIED The transmit completion token with the same Token.Event
+ was already in the transmit queue.
+ @retval EFI_NOT_READY The completion token could not be queued because the transmit
+ queue is full.
+ @retval EFI_NOT_FOUND Not route is found to destination address.
+ @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data.
+ @retval EFI_BUFFER_TOO_SMALL Token.Packet.TxData.TotalDataLength is too
+ short to transmit.
+ @retval EFI_BAD_BUFFER_SIZE The length of the IPv4 header + option length + total data length is
+ greater than MTU (or greater than the maximum packet size if
+ Token.Packet.TxData.OverrideData.
+ DoNotFragment is TRUE.)
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_TRANSMIT) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN EFI_IP4_COMPLETION_TOKEN *Token
+ )
+;
+
+/**
+ Places a receiving request into the receiving queue.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param Token Pointer to a token that is associated with the receive data descriptor.
+
+ @retval EFI_SUCCESS The receive completion token was cached.
+ @retval EFI_NOT_STARTED This EFI IPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP, RARP, etc.)
+ is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - Token is NULL.
+ - Token.Event is NULL.
+ @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of system
+ resources (usually memory).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ The EFI IPv4 Protocol instance has been reset to startup defaults.
+ EFI_ACCESS_DENIED The receive completion token with the same Token.Event was already
+ in the receive queue.
+ @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full.
+ @retval EFI_ICMP_ERROR An ICMP error packet was received.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_RECEIVE) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN EFI_IP4_COMPLETION_TOKEN *Token
+ )
+;
+
+/**
+ Abort an asynchronous transmit or receive request.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+ @param Token Pointer to a token that has been issued by
+ EFI_IP4_PROTOCOL.Transmit() or
+ EFI_IP4_PROTOCOL.Receive(). If NULL, all pending
+ tokens are aborted. Type EFI_IP4_COMPLETION_TOKEN is
+ defined in EFI_IP4_PROTOCOL.Transmit().
+
+ @retval EFI_SUCCESS The asynchronous I/O request was aborted and
+ Token.->Event was signaled. When Token is NULL, all
+ pending requests were aborted and their events were signaled.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_STARTED This instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was
+ not found in the transmit or receive queue. It has either completed
+ or was not issued by Transmit() and Receive().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_CANCEL) (
+ IN EFI_IP4_PROTOCOL *This,
+ IN EFI_IP4_COMPLETION_TOKEN *Token OPTIONAL
+ )
+;
+
+/**
+ Polls for incoming data packets and processes outgoing data packets.
+
+ @param This Pointer to the EFI_IP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_NOT_STARTED This EFI IPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_NOT_READY No incoming or outgoing data is processed.
+ @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue.
+ Consider increasing the polling rate.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_POLL) (
+ IN EFI_IP4_PROTOCOL *This
+ )
+;
+
+struct _EFI_IP4_PROTOCOL {
+ EFI_IP4_GET_MODE_DATA GetModeData;
+ EFI_IP4_CONFIGURE Configure;
+ EFI_IP4_GROUPS Groups;
+ EFI_IP4_ROUTES Routes;
+ EFI_IP4_TRANSMIT Transmit;
+ EFI_IP4_RECEIVE Receive;
+ EFI_IP4_CANCEL Cancel;
+ EFI_IP4_POLL Poll;
+};
+
+extern EFI_GUID gEfiIp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiIp4ProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/IP4Config.h b/MdePkg/Include/Protocol/IP4Config.h new file mode 100644 index 0000000000..0212f35e81 --- /dev/null +++ b/MdePkg/Include/Protocol/IP4Config.h @@ -0,0 +1,121 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IP4Config.h
+
+**/
+
+#ifndef __EFI_IP4CONFIG_PROTOCOL_H__
+#define __EFI_IP4CONFIG_PROTOCOL_H__
+
+#define EFI_IP4_CONFIG_PROTOCOL_GUID \
+ { \
+ 0x3b95aa31, 0x3793, 0x434b, {0x86, 0x67, 0xc8, 0x07, 0x08, 0x92, 0xe0, 0x5e } \
+ }
+
+typedef struct _EFI_IP4_CONFIG_PROTOCOL EFI_IP4_CONFIG_PROTOCOL;
+
+#define IP4_CONFIG_VARIABLE_ATTRIBUTES \
+ (EFI_VARIABLE_NON_VOLATILE | EFI_VARIABLE_BOOTSERVICE_ACCESS | \
+ EFI_VARIABLE_RUNTIME_ACCESS )
+
+typedef struct {
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT32 RouteTableSize;
+ EFI_IP4_ROUTE_TABLE *RouteTable; //OPTIONAL
+} EFI_IP4_IPCONFIG_DATA;
+
+
+/**
+ Starts running the configuration policy for the EFI IPv4 Protocol driver.
+
+ @param This Pointer to the EFI_IP4_CONFIG_PROTOCOL instance.
+ @param DoneEvent Event that will be signaled when the EFI IPv4 Protocol driver
+ configuration policy completes execution. This event must be of
+ type EVT_NOTIFY_SIGNAL.
+ @param ReconfigEvent Event that will be signaled when the EFI IPv4 Protocol driver
+ configuration needs to be updated. This event must be of type
+ EVT_NOTIFY_SIGNAL.
+
+ @retval EFI_SUCCESS The configuration policy for the EFI IPv4 Protocol driver is now
+ running.
+ @retval EFI_INVALID_PARAMETER This, DoneEvent, or ReconfigEvent is NULL.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_ALREADY_STARTED The configuration policy for the EFI IPv4 Protocol driver was
+ already started.
+ @retval EFI_DEVICE_ERROR An unexpected system error or network error occurred.
+ @retval EFI_UNSUPPORTED This interface does not support the EFI IPv4 Protocol driver
+ configuration.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_CONFIG_START) (
+ IN EFI_IP4_CONFIG_PROTOCOL *This,
+ IN EFI_EVENT DoneEvent,
+ IN EFI_EVENT ReconfigEvent
+ )
+;
+
+/**
+ Stops running the configuration policy for the EFI IPv4 Protocol driver.
+
+ @param This Pointer to the EFI_IP4_CONFIG_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The configuration policy for the EFI IPv4 Protocol driver has been stopped.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_STARTED The configuration policy for the EFI IPv4 Protocol driver was not started.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_CONFIG_STOP) (
+ IN EFI_IP4_CONFIG_PROTOCOL *This
+ )
+;
+
+/**
+ Returns the default configuration data (if any) for the EFI IPv4 Protocol driver.
+
+ @param This Pointer to the EFI_IP4_CONFIG_PROTOCOL instance.
+ @param IpConfigDataSize On input, the size of the IpConfigData buffer.
+ On output, the count of bytes that were written into the IpConfigData buffer.
+ @param IpConfigData Pointer to the EFI IPv4 Configuration Protocol driver
+ configuration data structure.
+
+ @retval EFI_SUCCESS The EFI IPv4 Protocol driver configuration has been returned.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_STARTED The configuration policy for the EFI IPv4 Protocol driver is not
+ running.
+ @retval EFI_NOT_READY EFI IPv4 Protocol driver configuration is still running.
+ @retval EFI_ABORTED EFI IPv4 Protocol driver configuration could not complete.
+ @retval EFI_BUFFER_TOO_SMALL *IpConfigDataSize is smaller than the configuration data
+ buffer or IpConfigData is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IP4_CONFIG_GET_DATA) (
+ IN EFI_IP4_CONFIG_PROTOCOL *This,
+ IN OUT UINTN *IpConfigDataSize,
+ OUT EFI_IP4_IPCONFIG_DATA *IpConfigData OPTIONAL
+ )
+;
+
+struct _EFI_IP4_CONFIG_PROTOCOL {
+ EFI_IP4_CONFIG_START Start;
+ EFI_IP4_CONFIG_STOP Stop;
+ EFI_IP4_CONFIG_GET_DATA GetData;
+};
+
+extern EFI_GUID gEfiIp4ConfigProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/IScsiInitatorName.h b/MdePkg/Include/Protocol/IScsiInitatorName.h new file mode 100644 index 0000000000..48131e8e25 --- /dev/null +++ b/MdePkg/Include/Protocol/IScsiInitatorName.h @@ -0,0 +1,92 @@ +/** @file
+ EFI_ISCSI_INITIATOR_NAME_PROTOCOL as defined in UEFI 2.0.
+ It rovides the ability to get and set the iSCSI Initiator Name.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IScsiInitatorName.h
+
+**/
+
+#ifndef __ISCSI_INITIATOR_NAME_H__
+#define __ISCSI_INITIATOR_NAME_H__
+
+#define EFI_ISCSI_INITIATOR_NAME_PROTOCOL_GUID \
+{ \
+ 0xa6a72875, 0x2962, 0x4c18, {0x9f, 0x46, 0x8d, 0xa6, 0x44, 0xcc, 0xfe } \
+}
+
+typedef struct _EFI_ISCSI_INITIATOR_NAME_PROTOCOL EFI_ISCSI_INITIATOR_NAME_PROTOCOL;
+
+/**
+ Retrieves the current set value of iSCSI Initiator Name.
+
+ @param This Pointer to the EFI_ISCSI_INITIATOR_NAME_PROTOCOL instance.
+ @param BufferSize Size of the buffer in bytes pointed to by Buffer / Actual size of the
+ variable data buffer.
+ @param Buffer Pointer to the buffer for data to be read.
+
+ @retval EFI_SUCCESS Data was successfully retrieved into the provided buffer and the
+ BufferSize was sufficient to handle the iSCSI initiator name
+ @retval EFI_BUFFER_TOO_SMALL BufferSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER BufferSize or Buffer is NULL.
+ @retval EFI_DEVICE_ERROR The iSCSI initiator name could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ISCSI_INITIATOR_NAME_GET) (
+ IN EFI_ISCSI_INITIATOR_NAME_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+
+
+/**
+ Sets the iSCSI Initiator Name.
+
+ @param This Pointer to the EFI_ISCSI_INITIATOR_NAME_PROTOCOL instance.
+ @param BufferSize Size of the buffer in bytes pointed to by Buffer.
+ @param Buffer Pointer to the buffer for data to be written.
+
+ @retval EFI_SUCCESS Data was successfully stored by the protocol.
+ @retval EFI_UNSUPPORTED Platform policies do not allow for data to be written.
+ @retval EFI_INVALID_PARAMETER BufferSize or Buffer is NULL, or BufferSize exceeds the maximum allowed limit.
+ @retval EFI_DEVICE_ERROR The data could not be stored due to a hardware error.
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the data.
+ @retval EFI_PROTOCOL_ERROR Input iSCSI initiator name does not adhere to RFC 3720
+ (and other related protocols)
+
+**/
+typedef EFI_STATUS
+(EFIAPI *EFI_ISCSI_INITIATOR_NAME_SET) (
+ IN EFI_ISCSI_INITIATOR_NAME_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+struct _EFI_ISCSI_INITIATOR_NAME_PROTOCOL {
+ EFI_ISCSI_INITIATOR_NAME_GET Get;
+ EFI_ISCSI_INITIATOR_NAME_SET Set;
+};
+
+extern EFI_GUID gEfiIScsiInitiatorNameProtocolGuid;
+
+#endif
+
+
+
+
+
+
+
diff --git a/MdePkg/Include/Protocol/IdeControllerInit.h b/MdePkg/Include/Protocol/IdeControllerInit.h new file mode 100644 index 0000000000..beaac30e5f --- /dev/null +++ b/MdePkg/Include/Protocol/IdeControllerInit.h @@ -0,0 +1,485 @@ +/** @file
+ This file declares EFI IDE Controller Init Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IdeControllerInit.h
+
+ @par Revision Reference:
+ This Protocol is defined in IDE Controller Initialization Protocol Specification
+ Version 0.9
+
+**/
+
+#ifndef _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H
+#define _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H
+
+//
+// Global ID for the EFI Platform IDE Protocol GUID
+//
+#define EFI_IDE_CONTROLLER_INIT_PROTOCOL_GUID \
+ { 0xa1e37052, 0x80d9, 0x4e65, {0xa3, 0x17, 0x3e, 0x9a, 0x55, 0xc4, 0x3e, 0xc9 } }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL EFI_IDE_CONTROLLER_INIT_PROTOCOL;
+
+//
+//////////////////////////////////////////////////////////////////////////////////////////
+// EFI_IDE_BUS_ENUMERATION_PHASE
+// EFI_IDE_CONTROLLER_ENUM_PHASE
+//
+typedef enum{
+ EfiIdeBeforeChannelEnumeration,
+ EfiIdeAfterChannelEnumeration,
+ EfiIdeBeforeChannelReset,
+ EfiIdeAfterChannelReset,
+ EfiIdeBusBeforeDevicePresenceDetection,
+ EfiIdeBusAfterDevicePresenceDetection,
+ EfiIdeResetMode,
+ EfiIdeBusPhaseMaximum
+} EFI_IDE_CONTROLLER_ENUM_PHASE;
+
+//
+//******************************************************
+// EFI_ATA_EXT_TRANSFER_PROTOCOL
+//******************************************************
+//
+// This extended mode describes the SATA physical protocol.
+// SATA physical layers can operate at different speeds.
+// These speeds are defined below. Various PATA protocols
+// and associated modes are not applicable to SATA devices.
+//
+
+typedef enum {
+ EfiAtaSataTransferProtocol
+} EFI_ATA_EXT_TRANSFER_PROTOCOL;
+
+#define EFI_SATA_AUTO_SPEED 0
+#define EFI_SATA_GEN1_SPEED 1
+#define EFI_SATA_GEN2_SPEED 2
+
+//
+//*******************************************************
+// EFI_IDE_CABLE_TYPE
+//*******************************************************
+//
+typedef enum {
+ EfiIdeCableTypeUnknown,
+ EfiIdeCableType40pin,
+ EfiIdeCableType80Pin,
+ EfiIdeCableTypeSerial,
+ EfiIdeCableTypeMaximum
+} EFI_IDE_CABLE_TYPE;
+
+//
+//******************************************************
+// EFI_ATA_MODE
+//******************************************************
+//
+typedef struct {
+ BOOLEAN Valid;
+ UINT32 Mode;
+} EFI_ATA_MODE;
+
+//
+//******************************************************
+// EFI_ATA_EXTENDED_MODE
+//******************************************************
+//
+typedef struct {
+ EFI_ATA_EXT_TRANSFER_PROTOCOL TransferProtocol;
+ UINT32 Mode;
+} EFI_ATA_EXTENDED_MODE;
+
+//
+//******************************************************
+// EFI_ATA_COLLECTIVE_MODE
+//******************************************************
+//
+typedef struct {
+ EFI_ATA_MODE PioMode;
+ EFI_ATA_MODE SingleWordDmaMode;
+ EFI_ATA_MODE MultiWordDmaMode;
+ EFI_ATA_MODE UdmaMode;
+ UINT32 ExtModeCount;
+ EFI_ATA_EXTENDED_MODE ExtMode[1];
+} EFI_ATA_COLLECTIVE_MODE;
+
+//
+//*******************************************************
+// EFI_ATA_IDENTIFY_DATA
+//*******************************************************
+//
+
+#pragma pack(1)
+
+typedef struct {
+ UINT16 config; // General Configuration
+ UINT16 cylinders; // Number of Cylinders
+ UINT16 reserved_2;
+ UINT16 heads; //Number of logical heads
+ UINT16 vendor_data1;
+ UINT16 vendor_data2;
+ UINT16 sectors_per_track;
+ UINT16 vendor_specific_7_9[3];
+ CHAR8 SerialNo[20]; // ASCII
+ UINT16 vendor_specific_20_21[2];
+ UINT16 ecc_bytes_available;
+ CHAR8 FirmwareVer[8]; // ASCII
+ CHAR8 ModelName[40]; // ASCII
+ UINT16 multi_sector_cmd_max_sct_cnt;
+ UINT16 reserved_48;
+ UINT16 capabilities;
+ UINT16 reserved_50;
+ UINT16 pio_cycle_timing;
+ UINT16 reserved_52;
+ UINT16 field_validity;
+ UINT16 current_cylinders;
+ UINT16 current_heads;
+ UINT16 current_sectors;
+ UINT16 CurrentCapacityLsb;
+ UINT16 CurrentCapacityMsb;
+ UINT16 reserved_59;
+ UINT16 user_addressable_sectors_lo;
+ UINT16 user_addressable_sectors_hi;
+ UINT16 reserved_62;
+ UINT16 multi_word_dma_mode;
+ UINT16 advanced_pio_modes;
+ UINT16 min_multi_word_dma_cycle_time;
+ UINT16 rec_multi_word_dma_cycle_time;
+ UINT16 min_pio_cycle_time_without_flow_control;
+ UINT16 min_pio_cycle_time_with_flow_control;
+ UINT16 reserved_69_79[11];
+ UINT16 major_version_no;
+ UINT16 minor_version_no;
+ UINT16 command_set_supported_82; // word 82
+ UINT16 command_set_supported_83; // word 83
+ UINT16 command_set_feature_extn; // word 84
+ UINT16 command_set_feature_enb_85; // word 85
+ UINT16 command_set_feature_enb_86; // word 86
+ UINT16 command_set_feature_default; // word 87
+ UINT16 ultra_dma_mode; // word 88
+ UINT16 reserved_89_127[39];
+ UINT16 security_status;
+ UINT16 vendor_data_129_159[31];
+ UINT16 reserved_160_255[96];
+} EFI_ATA_IDENTIFY_DATA;
+
+#pragma pack()
+//
+//*******************************************************
+// EFI_ATAPI_IDENTIFY_DATA
+//*******************************************************
+//
+#pragma pack(1)
+typedef struct {
+ UINT16 config; // General Configuration
+ UINT16 obsolete_1;
+ UINT16 specific_config;
+ UINT16 obsolete_3;
+ UINT16 retired_4_5[2];
+ UINT16 obsolete_6;
+ UINT16 cfa_reserved_7_8[2];
+ UINT16 retired_9;
+ CHAR8 SerialNo[20]; // ASCII
+ UINT16 retired_20_21[2];
+ UINT16 obsolete_22;
+ CHAR8 FirmwareVer[8]; // ASCII
+ CHAR8 ModelName[40]; // ASCII
+ UINT16 multi_sector_cmd_max_sct_cnt;
+ UINT16 reserved_48;
+ UINT16 capabilities_49;
+ UINT16 capabilities_50;
+ UINT16 obsolete_51_52[2];
+ UINT16 field_validity;
+ UINT16 obsolete_54_58[5];
+ UINT16 mutil_sector_setting;
+ UINT16 user_addressable_sectors_lo;
+ UINT16 user_addressable_sectors_hi;
+ UINT16 obsolete_62;
+ UINT16 multi_word_dma_mode;
+ UINT16 advanced_pio_modes;
+ UINT16 min_multi_word_dma_cycle_time;
+ UINT16 rec_multi_word_dma_cycle_time;
+ UINT16 min_pio_cycle_time_without_flow_control;
+ UINT16 min_pio_cycle_time_with_flow_control;
+ UINT16 reserved_69_74[6];
+ UINT16 queue_depth;
+ UINT16 reserved_76_79[4];
+ UINT16 major_version_no;
+ UINT16 minor_version_no;
+ UINT16 cmd_set_support_82;
+ UINT16 cmd_set_support_83;
+ UINT16 cmd_feature_support;
+ UINT16 cmd_feature_enable_85;
+ UINT16 cmd_feature_enable_86;
+ UINT16 cmd_feature_default;
+ UINT16 ultra_dma_select;
+ UINT16 time_required_for_sec_erase;
+ UINT16 time_required_for_enhanced_sec_erase;
+ UINT16 current_advanced_power_mgmt_value;
+ UINT16 master_pwd_revison_code;
+ UINT16 hardware_reset_result;
+ UINT16 current_auto_acoustic_mgmt_value;
+ UINT16 reserved_95_99[5];
+ UINT16 max_user_lba_for_48bit_addr[4];
+ UINT16 reserved_104_126[23];
+ UINT16 removable_media_status_notification_support;
+ UINT16 security_status;
+ UINT16 vendor_data_129_159[31];
+ UINT16 cfa_power_mode;
+ UINT16 cfa_reserved_161_175[15];
+ UINT16 current_media_serial_no[30];
+ UINT16 reserved_206_254[49];
+ UINT16 integrity_word;
+} EFI_ATAPI_IDENTIFY_DATA;
+
+#pragma pack()
+//
+//*******************************************************
+// EFI_IDENTIFY_DATA
+//*******************************************************
+//
+typedef union {
+ EFI_ATA_IDENTIFY_DATA AtaData;
+ EFI_ATAPI_IDENTIFY_DATA AtapiData;
+} EFI_IDENTIFY_DATA;
+
+#define EFI_ATAPI_DEVICE_IDENTIFY_DATA 0x8000
+
+//
+/////////////////////////////////////////////////////////////////////////////////////////
+// Function prototype declaration, for ANSI compatability
+//
+/**
+ Returns the information about the specified IDE channel.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Channel Zero-based channel number.
+
+ @param Enabled TRUE if this channel is enabled. Disabled channels are not scanned
+ to see if any devices are present.
+
+ @param MaxDevices The maximum number of IDE devices that the bus driver
+ can expect on this channel.
+
+ @retval EFI_SUCCESS Information was returned without any errors.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_GET_CHANNEL_INFO) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ OUT BOOLEAN *Enabled,
+ OUT UINT8 *MaxDevices
+);
+
+/**
+ The notifications from the IDE bus driver that it is about to enter a certain
+ phase of the IDE channel enumeration process.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Phase The phase during enumeration.
+
+ @param Channel Zero-based channel number.
+
+ @retval EFI_SUCCESS The notification was accepted without any errors.
+
+ @retval EFI_NOT_SUPPORTED Phase is not supported.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+
+ @retval EFI_NOT_READY This phase cannot be entered at this time.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_NOTIFY_PHASE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,
+ IN UINT8 Channel
+);
+
+/**
+ Submits the device information to the IDE controller driver.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Channel Zero-based channel number.
+
+ @param Device Zero-based device number on the Channel.
+
+ @param IdentifyData The device¡¯s response to the ATA IDENTIFY_DEVICE command.
+
+ @retval EFI_SUCCESS The information was accepted without any errors.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_SUBMIT_DATA) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_IDENTIFY_DATA *IdentifyData
+);
+
+/**
+ Disqualifies specific modes for an IDE device.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Channel Zero-based channel number.
+
+ @param Device Zero-based device number on the Channel.
+
+ @param BadModes The modes that the device does not support and that
+ should be disqualified.
+
+ @retval EFI_SUCCESS The modes were accepted without any errors.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_DISQUALIFY_MODE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *BadModes
+);
+
+/**
+ Returns the information about the optimum modes for the specified IDE device.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Channel Zero-based channel number.
+
+ @param Device Zero-based device number on the Channel.
+
+ @param SupportedModes The optimum modes for the device.
+
+ @retval EFI_SUCCESS SupportedModes was returned.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid. Or SupportedModes is NULL.
+
+ @retval EFI_NOT_READY Modes cannot be calculated due to a lack of data.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_CALCULATE_MODE) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes
+);
+
+/**
+ Commands the IDE controller driver to program the IDE controller hardware
+ so that the specified device can operate at the specified mode.
+
+ @param This Pointer to the EFI_IDE_CONTROLLER_INIT_PROTOCOL instance.
+
+ @param Channel Zero-based channel number.
+
+ @param Device Zero-based device number on the Channel.
+
+ @param Modes The modes to set.
+
+ @retval EFI_SUCCESS The command was accepted without any errors.
+
+ @retval EFI_INVALID_PARAMETER Channel is invalid (Channel >= ChannelCount).
+ Or Device is invalid.
+
+ @retval EFI_NOT_READY Modes cannot be set at this time due to lack of data.
+
+ @retval EFI_DEVICE_ERROR Modes cannot be set due to hardware failure.
+ The IDE bus driver should not use this device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IDE_CONTROLLER_SET_TIMING) (
+ IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,
+ IN UINT8 Channel,
+ IN UINT8 Device,
+ IN EFI_ATA_COLLECTIVE_MODE *Modes
+);
+
+//
+////////////////////////////////////////////////////////////////////////////////////////////////////
+// Interface structure
+// EFI_IDE_CONTROLLER_INIT_PROTOCOL protocol provides the chipset specific information to the IDE bus driver.
+// An IDE Bus driver wants to manage an IDE bus and possible IDE devices will have to retrieve the
+// EFI_IDE_CONTROLLER_INIT_PROTOCOL instances.
+//
+/**
+ @par Protocol Description:
+ Provides the basic interfaces to abstract an IDE controller.
+
+ @param GetChannelInfo
+ Returns the information about a specific channel.
+
+ @param NotifyPhase
+ The notification that the IDE bus driver is about to enter the
+ specified phase during the enumeration process.
+
+ @param SubmitData
+ Submits the Drive Identify data that was returned by the device.
+
+ @param DisqualifyMode
+ Submits information about modes that should be disqualified.
+
+ @param CalculateMode
+ Calculates and returns the optimum mode for a particular IDE device.
+
+ @param SetTiming
+ Programs the IDE controller hardware to the default timing or per the modes
+ that were returned by the last call to CalculateMode().
+
+ @param EnumAll
+ Set to TRUE if the enumeration group includes all the channels that are
+ produced by this controller. FALSE if an enumeration group consists of
+ only one channel.
+
+ @param ChannelCount
+ The number of channels that are produced by this controller.
+
+**/
+struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL {
+ EFI_IDE_CONTROLLER_GET_CHANNEL_INFO GetChannelInfo;
+ EFI_IDE_CONTROLLER_NOTIFY_PHASE NotifyPhase;
+ EFI_IDE_CONTROLLER_SUBMIT_DATA SubmitData;
+ EFI_IDE_CONTROLLER_DISQUALIFY_MODE DisqualifyMode;
+ EFI_IDE_CONTROLLER_CALCULATE_MODE CalculateMode;
+ EFI_IDE_CONTROLLER_SET_TIMING SetTiming;
+ BOOLEAN EnumAll;
+ UINT8 ChannelCount;
+};
+
+extern EFI_GUID gEfiIdeControllerInitProtocolGuid;
+
+#endif
+
+
diff --git a/MdePkg/Include/Protocol/IncompatiblePciDeviceSupport.h b/MdePkg/Include/Protocol/IncompatiblePciDeviceSupport.h new file mode 100644 index 0000000000..03a5b2ec08 --- /dev/null +++ b/MdePkg/Include/Protocol/IncompatiblePciDeviceSupport.h @@ -0,0 +1,84 @@ +/** @file
+ This file declares EFI Incompatible PCI Device Support Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: IncompatiblePciDeviceSupport.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI PCI Platform Support Specification.
+ Version0.9
+
+**/
+
+#ifndef _INCOMPATIBLE_PCI_DEVICE_SUPPORT_H_
+#define _INCOMPATIBLE_PCI_DEVICE_SUPPORT_H_
+
+#define EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL_GUID \
+ {0xeb23f55a, 0x7863, 0x4ac2, {0x8d, 0x3d, 0x95, 0x65, 0x35, 0xde, 0x03, 0x75} }
+
+typedef struct _EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL;
+
+/**
+ Returns a list of ACPI resource descriptors that detail the special
+ resource configuration requirements for an incompatible PCI device.
+
+ @param This Pointer to the EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL instance.
+
+ @param VendorID A unique ID to identify the manufacturer of the PCI device.
+
+ @param DeviceID A unique ID to identify the particular PCI device.
+
+ @param RevisionID A PCI device-specific revision identifier.
+
+ @param SubsystemVendorId Specifies the subsystem vendor ID.
+
+ @param SubsystemDeviceId Specifies the subsystem device ID.
+
+ @param Configuration A list of ACPI resource descriptors that detail
+ the configuration requirement.
+
+ @retval EFI_SUCCESS The function always returns EFI_SUCCESS.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_CHECK_DEVICE) (
+ IN EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *This,
+ IN UINTN VendorId,
+ IN UINTN DeviceId,
+ IN UINTN Revision,
+ IN UINTN SubVendorId,OPTIONAL
+ IN UINTN SubDeviceId,OPTIONAL
+ OUT VOID **Configuration
+);
+
+
+//
+// Interface structure for the Incompatible PCI Device Support Protocol
+//
+/**
+ @par Protocol Description:
+ This protocol can find some incompatible PCI devices and report their
+ special resource requirements to the PCI bus driver.
+
+ @param CheckDevice
+ Returns a list of ACPI resource descriptors that detail any special
+ resource configuration requirements if the specified device is a recognized
+ incompatible PCI device.
+
+**/
+struct _EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL {
+ EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_CHECK_DEVICE CheckDevice;
+};
+
+extern EFI_GUID gEfiIncompatiblePciDeviceSupportProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Legacy8259.h b/MdePkg/Include/Protocol/Legacy8259.h new file mode 100644 index 0000000000..c30a5e519c --- /dev/null +++ b/MdePkg/Include/Protocol/Legacy8259.h @@ -0,0 +1,307 @@ +/** @file
+ This protocol abstracts the 8259 interrupt controller. This includes
+ PCI IRQ routing need to program the PCI Interrupt Line register.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Legacy8259.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_8259_H
+#define _EFI_LEGACY_8259_H
+
+#define EFI_LEGACY_8259_PROTOCOL_GUID \
+ { \
+ 0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \
+ }
+
+typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;
+
+typedef enum {
+ Efi8259Irq0,
+ Efi8259Irq1,
+ Efi8259Irq2,
+ Efi8259Irq3,
+ Efi8259Irq4,
+ Efi8259Irq5,
+ Efi8259Irq6,
+ Efi8259Irq7,
+ Efi8259Irq8,
+ Efi8259Irq9,
+ Efi8259Irq10,
+ Efi8259Irq11,
+ Efi8259Irq12,
+ Efi8259Irq13,
+ Efi8259Irq14,
+ Efi8259Irq15,
+ Efi8259IrqMax
+} EFI_8259_IRQ;
+
+typedef enum {
+ Efi8259LegacyMode,
+ Efi8259ProtectedMode,
+ Efi8259MaxMode
+} EFI_8259_MODE;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This Protocol instance pointer.
+ @param MasterBase The base vector for the Master PIC in the 8259 controller
+ @param Slavebase The base vector for the Master PIC in the 8259 controller
+
+ @retval EFI_SUCCESS The new bases were programmed
+ @retval EFI_DEVICE_ERROR A device erro occured programming the vector bases
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT8 MasterBase,
+ IN UINT8 SlaveBase
+ )
+;
+
+/**
+ Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+
+ @param This Protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+
+ @retval EFI_SUCCESS 8259 status returned
+ @retval EFI_DEVICE_ERROR Error reading 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_MASK) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ OUT UINT16 *LegacyMask, OPTIONAL
+ OUT UINT16 *LegacyEdgeLevel, OPTIONAL
+ OUT UINT16 *ProtectedMask, OPTIONAL
+ OUT UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+;
+
+/**
+ Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for
+ the legacy mode mask and the protected mode mask. The base address for the 8259
+ is different for legacy and protected mode, so two masks are required.
+ Also set the edge/level masks.
+
+ @param This Protocol instance pointer.
+ @param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15
+ @param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15
+
+ @retval EFI_SUCCESS 8259 status returned
+ @retval EFI_DEVICE_ERROR Error reading 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MASK) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN UINT16 *LegacyMask, OPTIONAL
+ IN UINT16 *LegacyEdgeLevel, OPTIONAL
+ IN UINT16 *ProtectedMask, OPTIONAL
+ IN UINT16 *ProtectedEdgeLevel OPTIONAL
+ )
+;
+
+/**
+ Set the 8259 mode of operation. The base address for the 8259 is different for
+ legacy and protected mode. The legacy mode requires the master 8259 to have a
+ master base of 0x08 and the slave base of 0x70. The protected mode base locations
+ are not defined. Interrupts must be masked by the caller before this function
+ is called. The interrupt mask from the current mode is saved. The interrupt
+ mask for the new mode is Mask, or if Mask does not exist the previously saved
+ mask is used.
+
+ @param This Protocol instance pointer.
+ @param Mode Mode of operation. i.e. real mode or protected mode
+ @param Mask Optional interupt mask for the new mode.
+ @param EdgeLevel Optional trigger mask for the new mode.
+
+ @retval EFI_SUCCESS 8259 programmed
+ @retval EFI_DEVICE_ERROR Error writting to 8259
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_SET_MODE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_MODE Mode,
+ IN UINT16 *Mask, OPTIONAL
+ IN UINT16 *EdgeLevel OPTIONAL
+ )
+;
+
+/**
+ Convert from IRQ to processor interrupt vector number.
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+ @param Vector Processor vector number that matches Irq
+
+ @retval EFI_SUCCESS The Vector matching Irq is returned
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_VECTOR) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ OUT UINT8 *Vector
+ )
+;
+
+/**
+ Enable Irq by unmasking interrupt in 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+ @param LevelTriggered TRUE if level triggered. FALSE if edge triggered.
+
+ @retval EFI_SUCCESS Irq enabled on 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq,
+ IN BOOLEAN LevelTriggered
+ )
+;
+
+/**
+ Disable Irq by masking interrupt in 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+
+ @retval EFI_SUCCESS Irq disabled on 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+;
+
+/**
+ PciHandle represents a PCI config space of a PCI function. Vector
+ represents Interrupt Pin (from PCI config space) and it is the data
+ that is programmed into the Interrupt Line (from the PCI config space)
+ register.
+
+ @param This Protocol instance pointer.
+ @param PciHandle PCI function to return vector for
+ @param Vector Vector for fucntion that matches
+
+ @retval EFI_SUCCESS A valid Vector is returned
+ @retval EFI_INVALID_PARAMETER PciHandle not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT UINT8 *Vector
+ )
+;
+
+/**
+ Send an EOI to 8259
+
+ @param This Protocol instance pointer.
+ @param Irq 8259 IRQ0 - IRQ15
+
+ @retval EFI_SUCCESS EOI successfully sent to 8259
+ @retval EFI_INVALID_PARAMETER Irq not valid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT) (
+ IN EFI_LEGACY_8259_PROTOCOL *This,
+ IN EFI_8259_IRQ Irq
+ )
+;
+
+/**
+ @par Protocol Description:
+ Abstracts the 8259 and APIC hardware control between EFI usage and
+ Compatibility16 usage.
+
+ @param SetVectorBase
+ Sets the vector bases for master and slave PICs.
+
+ @param GetMask
+ Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMask
+ Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.
+
+ @param SetMode
+ Sets PIC mode to 16-bit real mode or 32-bit protected mode.
+
+ @param GetVector
+ Gets the base vector assigned to an IRQ.
+
+ @param EnableIrq
+ Enables an IRQ.
+
+ @param DisableIrq
+ Disables an IRQ.
+
+ @param GetInterruptLine
+ Gets an IRQ that is assigned to a PCI device.
+
+ @param EndOfInterrupt
+ Issues the end of interrupt command.
+
+**/
+struct _EFI_LEGACY_8259_PROTOCOL {
+ EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;
+ EFI_LEGACY_8259_GET_MASK GetMask;
+ EFI_LEGACY_8259_SET_MASK SetMask;
+ EFI_LEGACY_8259_SET_MODE SetMode;
+ EFI_LEGACY_8259_GET_VECTOR GetVector;
+ EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;
+ EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;
+ EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;
+ EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;
+};
+
+extern EFI_GUID gEfiLegacy8259ProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LegacyBios.h b/MdePkg/Include/Protocol/LegacyBios.h new file mode 100644 index 0000000000..aa94cfb74f --- /dev/null +++ b/MdePkg/Include/Protocol/LegacyBios.h @@ -0,0 +1,701 @@ +/** @file
+ The EFI Legacy BIOS Protocol is used to abstract legacy Option ROM usage
+ under EFI and Legacy OS boot.
+
+ Note: The names for EFI_IA32_REGISTER_SET elements were picked to follow
+ well known naming conventions.
+
+ Thunk - A thunk is a transition from one processor mode to another. A Thunk
+ is a transition from native EFI mode to 16-bit mode. A reverse thunk
+ would be a transition from 16-bit mode to native EFI mode.
+
+ You most likely should not use this protocol! Find the EFI way to solve the
+ problem to make your code portable
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyBios.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_BIOS_H
+#define _EFI_LEGACY_BIOS_H
+
+#define EFI_LEGACY_BIOS_PROTOCOL_GUID \
+ { \
+ 0xdb9a1e3d, 0x45cb, 0x4abb, {0x85, 0x3b, 0xe5, 0x38, 0x7f, 0xdb, 0x2e, 0x2d } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PROTOCOL EFI_LEGACY_BIOS_PROTOCOL;
+
+//
+// Convert from 32-bit address (_Adr) to Segment:Offset 16-bit form
+//
+#define EFI_SEGMENT(_Adr) (UINT16) ((UINT16) (((UINTN) (_Adr)) >> 4) & 0xf000)
+#define EFI_OFFSET(_Adr) (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xffff)
+#define BYTE_GRANULARITY 0x01
+#define WORD_GRANULARITY 0x02
+#define DWORD_GRANULARITY 0x04
+#define QWORD_GRANULARITY 0x08
+#define PARAGRAPH_GRANULARITY 0x10
+
+#define CARRY_FLAG 0x01
+
+//*********************************************************
+// EFI_EFLAGS_REG
+//*********************************************************
+typedef struct {
+ UINT32 CF:1;
+ UINT32 Reserved1:1;
+ UINT32 PF:1;
+ UINT32 Reserved2:1;
+ UINT32 AF:1;
+ UINT32 Reserved3:1;
+ UINT32 ZF:1;
+ UINT32 SF:1;
+ UINT32 TF:1;
+ UINT32 IF:1;
+ UINT32 DF:1;
+ UINT32 OF:1;
+ UINT32 IOPL:2;
+ UINT32 NT:1;
+ UINT32 Reserved4:2;
+ UINT32 VM:1;
+ UINT32 Reserved5:14;
+} EFI_EFLAGS_REG;
+
+//*********************************************************
+// EFI_DWORD_REGS
+//*********************************************************
+
+typedef struct {
+ UINT32 EAX;
+ UINT32 EBX;
+ UINT32 ECX;
+ UINT32 EDX;
+ UINT32 ESI;
+ UINT32 EDI;
+ EFI_EFLAGS_REG EFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT32 EBP;
+ UINT32 ESP;
+} EFI_DWORD_REGS;
+
+//*******************************************
+// EFI_FLAGS_REG
+//*******************************************
+typedef struct {
+ UINT16 CF:1;
+ UINT16 Reserved1:1;
+ UINT16 PF:1;
+ UINT16 Reserved2:1;
+ UINT16 AF:1;
+ UINT16 Reserved3:1;
+ UINT16 ZF:1;
+ UINT16 SF:1;
+ UINT16 TF:1;
+ UINT16 IF:1;
+ UINT16 DF:1;
+ UINT16 OF:1;
+ UINT16 IOPL:2;
+ UINT16 NT:1;
+ UINT16 Reserved4:1;
+} EFI_FLAGS_REG;
+
+
+//*********************************************************
+// EFI_WORD_REGS
+//*********************************************************
+
+typedef struct {
+ UINT16 AX;
+ UINT16 ReservedAX;
+ UINT16 BX;
+ UINT16 ReservedBX;
+ UINT16 CX;
+ UINT16 ReservedCX;
+ UINT16 DX;
+ UINT16 ReservedDX;
+ UINT16 SI;
+ UINT16 ReservedSI;
+ UINT16 DI;
+ UINT16 ReservedDI;
+ EFI_FLAGS_REG Flags;
+ UINT16 ReservedFlags;
+ UINT16 ES;
+ UINT16 CS;
+ UINT16 SS;
+ UINT16 DS;
+ UINT16 FS;
+ UINT16 GS;
+ UINT16 BP;
+ UINT16 ReservedBP;
+ UINT16 SP;
+ UINT16 ReservedSP;
+} EFI_WORD_REGS;
+
+//*********************************************************
+// EFI_BYTE_REGS
+//*********************************************************
+
+typedef struct {
+ UINT8 AL, AH;
+ UINT16 ReservedAX;
+ UINT8 BL, BH;
+ UINT16 ReservedBX;
+ UINT8 CL, CH;
+ UINT16 ReservedCX;
+ UINT8 DL, DH;
+ UINT16 ReservedDX;
+} EFI_BYTE_REGS;
+
+typedef union {
+ EFI_DWORD_REGS E;
+ EFI_WORD_REGS X;
+ EFI_BYTE_REGS H;
+} EFI_IA32_REGISTER_SET;
+
+#pragma pack(1)
+//
+// $EFI table created by Legacy16 code and consumed by EFI Legacy driver
+//
+typedef struct {
+ UINT32 Signature; // "$EFI"
+ UINT8 TableChecksum;
+ UINT8 TableLength;
+ UINT8 EfiMajorRevision;
+ UINT8 EfiMinorRevision;
+ UINT8 TableMajorRevision;
+ UINT8 TableMinorRevision;
+ UINT8 Reserved[2];
+ UINT16 Legacy16CallSegment;
+ UINT16 Legacy16CallOffset;
+
+ UINT16 PnPInstallationCheckSegment;
+ UINT16 PnPInstallationCheckOffset;
+
+ UINT32 EfiSystemTable;
+ UINT32 OemStringPointer;
+ UINT32 AcpiRsdPtrPointer;
+ UINT16 OemRevision;
+ UINT32 E820Pointer;
+ UINT32 E820Length;
+ UINT32 IrqRoutingTablePointer;
+ UINT32 IrqRoutingTableLength;
+ UINT32 MpTablePtr;
+ UINT32 MpTableLength;
+ UINT16 OemIntSegment;
+ UINT16 OemIntOffset;
+ UINT16 Oem32Segment;
+ UINT16 Oem32Offset;
+ UINT16 Oem16Segment;
+ UINT16 Oem16Offset;
+ UINT16 TpmSegment;
+ UINT16 TpmOffset;
+ UINT32 IbvPointer;
+ UINT32 PciExpressBase;
+ UINT8 LastPciBus;
+} EFI_COMPATIBILITY16_TABLE;
+//
+// define maximum number of HDD system supports
+//
+#define MAX_HDD_ENTRIES 0x30
+
+typedef struct {
+ UINT16 Raw[256];
+} ATAPI_IDENTIFY;
+
+//
+// HDD_INFO status
+//
+#define HDD_PRIMARY 0x01
+#define HDD_SECONDARY 0x02
+#define HDD_MASTER_ATAPI_CDROM 0x04
+#define HDD_SLAVE_ATAPI_CDROM 0x08
+#define HDD_MASTER_IDE 0x20
+#define HDD_SLAVE_IDE 0x40
+#define HDD_MASTER_ATAPI_ZIPDISK 0x10
+#define HDD_SLAVE_ATAPI_ZIPDISK 0x80
+
+typedef struct {
+ UINT16 Status;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT16 CommandBaseAddress;
+ UINT16 ControlBaseAddress;
+ UINT16 BusMasterAddress;
+ UINT8 HddIrq;
+ ATAPI_IDENTIFY IdentifyDrive[2];
+} HDD_INFO;
+
+//
+// Parties data structures
+//
+typedef struct {
+ UINT8 DirectoryServiceValidity : 1;
+ UINT8 RabcaUsedFlag : 1;
+ UINT8 ExecuteHddDiagnosticsFlag : 1;
+ UINT8 Reserved : 5;
+} UDC_ATTRIBUTES;
+
+typedef struct {
+ UDC_ATTRIBUTES Attributes;
+ UINT8 DeviceNumber;
+ UINT8 BbsTableEntryNumberForParentDevice;
+ UINT8 BbsTableEntryNumberForBoot;
+ UINT8 BbsTableEntryNumberForHddDiag;
+ UINT8 BeerData[128];
+ UINT8 ServiceAreaData[64];
+} UD_TABLE;
+
+//
+// define BBS Device Types
+//
+#define BBS_FLOPPY 0x01
+#define BBS_HARDDISK 0x02
+#define BBS_CDROM 0x03
+#define BBS_PCMCIA 0x04
+#define BBS_USB 0x05
+#define BBS_EMBED_NETWORK 0x06
+#define BBS_BEV_DEVICE 0x80
+#define BBS_UNKNOWN 0xff
+
+typedef struct {
+ UINT16 OldPosition : 4;
+ UINT16 Reserved1 : 4;
+ UINT16 Enabled : 1;
+ UINT16 Failed : 1;
+ UINT16 MediaPresent : 2;
+ UINT16 Reserved2 : 4;
+} BBS_STATUS_FLAGS;
+
+#define MAX_BBS_ENTRIES 0x100
+//
+// BBS_IGNORE_ENTRY is placed in the BootPriority field if the entry is to
+// be skipped.
+// BBS_UNPRIORITIZED_ENTRY is placed in the BootPriority field before
+// priority has been assigned but indicates valid entry.
+// BBS_LOWEST_PRIORITY is normally used for removable media with no media
+// inserted. This allows the 16-bit CSM to allocate a drive letter to
+// the device.
+// BBS_DO_NOT_BOOT_FROM is used for devices that the 16-bit CSM is to assign
+// a drive letter to but never boot from.
+//
+// AdditionalIrq??Handler usage is IBV specific. The fields have been added
+// for:
+// 1. Saving non-BBS card info about IRQs taken by card.
+// 2. For BBS compliant cards that hook IRQs in order to have their SETUP
+// executed.
+//
+#define BBS_DO_NOT_BOOT_FROM 0xFFFC
+#define BBS_LOWEST_PRIORITY 0xFFFD
+#define BBS_UNPRIORITIZED_ENTRY 0xFFFE
+#define BBS_IGNORE_ENTRY 0xFFFF
+
+typedef struct {
+ UINT16 BootPriority;
+ UINT32 Bus;
+ UINT32 Device;
+ UINT32 Function;
+ UINT8 Class;
+ UINT8 SubClass;
+ UINT16 MfgStringOffset;
+ UINT16 MfgStringSegment;
+ UINT16 DeviceType;
+ BBS_STATUS_FLAGS StatusFlags;
+ UINT16 BootHandlerOffset;
+ UINT16 BootHandlerSegment;
+ UINT16 DescStringOffset;
+ UINT16 DescStringSegment;
+ UINT32 InitPerReserved;
+ UINT32 AdditionalIrq13Handler;
+ UINT32 AdditionalIrq18Handler;
+ UINT32 AdditionalIrq19Handler;
+ UINT32 AdditionalIrq40Handler;
+ UINT8 AssignedDriveNumber;
+ UINT32 AdditionalIrq41Handler;
+ UINT32 AdditionalIrq46Handler;
+ UINT32 IBV1;
+ UINT32 IBV2;
+} BBS_TABLE;
+
+#pragma pack()
+
+/**
+ Thunk to 16-bit real mode and execute a software interrupt with a vector
+ of BiosInt. Regs will contain the 16-bit register context on entry and
+ exit.
+
+ @param This Protocol instance pointer.
+ @param BiosInt Processor interrupt vector to invoke
+ @param Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode
+
+ @retval FALSE Thunk completed, and there were no BIOS errors in the target code.
+ See Regs for status.
+ @retval TRUE There was a BIOS erro in the target code.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_INT86) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 BiosInt,
+ IN OUT EFI_IA32_REGISTER_SET *Regs
+ )
+;
+
+/**
+ Thunk to 16-bit real mode and call Segment:Offset. Regs will contain the
+ 16-bit register context on entry and exit. Arguments can be passed on
+ the Stack argument
+
+ @param This Protocol instance pointer.
+ @param Segment Segemnt of 16-bit mode call
+ @param Offset Offset of 16-bit mdoe call
+ @param Reg Register contexted passed into (and returned) from thunk to
+ 16-bit mode
+ @param Stack Caller allocated stack used to pass arguments
+ @param StackSize Size of Stack in bytes
+
+ @retval FALSE Thunk completed, and there were no BIOS errors in the target code.
+ See Regs for status.
+ @retval TRUE There was a BIOS erro in the target code.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_LEGACY_BIOS_FARCALL86) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT16 Segment,
+ IN UINT16 Offset,
+ IN EFI_IA32_REGISTER_SET *Regs,
+ IN VOID *Stack,
+ IN UINTN StackSize
+ )
+;
+
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_CHECK_ROM) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage, OPTIONAL
+ OUT UINTN *RomSize, OPTIONAL
+ OUT UINTN *Flags
+
+/**
+ Test to see if a legacy PCI ROM exists for this device. Optionally return
+ the Legacy ROM instance for this PCI device.
+
+ @param This Protocol instance pointer.
+ @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded
+ @param RomImage Return the legacy PCI ROM for this device
+ @param RomSize Size of ROM Image
+ @param Flags Indicates if ROM found and if PC-AT.
+
+ @retval EFI_SUCCESS Legacy Option ROM availible for this device
+ @retval EFI_UNSUPPORTED Legacy Option ROM not supported.
+
+**/
+ )
+;
+
+/**
+ Load a legacy PC-AT OPROM on the PciHandle device. Return information
+ about how many disks were added by the OPROM and the shadow address and
+ size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C:
+
+ @param This Protocol instance pointer.
+ @param PciHandle The PCI PC-AT OPROM from this devices ROM BAR will be loaded.
+ This value is NULL if RomImage is non-NULL. This is the normal
+ case.
+ @param RomImage A PCI PC-AT ROM image. This argument is non-NULL if there is
+ no hardware associated with the ROM and thus no PciHandle,
+ otherwise is must be NULL.
+ Example is PXE base code.
+ @param Flags Return Status if ROM was found and if was Legacy OPROM.
+ @param DiskStart Disk number of first device hooked by the ROM. If DiskStart
+ is the same as DiskEnd no disked were hooked.
+ @param DiskEnd Disk number of the last device hooked by the ROM.
+ @param RomShadowAddress Shadow address of PC-AT ROM
+ @param RomShadowSize Size of RomShadowAddress in bytes
+
+ @retval EFI_SUCCESS Thunk completed, see Regs for status.
+ @retval EFI_INVALID_PARAMETER PciHandle not found
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_INSTALL_ROM) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ IN VOID **RomImage,
+ OUT UINTN *Flags,
+ OUT UINT8 *DiskStart, OPTIONAL
+ OUT UINT8 *DiskEnd, OPTIONAL
+ OUT VOID **RomShadowAddress, OPTIONAL
+ OUT UINT32 *ShadowedRomSize OPTIONAL
+ )
+;
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This Protocol instance pointer.
+ @param BootOption EFI Device Path from BootXXXX variable.
+ @param LoadOptionSize Size of LoadOption in size.
+ @param LoadOption LoadOption from BootXXXX variable
+
+ @retval EFI_SUCCESS Removable media not present
+
+**/
+/**
+ Update BDA with current Scroll, Num & Cap lock LEDS
+
+ @param This Protocol instance pointer.
+ @param Leds Status of current Scroll, Num & Cap lock LEDS
+ Bit 0 is Scroll Lock 0 = Not locked
+ Bit 1 is Num Lock
+ Bit 2 is Caps Lock
+
+ @retval EFI_SUCCESS Removable media not present
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BootOption,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions
+ )
+;
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINT8 Leds
+ )
+;
+
+/**
+ Retrieve legacy BBS info and assign boot priority.
+
+ @param This Protocol instance pointer.
+ @param HddCount Number of HDD_INFO structures
+ @param HddInfo Onboard IDE controller information
+ @param BbsCount Number of BBS_TABLE structures
+ @param BbsTable List BBS entries
+
+ @retval EFI_SUCCESS Tables returned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_BBS_INFO) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *HddCount,
+ OUT HDD_INFO **HddInfo,
+ OUT UINT16 *BbsCount,
+ OUT IN BBS_TABLE **BbsTable
+ )
+;
+
+/**
+ Assign drive number to legacy HDD drives prior to booting an EFI
+ aware OS so the OS can access drives without an EFI driver.
+
+ @param This Protocol instance pointer.
+ @param BbsCount Number of BBS_TABLE structures
+ @param BbsTable List BBS entries
+
+ @retval EFI_SUCCESS Drive numbers assigned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ OUT UINT16 *BbsCount,
+ OUT IN BBS_TABLE **BbsTable
+ )
+;
+
+/**
+ To boot from an unconventional device like parties and/or execute
+ HDD diagnostics.
+
+ @param This Protocol instance pointer.
+ @param Attributes How to interpret the other input parameters
+ @param BbsEntry The 0-based index into the BbsTable for the parent
+ device.
+ @param BeerData Pointer to the 128 bytes of ram BEER data.
+ @param ServiceAreaData Pointer to the 64 bytes of raw Service Area data. The
+ caller must provide a pointer to the specific Service
+ Area and not the start all Service Areas.
+
+ EFI_INVALID_PARAMETER if error. Does NOT return if no error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UDC_ATTRIBUTES Attributes,
+ IN UINTN BbsEntry,
+ IN VOID *BeerData,
+ IN VOID *ServiceAreaData
+ )
+;
+
+/**
+ Shadow all legacy16 OPROMs that haven't been shadowed.
+ Warning: Use this with caution. This routine disconnects all EFI
+ drivers. If used externally then caller must re-connect EFI
+ drivers.
+
+ @retval EFI_SUCCESS OPROMs shadowed
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This
+ )
+;
+
+/**
+ Get a region from the LegacyBios for S3 usage.
+
+ @param This Protocol instance pointer.
+ @param LegacyMemorySize Size of required region
+ @param Region Region to use.
+ 00 = Either 0xE0000 or 0xF0000 block
+ Bit0 = 1 0xF0000 block
+ Bit1 = 1 0xE0000 block
+ @param Alignment Address alignment. Bit mapped. First non-zero
+ bit from right is alignment.
+ @param LegacyMemoryAddress Region Assigned
+
+ @retval EFI_SUCCESS Region assigned
+
+ @retval Other Region not assigned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_GET_LEGACY_REGION) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN UINTN Region,
+ IN UINTN Alignment,
+ OUT VOID **LegacyMemoryAddress
+ )
+;
+
+/**
+ Get a region from the LegacyBios for Tiano usage. Can only be invoked once.
+
+ @param This Protocol instance pointer.
+ @param LegacyMemorySize Size of data to copy
+ @param LegacyMemoryAddress Legacy Region destination address
+ Note: must be in region assigned by
+ LegacyBiosGetLegacyRegion
+ @param LegacyMemorySourceAddress Source of data
+
+ @retval EFI_SUCCESS Region assigned
+ @retval EFI_ACCESS_DENIED Destination outside assigned region
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_COPY_LEGACY_REGION) (
+ IN EFI_LEGACY_BIOS_PROTOCOL *This,
+ IN UINTN LegacyMemorySize,
+ IN VOID *LegacyMemoryAddress,
+ IN VOID *LegacyMemorySourceAddress
+ )
+;
+
+/**
+ @par Protocol Description:
+ Abstracts the traditional BIOS from the rest of EFI. The LegacyBoot()
+ member function allows the BDS to support booting a traditional OS.
+ EFI thunks drivers that make EFI bindings for BIOS INT services use
+ all the other member functions.
+
+ @param Int86
+ Performs traditional software INT. See the Int86() function description.
+
+ @param FarCall86
+ Performs a far call into Compatibility16 or traditional OpROM code.
+
+ @param CheckPciRom
+ Checks if a traditional OpROM exists for this device.
+
+ @param InstallPciRom
+ Loads a traditional OpROM in traditional OpROM address space.
+
+ @param LegacyBoot
+ Boots a traditional OS.
+
+ @param UpdateKeyboardLedStatus
+ Updates BDA to reflect the current EFI keyboard LED status.
+
+ @param GetBbsInfo
+ Allows an external agent, such as BIOS Setup, to get the BBS data.
+
+ @param ShadowAllLegacyOproms
+ Causes all legacy OpROMs to be shadowed.
+
+ @param PrepareToBootEfi
+ Performs all actions prior to boot. Used when booting an EFI-aware OS
+ rather than a legacy OS.
+
+ @param GetLegacyRegion
+ Allows EFI to reserve an area in the 0xE0000 or 0xF0000 block.
+
+ @param CopyLegacyRegion
+ Allows EFI to copy data to the area specified by GetLegacyRegion.
+
+ @param BootUnconventionalDevice
+ Allows the user to boot off an unconventional device such as a PARTIES partition.
+
+**/
+struct _EFI_LEGACY_BIOS_PROTOCOL {
+ EFI_LEGACY_BIOS_INT86 Int86;
+ EFI_LEGACY_BIOS_FARCALL86 FarCall86;
+ EFI_LEGACY_BIOS_CHECK_ROM CheckPciRom;
+ EFI_LEGACY_BIOS_INSTALL_ROM InstallPciRom;
+ EFI_LEGACY_BIOS_BOOT LegacyBoot;
+ EFI_LEGACY_BIOS_UPDATE_KEYBOARD_LED_STATUS UpdateKeyboardLedStatus;
+ EFI_LEGACY_BIOS_GET_BBS_INFO GetBbsInfo;
+ EFI_LEGACY_BIOS_PREPARE_TO_BOOT_EFI PrepareToBootEfi;
+ EFI_LEGACY_BIOS_SHADOW_ALL_LEGACY_OPROMS ShadowAllLegacyOproms;
+ EFI_LEGACY_BIOS_GET_LEGACY_REGION GetLegacyRegion;
+ EFI_LEGACY_BIOS_COPY_LEGACY_REGION CopyLegacyRegion;
+ EFI_LEGACY_BIOS_BOOT_UNCONVENTIONAL_DEVICE BootUnconventionalDevice;
+};
+
+extern EFI_GUID gEfiLegacyBiosProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LegacyBiosPlatform.h b/MdePkg/Include/Protocol/LegacyBiosPlatform.h new file mode 100644 index 0000000000..56d6724180 --- /dev/null +++ b/MdePkg/Include/Protocol/LegacyBiosPlatform.h @@ -0,0 +1,307 @@ +/** @file
+ The EFI Legacy BIOS Patform Protocol is used to mate a Legacy16
+ implementation with this EFI code. The EFI driver that produces
+ the Legacy BIOS protocol is generic and consumes this protocol.
+ A driver that matches the Legacy16 produces this protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyBiosPlatform.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+**/
+
+#ifndef _EFI_LEGACY_BIOS_PLATFORM_H
+#define _EFI_LEGACY_BIOS_PLATFORM_H
+
+#define EFI_LEGACY_BIOS_PLATFORM_PROTOCOL_GUID \
+ { \
+ 0x783658a3, 0x4172, 0x4421, {0xa2, 0x99, 0xe0, 0x9, 0x7, 0x9c, 0xc, 0xb4 } \
+ }
+
+typedef struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL EFI_LEGACY_BIOS_PLATFORM_PROTOCOL;
+
+#pragma pack(1)
+//
+// Define structures for GetOemIntData
+// Note:
+// OemIntDataElenent is an array of structures from 0 to Count-1.
+// RawData is an array of bytes from 0 to RamDataLength-1.
+//
+typedef struct {
+ UINT16 Int;
+ UINT16 Ax;
+ UINT32 RawDataLength;
+ UINT8 RawData[1];
+} EFI_OEM_INT_DATA_ELEMENT;
+
+typedef struct {
+ UINT16 Count;
+ EFI_OEM_INT_DATA_ELEMENT OemIntDataElement[1];
+} EFI_OEM_INT_DATA;
+#pragma pack()
+
+typedef enum {
+ EfiGetPlatformBinaryMpTable = 0,
+ EfiGetPlatformBinaryOemIntData = 1,
+ EfiGetPlatformBinaryOem16Data = 2,
+ EfiGetPlatformBinaryOem32Data = 3,
+ EfiGetPlatformBinaryTpmBinary = 4,
+ EfiGetPlatformBinarySystemRom = 5,
+ EfiGetPlatformPciExpressBase = 6,
+ EfiGetPlatformPmmSize = 7,
+ EfiGetPlatformEndOpromShadowAddr = 8,
+
+} EFI_GET_PLATFORM_INFO_MODE;
+
+typedef enum {
+ EfiGetPlatformVgaHandle = 0,
+ EfiGetPlatformIdeHandle = 1,
+ EfiGetPlatformIsaBusHandle = 2,
+ EfiGetPlatformUsbHandle = 3
+} EFI_GET_PLATFORM_HANDLE_MODE;
+
+typedef enum {
+ EfiPlatformHookPrepareToScanRom = 0,
+ EfiPlatformHookShadowServiceRoms= 1,
+ EfiPlatformHookAfterRomInit = 2
+} EFI_GET_PLATFORM_HOOK_MODE;
+
+/**
+ Finds the binary data or other platform information.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what data to return
+ @param Table Pointer to MP table.
+ @param TableSize Size in bytes of table.
+ @param Location Legacy region requested
+ 0x00 = Any location
+ Bit 0 = 0xF0000 region
+ Bit 1 = 0xE0000 region
+ Multiple bits can be set
+ @param Alignment Address alignment for allocation.
+ Bit mapped. First non-zero bit from right
+ is alignment.
+ @param LegacySegment Segment in LegacyBios where Table is stored
+ @param LegacyOffset Offset in LegacyBios where Table is stored
+
+ @retval EFI_SUCCESS Data was returned successfully.
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Binary image or table not found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_INFO_MODE Mode,
+ OUT VOID **Table,
+ OUT UINTN *TableSize,
+ OUT UINTN *Location,
+ OUT UINTN *Alignment,
+ IN UINT16 LegacySegment,
+ IN UINT16 LegacyOffset
+ )
+;
+
+/**
+ Returns a buffer of handles for the requested sub-function.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what handle to return.
+ @param Type Type from Device Path for Handle to represent.
+ @param HandleBuffer Handles of the device/controller in priority order
+ with HandleBuffer[0] highest priority.
+ @param HandleCount Number of handles in the buffer.
+ @param AdditionalData Mode specific.
+
+ @retval EFI_SUCCESS Handle is valid
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+ @retval EFI_NOT_FOUND Handle is not known
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HANDLE_MODE Mode,
+ IN UINT16 Type,
+ OUT EFI_HANDLE **HandleBuffer,
+ OUT UINTN *HandleCount,
+ IN VOID **AdditionalData OPTIONAL
+ )
+;
+
+/**
+ Load and initialize the Legacy BIOS SMM handler.
+
+ @param This Protocol instance pointer.
+ @param EfiToLegacy16BootTable Pointer to Legacy16 boot table.
+
+ @retval EFI_SUCCESS SMM code loaded.
+ @retval EFI_DEVICE_ERROR SMM code failed to load
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_SMM_INIT) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN VOID *EfiToLegacy16BootTable
+ )
+;
+
+/**
+ Allows platform to perform any required action after a LegacyBios operation.
+
+ @param This Protocol instance pointer.
+ @param Mode Specifies what handle to return.
+ @param Type Mode specific.
+ @param DeviceHandle List of PCI devices in the system.
+ @param ShadowAddress First free OpROM area, after other OpROMs have been dispatched.
+ @param Compatibility16Table Pointer to Compatibility16Table.
+ @param AdditionalData Mode specific Pointer to additional data returned ¨C mode specific.
+
+ @retval EFI_SUCCESS RomImage is valid
+ @retval EFI_UNSUPPORTED Mode is not supported on the platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_HOOKS) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN EFI_GET_PLATFORM_HOOK_MODE Mode,
+ IN UINT16 Type,
+ IN EFI_HANDLE DeviceHandle,
+ IN OUT UINTN *ShadowAddress,
+ IN EFI_COMPATIBILITY16_TABLE *Compatibility16Table,
+ IN VOID **AdditionalData OPTIONAL
+ )
+;
+
+/**
+ Returns information associated with PCI IRQ routing.
+
+ @param This Protocol instance pointer.
+ @param RoutingTable Pointer to PCI IRQ Routing table.
+ @param RoutingTableEntries Number of entries in table.
+ @param LocalPirqTable $PIR table
+ @param PirqTableSize $PIR table size
+ @param LocalIrqPriorityTable List of interrupts in priority order to assign
+ @param IrqPriorityTableEntries- Number of entries in priority table
+
+ @retval EFI_SUCCESS Data was successfully returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ OUT VOID **RoutingTable,
+ OUT UINTN *RoutingTableEntries,
+ OUT VOID **LocalPirqTable, OPTIONAL
+ OUT UINTN *PirqTableSize, OPTIONAL
+ OUT VOID **LocalIrqPriorityTable, OPTIONAL
+ OUT UINTN *IrqPriorityTableEntries OPTIONAL
+ )
+;
+
+/**
+ Translates the given PIRQ accounting for bridge
+
+ @param This Protocol instance pointer.
+ @param PciBus PCI bus number for this device.
+ @param PciDevice PCI device number for this device.
+ @param PciFunction PCI function number for this device.
+ @param Pirq Input is PIRQ reported by device, output is true PIRQ.
+ @param PciIrq The IRQ already assigned to the PIRQ or the IRQ to be
+ assigned to the PIRQ.
+
+ @retval EFI_SUCCESS The PIRQ was translated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN UINTN PciBus,
+ IN UINTN PciDevice,
+ IN UINTN PciFunction,
+ IN OUT UINT8 *Pirq,
+ OUT UINT8 *PciIrq
+ )
+;
+
+/**
+ Attempt to legacy boot the BootOption. If the EFI contexted has been
+ compromised this function will not return.
+
+ @param This Protocol instance pointer.
+ @param BbsDevicePath EFI Device Path from BootXXXX variable.
+ @param BbsTable Internal BBS table.
+ @param LoadOptionSize Size of LoadOption in size.
+ @param LoadOption LoadOption from BootXXXX variable
+ @param EfiToLegacy16BootTable Pointer to BootTable structure
+
+ @retval EFI_SUCCESS Ready to boot.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT) (
+ IN EFI_LEGACY_BIOS_PLATFORM_PROTOCOL *This,
+ IN BBS_BBS_DEVICE_PATH *BbsDevicePath,
+ IN VOID *BbsTable,
+ IN UINT32 LoadOptionsSize,
+ IN VOID *LoadOptions,
+ IN VOID *EfiToLegacy16BootTable
+ )
+;
+
+/**
+ @par Protocol Description:
+ Abstracts the platform portion of the traditional BIOS.
+
+ @param GetPlatformInfo
+ Gets binary data or other platform information.
+
+ @param GetPlatformHandle
+ Returns a buffer of all handles matching the requested subfunction.
+
+ @param SmmInit
+ Loads and initializes the traditional BIOS SMM handler.
+
+ @param PlatformHooks
+ Allows platform to perform any required actions after a LegacyBios operation.
+
+ @param GetRoutingTable
+ Gets $PIR table.
+
+ @param TranslatePirq
+ Translates the given PIRQ to the final value after traversing any PCI bridges.
+
+ @param PrepareToBoot
+ Final platform function before the system attempts to boot to a traditional OS.
+
+**/
+struct _EFI_LEGACY_BIOS_PLATFORM_PROTOCOL {
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_INFO GetPlatformInfo;
+ EFI_LEGACY_BIOS_PLATFORM_GET_PLATFORM_HANDLE GetPlatformHandle;
+ EFI_LEGACY_BIOS_PLATFORM_SMM_INIT SmmInit;
+ EFI_LEGACY_BIOS_PLATFORM_HOOKS PlatformHooks;
+ EFI_LEGACY_BIOS_PLATFORM_GET_ROUTING_TABLE GetRoutingTable;
+ EFI_LEGACY_BIOS_PLATFORM_TRANSLATE_PIRQ TranslatePirq;
+ EFI_LEGACY_BIOS_PLATFORM_PREPARE_TO_BOOT PrepareToBoot;
+};
+
+extern EFI_GUID gEfiLegacyBiosPlatformProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LegacyInterrupt.h b/MdePkg/Include/Protocol/LegacyInterrupt.h new file mode 100644 index 0000000000..54dc9aaa9b --- /dev/null +++ b/MdePkg/Include/Protocol/LegacyInterrupt.h @@ -0,0 +1,131 @@ +/** @file
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyInterrupt.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_INTERRUPT_H_
+#define _EFI_LEGACY_INTERRUPT_H_
+
+#define EFI_LEGACY_INTERRUPT_PROTOCOL_GUID \
+ { \
+ 0x31ce593d, 0x108a, 0x485d, {0xad, 0xb2, 0x78, 0xf2, 0x1f, 0x29, 0x66, 0xbe } \
+ }
+
+typedef struct _EFI_LEGACY_INTERRUPT_PROTOCOL EFI_LEGACY_INTERRUPT_PROTOCOL;
+
+/**
+ Get the number of PIRQs this hardware supports.
+
+ @param This Protocol instance pointer.
+ @param NumberPirsq Number of PIRQs.
+
+ @retval EFI_SUCCESS Number of PIRQs returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *NumberPirqs
+ );
+
+/**
+ Gets the PCI location associated with this protocol.
+
+ @param This Protocol instance pointer.
+ @param Bus PCI Bus
+ @param Device PCI Device
+ @param Function PCI Function
+
+ @retval EFI_SUCCESS Bus/Device/Function returned
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_GET_LOCATION) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ OUT UINT8 *Bus,
+ OUT UINT8 *Device,
+ OUT UINT8 *Function
+ );
+
+/**
+ Read the PIRQ register and return the data
+
+ @param This Protocol instance pointer.
+ @param PirqNumber PIRQ register to read
+ @param PirqData Data read
+
+ @retval EFI_SUCCESS Data was read
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_READ_PIRQ) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ OUT UINT8 *PirqData
+ );
+
+/**
+ Write the specified PIRQ register with the given data.
+
+ @param This Protocol instance pointer.
+ @param PirqNumber PIRQ register to read.
+ @param PirqData Data written.
+
+ @retval EFI_SUCCESS Table pointer returned
+ @retval EFI_INVALID_PARAMETER Invalid PIRQ number
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_INTERRUPT_WRITE_PIRQ) (
+ IN EFI_LEGACY_INTERRUPT_PROTOCOL *This,
+ IN UINT8 PirqNumber,
+ IN UINT8 PirqData
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the PIRQ programming from the generic EFI Compatibility Support Modules
+
+ @param GetNumberPirqs
+ Gets the number of PIRQs supported.
+
+ @param GetLocation
+ Gets the PCI bus, device, and function that associated with this protocol.
+
+ @param ReadPirq
+ Reads the indicated PIRQ register.
+
+ @param WritePirq
+ Writes to the indicated PIRQ register.
+
+**/
+struct _EFI_LEGACY_INTERRUPT_PROTOCOL {
+ EFI_LEGACY_INTERRUPT_GET_NUMBER_PIRQS GetNumberPirqs;
+ EFI_LEGACY_INTERRUPT_GET_LOCATION GetLocation;
+ EFI_LEGACY_INTERRUPT_READ_PIRQ ReadPirq;
+ EFI_LEGACY_INTERRUPT_WRITE_PIRQ WritePirq;
+};
+
+extern EFI_GUID gEfiLegacyInterruptProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LegacyRegion.h b/MdePkg/Include/Protocol/LegacyRegion.h new file mode 100644 index 0000000000..db7d346186 --- /dev/null +++ b/MdePkg/Include/Protocol/LegacyRegion.h @@ -0,0 +1,152 @@ +/** @file
+ This protocol manages the legacy memory regions between 0xc0000 - 0xfffff
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LegacyRegion.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework for EFI Compatibility Support Module spec
+ Version 0.96
+
+**/
+
+#ifndef _EFI_LEGACY_REGION_H_
+#define _EFI_LEGACY_REGION_H_
+
+#define EFI_LEGACY_REGION_PROTOCOL_GUID \
+ { \
+ 0xfc9013a, 0x568, 0x4ba9, {0x9b, 0x7e, 0xc9, 0xc3, 0x90, 0xa6, 0x60, 0x9b } \
+ }
+
+typedef struct _EFI_LEGACY_REGION_PROTOCOL EFI_LEGACY_REGION_PROTOCOL;
+
+/**
+ Sets hardware to decode or not decode a region.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+
+ @param Start Start of region to decode.
+
+ @param Length Size in bytes of the region.
+
+ @param On Decode/nondecode flag.
+
+ @retval EFI_SUCCESS Decode range successfully changed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_DECODE) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ IN BOOLEAN *On
+ );
+
+/**
+ Sets a region to read only.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+
+ @param Start Start of region to lock.
+
+ @param Length Size in bytes of the region.
+
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_LOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read only and ensures that flash is locked from being
+ inadvertently modified.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+
+ @param Start Start of region to lock.
+
+ @param Length Size in bytes of the region.
+
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was made read only and flash is locked.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_BOOT_LOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ Sets a region to read-write.
+
+ @param This Indicates the EFI_LEGACY_REGION_PROTOCOL instance
+
+ @param Start Start of region to lock.
+
+ @param Length Size in bytes of the region.
+
+ @param Granularity Lock attribute affects this granularity in bytes.
+
+ @retval EFI_SUCCESS The region was successfully made read-write.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LEGACY_REGION_UNLOCK) (
+ IN EFI_LEGACY_REGION_PROTOCOL *This,
+ IN UINT32 Start,
+ IN UINT32 Length,
+ OUT UINT32 *Granularity OPTIONAL
+ );
+
+/**
+ @par Protocol Description:
+ Abstracts the hardware control of the physical address region 0xC0000¨C0xFFFFF
+ for the traditional BIOS.
+
+ @param Decode
+ Specifies a region for the chipset to decode
+
+ @param Lock
+ Makes the specified OpROM region read only or locked.
+
+ @param BootLock
+ Sets a region to read only and ensures tat flash is locked from
+ inadvertent modification.
+
+ @param Unlock
+ Makes the specified OpROM region read-write or unlocked.
+
+**/
+struct _EFI_LEGACY_REGION_PROTOCOL {
+ EFI_LEGACY_REGION_DECODE Decode;
+ EFI_LEGACY_REGION_LOCK Lock;
+ EFI_LEGACY_REGION_BOOT_LOCK BootLock;
+ EFI_LEGACY_REGION_UNLOCK UnLock;
+};
+
+extern EFI_GUID gEfiLegacyRegionProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LoadFile.h b/MdePkg/Include/Protocol/LoadFile.h new file mode 100644 index 0000000000..346039fb61 --- /dev/null +++ b/MdePkg/Include/Protocol/LoadFile.h @@ -0,0 +1,83 @@ +/** @file
+ Load File protocol as defined in the EFI 1.0 specification.
+
+ Load file protocol exists to supports the addition of new boot devices,
+ and to support booting from devices that do not map well to file system.
+ Network boot is done via a LoadFile protocol.
+
+ EFI 1.0 can boot from any device that produces a LoadFile protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LoadFile.h
+
+**/
+
+#ifndef __EFI_LOAD_FILE_PROTOCOL_H__
+#define __EFI_LOAD_FILE_PROTOCOL_H__
+
+#define LOAD_FILE_PROTOCOL_GUID \
+ { \
+ 0x56EC3091, 0x954C, 0x11d2, {0x8E, 0x3F, 0x00, 0xA0, 0xC9, 0x69, 0x72, 0x3B } \
+ }
+
+//
+// Protocol Guid Name defined by UEFI 2.0 spec.
+//
+#define EFI_LOAD_FILE_PROTOCOL_GUID LOAD_FILE_PROTOCOL_GUID
+
+typedef struct _EFI_LOAD_FILE_PROTOCOL EFI_LOAD_FILE_PROTOCOL;
+
+/**
+ Causes the driver to load a specified file.
+
+ @param This Protocol instance pointer.
+ @param FilePath The device specific path of the file to load.
+ @param BootPolicy If TRUE, indicates that the request originates from the
+ boot manager is attempting to load FilePath as a boot
+ selection. If FALSE, then FilePath must match as exact file
+ to be loaded.
+ @param BufferSize On input the size of Buffer in bytes. On output with a return
+ code of EFI_SUCCESS, the amount of data transferred to
+ Buffer. On output with a return code of EFI_BUFFER_TOO_SMALL,
+ the size of Buffer required to retrieve the requested file.
+ @param Buffer The memory buffer to transfer the file to. IF Buffer is NULL,
+ then no the size of the requested file is returned in
+ BufferSize.
+
+ @retval EFI_SUCCESS The file was loaded.
+ @retval EFI_UNSUPPORTED The device does not support the provided BootPolicy
+ @retval EFI_INVALID_PARAMETER FilePath is not a valid device path, or
+ BufferSize is NULL.
+ @retval EFI_NO_MEDIA No medium was present to load the file.
+ @retval EFI_DEVICE_ERROR The file was not loaded due to a device error.
+ @retval EFI_NO_RESPONSE The remote system did not respond.
+ @retval EFI_NOT_FOUND The file was not found
+ @retval EFI_ABORTED The file load process was manually cancelled.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LOAD_FILE) (
+ IN EFI_LOAD_FILE_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN BOOLEAN BootPolicy,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer OPTIONAL
+ )
+;
+
+struct _EFI_LOAD_FILE_PROTOCOL {
+ EFI_LOAD_FILE LoadFile;
+};
+
+extern EFI_GUID gEfiLoadFileProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/LoadedImage.h b/MdePkg/Include/Protocol/LoadedImage.h new file mode 100644 index 0000000000..aee063c927 --- /dev/null +++ b/MdePkg/Include/Protocol/LoadedImage.h @@ -0,0 +1,69 @@ +/** @file
+ EFI 1.0 Loaded image protocol definition.
+
+ Every EFI driver and application is passed an image handle when it is loaded.
+ This image handle will contain a Loaded Image Protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: LoadedImage.h
+
+**/
+
+#ifndef __LOADED_IMAGE_PROTOCOL_H__
+#define __LOADED_IMAGE_PROTOCOL_H__
+
+#define EFI_LOADED_IMAGE_PROTOCOL_GUID \
+ { \
+ 0x5B1B31A1, 0x9562, 0x11d2, {0x8E, 0x3F, 0x00, 0xA0, 0xC9, 0x69, 0x72, 0x3B } \
+ }
+
+//
+// EFI_SYSTEM_TABLE & EFI_IMAGE_UNLOAD are defined in EfiApi.h
+//
+#define EFI_LOADED_IMAGE_INFORMATION_REVISION 0x1000
+#define EFI_LOADED_IMAGE_PROTOCOL_REVISION EFI_LOADED_IMAGE_INFORMATION_REVISION
+
+typedef struct {
+ UINT32 Revision;
+ EFI_HANDLE ParentHandle;
+ EFI_SYSTEM_TABLE *SystemTable;
+
+ //
+ // Source location of image
+ //
+ EFI_HANDLE DeviceHandle;
+ EFI_DEVICE_PATH_PROTOCOL *FilePath;
+ VOID *Reserved;
+
+ //
+ // Images load options
+ //
+ UINT32 LoadOptionsSize;
+ VOID *LoadOptions;
+
+ //
+ // Location of where image was loaded
+ //
+ VOID *ImageBase;
+ UINT64 ImageSize;
+ EFI_MEMORY_TYPE ImageCodeType;
+ EFI_MEMORY_TYPE ImageDataType;
+
+ //
+ // If the driver image supports a dynamic unload request
+ //
+ EFI_IMAGE_UNLOAD Unload;
+
+} EFI_LOADED_IMAGE_PROTOCOL;
+
+extern EFI_GUID gEfiLoadedImageProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/ManagedNetwork.h b/MdePkg/Include/Protocol/ManagedNetwork.h new file mode 100644 index 0000000000..1bf9a1305a --- /dev/null +++ b/MdePkg/Include/Protocol/ManagedNetwork.h @@ -0,0 +1,314 @@ +/** @file
+ EFI_MANAGED_NETWORK_SERVICE_BINDING_PROTOCOL as defined in UEFI 2.0.
+ EFI_MANAGED_NETWORK_PROTOCOL as defined in UEFI 2.0.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ManagedNetwork.h
+
+**/
+
+#ifndef _EFI_MANAGED_NETWORK_PROTOCOL_H
+#define _EFI_MANAGED_NETWORK_PROTOCOL_H
+
+#define EFI_MANAGED_NETWORK_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0xf36ff770, 0xa7e1, 0x42cf, {0x9e, 0xd2, 0x56, 0xf0, 0xf2, 0x71, 0xf4, 0x4c } \
+ }
+
+#define EFI_MANAGED_NETWORK_PROTOCOL_GUID \
+ { \
+ 0x3b95aa31, 0x3793, 0x434b, {0x86, 0x67, 0xc8, 0x7, 0x8, 0x92, 0xe0, 0x5e } \
+ }
+
+typedef struct _EFI_MANAGED_NETWORK_PROTOCOL EFI_MANAGED_NETWORK_PROTOCOL;
+
+typedef struct {
+ UINT32 ReceivedQueueTimeoutValue;
+ UINT32 TransmitQueueTimeoutValue;
+ UINT16 ProtocolTypeFilter;
+ BOOLEAN EnableUnicastReceive;
+ BOOLEAN EnableMulticastReceive;
+ BOOLEAN EnableBroadcastReceive;
+ BOOLEAN EnablePromiscuousReceive;
+ BOOLEAN FlushQueuesOnReset;
+ BOOLEAN EnableReceiveTimestamps;
+ BOOLEAN DisableBackgroundPolling;
+} EFI_MANAGED_NETWORK_CONFIG_DATA;
+
+typedef struct {
+ EFI_TIME Timestamp;
+ EFI_EVENT RecycleEvent;
+ UINT32 PacketLength;
+ UINT32 HeaderLength;
+ UINT32 AddressLength;
+ UINT32 DataLength;
+ BOOLEAN BroadcastFlag;
+ BOOLEAN MulticastFlag;
+ BOOLEAN PromiscuousFlag;
+ UINT16 ProtocolType;
+ VOID *DestinationAddress;
+ VOID *SourceAddress;
+ VOID *MediaHeader;
+ VOID *PacketData;
+} EFI_MANAGED_NETWORK_RECEIVE_DATA;
+
+typedef struct {
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
+} EFI_MANAGED_NETWORK_FRAGMENT_DATA;
+
+typedef struct {
+ EFI_MAC_ADDRESS *DestinationAddress; //OPTIONAL
+ EFI_MAC_ADDRESS *SourceAddress; //OPTIONAL
+ UINT16 ProtocolType; //OPTIONAL
+ UINT32 DataLength;
+ UINT16 HeaderLength; //OPTIONAL
+ UINT16 FragmentCount;
+ EFI_MANAGED_NETWORK_FRAGMENT_DATA FragmentTable[1];
+} EFI_MANAGED_NETWORK_TRANSMIT_DATA;
+
+
+typedef struct {
+ EFI_EVENT Event;
+ EFI_STATUS Status;
+ union {
+ EFI_MANAGED_NETWORK_RECEIVE_DATA *RxData;
+ EFI_MANAGED_NETWORK_TRANSMIT_DATA *TxData;
+ } Packet;
+} EFI_MANAGED_NETWORK_COMPLETION_TOKEN;
+
+/**
+ Returns the operational parameters for the current MNP child driver.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param MnpConfigData Pointer to storage for MNP operational parameters.
+ @param SnpModeData Pointer to storage for SNP operational parameters.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured. The default
+ values are returned in MnpConfigData if it is not NULL.
+ @retval Other The mode data could not be read.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_GET_MODE_DATA) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL,
+ OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL
+ )
+;
+
+/**
+ Sets or clears the operational parameters for the MNP child driver.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param MnpConfigData Pointer to configuration data that will be assigned to the MNP
+ child driver instance. If NULL, the MNP child driver instance is
+ reset to startup defaults and all pending transmit and receive
+ requests are flushed.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES Required system resources (usually memory) could not be
+ allocated.
+ @retval EFI_UNSUPPORTED The requested feature is unsupported in this [MNP]
+ implementation.
+ @retval EFI_DEVICE_ERROR An unexpected network or system error occurred.
+ @retval Other The MNP child driver instance has been reset to startup defaults.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_CONFIGURE) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL
+ )
+;
+
+/**
+ Translates an IP multicast address to a hardware (MAC) multicast address.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param Ipv6Flag Set to TRUE to if IpAddress is an IPv6 multicast address.
+ Set to FALSE if IpAddress is an IPv4 multicast address.
+ @param IpAddress Pointer to the multicast IP address (in network byte order) to convert.
+ @param MacAddress Pointer to the resulting multicast MAC address.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One of the following conditions is TRUE:
+ - This is NULL.
+ - IpAddress is NULL.
+ - *IpAddress is not a valid multicast IP address.
+ - MacAddress is NULL.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation.
+ @retval EFI_DEVICE_ERROR An unexpected network or system error occurred.
+ @retval Other The address could not be converted.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN BOOLEAN Ipv6Flag,
+ IN EFI_IP_ADDRESS *IpAddress,
+ OUT EFI_MAC_ADDRESS *MacAddress
+ )
+;
+
+/**
+ Enables and disables receive filters for multicast address.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param JoinFlag Set to TRUE to join this multicast group.
+ Set to FALSE to leave this multicast group.
+ @param MacAddress Pointer to the multicast MAC group (address) to join or leave.
+
+ @retval EFI_SUCCESS The requested operation completed successfully.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - JoinFlag is TRUE and MacAddress is NULL.
+ - *MacAddress is not a valid multicast MAC address.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_ALREADY_STARTED The supplied multicast group is already joined.
+ @retval EFI_NOT_FOUND The supplied multicast group is not joined.
+ @retval EFI_DEVICE_ERROR An unexpected network or system error occurred.
+ @retval EFI_UNSUPPORTED The requested feature is unsupported in this MNP implementation.
+ @retval Other The requested operation could not be completed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_GROUPS) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN BOOLEAN JoinFlag,
+ IN EFI_MAC_ADDRESS *MacAddress OPTIONAL
+ )
+;
+
+/**
+ Places asynchronous outgoing data packets into the transmit queue.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param Token Pointer to a token associated with the transmit data descriptor.
+
+ @retval EFI_SUCCESS The transmit completion token was cached.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_ACCESS_DENIED The transmit completion token is already in the transmit queue.
+ @retval EFI_OUT_OF_RESOURCES The transmit data could not be queued due to a lack of system resources
+ (usually memory).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_NOT_READY The transmit request could not be queued because the transmit queue is full.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_TRANSMIT) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token
+ )
+;
+
+/**
+ Places an asynchronous receiving request into the receiving queue.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param Token Pointer to a token associated with the receive data descriptor.
+
+ @retval EFI_SUCCESS The receive completion token was cached.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - Token is NULL.
+ - Token.Event is NULL
+ @retval EFI_OUT_OF_RESOURCES The transmit data could not be queued due to a lack of system resources
+ (usually memory).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_ACCESS_DENIED The receive completion token was already in the receive queue.
+ @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_RECEIVE) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token
+ )
+;
+
+
+/**
+ Aborts an asynchronous transmit or receive request.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+ @param Token Pointer to a token that has been issued by
+ EFI_MANAGED_NETWORK_PROTOCOL.Transmit() or
+ EFI_MANAGED_NETWORK_PROTOCOL.Receive(). If
+ NULL, all pending tokens are aborted.
+
+ @retval EFI_SUCCESS The asynchronous I/O request was aborted and Token.Event
+ was signaled. When Token is NULL, all pending requests were
+ aborted and their events were signaled.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was
+ not found in the transmit or receive queue. It has either completed
+ or was not issued by Transmit() and Receive().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_CANCEL) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This,
+ IN EFI_MANAGED_NETWORK_COMPLETION_TOKEN *Token OPTIONAL
+ )
+;
+
+/**
+ Polls for incoming data packets and processes outgoing data packets.
+
+ @param This Pointer to the EFI_MANAGED_NETWORK_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_NOT_STARTED This MNP child driver instance has not been configured.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_NOT_READY No incoming or outgoing data was processed. Consider increasing
+ the polling rate.
+ @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue.
+ Consider increasing the polling rate.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MANAGED_NETWORK_POLL) (
+ IN EFI_MANAGED_NETWORK_PROTOCOL *This
+ )
+;
+
+struct _EFI_MANAGED_NETWORK_PROTOCOL {
+ EFI_MANAGED_NETWORK_GET_MODE_DATA GetModeData;
+ EFI_MANAGED_NETWORK_CONFIGURE Configure;
+ EFI_MANAGED_NETWORK_MCAST_IP_TO_MAC McastIpToMac;
+ EFI_MANAGED_NETWORK_GROUPS Groups;
+ EFI_MANAGED_NETWORK_TRANSMIT Transmit;
+ EFI_MANAGED_NETWORK_RECEIVE Receive;
+ EFI_MANAGED_NETWORK_CANCEL Cancel;
+ EFI_MANAGED_NETWORK_POLL Poll;
+};
+
+extern EFI_GUID gEfiManagedNetworkServiceBindingProtocolGuid;
+extern EFI_GUID gEfiManagedNetworkProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Mtftp4.h b/MdePkg/Include/Protocol/Mtftp4.h new file mode 100644 index 0000000000..840e04b4f3 --- /dev/null +++ b/MdePkg/Include/Protocol/Mtftp4.h @@ -0,0 +1,508 @@ +/** @file
+ EFI Multicast Trivial File Tranfer Protocol Definition
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Mtftp4.h
+
+**/
+
+#ifndef __EFI_MTFTP4_PROTOCOL_H__
+#define __EFI_MTFTP4_PROTOCOL_H__
+
+#define EFI_MTFTP4_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0x2FE800BE, 0x8F01, 0x4aa6, {0x94, 0x6B, 0xD7, 0x13, 0x88, 0xE1, 0x83, 0x3F } \
+ }
+
+#define EFI_MTFTP4_PROTOCOL_GUID \
+ { \
+ 0x3ad9df29, 0x4501, 0x478d, {0xb1, 0xf8, 0x7f, 0x7f, 0xe7, 0x0e, 0x50, 0xf3 } \
+ }
+
+typedef struct _EFI_MTFTP4_PROTOCOL EFI_MTFTP4_PROTOCOL;
+typedef struct _EFI_MTFTP4_TOKEN EFI_MTFTP4_TOKEN;
+
+//
+//MTFTP4 packet opcode definition
+//
+#define EFI_MTFTP4_OPCODE_RRQ 1
+#define EFI_MTFTP4_OPCODE_WRQ 2
+#define EFI_MTFTP4_OPCODE_DATA 3
+#define EFI_MTFTP4_OPCODE_ACK 4
+#define EFI_MTFTP4_OPCODE_ERROR 5
+#define EFI_MTFTP4_OPCODE_OACK 6
+#define EFI_MTFTP4_OPCODE_DIR 7
+#define EFI_MTFTP4_OPCODE_DATA8 8
+#define EFI_MTFTP4_OPCODE_ACK8 9
+
+//
+// MTFTP4 error code definition
+//
+#define EFI_MTFTP4_ERRORCODE_NOT_DEFINED 0
+#define EFI_MTFTP4_ERRORCODE_FILE_NOT_FOUND 1
+#define EFI_MTFTP4_ERRORCODE_ACCESS_VIOLATION 2
+#define EFI_MTFTP4_ERRORCODE_DISK_FULL 3
+#define EFI_MTFTP4_ERRORCODE_ILLEGAL_OPERATION 4
+#define EFI_MTFTP4_ERRORCODE_UNKNOWN_TRANSFER_ID 5
+#define EFI_MTFTP4_ERRORCODE_FILE_ALREADY_EXISTS 6
+#define EFI_MTFTP4_ERRORCODE_NO_SUCH_USER 7
+#define EFI_MTFTP4_ERRORCODE_REQUEST_DENIED 8
+
+//
+// MTFTP4 pacekt definitions
+//
+#pragma pack(1)
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Filename[1];
+} EFI_MTFTP4_REQ_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT8 Data[1];
+} EFI_MTFTP4_OACK_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT16 Block;
+ UINT8 Data[1];
+} EFI_MTFTP4_DATA_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT16 Block[1];
+} EFI_MTFTP4_ACK_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT64 Block;
+ UINT8 Data[1];
+} EFI_MTFTP4_DATA8_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT64 Block[1];
+} EFI_MTFTP4_ACK8_HEADER;
+
+typedef struct {
+ UINT16 OpCode;
+ UINT16 ErrorCode;
+ UINT8 ErrorMessage[1];
+} EFI_MTFTP4_ERROR_HEADER;
+
+typedef union {
+ UINT16 OpCode;
+ EFI_MTFTP4_REQ_HEADER Rrq;
+ EFI_MTFTP4_REQ_HEADER Wrq;
+ EFI_MTFTP4_OACK_HEADER Oack;
+ EFI_MTFTP4_DATA_HEADER Data;
+ EFI_MTFTP4_ACK_HEADER Ack;
+ EFI_MTFTP4_DATA8_HEADER Data8;
+ EFI_MTFTP4_ACK8_HEADER Ack8;
+ EFI_MTFTP4_ERROR_HEADER Error;
+} EFI_MTFTP4_PACKET;
+
+#pragma pack()
+
+//
+// MTFTP4 option definition
+//
+typedef struct {
+ UINT8 *OptionStr;
+ UINT8 *ValueStr;
+} EFI_MTFTP4_OPTION;
+
+
+typedef struct {
+ BOOLEAN UseDefaultSetting;
+ EFI_IPv4_ADDRESS StationIp;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS GatewayIp;
+ EFI_IPv4_ADDRESS ServerIp;
+ UINT16 InitialServerPort;
+ UINT16 TryCount;
+ UINT16 TimeoutValue;
+} EFI_MTFTP4_CONFIG_DATA;
+
+
+typedef struct {
+ EFI_MTFTP4_CONFIG_DATA ConfigData;
+ UINT8 SupportedOptionCount;
+ UINT8 **SupportedOptoins;
+ UINT8 UnsupportedOptionCount;
+ UINT8 **UnsupportedOptoins;
+} EFI_MTFTP4_MODE_DATA;
+
+
+typedef struct {
+ EFI_IPv4_ADDRESS GatewayIp;
+ EFI_IPv4_ADDRESS ServerIp;
+ UINT16 ServerPort;
+ UINT16 TryCount;
+ UINT16 TimeoutValue;
+} EFI_MTFTP4_OVERRIDE_DATA;
+
+//
+// Protocol interfaces definition
+//
+
+/**
+ a callback function that is provided by the caller to intercept
+ the EFI_MTFTP4_OPCODE_DATA or EFI_MTFTP4_OPCODE_DATA8 packets processed in the
+ EFI_MTFTP4_PROTOCOL.ReadFile() function, and alternatively to intercept
+ EFI_MTFTP4_OPCODE_OACK or EFI_MTFTP4_OPCODE_ERROR packets during a call to
+ EFI_MTFTP4_PROTOCOL.ReadFile(), WriteFile() or ReadDirectory().
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token The token that the caller provided in the
+ EFI_MTFTP4_PROTOCOL.ReadFile(), WriteFile()
+ or ReadDirectory() function.
+ @param PacketLen Indicates the length of the packet.
+ @param Packet Pointer to an MTFTPv4 packet.
+
+ @retval EFI_SUCCESS Operation sucess
+ @retval Others Abort transfer process
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_CHECK_PACKET)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token,
+ IN UINT16 PacketLen,
+ IN EFI_MTFTP4_PACKET *Paket
+ )
+;
+
+/**
+ Timeout callback funtion.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token The token that is provided in the
+ EFI_MTFTP4_PROTOCOL.ReadFile() or
+ EFI_MTFTP4_PROTOCOL.WriteFile() or
+ EFI_MTFTP4_PROTOCOL.ReadDirectory() functions
+ by the caller.
+
+ @retval EFI_SUCCESS Operation sucess
+ @retval Others Aborts download process.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_TIMEOUT_CALLBACK)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token
+ )
+;
+
+/**
+ a callback function that the caller provides to feed data to the
+ EFI_MTFTP4_PROTOCOL.WriteFile() function.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token The token provided in the
+ EFI_MTFTP4_PROTOCOL.WriteFile() by the caller.
+ @param Length Indicates the length of the raw data wanted on input, and the
+ length the data available on output.
+ @param Buffer Pointer to the buffer where the data is stored.
+
+ @retval EFI_SUCCESS Operation sucess
+ @retval Others Aborts session.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_PACKET_NEEDED)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token,
+ IN OUT UINT16 *Length,
+ OUT VOID **Buffer
+ )
+;
+
+
+/**
+ Submits an asynchronous interrupt transfer to an interrupt endpoint of a USB device.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param ModeData Pointer to storage for the EFI MTFTPv4 Protocol driver mode data.
+
+ @retval EFI_SUCCESS The configuration data was successfully returned.
+ @retval EFI_OUT_OF_RESOURCES The required mode data could not be allocated.
+ @retval EFI_INVALID_PARAMETER This is NULL or ModeData is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_GET_MODE_DATA)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ OUT EFI_MTFTP4_MODE_DATA *ModeData
+ )
+;
+
+
+/**
+ Initializes, changes, or resets the default operational setting for this
+ EFI MTFTPv4 Protocol driver instance.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param MtftpConfigData Pointer to the configuration data structure.
+
+ @retval EFI_SUCCESS The EFI MTFTPv4 Protocol driver was configured successfully.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_ACCESS_DENIED The EFI configuration could not be changed at this time because
+ there is one MTFTP background operation in progress.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) has not finished yet.
+ @retval EFI_UNSUPPORTED A configuration protocol (DHCP, BOOTP, RARP, etc.) could not
+ be located when clients choose to use the default address
+ settings.
+ @retval EFI_OUT_OF_RESOURCES The EFI MTFTPv4 Protocol driver instance data could not be
+ allocated.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred. The EFI
+ MTFTPv4 Protocol driver instance is not configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_CONFIGURE)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_CONFIG_DATA *MtftpConfigData OPTIONAL
+ )
+;
+
+
+/**
+ Gets information about a file from an MTFTPv4 server.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param OverrideData Data that is used to override the existing parameters. If NULL,
+ the default parameters that were set in the
+ EFI_MTFTP4_PROTOCOL.Configure() function are used.
+ @param Filename Pointer to ASCIIZ file name string.
+ @param ModeStr Pointer to ASCIIZ mode string. If NULL, ¡°octet¡± will be used.
+ @param OptionCount Number of option/value string pairs in OptionList.
+ @param OptionList Pointer to array of option/value string pairs. Ignored if
+ OptionCount is zero.
+ @param PacketLength The number of bytes in the returned packet.
+ @param Packet The pointer to the received packet. This buffer must be freed by
+ the caller.
+
+ @retval EFI_SUCCESS An MTFTPv4 OACK packet was received and is in the Buffer.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_UNSUPPORTED One or more options in the OptionList are in the
+ unsupported list of structure EFI_MTFTP4_MODE_DATA.
+
+ @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) has not finished yet.
+ @retval EFI_ACCESS_DENIED The previous operation has not completed yet.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_TFTP_ERROR An MTFTPv4 ERROR packet was received and is in the buffer.
+ @retval EFI_ICMP_ERROR An ICMP ERROR packet was received and is in the Buffer.
+ @retval EFI_PROTOCOL_ERROR An unexpected MTFTPv4 packet was received and is in the buffer.
+ @retval EFI_TIMEOUT No responses were received from the MTFTPv4 server.
+ @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_GET_INFO)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_OVERRIDE_DATA *OverrideData OPTIONAL,
+ IN UINT8 *Filename,
+ IN UINT8 *ModeStr OPTIONAL,
+ IN UINT8 OptionCount,
+ IN EFI_MTFTP4_OPTION *OptionList,
+ OUT UINT32 *PacketLength,
+ OUT EFI_MTFTP4_PACKET **Packet OPTIONAL
+ )
+;
+
+/**
+ Parses the options in an MTFTPv4 OACK packet.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param PacketLen Length of the OACK packet to be parsed.
+ @param Packet Pointer to the OACK packet to be parsed.
+ @param OptionCount Pointer to the number of options in following OptionList.
+ @param OptionList Pointer to EFI_MTFTP4_OPTION storage. Call the EFI Boot
+ Service FreePool() to release each option if they are not
+ needed any more.
+
+ @retval EFI_SUCCESS The OACK packet was valid and the OptionCount and
+ OptionList parameters have been updated.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - PacketLen is 0.
+ - Packet is NULL or Packet is not a valid MTFTPv4 packet.
+ - OptionCount is NULL.
+ @retval EFI_NOT_FOUND No options were found in the OACK packet.
+ @retval EFI_OUT_OF_RESOURCES Storage for the OptionList array cannot be allocated.
+ @retval EFI_PROTOCOL_ERROR One or more of the option fields is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_PARSE_OPTIONS)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN UINT32 PacketLen,
+ IN EFI_MTFTP4_PACKET *Packet,
+ OUT UINT32 *OptionCount,
+ OUT EFI_MTFTP4_OPTION **OptionList OPTIONAL
+ )
+;
+
+
+/**
+ Downloads a file from an MTFTPv4 server.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token Pointer to the token structure to provide the parameters that are
+ used in this operation.
+
+ @retval EFI_SUCCESS The data file has been transferred successfully.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_BUFFER_TOO_SMALL BufferSize is not large enough to hold the downloaded data
+ in downloading process.
+ @retval EFI_ABORTED Current operation is aborted by user.
+ @retval EFI_ICMP_ERROR An ICMP ERROR packet was received.
+ @retval EFI_TIMEOUT No responses were received from the MTFTPv4 server.
+ @retval EFI_TFTP_ERROR An MTFTPv4 ERROR packet was received.
+ @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_READ_FILE)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token
+ )
+;
+
+
+
+/**
+ Sends a file to an MTFTPv4 server.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token Pointer to the token structure to provide the parameters that are
+ used in this operation.
+
+ @retval EFI_SUCCESS The upload session has started.
+ @retval EFI_UNSUPPORTED The operation is not supported by this implementation.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_UNSUPPORTED One or more options in the Token.OptionList are in
+ the unsupported list of structure EFI_MTFTP4_MODE_DATA.
+ @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_ALREADY_STARTED This Token is already being used in another MTFTPv4 session.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_ACCESS_DENIED The previous operation has not completed yet.
+ @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_WRITE_FILE)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token
+ )
+;
+
+
+/**
+ Downloads a data file ¡°directory¡± from an MTFTPv4 server. May be unsupported in some EFI
+ implementations.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+ @param Token Pointer to the token structure to provide the parameters that are
+ used in this operation.
+
+ @retval EFI_SUCCESS The MTFTPv4 related file "directory" has been downloaded.
+ @retval EFI_UNSUPPORTED The operation is not supported by this implementation.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_UNSUPPORTED One or more options in the Token.OptionList are in
+ the unsupported list of structure EFI_MTFTP4_MODE_DATA.
+ @retval EFI_NOT_STARTED The EFI MTFTPv4 Protocol driver has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_ALREADY_STARTED This Token is already being used in another MTFTPv4 session.
+ @retval EFI_OUT_OF_RESOURCES Required system resources could not be allocated.
+ @retval EFI_ACCESS_DENIED The previous operation has not completed yet.
+ @retval EFI_DEVICE_ERROR An unexpected network error or system error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_READ_DIRECTORY)(
+ IN EFI_MTFTP4_PROTOCOL *This,
+ IN EFI_MTFTP4_TOKEN *Token
+ )
+;
+
+/**
+ Polls for incoming data packets and processes outgoing data packets.
+
+ @param This Pointer to the EFI_MTFTP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_NOT_STARTED This EFI MTFTPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue.
+ Consider increasing the polling rate.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_MTFTP4_POLL) (
+ IN EFI_MTFTP4_PROTOCOL *This
+ )
+;
+
+
+struct _EFI_MTFTP4_PROTOCOL {
+ EFI_MTFTP4_GET_MODE_DATA GetModeData;
+ EFI_MTFTP4_CONFIGURE Configure;
+ EFI_MTFTP4_GET_INFO GetInfo;
+ EFI_MTFTP4_PARSE_OPTIONS ParseOptions;
+ EFI_MTFTP4_READ_FILE ReadFile;
+ EFI_MTFTP4_WRITE_FILE WriteFile;
+ EFI_MTFTP4_READ_DIRECTORY ReadDirectory;
+ EFI_MTFTP4_POLL Poll;
+};
+
+struct _EFI_MTFTP4_TOKEN {
+ OUT EFI_STATUS Status;
+ IN EFI_EVENT Event;
+ IN EFI_MTFTP4_OVERRIDE_DATA *OverrideData;
+ IN UINT8 *Filename;
+ IN UINT8 *ModeStr;
+ IN UINT32 OptionCount;
+ IN EFI_MTFTP4_OPTION *OptionList;
+ IN OUT UINT64 BufferSize;
+ IN OUT VOID *Buffer;
+ IN EFI_MTFTP4_CHECK_PACKET CheckPacket;
+ IN EFI_MTFTP4_TIMEOUT_CALLBACK TimeoutCallback;
+ IN EFI_MTFTP4_PACKET_NEEDED PacketNeeded;
+};
+
+extern EFI_GUID gEfiMtftp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiMtftp4ProtocolGuid;
+
+#endif
+
diff --git a/MdePkg/Include/Protocol/Pcd.h b/MdePkg/Include/Protocol/Pcd.h new file mode 100644 index 0000000000..880ae425b0 --- /dev/null +++ b/MdePkg/Include/Protocol/Pcd.h @@ -0,0 +1,293 @@ +/** @file
+ Platform Configuration Database (PCD) Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Pcd.h
+
+**/
+
+#ifndef __PCD_H__
+#define __PCD_H__
+
+extern EFI_GUID gPcdProtocolGuid;
+
+#define PCD_PROTOCOL_GUID \
+ { 0x11b34006, 0xd85b, 0x4d0a, { 0xa2, 0x90, 0xd5, 0xa5, 0x71, 0x31, 0xe, 0xf7 } }
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_SKU) (
+ IN UINTN SkuId
+ );
+
+typedef
+UINT8
+(EFIAPI *PCD_PROTOCOL_GET8) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT16
+(EFIAPI *PCD_PROTOCOL_GET16) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT32
+(EFIAPI *PCD_PROTOCOL_GET32) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT64
+(EFIAPI *PCD_PROTOCOL_GET64) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+VOID *
+(EFIAPI *PCD_PROTOCOL_GET_POINTER) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+BOOLEAN
+(EFIAPI *PCD_PROTOCOL_GET_BOOLEAN) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINTN
+(EFIAPI *PCD_PROTOCOL_GET_SIZE) (
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT8
+(EFIAPI *PCD_PROTOCOL_GET_EX_8) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT16
+(EFIAPI *PCD_PROTOCOL_GET_EX_16) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT32
+(EFIAPI *PCD_PROTOCOL_GET_EX_32) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINT64
+(EFIAPI *PCD_PROTOCOL_GET_EX_64) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+VOID *
+(EFIAPI *PCD_PROTOCOL_GET_EX_POINTER) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+BOOLEAN
+(EFIAPI *PCD_PROTOCOL_GET_EX_BOOLEAN) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+UINTN
+(EFIAPI *PCD_PROTOCOL_GET_EX_SIZE) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET8) (
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET16) (
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET32) (
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET64) (
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_POINTER) (
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_BOOLEAN) (
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_8) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT8 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_16) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT16 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_32) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT32 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_64) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN UINT64 Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_POINTER) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN CONST VOID *Value
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_SET_EX_BOOLEAN) (
+ IN CONST EFI_GUID *Guid,
+ IN UINTN TokenNumber,
+ IN BOOLEAN Value
+ );
+
+/**
+ Callback on SET function prototype definition.
+
+ @param[in] CallBackGuid The PCD token GUID being set.
+ @param[in] CallBackToken The PCD token number being set.
+ @param[in] TokenData A pointer to the token data being set.
+ @param[in] TokenDataSize The size, in bytes, of the data being set.
+
+ @retval VOID
+
+--*/
+typedef
+VOID
+(EFIAPI *PCD_PROTOCOL_CALLBACK) (
+ IN CONST EFI_GUID *CallBackGuid, OPTIONAL
+ IN UINTN CallBackToken,
+ IN VOID *TokenData,
+ IN UINTN TokenDataSize
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_CALLBACK_ONSET) (
+ IN UINTN TokenNumber,
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN PCD_PROTOCOL_CALLBACK CallBackFunction
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_CANCEL_CALLBACK) (
+ IN UINTN TokenNumber,
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN PCD_PROTOCOL_CALLBACK CallBackFunction
+ );
+
+typedef
+EFI_STATUS
+(EFIAPI *PCD_PROTOCOL_GET_NEXT_TOKEN) (
+ IN CONST EFI_GUID *Guid, OPTIONAL
+ IN OUT UINTN *TokenNumber
+ );
+
+typedef struct {
+ PCD_PROTOCOL_SET_SKU SetSku;
+
+ PCD_PROTOCOL_GET8 Get8;
+ PCD_PROTOCOL_GET16 Get16;
+ PCD_PROTOCOL_GET32 Get32;
+ PCD_PROTOCOL_GET64 Get64;
+ PCD_PROTOCOL_GET_POINTER GetPtr;
+ PCD_PROTOCOL_GET_BOOLEAN GetBool;
+ PCD_PROTOCOL_GET_SIZE GetSize;
+
+ PCD_PROTOCOL_GET_EX_8 Get8Ex;
+ PCD_PROTOCOL_GET_EX_16 Get16Ex;
+ PCD_PROTOCOL_GET_EX_32 Get32Ex;
+ PCD_PROTOCOL_GET_EX_64 Get64Ex;
+ PCD_PROTOCOL_GET_EX_POINTER GetPtrEx;
+ PCD_PROTOCOL_GET_EX_BOOLEAN GetBoolEx;
+ PCD_PROTOCOL_GET_EX_SIZE GetSizeEx;
+
+ PCD_PROTOCOL_SET8 Set8;
+ PCD_PROTOCOL_SET16 Set16;
+ PCD_PROTOCOL_SET32 Set32;
+ PCD_PROTOCOL_SET64 Set64;
+ PCD_PROTOCOL_SET_POINTER SetPtr;
+ PCD_PROTOCOL_SET_BOOLEAN SetBool;
+
+ PCD_PROTOCOL_SET_EX_8 Set8Ex;
+ PCD_PROTOCOL_SET_EX_16 Set16Ex;
+ PCD_PROTOCOL_SET_EX_32 Set32Ex;
+ PCD_PROTOCOL_SET_EX_64 Set64Ex;
+ PCD_PROTOCOL_SET_EX_POINTER SetPtrEx;
+ PCD_PROTOCOL_SET_EX_BOOLEAN SetBoolEx;
+
+ PCD_PROTOCOL_CALLBACK_ONSET CallbackOnSet;
+ PCD_PROTOCOL_CANCEL_CALLBACK CancelCallback;
+ PCD_PROTOCOL_GET_NEXT_TOKEN GetNextToken;
+} PCD_PROTOCOL;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h b/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h new file mode 100644 index 0000000000..9d83c5aedb --- /dev/null +++ b/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h @@ -0,0 +1,363 @@ +/** @file
+ This file declares Pci Host Bridge Resource Allocation Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciHostBridgeResourceAllocation.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_
+#define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_
+
+#define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \
+ { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}
+
+
+typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;
+
+
+//
+// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES
+//
+
+// If this bit is set, then the PCI Root Bridge does not
+// support separate windows for Non-prefetchable and Prefetchable
+// memory. A PCI bus driver needs to include requests for Prefetchable
+// memory in the Non-prefetchable memory pool.
+//
+#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1
+
+//
+// If this bit is set, then the PCI Root Bridge supports
+// 64 bit memory windows. If this bit is not set,
+// the PCI bus driver needs to include requests for 64 bit
+// memory address in the corresponding 32 bit memory pool.
+//
+#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2
+
+
+//
+// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE
+//
+typedef enum {
+ EfiPciHostBridgeBeginEnumeration,
+ EfiPciHostBridgeBeginBusAllocation,
+ EfiPciHostBridgeEndBusAllocation,
+ EfiPciHostBridgeBeginResourceAllocation,
+ EfiPciHostBridgeAllocateResources,
+ EfiPciHostBridgeSetResources,
+ EfiPciHostBridgeFreeResources,
+ EfiPciHostBridgeEndResourceAllocation
+} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;
+
+//
+// EfiPciHostBridgeBeginEnumeration
+// Reset the host bridge PCI apertures and internal data structures.
+// PCI enumerator should issue this notification before starting fresh
+// enumeration process. Enumeration cannot be restarted after sending
+// any other notification such as EfiPciHostBridgeBeginBusAllocation.
+//
+// EfiPciHostBridgeBeginBusAllocation
+// The bus allocation phase is about to begin. No specific action
+// is required here. This notification can be used to perform any
+// chipset specific programming.
+//
+// EfiPciHostBridgeEndBusAllocation
+// The bus allocation and bus programming phase is complete. No specific
+// action is required here. This notification can be used to perform any
+// chipset specific programming.
+//
+// EfiPciHostBridgeBeginResourceAllocation
+// The resource allocation phase is about to begin.No specific action is
+// required here. This notification can be used to perform any chipset specific programming.
+//
+// EfiPciHostBridgeAllocateResources
+// Allocate resources per previously submitted requests for all the PCI Root
+// Bridges. These resource settings are returned on the next call to
+// GetProposedResources().
+//
+// EfiPciHostBridgeSetResources
+// Program the Host Bridge hardware to decode previously allocated resources
+// (proposed resources) for all the PCI Root Bridges.
+//
+// EfiPciHostBridgeFreeResources
+// De-allocate previously allocated resources previously for all the PCI
+// Root Bridges and reset the I/O and memory apertures to initial state.
+//
+// EfiPciHostBridgeEndResourceAllocation
+// The resource allocation phase is completed. No specific action is required
+// here. This notification can be used to perform any chipset specific programming.
+
+
+
+//
+// EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE
+//
+typedef enum {
+ EfiPciBeforeChildBusEnumeration,
+ EfiPciBeforeResourceCollection
+} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;
+
+//
+// EfiPciBeforeChildBusEnumeration
+// This notification is only applicable to PCI-PCI bridges and
+// indicates that the PCI enumerator is about to begin enumerating
+// the bus behind the PCI-PCI Bridge. This notification is sent after
+// the primary bus number, the secondary bus number and the subordinate
+// bus number registers in the PCI-PCI Bridge are programmed to valid
+// (not necessary final) values
+//
+// EfiPciBeforeResourceCollection
+// This notification is sent before the PCI enumerator probes BAR registers
+// for every valid PCI function.
+//
+
+
+/**
+ Enter a certain phase of the PCI enumeration process
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance
+ @param Phase The phase during enumeration
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_OUT_OF_RESOURCES If SubmitResources ( ) could not allocate resources
+ @retval EFI_NOT_READY This phase cannot be entered at this time
+ @retval EFI_DEVICE_ERROR SetResources failed due to HW error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
+ );
+
+
+/**
+ Return the device handle of the next PCI root bridge that is associated with
+ this Host Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle Returns the device handle of the next PCI Root Bridge.
+ On input, it holds the RootBridgeHandle returned by the most
+ recent call to GetNextRootBridge().The handle for the first
+ PCI Root Bridge is returned if RootBridgeHandle is NULL on input
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN OUT EFI_HANDLE *RootBridgeHandle
+ );
+
+
+/**
+ Returns the attributes of a PCI Root Bridge.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The device handle of the PCI Root Bridge
+ that the caller is interested in
+ @param Attribute The pointer to attributes of the PCI Root Bridge
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Attributes is NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT UINT64 *Attributes
+ );
+
+
+/**
+ This is the request from the PCI enumerator to set up
+ the specified PCI Root Bridge for bus enumeration process.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge to be set up
+ @param Configuration Pointer to the pointer to the PCI bus resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
+ );
+
+
+/**
+ This function programs the PCI Root Bridge hardware so that
+ it decodes the specified PCI bus range
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
+ @param Configuration The pointer to the PCI bus resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Configuration is NULL
+ @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Configuration contains one or more memory or IO ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Address Range Minimum or Address Range Length fields in Configuration
+ are invalid for this Root Bridge.
+ @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptor
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
+ );
+
+
+/**
+ Submits the I/O and memory resource requirements for the specified PCI Root Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge whose I/O and memory resource requirements
+ are being submitted
+ @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_INVALID_PARAMETER Configuration is NULL
+ @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI resource descriptor
+ @retval EFI_INVALID_PARAMETER Configuration includes a resource descriptor of unsupported type
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN VOID *Configuration
+ );
+
+
+/**
+ This function returns the proposed resource settings for the specified
+ PCI Root Bridge
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge handle
+ @param Configuration The pointer to the pointer to the PCI I/O
+ and memory resource descriptor
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Request failed due to hardware error
+ @retval EFI_OUT_OF_RESOURCES Request failed due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ OUT VOID **Configuration
+ );
+
+
+
+/**
+ This function is called for all the PCI controllers that the PCI
+ bus driver finds. Can be used to Preprogram the controller.
+
+ @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
+ @param RootBridgeHandle The PCI Root Bridge handle
+ @param PciBusAddress Address of the controller on the PCI bus
+ @param Phase The Phase during resource allocation
+
+ @retval EFI_SUCCESS Success
+ @retval EFI_INVALID_PARAMETER RootBridgeHandle is invalid
+ @retval EFI_DEVICE_ERROR Device pre-initialization failed due to hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER) (
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
+ IN EFI_HANDLE RootBridgeHandle,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
+ );
+
+/**
+ @par Protocol Description:
+ Provides the basic interfaces to abstract a PCI host bridge resource allocation.
+
+ @param NotifyPhase
+ The notification from the PCI bus enumerator that it is about to enter
+ a certain phase during the enumeration process.
+
+ @param GetNextRootBridge
+ Retrieves the device handle for the next PCI root bridge that is produced by the
+ host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached.
+
+ @param GetAllocAttributes
+ Retrieves the allocation-related attributes of a PCI root bridge.
+
+ @param StartBusEnumeration
+ Sets up a PCI root bridge for bus enumeration.
+
+ @param SetBusNumbers
+ Sets up the PCI root bridge so that it decodes a specific range of bus numbers.
+
+ @param SubmitResources
+ Submits the resource requirements for the specified PCI root bridge.
+
+ @param GetProposedResources
+ Returns the proposed resource assignment for the specified PCI root bridges.
+
+ @param PreprocessController
+ Provides hooks from the PCI bus driver to every PCI controller
+ (device/function) at various stages of the PCI enumeration process that
+ allow the host bridge driver to preinitialize individual PCI controllers
+ before enumeration.
+
+**/
+struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;
+ EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;
+};
+
+extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PciHotPlugInit.h b/MdePkg/Include/Protocol/PciHotPlugInit.h new file mode 100644 index 0000000000..b4b5a3d4b9 --- /dev/null +++ b/MdePkg/Include/Protocol/PciHotPlugInit.h @@ -0,0 +1,185 @@ +/** @file
+ This file declares EFI PCI Hot Plug Init Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciHotPlugInit.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI Hot Plug Pci Initialization Protocol Spec
+ Version 0.9
+
+**/
+
+#ifndef _EFI_PCI_HOT_PLUG_INIT_H
+#define _EFI_PCI_HOT_PLUG_INIT_H
+
+//
+// Global ID for the PCI Hot Plug Protocol
+//
+#define EFI_PCI_HOT_PLUG_INIT_PROTOCOL_GUID \
+ { 0xaa0e8bc1, 0xdabc, 0x46b0, {0xa8, 0x44, 0x37, 0xb8, 0x16, 0x9b, 0x2b, 0xea } }
+
+
+typedef struct _EFI_PCI_HOT_PLUG_INIT_PROTOCOL EFI_PCI_HOT_PLUG_INIT_PROTOCOL;
+
+#define EFI_HPC_STATE_INITIALIZED 0x01
+#define EFI_HPC_STATE_ENABLED 0x02
+
+typedef UINT16 EFI_HPC_STATE;
+
+
+typedef struct{
+ EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath;
+ EFI_DEVICE_PATH_PROTOCOL *HpbDevicePath;
+} EFI_HPC_LOCATION;
+
+
+typedef enum{
+ EfiPaddingPciBus,
+ EfiPaddingPciRootBridge
+} EFI_HPC_PADDING_ATTRIBUTES;
+
+/**
+ Returns a list of root Hot Plug Controllers (HPCs) that require initialization
+ during the boot process.
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+
+ @param HpcCount The number of root HPCs that were returned.
+
+ @param HpcList The list of root HPCs. HpcCount defines the number of
+ elements in this list.
+
+ @retval EFI_SUCCESS HpcList was returned.
+
+ @retval EFI_OUT_OF_RESOURCES HpcList was not returned due to insufficient resources.
+
+ @retval EFI_INVALID_PARAMETER HpcCount is NULL or HpcList is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_ROOT_HPC_LIST) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ OUT UINTN *HpcCount,
+ OUT EFI_HPC_LOCATION **HpcList
+);
+
+/**
+ Initializes one root Hot Plug Controller (HPC). This process may causes
+ initialization of its subordinate buses.
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+
+ @param HpcDevicePath The device path to the HPC that is being initialized.
+
+ @param HpcPciAddress The address of the HPC function on the PCI bus.
+
+ @param Event The event that should be signaled when the HPC initialization
+ is complete.
+
+ @param HpcState The state of the HPC hardware.
+
+ @retval EFI_SUCCESS If Event is NULL, the specific HPC was successfully
+ initialized. If Event is not NULL, Event will be signaled at a later time
+ when initialization is complete.
+
+ @retval EFI_UNSUPPORTED This instance of EFI_PCI_HOT_PLUG_INIT_PROTOCOL
+ does not support the specified HPC.
+
+ @retval EFI_OUT_OF_RESOURCES Initialization failed due to insufficient
+ resources.
+
+ @retval EFI_INVALID_PARAMETER HpcState is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INITIALIZE_ROOT_HPC) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ IN EFI_EVENT Event, OPTIONAL
+ OUT EFI_HPC_STATE *HpcState
+);
+
+/**
+ Returns the resource padding that is required by the PCI bus that is controlled
+ by the specified Hot Plug Controller (HPC).
+
+ @param This Pointer to the EFI_PCI_HOT_PLUG_INIT_PROTOCOL instance.
+
+ @param HpcDevicePath The device path to the HPC.
+
+ @param HpcPciAddress The address of the HPC function on the PCI bus.
+
+ @param HpcState The state of the HPC hardware.
+
+ @param Padding The amount of resource padding that is required by the
+ PCI bus under the control of the specified HPC.
+
+ @param Attributes Describes how padding is accounted for. The padding
+ is returned in the form of ACPI 2.0 resource descriptors.
+
+ @retval EFI_SUCCESS The resource padding was successfully returned.
+
+ @retval EFI_UNSUPPORTED This instance of the EFI_PCI_HOT_PLUG_INIT_PROTOCOL
+ does not support the specified HPC.
+
+ @retval EFI_NOT_READY This function was called before HPC initialization is complete.
+
+ @retval EFI_INVALID_PARAMETER HpcState or Padding or Attributes is NULL.
+
+ @retval EFI_OUT_OF_RESOURCES ACPI 2.0 resource descriptors for Padding
+ cannot be allocated due to insufficient resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_PCI_HOT_PLUG_PADDING) (
+ IN EFI_PCI_HOT_PLUG_INIT_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *HpcDevicePath,
+ IN UINT64 HpcPciAddress,
+ OUT EFI_HPC_STATE *HpcState,
+ OUT VOID **Padding,
+ OUT EFI_HPC_PADDING_ATTRIBUTES *Attributes
+);
+
+
+//
+// Prototypes for the PCI Hot Plug Init Protocol
+//
+
+/**
+ @par Protocol Description:
+ This protocol provides the necessary functionality to initialize the
+ Hot Plug Controllers (HPCs) and the buses that they control. This protocol
+ also provides information regarding resource padding.
+
+ @param GetRootHpcList
+ Returns a list of root HPCs and the buses that they control.
+
+ @param InitializeRootHpc
+ Initializes the specified root HPC.
+
+ @param GetResourcePadding
+ Returns the resource padding that is required by the HPC.
+
+**/
+struct _EFI_PCI_HOT_PLUG_INIT_PROTOCOL {
+ EFI_GET_ROOT_HPC_LIST GetRootHpcList;
+ EFI_INITIALIZE_ROOT_HPC InitializeRootHpc;
+ EFI_GET_PCI_HOT_PLUG_PADDING GetResourcePadding;
+};
+
+extern EFI_GUID gEfiPciHotPlugInitProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PciIo.h b/MdePkg/Include/Protocol/PciIo.h new file mode 100644 index 0000000000..18494b3394 --- /dev/null +++ b/MdePkg/Include/Protocol/PciIo.h @@ -0,0 +1,503 @@ +/** @file
+ EFI PCI I/O Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciIo.h
+
+**/
+
+#ifndef __PCI_IO_H__
+#define __PCI_IO_H__
+
+//
+// Global ID for the PCI I/O Protocol
+//
+#define EFI_PCI_IO_PROTOCOL_GUID \
+ { \
+ 0x4cf5b200, 0x68b8, 0x4ca5, {0x9e, 0xec, 0xb2, 0x3e, 0x3f, 0x50, 0x2, 0x9a } \
+ }
+
+typedef struct _EFI_PCI_IO_PROTOCOL EFI_PCI_IO_PROTOCOL;
+
+//
+// Prototypes for the PCI I/O Protocol
+//
+typedef enum {
+ EfiPciIoWidthUint8 = 0,
+ EfiPciIoWidthUint16,
+ EfiPciIoWidthUint32,
+ EfiPciIoWidthUint64,
+ EfiPciIoWidthFifoUint8,
+ EfiPciIoWidthFifoUint16,
+ EfiPciIoWidthFifoUint32,
+ EfiPciIoWidthFifoUint64,
+ EfiPciIoWidthFillUint8,
+ EfiPciIoWidthFillUint16,
+ EfiPciIoWidthFillUint32,
+ EfiPciIoWidthFillUint64,
+ EfiPciIoWidthMaximum
+} EFI_PCI_IO_PROTOCOL_WIDTH;
+
+//
+// Complete PCI address generater
+//
+#define EFI_PCI_IO_PASS_THROUGH_BAR 0xff // Special BAR that passes a memory or I/O cycle through unchanged
+#define EFI_PCI_IO_ATTRIBUTE_MASK 0x077f // All the following I/O and Memory cycles
+#define EFI_PCI_IO_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001 // I/O cycles 0x0000-0x00FF (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_ISA_IO 0x0002 // I/O cycles 0x0100-0x03FF or greater (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO 0x0004 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY 0x0008 // MEM cycles 0xA0000-0xBFFFF (24 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_IO 0x0010 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_IDE_PRIMARY_IO 0x0020 // I/O cycles 0x1F0-0x1F7, 0x3F6, 0x3F7 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_IDE_SECONDARY_IO 0x0040 // I/O cycles 0x170-0x177, 0x376, 0x377 (10 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080 // Map a memory range so write are combined
+#define EFI_PCI_IO_ATTRIBUTE_IO 0x0100 // Enable the I/O decode bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY 0x0200 // Enable the Memory decode bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_BUS_MASTER 0x0400 // Enable the DMA bit in the PCI Config Header
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_CACHED 0x0800 // Map a memory range so all r/w accesses are cached
+#define EFI_PCI_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 // Disable a memory range
+#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE 0x2000 // Clear for an add-in PCI Device
+#define EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM 0x4000 // Clear for a physical PCI Option ROM accessed through ROM BAR
+#define EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000 // Clear for PCI controllers that can not genrate a DAC
+#define EFI_PCI_IO_ATTRIBUTE_ISA_IO_16 0x10000 // I/O cycles 0x0100-0x03FF or greater (16 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000 // I/O cycles 0x3C6, 0x3C8, 0x3C9 (16 bit decode)
+#define EFI_PCI_IO_ATTRIBUTE_VGA_IO_16 0x30000 // I/O cycles 0x3B0-0x3BB and 0x3C0-0x3DF (16 bit decode)
+
+#define EFI_PCI_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_IO | EFI_PCI_IO_ATTRIBUTE_MEMORY | EFI_PCI_IO_ATTRIBUTE_BUS_MASTER)
+#define EFI_VGA_DEVICE_ENABLE (EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO | EFI_PCI_IO_ATTRIBUTE_VGA_MEMORY | EFI_PCI_IO_ATTRIBUTE_VGA_IO | EFI_PCI_IO_ATTRIBUTE_IO)
+
+//
+// *******************************************************
+// EFI_PCI_IO_PROTOCOL_OPERATION
+// *******************************************************
+//
+typedef enum {
+ EfiPciIoOperationBusMasterRead,
+ EfiPciIoOperationBusMasterWrite,
+ EfiPciIoOperationBusMasterCommonBuffer,
+ EfiPciIoOperationMaximum
+} EFI_PCI_IO_PROTOCOL_OPERATION;
+
+//
+// *******************************************************
+// EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION
+// *******************************************************
+//
+typedef enum {
+ EfiPciIoAttributeOperationGet,
+ EfiPciIoAttributeOperationSet,
+ EfiPciIoAttributeOperationEnable,
+ EfiPciIoAttributeOperationDisable,
+ EfiPciIoAttributeOperationSupported,
+ EfiPciIoAttributeOperationMaximum
+} EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION;
+
+/**
+ Reads from the memory space of a PCI controller. Returns when either the polling exit criteria is
+ satisfied or after a defined duration.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Width Signifies the width of the memory or I/O operations.
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the
+ base address for the memory operation to perform.
+ @param Offset The offset within the selected BAR to start the memory operation.
+ @param Mask Mask used for the polling criteria.
+ @param Value The comparison value used for the polling exit criteria.
+ @param Delay The number of 100 ns units to poll.
+ @param Result Pointer to the last value read from the memory location.
+
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
+ @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
+ @retval EFI_UNSUPPORTED Offset is not valid for the BarIndex of this PCI controller.
+ @retval EFI_TIMEOUT Delay expired before a match occurred.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_POLL_IO_MEM) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINT64 Mask,
+ IN UINT64 Value,
+ IN UINT64 Delay,
+ OUT UINT64 *Result
+ );
+
+/**
+ Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Width Signifies the width of the memory or I/O operations.
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the
+ base address for the memory or I/O operation to perform.
+ @param Offset The offset within the selected BAR to start the memory or I/O operation.
+ @param Count The number of memory or I/O operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results. For write
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI controller.
+ @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
+ @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
+ valid for the PCI BAR specified by BarIndex.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_IO_MEM) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 BarIndex,
+ IN UINT64 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_PCI_IO_PROTOCOL_IO_MEM Read;
+ EFI_PCI_IO_PROTOCOL_IO_MEM Write;
+} EFI_PCI_IO_PROTOCOL_ACCESS;
+
+/**
+ Enable a PCI driver to access PCI controller registers in PCI configuration space.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Width Signifies the width of the memory operations.
+ @param Offset The offset within the PCI configuration space for the PCI controller.
+ @param Count The number of PCI configuration operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results. For write
+ operations, the source buffer to write data from.
+
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI controller.
+ @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
+ valid for the PCI configuration header of the PCI controller.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_CONFIG) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT32 Offset,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_PCI_IO_PROTOCOL_CONFIG Read;
+ EFI_PCI_IO_PROTOCOL_CONFIG Write;
+} EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS;
+
+/**
+ Enables a PCI driver to copy one region of PCI memory space to another region of PCI
+ memory space.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Width Signifies the width of the memory operations.
+ @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
+ base address for the memory operation to perform.
+ @param DestOffset The destination offset within the BAR specified by DestBarIndex to
+ start the memory writes for the copy operation.
+ @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
+ base address for the memory operation to perform.
+ @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
+ the memory reads for the copy operation.
+ @param Count The number of memory operations to perform. Bytes moved is Width
+ size * Count, starting at DestOffset and SrcOffset.
+
+ @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
+ @retval EFI_UNSUPPORTED DestBarIndex not valid for this PCI controller.
+ @retval EFI_UNSUPPORTED SrcBarIndex not valid for this PCI controller.
+ @retval EFI_UNSUPPORTED The address range specified by DestOffset, Width, and Count
+ is not valid for the PCI BAR specified by DestBarIndex.
+ @retval EFI_UNSUPPORTED The address range specified by SrcOffset, Width, and Count is
+ not valid for the PCI BAR specified by SrcBarIndex.
+ @retval EFI_INVALID_PARAMETER Width is invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_COPY_MEM) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_WIDTH Width,
+ IN UINT8 DestBarIndex,
+ IN UINT64 DestOffset,
+ IN UINT8 SrcBarIndex,
+ IN UINT64 SrcOffset,
+ IN UINTN Count
+ );
+
+/**
+ Provides the PCI controller¨Cspecific addresses needed to access system memory.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Operation Indicates if the bus master is going to read or write to system memory.
+ @param HostAddress The system memory address to map to the PCI controller.
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
+ that were mapped.
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to
+ access the hosts HostAddress.
+ @param Mapping A resulting value to pass to Unmap().
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_MAP) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
+ );
+
+/**
+ Completes the Map() operation and releases any corresponding resources.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Mapping The mapping value returned from Map().
+
+ @retval EFI_SUCCESS The range was unmapped.
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_UNMAP) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN VOID *Mapping
+ );
+
+/**
+ Allocates pages that are suitable for an EfiPciIoOperationBusMasterCommonBuffer
+ mapping.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Type This parameter is not used and must be ignored.
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or
+ EfiRuntimeServicesData.
+ @param Pages The number of pages to allocate.
+ @param HostAddress A pointer to store the base system memory address of the
+ allocated range.
+ @param Attributes The requested bit mask of attributes for the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ OUT VOID **HostAddress,
+ IN UINT64 Attributes
+ );
+
+/**
+ Frees memory that was allocated with AllocateBuffer().
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Pages The number of pages to free.
+ @param HostAddress The base system memory address of the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
+ was not allocated with AllocateBuffer().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_FREE_BUFFER) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
+ );
+
+/**
+ Flushes all PCI posted write transactions from a PCI host bridge to system memory.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
+ bridge to system memory.
+ @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
+ host bridge due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_FLUSH) (
+ IN EFI_PCI_IO_PROTOCOL *This
+ );
+
+/**
+ Retrieves this PCI controller¡¯s current PCI bus number, device number, and function number.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param SegmentNumber The PCI controller¡¯s current PCI segment number.
+ @param BusNumber The PCI controller¡¯s current PCI bus number.
+ @param DeviceNumber The PCI controller¡¯s current PCI device number.
+ @param FunctionNumber The PCI controller¡¯s current PCI function number.
+
+ @retval EFI_SUCCESS The PCI controller location was returned.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_LOCATION) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ OUT UINTN *SegmentNumber,
+ OUT UINTN *BusNumber,
+ OUT UINTN *DeviceNumber,
+ OUT UINTN *FunctionNumber
+ );
+
+/**
+ Performs an operation on the attributes that this PCI controller supports. The operations include
+ getting the set of supported attributes, retrieving the current attributes, setting the current
+ attributes, enabling attributes, and disabling attributes.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Operation The operation to perform on the attributes for this PCI controller.
+ @param Attributes The mask of attributes that are used for Set, Enable, and Disable
+ operations.
+ @param Result A pointer to the result mask of attributes that are returned for the Get
+ and Supported operations.
+
+ @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_UNSUPPORTED one or more of the bits set in
+ Attributes are not supported by this PCI controller or one of
+ its parent bridges when Operation is Set, Enable or Disable.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_ATTRIBUTES) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation,
+ IN UINT64 Attributes,
+ OUT UINT64 *Result OPTIONAL
+ );
+
+/**
+ Gets the attributes that this PCI controller supports setting on a BAR using
+ SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the
+ base address for resource range. The legal range for this field is 0..5.
+ @param Supports A pointer to the mask of attributes that this PCI controller supports
+ setting for this BAR with SetBarAttributes().
+ @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
+ configuration of this BAR of the PCI controller.
+
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
+ controller supports are returned in Supports. If Resources
+ is not NULL, then the ACPI 2.0 resource descriptors that the PCI
+ controller is currently using are returned in Resources.
+ @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
+ @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
+ Resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT8 BarIndex,
+ OUT UINT64 *Supports, OPTIONAL
+ OUT VOID **Resources OPTIONAL
+ );
+
+/**
+ Sets the attributes for a range of a BAR on a PCI controller.
+
+ @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
+ @param Attributes The mask of attributes to set for the resource range specified by
+ BarIndex, Offset, and Length.
+ @param BarIndex The BAR index of the standard PCI Configuration header to use as the
+ base address for resource range. The legal range for this field is 0..5.
+ @param Offset A pointer to the BAR relative base address of the resource range to be
+ modified by the attributes specified by Attributes.
+ @param Length A pointer to the length of the resource range to be modified by the
+ attributes specified by Attributes.
+
+ @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
+ range specified by BarIndex, Offset, and Length were
+ set on the PCI controller, and the actual resource range is returned
+ in Offset and Length.
+ @retval EFI_INVALID_PARAMETER Offset or Length is NULL.
+ @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
+ resource range specified by BarIndex, Offset, and
+ Length.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES) (
+ IN EFI_PCI_IO_PROTOCOL *This,
+ IN UINT64 Attributes,
+ IN UINT8 BarIndex,
+ IN OUT UINT64 *Offset,
+ IN OUT UINT64 *Length
+ );
+
+//
+// Interface structure for the PCI I/O Protocol
+//
+struct _EFI_PCI_IO_PROTOCOL {
+ EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollMem;
+ EFI_PCI_IO_PROTOCOL_POLL_IO_MEM PollIo;
+ EFI_PCI_IO_PROTOCOL_ACCESS Mem;
+ EFI_PCI_IO_PROTOCOL_ACCESS Io;
+ EFI_PCI_IO_PROTOCOL_CONFIG_ACCESS Pci;
+ EFI_PCI_IO_PROTOCOL_COPY_MEM CopyMem;
+ EFI_PCI_IO_PROTOCOL_MAP Map;
+ EFI_PCI_IO_PROTOCOL_UNMAP Unmap;
+ EFI_PCI_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_PCI_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
+ EFI_PCI_IO_PROTOCOL_FLUSH Flush;
+ EFI_PCI_IO_PROTOCOL_GET_LOCATION GetLocation;
+ EFI_PCI_IO_PROTOCOL_ATTRIBUTES Attributes;
+ EFI_PCI_IO_PROTOCOL_GET_BAR_ATTRIBUTES GetBarAttributes;
+ EFI_PCI_IO_PROTOCOL_SET_BAR_ATTRIBUTES SetBarAttributes;
+ UINT64 RomSize;
+ VOID *RomImage;
+};
+
+extern EFI_GUID gEfiPciIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PciPlatform.h b/MdePkg/Include/Protocol/PciPlatform.h new file mode 100644 index 0000000000..5b0add1ea7 --- /dev/null +++ b/MdePkg/Include/Protocol/PciPlatform.h @@ -0,0 +1,207 @@ +/** @file
+ This file declares PlatfromOpRom protocols.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciPlatform.h
+
+ @par Revision Reference:
+ This protocol is defined in PCI Platform Support Specification
+ Version 0.9
+
+**/
+
+#ifndef _PCI_PLATFORM_H_
+#define _PCI_PLATFORM_H_
+
+//
+// Protocol for GUID.
+//
+
+#define EFI_PCI_PLATFORM_PROTOCOL_GUID \
+{ 0x7d75280, 0x27d4, 0x4d69, {0x90, 0xd0, 0x56, 0x43, 0xe2, 0x38, 0xb3, 0x41} }
+
+typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;
+
+typedef UINT32 EFI_PCI_PLATFORM_POLICY;
+
+
+#define EFI_RESERVE_NONE_IO_ALIAS 0x0000
+#define EFI_RESERVE_ISA_IO_ALIAS 0x0001
+#define EFI_RESERVE_ISA_IO_NO_ALIAS 0x0002
+#define EFI_RESERVE_VGA_IO_ALIAS 0x0004
+#define EFI_RESERVE_VGA_IO_NO_ALIAS 0x0008
+
+
+typedef enum {
+ ChipsetEntry,
+ ChipsetExit,
+ MaximumChipsetPhase
+} EFI_PCI_CHIPSET_EXECUTION_PHASE;
+
+
+/**
+ The PlatformNotify() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Eight notification points are defined at this time. More synchronization points
+ may be added as required in the future. The PCI bus driver calls the platform driver
+ twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol
+ driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol
+ driver has been notified.
+ This member function may not perform any error checking on the input parameters. It
+ also does not return any error codes. If this member function detects any error condition,
+ it needs to handle those errors on its own because there is no way to surface any
+ errors to the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The handle of the host bridge controller.
+ @param Phase The phase of the PCI bus enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+)
+;
+
+
+/**
+ The PlatformPrepController() function can be used to notify the platform driver so that
+ it can perform platform-specific actions. No specific actions are required.
+ Several notification points are defined at this time. More synchronization points may be
+ added as required in the future. The PCI bus driver calls the platform driver twice for
+ every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver
+ is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has
+ been notified.
+ This member function may not perform any error checking on the input parameters. It also
+ does not return any error codes. If this member function detects any error condition, it
+ needs to handle those errors on its own because there is no way to surface any errors to
+ the caller.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param HostBridge The associated PCI host bridge handle.
+ @param RootBridge The associated PCI root bridge handle.
+ @param PciAddress The address of the PCI device on the PCI bus.
+ @param Phase The phase of the PCI controller enumeration.
+ @param ChipsetPhase Defines the execution phase of the PCI chipset driver.
+
+ @retval EFI_SUCCESS The function completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE HostBridge,
+ IN EFI_HANDLE RootBridge,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
+ IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,
+ IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase
+)
+;
+
+
+/**
+ The GetPlatformPolicy() function retrieves the platform policy regarding PCI
+ enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol
+ driver can call this member function to retrieve the policy.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param PciPolicy The platform policy with respect to VGA and ISA aliasing.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_INVALID_PARAMETER PciPolicy is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ OUT EFI_PCI_PLATFORM_POLICY *PciPolicy
+)
+;
+
+
+/**
+ The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.
+ The option ROM will be loaded into memory. This member function is used to return an image
+ that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option
+ ROMs. See the EFI 1.10 Specification for details. This member function can be used to return
+ option ROM images for embedded controllers. Option ROMs for embedded controllers are typically
+ stored in platform-specific storage, and this member function can retrieve it from that storage
+ and return it to the PCI bus driver. The PCI bus driver will call this member function before
+ scanning the ROM that is attached to any controller, which allows a platform to specify a ROM
+ image that is different from the ROM image on a PCI card.
+
+ @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.
+ @param PciHandle The handle of the PCI device.
+ @param RomImage If the call succeeds, the pointer to the pointer to the option ROM image.
+ Otherwise, this field is undefined. The memory for RomImage is allocated
+ by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().
+ It is the caller's responsibility to free the memory using the EFI Boot Service
+ FreePool(), when the caller is done with the option ROM.
+ @param RomSize If the call succeeds, a pointer to the size of the option ROM size. Otherwise,
+ this field is undefined.
+
+ @retval EFI_SUCCESS The option ROM was available for this device and loaded into memory.
+ @retval EFI_NOT_FOUND No option ROM was available for this device.
+ @retval EFI_OUT_OF_RESOURCES No memory was available to load the option ROM.
+ @retval EFI_DEVICE_ERROR An error occurred in getting the option ROM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM) (
+ IN EFI_PCI_PLATFORM_PROTOCOL *This,
+ IN EFI_HANDLE PciHandle,
+ OUT VOID **RomImage,
+ OUT UINTN *RomSize
+)
+;
+
+/**
+ @par Protocol Description:
+ This protocol provides the interface between the PCI bus driver/PCI Host
+ Bridge Resource Allocation driver and a platform-specific driver to describe
+ the unique features of a platform.
+
+ @param PlatformNotify
+ The notification from the PCI bus enumerator to the platform that it is
+ about to enter a certain phase during the enumeration process.
+
+ @param PlatformPrepController
+ The notification from the PCI bus enumerator to the platform for each PCI
+ controller at several predefined points during PCI controller initialization.
+
+ @param GetPlatformPolicy
+ Retrieves the platform policy regarding enumeration.
+
+ @param GetPciRom
+ Gets the PCI device¡¯s option ROM from a platform-specific location.
+
+**/
+struct _EFI_PCI_PLATFORM_PROTOCOL {
+ EFI_PCI_PLATFORM_PHASE_NOTIFY PhaseNotify;
+ EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER PlatformPrepController;
+ EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;
+ EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom;
+};
+
+extern EFI_GUID gEfiPciPlatformProtocolGuid;
+
+
+#endif
diff --git a/MdePkg/Include/Protocol/PciRootBridgeIo.h b/MdePkg/Include/Protocol/PciRootBridgeIo.h new file mode 100644 index 0000000000..06912da283 --- /dev/null +++ b/MdePkg/Include/Protocol/PciRootBridgeIo.h @@ -0,0 +1,384 @@ +/** @file
+ PCI Root Bridge I/O protocol as defined in the EFI 1.1 specification.
+
+ PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O,
+ and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform
+ defferent types of bus mastering DMA
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PciRootBridgeIo.h
+
+**/
+
+#ifndef __PCI_ROOT_BRIDGE_IO_H__
+#define __PCI_ROOT_BRIDGE_IO_H__
+
+#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \
+ { \
+ 0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL;
+
+typedef enum {
+ EfiPciWidthUint8,
+ EfiPciWidthUint16,
+ EfiPciWidthUint32,
+ EfiPciWidthUint64,
+ EfiPciWidthFifoUint8,
+ EfiPciWidthFifoUint16,
+ EfiPciWidthFifoUint32,
+ EfiPciWidthFifoUint64,
+ EfiPciWidthFillUint8,
+ EfiPciWidthFillUint16,
+ EfiPciWidthFillUint32,
+ EfiPciWidthFillUint64,
+ EfiPciWidthMaximum
+} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;
+
+typedef enum {
+ EfiPciOperationBusMasterRead,
+ EfiPciOperationBusMasterWrite,
+ EfiPciOperationBusMasterCommonBuffer,
+ EfiPciOperationBusMasterRead64,
+ EfiPciOperationBusMasterWrite64,
+ EfiPciOperationBusMasterCommonBuffer64,
+ EfiPciOperationMaximum
+} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;
+
+#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001
+#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002
+#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004
+#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008
+#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010
+#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020
+#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040
+#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080
+#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800
+#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000
+#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000
+
+#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
+
+#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)
+
+#define EFI_PCI_ADDRESS(bus, dev, func, reg) \
+ ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))
+
+typedef struct {
+ UINT8 Register;
+ UINT8 Function;
+ UINT8 Device;
+ UINT8 Bus;
+ UINT32 ExtendedRegister;
+} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;
+
+/**
+ Reads from the I/O space of a PCI Root Bridge. Returns when either the polling exit criteria is
+ satisfied or after a defined duration.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Width Signifies the width of the memory or I/O operations.
+ @param Address The base address of the memory or I/O operations.
+ @param Mask Mask used for the polling criteria.
+ @param Value The comparison value used for the polling exit criteria.
+ @param Delay The number of 100 ns units to poll.
+ @param Result Pointer to the last value read from the memory location.
+
+ @retval EFI_SUCCESS The last data returned from the access matched the poll exit criteria.
+ @retval EFI_TIMEOUT Delay expired before a match occurred.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINT64 Mask,
+ IN UINT64 Value,
+ IN UINT64 Delay,
+ OUT UINT64 *Result
+ );
+
+/**
+ Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Width Signifies the width of the memory operations.
+ @param Address The base address of the memory operations.
+ @param Count The number of memory operations to perform.
+ @param Buffer For read operations, the destination buffer to store the results. For write
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 Address,
+ IN UINTN Count,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;
+} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;
+
+/**
+ Enables a PCI driver to copy one region of PCI root bridge memory space to another region of PCI
+ root bridge memory space.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL instance.
+ @param Width Signifies the width of the memory operations.
+ @param DestAddress The destination address of the memory operation.
+ @param SrcAddress The source address of the memory operation.
+ @param Count The number of memory operations to perform.
+
+ @retval EFI_SUCCESS The data was copied from one memory region to another memory region.
+ @retval EFI_INVALID_PARAMETER Width is invalid for this PCI root bridge.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
+ IN UINT64 DestAddress,
+ IN UINT64 SrcAddress,
+ IN UINTN Count
+ );
+
+/**
+ Provides the PCI controller¨Cspecific addresses required to access system memory from a
+ DMA bus master.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Operation Indicates if the bus master is going to read or write to system memory.
+ @param HostAddress The system memory address to map to the PCI controller.
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
+ that were mapped.
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to
+ access the hosts HostAddress.
+ @param Mapping A resulting value to pass to Unmap().
+
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,
+ IN VOID *HostAddress,
+ IN OUT UINTN *NumberOfBytes,
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,
+ OUT VOID **Mapping
+ );
+
+/**
+ Completes the Map() operation and releases any corresponding resources.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Mapping The mapping value returned from Map().
+
+ @retval EFI_SUCCESS The range was unmapped.
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN VOID *Mapping
+ );
+
+/**
+ Allocates pages that are suitable for an EfiPciOperationBusMasterCommonBuffer or
+ EfiPciOperationBusMasterCommonBuffer64 mapping.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Type This parameter is not used and must be ignored.
+ @param MemoryType The type of memory to allocate, EfiBootServicesData or
+ EfiRuntimeServicesData.
+ @param Pages The number of pages to allocate.
+ @param HostAddress A pointer to store the base system memory address of the
+ allocated range.
+ @param Attributes The requested bit mask of attributes for the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were allocated.
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT VOID **HostAddress,
+ IN UINT64 Attributes
+ );
+
+/**
+ Frees memory that was allocated with AllocateBuffer().
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Pages The number of pages to free.
+ @param HostAddress The base system memory address of the allocated range.
+
+ @retval EFI_SUCCESS The requested memory pages were freed.
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages
+ was not allocated with AllocateBuffer().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN UINTN Pages,
+ IN VOID *HostAddress
+ );
+
+/**
+ Flushes all PCI posted write transactions from a PCI host bridge to system memory.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+
+ @retval EFI_SUCCESS The PCI posted write transactions were flushed from the PCI host
+ bridge to system memory.
+ @retval EFI_DEVICE_ERROR The PCI posted write transactions were not flushed from the PCI
+ host bridge due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This
+ );
+
+/**
+ Gets the attributes that a PCI root bridge supports setting with SetAttributes(), and the
+ attributes that a PCI root bridge is currently using.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Supports A pointer to the mask of attributes that this PCI root bridge supports
+ setting with SetAttributes().
+ @param Attributes A pointer to the mask of attributes that this PCI root bridge is currently
+ using.
+
+ @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI root
+ bridge supports is returned in Supports. If Attributes is
+ not NULL, then the attributes that the PCI root bridge is currently
+ using is returned in Attributes.
+ @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
+
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ OUT UINT64 *Supports,
+ OUT UINT64 *Attributes
+ );
+
+/**
+ Sets attributes for a resource range on a PCI root bridge.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Attributes The mask of attributes to set.
+ @param ResourceBase A pointer to the base address of the resource range to be modified by the
+ attributes specified by Attributes.
+ @param ResourceLength A pointer to the length of the resource range to be modified by the
+ attributes specified by Attributes.
+
+ @retval EFI_SUCCESS The set of attributes specified by Attributes for the resource
+ range specified by ResourceBase and ResourceLength
+ were set on the PCI root bridge, and the actual resource range is
+ returned in ResuourceBase and ResourceLength.
+ @retval EFI_UNSUPPORTED A bit is set in Attributes that is not supported by the PCI Root
+ Bridge.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to set the attributes on the
+ resource range specified by BaseAddress and Length.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN UINT64 Attributes,
+ IN OUT UINT64 *ResourceBase,
+ IN OUT UINT64 *ResourceLength
+ );
+
+/**
+ Retrieves the current resource settings of this PCI root bridge in the form of a set of ACPI 2.0
+ resource descriptors.
+
+ @param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
+ configuration of this PCI root bridge.
+
+ @retval EFI_SUCCESS The current configuration of this PCI root bridge was returned in
+ Resources.
+ @retval EFI_UNSUPPORTED The current configuration of this PCI root bridge could not be
+ retrieved.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION) (
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
+ IN VOID **Resources
+ );
+
+struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {
+ EFI_HANDLE ParentHandle;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;
+ UINT32 SegmentNumber;
+};
+
+extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PlatformDriverOverride.h b/MdePkg/Include/Protocol/PlatformDriverOverride.h new file mode 100644 index 0000000000..1015c50d3e --- /dev/null +++ b/MdePkg/Include/Protocol/PlatformDriverOverride.h @@ -0,0 +1,135 @@ +/** @file
+ Platform Driver Override protocol as defined in the EFI 1.1 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PlatformDriverOverride.h
+
+**/
+
+#ifndef __EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL_H__
+#define __EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL_H__
+
+//
+// Global ID for the Platform Driver Override Protocol
+//
+#define EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL_GUID \
+ { \
+ 0x6b30c738, 0xa391, 0x11d4, {0x9a, 0x3b, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL;
+
+//
+// Prototypes for the Platform Driver Override Protocol
+//
+
+/**
+ Retrieves the image handle of the platform override driver for a controller in the system.
+
+ @param This A pointer to the EFI_PLATFORM_DRIVER_OVERRIDE_
+ PROTOCOL instance.
+ @param ControllerHandle The device handle of the controller to check if a driver override
+ exists.
+ @param DriverImageHandle On input, a pointer to the previous driver image handle returned
+ by GetDriver(). On output, a pointer to the next driver
+ image handle.
+
+ @retval EFI_SUCCESS The driver override for ControllerHandle was returned in
+ DriverImageHandle.
+ @retval EFI_NOT_FOUND A driver override for ControllerHandle was not found.
+ @retval EFI_INVALID_PARAMETER The handle specified by ControllerHandle is not a valid handle.
+ @retval EFI_INVALID_PARAMETER DriverImageHandle is not a handle that was returned on a
+ previous call to GetDriver().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PLATFORM_DRIVER_OVERRIDE_GET_DRIVER) (
+ IN EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT EFI_HANDLE *DriverImageHandle
+ );
+
+/**
+ Retrieves the device path of the platform override driver for a controller in the system.
+
+ @param This A pointer to the EFI_PLATFORM_DRIVER_OVERRIDE_
+ PROTOCOL instance.
+ @param ControllerHandle The device handle of the controller to check if a driver override
+ exists.
+ @param DriverImageHandle On input, a pointer to the previous driver image handle returned
+ by GetDriverPath(). On output, a pointer to the next driver
+ device path.
+
+ @retval EFI_SUCCESS The driver override for ControllerHandle was returned in
+ DriverImageHandle.
+ @retval EFI_UNSUPPORTED The operation is not supported.
+ @retval EFI_NOT_FOUND A driver override for ControllerHandle was not found.
+ @retval EFI_INVALID_PARAMETER The handle specified by ControllerHandle is not a valid handle.
+ @retval EFI_INVALID_PARAMETER DriverImagePath is not a device path that was returned on a
+ previous call to GetDriverPath().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PLATFORM_DRIVER_OVERRIDE_GET_DRIVER_PATH) (
+ IN EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DriverImagePath
+ );
+
+/**
+ Used to associate a driver image handle with a device path that was returned on a prior call to the
+ GetDriverPath() service. This driver image handle will then be available through the
+ GetDriver() service.
+
+ @param This A pointer to the EFI_PLATFORM_DRIVER_OVERRIDE_
+ PROTOCOL instance.
+ @param ControllerHandle The device handle of the controller.
+ @param DriverImagePath A pointer to the driver device path that was returned in a prior
+ call to GetDriverPath().
+ @param DriverImageHandle The driver image handle that was returned by LoadImage()
+ when the driver specified by DriverImagePath was loaded
+ into memory.
+
+ @retval EFI_SUCCESS The association between DriverImagePath and
+ DriverImageHandle was established for the controller specified
+ by ControllerHandle.
+ @retval EFI_UNSUPPORTED The operation is not supported.
+ @retval EFI_NOT_FOUND DriverImagePath is not a device path that was returned on a prior
+ call to GetDriverPath() for the controller specified by
+ ControllerHandle.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid device handle.
+ @retval EFI_INVALID_PARAMETER DriverImagePath is not a valid device path.
+ @retval EFI_INVALID_PARAMETER DriverImageHandle is not a valid image handle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PLATFORM_DRIVER_OVERRIDE_DRIVER_LOADED) (
+ IN EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL *This,
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *DriverImagePath,
+ IN EFI_HANDLE DriverImageHandle
+ );
+
+//
+// Interface structure for the Platform Driver Override Protocol
+//
+struct _EFI_PLATFORM_DRIVER_OVERRIDE_PROTOCOL {
+ EFI_PLATFORM_DRIVER_OVERRIDE_GET_DRIVER GetDriver;
+ EFI_PLATFORM_DRIVER_OVERRIDE_GET_DRIVER_PATH GetDriverPath;
+ EFI_PLATFORM_DRIVER_OVERRIDE_DRIVER_LOADED DriverLoaded;
+};
+
+extern EFI_GUID gEfiPlatformDriverOverrideProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PxeBaseCode.h b/MdePkg/Include/Protocol/PxeBaseCode.h new file mode 100644 index 0000000000..14a6848255 --- /dev/null +++ b/MdePkg/Include/Protocol/PxeBaseCode.h @@ -0,0 +1,622 @@ +/** @file
+ EFI PXE Base Code Protocol definitions.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PxeBaseCode.h
+
+**/
+#ifndef __PXE_BASE_CODE_PROTOCOL_H__
+#define __PXE_BASE_CODE_PROTOCOL_H__
+
+//
+// PXE Base Code protocol
+//
+#define EFI_PXE_BASE_CODE_PROTOCOL_GUID \
+ { \
+ 0x03c4e603, 0xac28, 0x11d3, {0x9a, 0x2d, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_PXE_BASE_CODE_PROTOCOL EFI_PXE_BASE_CODE_PROTOCOL;
+
+//
+// Default IP TTL and ToS.
+//
+#define DEFAULT_TTL 16
+#define DEFAULT_ToS 0
+
+//
+// ICMP error format
+//
+typedef struct {
+ UINT8 Type;
+ UINT8 Code;
+ UINT16 Checksum;
+ union {
+ UINT32 reserved;
+ UINT32 Mtu;
+ UINT32 Pointer;
+ struct {
+ UINT16 Identifier;
+ UINT16 Sequence;
+ } Echo;
+ } u;
+ UINT8 Data[494];
+} EFI_PXE_BASE_CODE_ICMP_ERROR;
+
+//
+// TFTP error format
+//
+typedef struct {
+ UINT8 ErrorCode;
+ CHAR8 ErrorString[127];
+} EFI_PXE_BASE_CODE_TFTP_ERROR;
+
+//
+// IP Receive Filter definitions
+//
+#define EFI_PXE_BASE_CODE_MAX_IPCNT 8
+
+typedef struct {
+ UINT8 Filters;
+ UINT8 IpCnt;
+ UINT16 reserved;
+ EFI_IP_ADDRESS IpList[EFI_PXE_BASE_CODE_MAX_IPCNT];
+} EFI_PXE_BASE_CODE_IP_FILTER;
+
+#define EFI_PXE_BASE_CODE_IP_FILTER_STATION_IP 0x0001
+#define EFI_PXE_BASE_CODE_IP_FILTER_BROADCAST 0x0002
+#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS 0x0004
+#define EFI_PXE_BASE_CODE_IP_FILTER_PROMISCUOUS_MULTICAST 0x0008
+
+//
+// ARP Cache definitions
+//
+typedef struct {
+ EFI_IP_ADDRESS IpAddr;
+ EFI_MAC_ADDRESS MacAddr;
+} EFI_PXE_BASE_CODE_ARP_ENTRY;
+
+typedef struct {
+ EFI_IP_ADDRESS IpAddr;
+ EFI_IP_ADDRESS SubnetMask;
+ EFI_IP_ADDRESS GwAddr;
+} EFI_PXE_BASE_CODE_ROUTE_ENTRY;
+
+//
+// UDP definitions
+//
+typedef UINT16 EFI_PXE_BASE_CODE_UDP_PORT;
+
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_IP 0x0001
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_SRC_PORT 0x0002
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_IP 0x0004
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_ANY_DEST_PORT 0x0008
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_USE_FILTER 0x0010
+#define EFI_PXE_BASE_CODE_UDP_OPFLAGS_MAY_FRAGMENT 0x0020
+
+//
+// Discover() definitions
+//
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_BOOTSTRAP 0
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_MS_WINNT_RIS 1
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_INTEL_LCM 2
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_DOSUNDI 3
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_NEC_ESMPRO 4
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_IBM_WSoD 5
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_IBM_LCCM 6
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_CA_UNICENTER_TNG 7
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_HP_OPENVIEW 8
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_9 9
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_10 10
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_ALTIRIS_11 11
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_NOT_USED_12 12
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_REDHAT_INSTALL 13
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_REDHAT_BOOT 14
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_REMBO 15
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_BEOBOOT 16
+//
+// 17 through 32767 are reserved
+// 32768 through 65279 are for vendor use
+// 65280 through 65534 are reserved
+//
+#define EFI_PXE_BASE_CODE_BOOT_TYPE_PXETEST 65535
+
+#define EFI_PXE_BASE_CODE_BOOT_LAYER_MASK 0x7FFF
+#define EFI_PXE_BASE_CODE_BOOT_LAYER_INITIAL 0x0000
+
+//
+// Discover() server list structure.
+//
+typedef struct {
+ UINT16 Type;
+ BOOLEAN AcceptAnyResponse;
+ UINT8 Reserved;
+ EFI_IP_ADDRESS IpAddr;
+} EFI_PXE_BASE_CODE_SRVLIST;
+
+//
+// Discover() information override structure.
+//
+typedef struct {
+ BOOLEAN UseMCast;
+ BOOLEAN UseBCast;
+ BOOLEAN UseUCast;
+ BOOLEAN MustUseList;
+ EFI_IP_ADDRESS ServerMCastIp;
+ UINT16 IpCnt;
+ EFI_PXE_BASE_CODE_SRVLIST SrvList[1];
+} EFI_PXE_BASE_CODE_DISCOVER_INFO;
+
+//
+// Mtftp() definitions
+//
+typedef enum {
+ EFI_PXE_BASE_CODE_TFTP_FIRST,
+ EFI_PXE_BASE_CODE_TFTP_GET_FILE_SIZE,
+ EFI_PXE_BASE_CODE_TFTP_READ_FILE,
+ EFI_PXE_BASE_CODE_TFTP_WRITE_FILE,
+ EFI_PXE_BASE_CODE_TFTP_READ_DIRECTORY,
+ EFI_PXE_BASE_CODE_MTFTP_GET_FILE_SIZE,
+ EFI_PXE_BASE_CODE_MTFTP_READ_FILE,
+ EFI_PXE_BASE_CODE_MTFTP_READ_DIRECTORY,
+ EFI_PXE_BASE_CODE_MTFTP_LAST
+} EFI_PXE_BASE_CODE_TFTP_OPCODE;
+
+typedef struct {
+ EFI_IP_ADDRESS MCastIp;
+ EFI_PXE_BASE_CODE_UDP_PORT CPort;
+ EFI_PXE_BASE_CODE_UDP_PORT SPort;
+ UINT16 ListenTimeout;
+ UINT16 TransmitTimeout;
+} EFI_PXE_BASE_CODE_MTFTP_INFO;
+
+//
+// PXE Base Code Mode structure
+//
+#define EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES 8
+#define EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES 8
+
+typedef struct {
+ BOOLEAN Started;
+ BOOLEAN Ipv6Available;
+ BOOLEAN Ipv6Supported;
+ BOOLEAN UsingIpv6;
+ BOOLEAN BisSupported;
+ BOOLEAN BisDetected;
+ BOOLEAN AutoArp;
+ BOOLEAN SendGUID;
+ BOOLEAN DhcpDiscoverValid;
+ BOOLEAN DhcpAckReceived;
+ BOOLEAN ProxyOfferReceived;
+ BOOLEAN PxeDiscoverValid;
+ BOOLEAN PxeReplyReceived;
+ BOOLEAN PxeBisReplyReceived;
+ BOOLEAN IcmpErrorReceived;
+ BOOLEAN TftpErrorReceived;
+ BOOLEAN MakeCallbacks;
+ UINT8 TTL;
+ UINT8 ToS;
+ EFI_IP_ADDRESS StationIp;
+ EFI_IP_ADDRESS SubnetMask;
+ EFI_PXE_BASE_CODE_PACKET DhcpDiscover;
+ EFI_PXE_BASE_CODE_PACKET DhcpAck;
+ EFI_PXE_BASE_CODE_PACKET ProxyOffer;
+ EFI_PXE_BASE_CODE_PACKET PxeDiscover;
+ EFI_PXE_BASE_CODE_PACKET PxeReply;
+ EFI_PXE_BASE_CODE_PACKET PxeBisReply;
+ EFI_PXE_BASE_CODE_IP_FILTER IpFilter;
+ UINT32 ArpCacheEntries;
+ EFI_PXE_BASE_CODE_ARP_ENTRY ArpCache[EFI_PXE_BASE_CODE_MAX_ARP_ENTRIES];
+ UINT32 RouteTableEntries;
+ EFI_PXE_BASE_CODE_ROUTE_ENTRY RouteTable[EFI_PXE_BASE_CODE_MAX_ROUTE_ENTRIES];
+ EFI_PXE_BASE_CODE_ICMP_ERROR IcmpError;
+ EFI_PXE_BASE_CODE_TFTP_ERROR TftpError;
+} EFI_PXE_BASE_CODE_MODE;
+
+//
+// PXE Base Code Interface Function definitions
+//
+
+/**
+ Enables the use of the PXE Base Code Protocol functions.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param UseIpv6 Specifies the type of IP addresses that are to be used during the session
+ that is being started. Set to TRUE for IPv6 addresses, and FALSE for
+ IPv4 addresses.
+
+ @retval EFI_SUCCESS The PXE Base Code Protocol was started.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this oper
+ @retval EFI_UNSUPPORTED UseIpv6 is TRUE, but the Ipv6Supported field of the
+ EFI_PXE_BASE_CODE_MODE structure is FALSE.
+ @retval EFI_ALREADY_STARTED The PXE Base Code Protocol is already in the started state.
+ @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid
+ EFI_PXE_BASE_CODE_PROTOCOL structure.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory or other resources to start the
+ PXE Base Code Protocol.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_START) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN BOOLEAN UseIpv6
+ );
+
+/**
+ Disables the use of the PXE Base Code Protocol functions.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The PXE Base Code Protocol was stopped.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is already in the stopped state.
+ @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid
+ EFI_PXE_BASE_CODE_PROTOCOL structure.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_STOP) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This
+ );
+
+/**
+ Attempts to complete a DHCPv4 D.O.R.A. (discover / offer / request / acknowledge) or DHCPv6
+ S.A.R.R (solicit / advertise / request / reply) sequence.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param SortOffers TRUE if the offers received should be sorted. Set to FALSE to try the
+ offers in the order that they are received.
+
+ @retval EFI_SUCCESS Valid DHCP has completed.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER The This parameter is NULL or does not point to a valid
+ EFI_PXE_BASE_CODE_PROTOCOL structure.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory to complete the DHCP Protocol.
+ @retval EFI_ABORTED The callback function aborted the DHCP Protocol.
+ @retval EFI_TIMEOUT The DHCP Protocol timed out.
+ @retval EFI_ICMP_ERROR An ICMP error packet was received during the DHCP session.
+ @retval EFI_NO_RESPONSE Valid PXE offer was not received.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_DHCP) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN BOOLEAN SortOffers
+ );
+
+/**
+ Attempts to complete the PXE Boot Server and/or boot image discovery sequence.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param Type The type of bootstrap to perform.
+ @param Layer Pointer to the boot server layer number to discover, which must be
+ PXE_BOOT_LAYER_INITIAL when a new server type is being
+ discovered.
+ @param UseBis TRUE if Boot Integrity Services are to be used. FALSE otherwise.
+ @param Info Pointer to a data structure that contains additional information on the
+ type of discovery operation that is to be performed.
+
+ @retval EFI_SUCCESS The Discovery sequence has been completed.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough memory to complete Discovery.
+ @retval EFI_ABORTED The callback function aborted the Discovery sequence.
+ @retval EFI_TIMEOUT The Discovery sequence timed out.
+ @retval EFI_ICMP_ERROR An ICMP error packet was received during the PXE discovery
+ session.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_DISCOVER) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN UINT16 Type,
+ IN UINT16 *Layer,
+ IN BOOLEAN UseBis,
+ IN EFI_PXE_BASE_CODE_DISCOVER_INFO *Info OPTIONAL
+ );
+
+/**
+ Used to perform TFTP and MTFTP services.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param Operation The type of operation to perform.
+ @param BufferPtr A pointer to the data buffer.
+ @param Overwrite Only used on write file operations. TRUE if a file on a remote server can
+ be overwritten.
+ @param BufferSize For get-file-size operations, *BufferSize returns the size of the
+ requested file.
+ @param BlockSize The requested block size to be used during a TFTP transfer.
+ @param ServerIp The TFTP / MTFTP server IP address.
+ @param Filename A Null-terminated ASCII string that specifies a directory name or a file
+ name.
+ @param Info Pointer to the MTFTP information.
+ @param DontUseBuffer Set to FALSE for normal TFTP and MTFTP read file operation.
+
+ @retval EFI_SUCCESS The TFTP/MTFTP operation was completed.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+ @retval EFI_BUFFER_TOO_SMALL The buffer is not large enough to complete the read operation.
+ @retval EFI_ABORTED The callback function aborted the TFTP/MTFTP operation.
+ @retval EFI_TIMEOUT The TFTP/MTFTP operation timed out.
+ @retval EFI_ICMP_ERROR An ICMP error packet was received during the MTFTP session.
+ @retval EFI_TFTP_ERROR A TFTP error packet was received during the MTFTP session.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_MTFTP) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN EFI_PXE_BASE_CODE_TFTP_OPCODE Operation,
+ IN OUT VOID *BufferPtr OPTIONAL,
+ IN BOOLEAN Overwrite,
+ IN OUT UINT64 *BufferSize,
+ IN UINTN *BlockSize OPTIONAL,
+ IN EFI_IP_ADDRESS *ServerIp,
+ IN UINT8 *Filename OPTIONAL,
+ IN EFI_PXE_BASE_CODE_MTFTP_INFO *Info OPTIONAL,
+ IN BOOLEAN DontUseBuffer
+ );
+
+/**
+ Writes a UDP packet to the network interface.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param OpFlags The UDP operation flags.
+ @param DestIp The destination IP address.
+ @param DestPort The destination UDP port number.
+ @param GatewayIp The gateway IP address.
+ @param SrcIp The source IP address.
+ @param SrcPort The source UDP port number.
+ @param HeaderSize An optional field which may be set to the length of a header at
+ HeaderPtr to be prefixed to the data at BufferPtr.
+ @param HeaderPtr If HeaderSize is not NULL, a pointer to a header to be prefixed to the
+ data at BufferPtr.
+ @param BufferSize A pointer to the size of the data at BufferPtr.
+ @param BufferPtr A pointer to the data to be written.
+
+ @retval EFI_SUCCESS The UDP Write operation was completed.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_BAD_BUFFER_SIZE The buffer is too long to be transmitted.
+ @retval EFI_ABORTED The callback function aborted the UDP Write operation.
+ @retval EFI_TIMEOUT The UDP Write operation timed out.
+ @retval EFI_ICMP_ERROR An ICMP error packet was received during the UDP write session.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_UDP_WRITE) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN UINT16 OpFlags,
+ IN EFI_IP_ADDRESS *DestIp,
+ IN EFI_PXE_BASE_CODE_UDP_PORT *DestPort,
+ IN EFI_IP_ADDRESS *GatewayIp, OPTIONAL
+ IN EFI_IP_ADDRESS *SrcIp, OPTIONAL
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL
+ IN UINTN *HeaderSize, OPTIONAL
+ IN VOID *HeaderPtr, OPTIONAL
+ IN UINTN *BufferSize,
+ IN VOID *BufferPtr
+ );
+
+/**
+ Reads a UDP packet from the network interface.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param OpFlags The UDP operation flags.
+ @param DestIp The destination IP address.
+ @param DestPort The destination UDP port number.
+ @param GatewayIp The gateway IP address.
+ @param SrcIp The source IP address.
+ @param SrcPort The source UDP port number.
+ @param HeaderSize An optional field which may be set to the length of a header at
+ HeaderPtr to be prefixed to the data at BufferPtr.
+ @param HeaderPtr If HeaderSize is not NULL, a pointer to a header to be prefixed to the
+ data at BufferPtr.
+ @param BufferSize A pointer to the size of the data at BufferPtr.
+ @param BufferPtr A pointer to the data to be read.
+
+ @retval EFI_SUCCESS The UDP Write operation was completed.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+ @retval EFI_BUFFER_TOO_SMALL The packet is larger than Buffer can hold.
+ @retval EFI_ABORTED The callback function aborted the UDP Read operation.
+ @retval EFI_TIMEOUT The UDP Read operation timed out.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_UDP_READ) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN UINT16 OpFlags,
+ IN OUT EFI_IP_ADDRESS *DestIp, OPTIONAL
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *DestPort, OPTIONAL
+ IN OUT EFI_IP_ADDRESS *SrcIp, OPTIONAL
+ IN OUT EFI_PXE_BASE_CODE_UDP_PORT *SrcPort, OPTIONAL
+ IN UINTN *HeaderSize, OPTIONAL
+ IN VOID *HeaderPtr, OPTIONAL
+ IN OUT UINTN *BufferSize,
+ IN VOID *BufferPtr
+ );
+
+/**
+ Updates the IP receive filters of a network device and enables software filtering.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param NewFilter Pointer to the new set of IP receive filters.
+
+ @retval EFI_SUCCESS The IP receive filter settings were updated.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_SET_IP_FILTER) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN EFI_PXE_BASE_CODE_IP_FILTER *NewFilter
+ );
+
+/**
+ Uses the ARP protocol to resolve a MAC address.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param IpAddr Pointer to the IP address that is used to resolve a MAC address.
+ @param MacAddr If not NULL, a pointer to the MAC address that was resolved with the
+ ARP protocol.
+
+ @retval EFI_SUCCESS The IP or MAC address was resolved.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The network device encountered an error during this operation.
+ @retval EFI_ABORTED The callback function aborted the ARP Protocol.
+ @retval EFI_TIMEOUT The ARP Protocol encountered a timeout condition.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_ARP) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN EFI_IP_ADDRESS *IpAddr,
+ IN EFI_MAC_ADDRESS *MacAddr OPTIONAL
+ );
+
+/**
+ Updates the parameters that affect the operation of the PXE Base Code Protocol.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param NewAutoArp If not NULL, a pointer to a value that specifies whether to replace the
+ current value of AutoARP.
+ @param NewSendGUID If not NULL, a pointer to a value that specifies whether to replace the
+ current value of SendGUID.
+ @param NewTTL If not NULL, a pointer to be used in place of the current value of TTL,
+ the ¡°time to live¡± field of the IP header.
+ @param NewToS If not NULL, a pointer to be used in place of the current value of ToS,
+ the ¡°type of service¡± field of the IP header.
+ @param NewMakeCallback If not NULL, a pointer to a value that specifies whether to replace the
+ current value of the MakeCallback field of the Mode structure.
+
+ @retval EFI_SUCCESS The new parameters values were updated.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_SET_PARAMETERS) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN BOOLEAN *NewAutoArp, OPTIONAL
+ IN BOOLEAN *NewSendGUID, OPTIONAL
+ IN UINT8 *NewTTL, OPTIONAL
+ IN UINT8 *NewToS, OPTIONAL
+ IN BOOLEAN *NewMakeCallback OPTIONAL
+ );
+
+/**
+ Updates the station IP address and/or subnet mask values of a network device.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param NewStationIp Pointer to the new IP address to be used by the network device.
+ @param NewSubnetMask Pointer to the new subnet mask to be used by the network device.
+
+ @retval EFI_SUCCESS The new station IP address and/or subnet mask were updated.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_SET_STATION_IP) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ IN EFI_IP_ADDRESS *NewStationIp, OPTIONAL
+ IN EFI_IP_ADDRESS *NewSubnetMask OPTIONAL
+ );
+
+/**
+ Updates the contents of the cached DHCP and Discover packets.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_PROTOCOL instance.
+ @param NewDhcpDiscoverValid Pointer to a value that will replace the current
+ DhcpDiscoverValid field.
+ @param NewDhcpAckReceived Pointer to a value that will replace the current
+ DhcpAckReceived field.
+ @param NewProxyOfferReceived Pointer to a value that will replace the current
+ ProxyOfferReceived field.
+ @param NewPxeDiscoverValid Pointer to a value that will replace the current
+ ProxyOfferReceived field.
+ @param NewPxeReplyReceived Pointer to a value that will replace the current
+ PxeReplyReceived field.
+ @param NewPxeBisReplyReceived Pointer to a value that will replace the current
+ PxeBisReplyReceived field.
+ @param NewDhcpDiscover Pointer to the new cached DHCP Discover packet contents.
+ @param NewDhcpAck Pointer to the new cached DHCP Ack packet contents.
+ @param NewProxyOffer Pointer to the new cached Proxy Offer packet contents.
+ @param NewPxeDiscover Pointer to the new cached PXE Discover packet contents.
+ @param NewPxeReply Pointer to the new cached PXE Reply packet contents.
+ @param NewPxeBisReply Pointer to the new cached PXE BIS Reply packet contents.
+
+ @retval EFI_SUCCESS The cached packet contents were updated.
+ @retval EFI_NOT_STARTED The PXE Base Code Protocol is in the stopped state.
+ @retval EFI_INVALID_PARAMETER This is NULL or not point to a valid EFI_PXE_BASE_CODE_PROTOCOL structure.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PXE_BASE_CODE_SET_PACKETS) (
+ IN EFI_PXE_BASE_CODE_PROTOCOL *This,
+ BOOLEAN *NewDhcpDiscoverValid, OPTIONAL
+ BOOLEAN *NewDhcpAckReceived, OPTIONAL
+ BOOLEAN *NewProxyOfferReceived, OPTIONAL
+ BOOLEAN *NewPxeDiscoverValid, OPTIONAL
+ BOOLEAN *NewPxeReplyReceived, OPTIONAL
+ BOOLEAN *NewPxeBisReplyReceived, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewDhcpDiscover, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewDhcpAck, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewProxyOffer, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewPxeDiscover, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewPxeReply, OPTIONAL
+ IN EFI_PXE_BASE_CODE_PACKET *NewPxeBisReply OPTIONAL
+ );
+
+//
+// PXE Base Code Protocol structure
+//
+#define EFI_PXE_BASE_CODE_INTERFACE_REVISION 0x00010000
+#define EFI_PXE_BASE_CODE_PROTOCOL_REVISION EFI_PXE_BASE_CODE_INTERFACE_REVISION
+
+struct _EFI_PXE_BASE_CODE_PROTOCOL {
+ UINT64 Revision;
+ EFI_PXE_BASE_CODE_START Start;
+ EFI_PXE_BASE_CODE_STOP Stop;
+ EFI_PXE_BASE_CODE_DHCP Dhcp;
+ EFI_PXE_BASE_CODE_DISCOVER Discover;
+ EFI_PXE_BASE_CODE_MTFTP Mtftp;
+ EFI_PXE_BASE_CODE_UDP_WRITE UdpWrite;
+ EFI_PXE_BASE_CODE_UDP_READ UdpRead;
+ EFI_PXE_BASE_CODE_SET_IP_FILTER SetIpFilter;
+ EFI_PXE_BASE_CODE_ARP Arp;
+ EFI_PXE_BASE_CODE_SET_PARAMETERS SetParameters;
+ EFI_PXE_BASE_CODE_SET_STATION_IP SetStationIp;
+ EFI_PXE_BASE_CODE_SET_PACKETS SetPackets;
+ EFI_PXE_BASE_CODE_MODE *Mode;
+};
+
+extern EFI_GUID gEfiPxeBaseCodeProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/PxeBaseCodeCallBack.h b/MdePkg/Include/Protocol/PxeBaseCodeCallBack.h new file mode 100644 index 0000000000..7f16701367 --- /dev/null +++ b/MdePkg/Include/Protocol/PxeBaseCodeCallBack.h @@ -0,0 +1,94 @@ +/** @file
+ EFI PXE Base Code CallBack Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: PxeBaseCodeCallBack.h
+
+**/
+
+#ifndef _PXE_BASE_CODE_CALLBACK_H_
+#define _PXE_BASE_CODE_CALLBACK_H_
+
+//
+// Call Back Definitions
+//
+#define EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL_GUID \
+ { \
+ 0x245dca21, 0xfb7b, 0x11d3, {0x8f, 0x01, 0x00, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+//
+// Revision Number
+//
+#define EFI_PXE_BASE_CODE_CALLBACK_INTERFACE_REVISION 0x00010000
+#define EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL_REVISION \
+ EFI_PXE_BASE_CODE_CALLBACK_INTERFACE_REVISION
+
+//
+// Protocol definition
+//
+typedef struct _EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL;
+
+typedef enum {
+ EFI_PXE_BASE_CODE_FUNCTION_FIRST,
+ EFI_PXE_BASE_CODE_FUNCTION_DHCP,
+ EFI_PXE_BASE_CODE_FUNCTION_DISCOVER,
+ EFI_PXE_BASE_CODE_FUNCTION_MTFTP,
+ EFI_PXE_BASE_CODE_FUNCTION_UDP_WRITE,
+ EFI_PXE_BASE_CODE_FUNCTION_UDP_READ,
+ EFI_PXE_BASE_CODE_FUNCTION_ARP,
+ EFI_PXE_BASE_CODE_FUNCTION_IGMP,
+ EFI_PXE_BASE_CODE_PXE_FUNCTION_LAST
+} EFI_PXE_BASE_CODE_FUNCTION;
+
+typedef enum {
+ EFI_PXE_BASE_CODE_CALLBACK_STATUS_FIRST,
+ EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE,
+ EFI_PXE_BASE_CODE_CALLBACK_STATUS_ABORT,
+ EFI_PXE_BASE_CODE_CALLBACK_STATUS_LAST
+} EFI_PXE_BASE_CODE_CALLBACK_STATUS;
+
+/**
+ Callback function that is invoked when the PXE Base Code Protocol is about to transmit, has
+ received, or is waiting to receive a packet.
+
+ @param This Pointer to the EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL instance.
+ @param Function The PXE Base Code Protocol function that is waiting for an event.
+ @param Received TRUE if the callback is being invoked due to a receive event. FALSE if
+ the callback is being invoked due to a transmit event.
+ @param PacketLen The length, in bytes, of Packet. This field will have a value of zero if
+ this is a wait for receive event.
+ @param Packet If Received is TRUE, a pointer to the packet that was just received;
+ otherwise a pointer to the packet that is about to be transmitted.
+
+ @retval EFI_PXE_BASE_CODE_CALLBACK_STATUS_CONTINUE if Function specifies a continue operation
+ @retval EFI_PXE_BASE_CODE_CALLBACK_STATUS_ABORT if Function specifies an abort operation
+
+**/
+typedef
+EFI_PXE_BASE_CODE_CALLBACK_STATUS
+(EFIAPI *EFI_PXE_CALLBACK)(
+ IN EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL *This,
+ IN EFI_PXE_BASE_CODE_FUNCTION Function,
+ IN BOOLEAN Received,
+ IN UINT32 PacketLen,
+ IN EFI_PXE_BASE_CODE_PACKET *Packet OPTIONAL
+ );
+
+struct _EFI_PXE_BASE_CODE_CALLBACK_PROTOCOL {
+ UINT64 Revision;
+ EFI_PXE_CALLBACK Callback;
+};
+
+extern EFI_GUID gEfiPxeBaseCodeCallbackProtocolGuid;
+
+#endif
+
diff --git a/MdePkg/Include/Protocol/ScsiIo.h b/MdePkg/Include/Protocol/ScsiIo.h new file mode 100644 index 0000000000..e1019bac44 --- /dev/null +++ b/MdePkg/Include/Protocol/ScsiIo.h @@ -0,0 +1,233 @@ +/** @file
+ EFI_SCSI_IO_PROTOCOL as defined in UEFI 2.0.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScsiIo.h
+
+**/
+
+#ifndef __EFI_SCSI_IO_PROTOCOL_H__
+#define __EFI_SCSI_IO_PROTOCOL_H__
+
+#define EFI_SCSI_IO_PROTOCOL_GUID \
+ { \
+ 0x932f4736, 0x2362, 0x4002, {0x80, 0x3e, 0x3c, 0xd5, 0x4b, 0x13, 0x8f, 0x85 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_SCSI_IO_PROTOCOL EFI_SCSI_IO_PROTOCOL;
+
+//
+// SCSI Data Direction definition
+//
+#define EFI_SCSI_IO_DATA_DIRECTION_READ 0
+#define EFI_SCSI_IO_DATA_DIRECTION_WRITE 1
+#define EFI_SCSI_IO_DATA_DIRECTION_BIDIRECTIONAL 2
+
+//
+// SCSI Host Adapter Status definition
+//
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_OK 0x00
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_TIMEOUT_COMMAND 0x09 // timeout when processing the command
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_TIMEOUT 0x0b // timeout when waiting for the command processing
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_MESSAGE_REJECT 0x0d // a message reject was received when processing command
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_BUS_RESET 0x0e // a bus reset was detected
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_PARITY_ERROR 0x0f
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_REQUEST_SENSE_FAILED 0x10 // the adapter failed in issuing request sense command
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_SELECTION_TIMEOUT 0x11 // selection timeout
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN 0x12 // data overrun or data underrun
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_BUS_FREE 0x13 // Unexepected bus free
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_PHASE_ERROR 0x14 // Target bus phase sequence failure
+#define EFI_SCSI_IO_STATUS_HOST_ADAPTER_OTHER 0x7f
+
+
+//
+// SCSI Target Status definition
+//
+#define EFI_SCSI_IO_STATUS_TARGET_GOOD 0x00
+#define EFI_SCSI_IO_STATUS_TARGET_CHECK_CONDITION 0x02 // check condition
+#define EFI_SCSI_IO_STATUS_TARGET_CONDITION_MET 0x04 // condition met
+#define EFI_SCSI_IO_STATUS_TARGET_BUSY 0x08 // busy
+#define EFI_SCSI_IO_STATUS_TARGET_INTERMEDIATE 0x10 // intermediate
+#define EFI_SCSI_IO_STATUS_TARGET_INTERMEDIATE_CONDITION_MET 0x14 // intermediate-condition met
+#define EFI_SCSI_IO_STATUS_TARGET_RESERVATION_CONFLICT 0x18 // reservation conflict
+#define EFI_SCSI_IO_STATUS_TARGET_COMMOND_TERMINATED 0x22 // command terminated
+#define EFI_SCSI_IO_STATUS_TARGET_QUEUE_FULL 0x28 // queue full
+
+typedef struct {
+ UINT64 Timeout;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ VOID *SenseData;
+ VOID *Cdb;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
+ UINT8 CdbLength;
+ UINT8 DataDirection;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ UINT8 SenseDataLength;
+} EFI_SCSI_IO_SCSI_REQUEST_PACKET;
+
+/**
+ Retrieves the device type information of the SCSI Controller.
+
+ @param This Protocol instance pointer.
+ @param DeviceType A pointer to the device type information
+ retrieved from the SCSI Controller.
+
+ @retval EFI_SUCCESS Retrieves the device type information successfully.
+ @retval EFI_INVALID_PARAMETER The DeviceType is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_IO_PROTOCOL_GET_DEVICE_TYPE) (
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ OUT UINT8 *DeviceType
+ )
+;
+
+/**
+ Retrieves the device location in the SCSI channel.
+
+ @param This Protocol instance pointer.
+ @param Target A pointer to the Target ID of a SCSI device
+ on the SCSI channel.
+ @param Lun A pointer to the LUN of the SCSI device on
+ the SCSI channel.
+
+ @retval EFI_SUCCESS Retrieves the device location successfully.
+ @retval EFI_INVALID_PARAMETER The Target or Lun is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_IO_PROTOCOL_GET_DEVICE_LOCATION) (
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ OUT UINT64 *Lun
+ )
+;
+
+/**
+ Resets the SCSI Bus that the SCSI Controller is attached to.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The SCSI bus is reset successfully.
+ @retval EFI_DEVICE_ERROR Errors encountered when resetting the SCSI bus.
+ @retval EFI_UNSUPPORTED The bus reset operation is not supported by the
+ SCSI Host Controller.
+ @retval EFI_TIMEOUT A timeout occurred while attempting to reset
+ the SCSI bus.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_IO_PROTOCOL_RESET_BUS) (
+ IN EFI_SCSI_IO_PROTOCOL *This
+ )
+;
+
+/**
+ Resets the SCSI Controller that the device handle specifies.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS Reset the SCSI controller successfully.
+ @retval EFI_DEVICE_ERROR Errors are encountered when resetting the
+ SCSI Controller.
+ @retval EFI_UNSUPPORTED The SCSI bus does not support a device
+ reset operation.
+ @retval EFI_TIMEOUT A timeout occurred while attempting to
+ reset the SCSI Controller.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_IO_PROTOCOL_RESET_DEVICE) (
+ IN EFI_SCSI_IO_PROTOCOL *This
+ )
+;
+
+
+/**
+ Sends a SCSI Request Packet to the SCSI Controller for execution.
+
+ @param This Protocol instance pointer.
+ @param Packet The SCSI request packet to send to the SCSI
+ Controller specified by the device handle.
+ @param Event If the SCSI bus where the SCSI device is attached
+ does not support non-blocking I/O, then Event is
+ ignored, and blocking I/O is performed.
+ If Event is NULL, then blocking I/O is performed.
+ If Event is not NULL and non-blocking I/O is
+ supported, then non-blocking I/O is performed,
+ and Event will be signaled when the SCSI Request
+ Packet completes.
+
+ @retval EFI_SUCCESS The SCSI Request Packet was sent by the host
+ successfully, and TransferLength bytes were
+ transferred to/from DataBuffer.See
+ HostAdapterStatus, TargetStatus,
+ SenseDataLength, and SenseData in that order
+ for additional status information.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The SCSI Request Packet was executed,
+ but the entire DataBuffer could not be transferred.
+ The actual number of bytes transferred is returned
+ in TransferLength. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+ @retval EFI_NOT_READY The SCSI Request Packet could not be sent because
+ there are too many SCSI Command Packets already
+ queued.The caller may retry again later.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to send
+ the SCSI Request Packet. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+ @retval EFI_INVALID_PARAMETER The contents of CommandPacket are invalid.
+ The SCSI Request Packet was not sent, so no
+ additional status information is available.
+ @retval EFI_UNSUPPORTED The command described by the SCSI Request Packet
+ is not supported by the SCSI initiator(i.e., SCSI
+ Host Controller). The SCSI Request Packet was not
+ sent, so no additional status information is
+ available.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the SCSI
+ Request Packet to execute. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_IO_PROTOCOL_EXEC_SCSI_COMMAND) (
+ IN EFI_SCSI_IO_PROTOCOL *This,
+ IN OUT EFI_SCSI_IO_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
+ )
+;
+
+struct _EFI_SCSI_IO_PROTOCOL {
+ EFI_SCSI_IO_PROTOCOL_GET_DEVICE_TYPE GetDeviceType;
+ EFI_SCSI_IO_PROTOCOL_GET_DEVICE_LOCATION GetDeviceLocation;
+ EFI_SCSI_IO_PROTOCOL_RESET_BUS ResetBus;
+ EFI_SCSI_IO_PROTOCOL_RESET_DEVICE ResetDevice;
+ EFI_SCSI_IO_PROTOCOL_EXEC_SCSI_COMMAND ExecuteSCSICommand;
+ UINT32 IoAlign;
+};
+
+extern EFI_GUID gEfiScsiIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/ScsiPassThru.h b/MdePkg/Include/Protocol/ScsiPassThru.h new file mode 100644 index 0000000000..a5aa6c47c0 --- /dev/null +++ b/MdePkg/Include/Protocol/ScsiPassThru.h @@ -0,0 +1,312 @@ +/** @file
+ SCSI Pass Through protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScsiPassThru.h
+
+**/
+
+#ifndef __SCSI_PASS_THROUGH_H__
+#define __SCSI_PASS_THROUGH_H__
+
+#define EFI_SCSI_PASS_THRU_PROTOCOL_GUID \
+ { \
+ 0xa59e8fcf, 0xbda0, 0x43bb, {0x90, 0xb1, 0xd3, 0x73, 0x2e, 0xca, 0xa8, 0x77 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_SCSI_PASS_THRU_PROTOCOL EFI_SCSI_PASS_THRU_PROTOCOL;
+
+#define EFI_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL 0x0001
+#define EFI_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL 0x0002
+#define EFI_SCSI_PASS_THRU_ATTRIBUTES_NONBLOCKIO 0x0004
+
+//
+// SCSI Host Adapter Status definition
+//
+#define EFI_SCSI_STATUS_HOST_ADAPTER_OK 0x00
+#define EFI_SCSI_STATUS_HOST_ADAPTER_TIMEOUT_COMMAND 0x09 // timeout when processing the command
+#define EFI_SCSI_STATUS_HOST_ADAPTER_TIMEOUT 0x0b // timeout when waiting for the command processing
+#define EFI_SCSI_STATUS_HOST_ADAPTER_MESSAGE_REJECT 0x0d // a message reject was received when processing command
+#define EFI_SCSI_STATUS_HOST_ADAPTER_BUS_RESET 0x0e // a bus reset was detected
+#define EFI_SCSI_STATUS_HOST_ADAPTER_PARITY_ERROR 0x0f
+#define EFI_SCSI_STATUS_HOST_ADAPTER_REQUEST_SENSE_FAILED 0x10 // the adapter failed in issuing request sense command
+#define EFI_SCSI_STATUS_HOST_ADAPTER_SELECTION_TIMEOUT 0x11 // selection timeout
+#define EFI_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN 0x12 // data overrun or data underrun
+#define EFI_SCSI_STATUS_HOST_ADAPTER_BUS_FREE 0x13 // Unexepected bus free
+#define EFI_SCSI_STATUS_HOST_ADAPTER_PHASE_ERROR 0x14 // Target bus phase sequence failure
+#define EFI_SCSI_STATUS_HOST_ADAPTER_OTHER 0x7f
+
+//
+// SCSI Target Status definition
+//
+#define EFI_SCSI_STATUS_TARGET_GOOD 0x00
+#define EFI_SCSI_STATUS_TARGET_CHECK_CONDITION 0x02 // check condition
+#define EFI_SCSI_STATUS_TARGET_CONDITION_MET 0x04 // condition met
+#define EFI_SCSI_STATUS_TARGET_BUSY 0x08 // busy
+#define EFI_SCSI_STATUS_TARGET_INTERMEDIATE 0x10 // intermediate
+#define EFI_SCSI_STATUS_TARGET_INTERMEDIATE_CONDITION_MET 0x14 // intermediate-condition met
+#define EFI_SCSI_STATUS_TARGET_RESERVATION_CONFLICT 0x18 // reservation conflict
+#define EFI_SCSI_STATUS_TARGET_COMMOND_TERMINATED 0x22 // command terminated
+#define EFI_SCSI_STATUS_TARGET_QUEUE_FULL 0x28 // queue full
+
+typedef struct {
+ UINT64 Timeout;
+ VOID *DataBuffer;
+ VOID *SenseData;
+ VOID *Cdb;
+ UINT32 TransferLength;
+ UINT8 CdbLength;
+ UINT8 DataDirection;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ UINT8 SenseDataLength;
+} EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET;
+
+typedef struct {
+ CHAR16 *ControllerName;
+ CHAR16 *ChannelName;
+ UINT32 AdapterId;
+ UINT32 Attributes;
+ UINT32 IoAlign;
+} EFI_SCSI_PASS_THRU_MODE;
+
+/**
+ Sends a SCSI Request Packet to a SCSI device that is attached to
+ the SCSI channel. This function supports both blocking I/O and
+ non-blocking I/O. The blocking I/O functionality is required,
+ and the non-blocking I/O functionality is optional.
+
+ @param This Protocol instance pointer.
+ @param Target The Target ID of the SCSI device to
+ send the SCSI Request Packet.
+ @param Lun The LUN of the SCSI device to send the
+ SCSI Request Packet.
+ @param Packet A pointer to the SCSI Request Packet to send
+ to the SCSI device specified by Target and Lun.
+ @param Event If non-blocking I/O is not supported then Event
+ is ignored, and blocking I/O is performed.
+ If Event is NULL, then blocking I/O is performed.
+ If Event is not NULL and non blocking I/O is
+ supported, then non-blocking I/O is performed,
+ and Event will be signaled when the SCSI Request
+ Packet completes
+
+ @retval EFI_SUCCESS The SCSI Request Packet was sent by the host, and
+ TransferLength bytes were transferred to/from
+ DataBuffer.See HostAdapterStatus, TargetStatus,
+ SenseDataLength,and SenseData in that order
+ for additional status information.
+ @retval EFI_WARN_BUFFER_TOO_SMALL The SCSI Request Packet was executed, but the
+ entire DataBuffer could not be transferred.
+ The actual number of bytes transferred is returned
+ in TransferLength. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+ @retval EFI_NOT_READY The SCSI Request Packet could not be sent because
+ there are too many SCSI Request Packets already
+ queued. The caller may retry again later.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to send
+ the SCSI Request Packet. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+ @retval EFI_INVALID_PARAMETER Target, Lun, or the contents of ScsiRequestPacket
+ are invalid. The SCSI Request Packet was not sent,
+ so no additional status information is available.
+ @retval EFI_UNSUPPORTED The command described by the SCSI Request Packet
+ is not supported by the host adapter. The SCSI
+ Request Packet was not sent, so no additional
+ status information is available.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the SCSI
+ Request Packet to execute. See HostAdapterStatus,
+ TargetStatus, SenseDataLength, and SenseData in
+ that order for additional status information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_PASSTHRU) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT32 Target,
+ IN UINT64 Lun,
+ IN OUT EFI_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
+ )
+;
+
+/**
+ Used to retrieve the list of legal Target IDs for SCSI devices
+ on a SCSI channel.
+
+ @param This Protocol instance pointer.
+ @param Target On input, a pointer to the Target ID of a
+ SCSI device present on the SCSI channel.
+ On output, a pointer to the Target ID of
+ the next SCSI device present on a SCSI channel.
+ An input value of 0xFFFFFFFF retrieves the
+ Target ID of the first SCSI device present on
+ a SCSI channel.
+ @param Lun On input, a pointer to the LUN of a SCSI device
+ present on the SCSI channel.On output, a pointer
+ to the LUN of the next SCSI device present on a
+ SCSI channel.
+
+ @retval EFI_SUCCESS The Target ID of the next SCSI device on the SCSI
+ channel was returned in Target and Lun.
+ @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel.
+ @retval EFI_INVALID_PARAMETER Target is not 0xFFFFFFFF, and Target and Lun were
+ not returned on a previous call to GetNextDevice().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_GET_NEXT_DEVICE) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT32 *Target,
+ IN OUT UINT64 *Lun
+ )
+;
+
+/**
+ Used to allocate and build a device path node for a SCSI device
+ on a SCSI channel.
+
+ @param This Protocol instance pointer.
+ @param Target The Target ID of the SCSI device for which
+ a device path node is to be allocated and built.
+ @param Lun The LUN of the SCSI device for which a device
+ path node is to be allocated and built.
+ @param DevicePath A pointer to a single device path node that
+ describes the SCSI device specified by
+ Target and Lun. This function is responsible
+ for allocating the buffer DevicePath with the boot
+ service AllocatePool(). It is the caller's
+ responsibility to free DevicePath when the caller
+ is finished with DevicePath.
+
+ @retval EFI_SUCCESS The device path node that describes the SCSI device
+ specified by Target and Lun was allocated and
+ returned in DevicePath.
+ @retval EFI_NOT_FOUND The SCSI devices specified by Target and Lun does
+ not exist on the SCSI channel.
+ @retval EFI_INVALID_PARAMETER DevicePath is NULL.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate
+ DevicePath.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_BUILD_DEVICE_PATH) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT32 Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ )
+;
+
+/**
+ Used to translate a device path node to a Target ID and LUN.
+
+ @param This Protocol instance pointer.
+ @param DevicePath A pointer to the device path node that
+ describes a SCSI device on the SCSI channel.
+ @param Target A pointer to the Target ID of a SCSI device
+ on the SCSI channel.
+ @param Lun A pointer to the LUN of a SCSI device on
+ the SCSI channel.
+
+ @retval EFI_SUCCESS DevicePath was successfully translated to a
+ Target ID and LUN, and they were returned
+ in Target and Lun.
+ @retval EFI_INVALID_PARAMETER DevicePath is NULL.
+ @retval EFI_INVALID_PARAMETER Target is NULL.
+ @retval EFI_INVALID_PARAMETER Lun is NULL.
+ @retval EFI_UNSUPPORTED This driver does not support the device path
+ node type in DevicePath.
+ @retval EFI_NOT_FOUND A valid translation from DevicePath to a
+ Target ID and LUN does not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_GET_TARGET_LUN) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT32 *Target,
+ OUT UINT64 *Lun
+ )
+;
+
+/**
+ Resets a SCSI channel.This operation resets all the
+ SCSI devices connected to the SCSI channel.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The SCSI channel was reset.
+ @retval EFI_UNSUPPORTED The SCSI channel does not support
+ a channel reset operation.
+ @retval EFI_DEVICE_ERROR A device error occurred while
+ attempting to reset the SCSI channel.
+ @retval EFI_TIMEOUT A timeout occurred while attempting
+ to reset the SCSI channel.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_RESET_CHANNEL) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This
+ )
+;
+
+/**
+ Resets a SCSI device that is connected to a SCSI channel.
+
+ @param This Protocol instance pointer.
+ @param Target The Target ID of the SCSI device to reset.
+ @param Lun The LUN of the SCSI device to reset.
+
+ @retval EFI_SUCCESS The SCSI device specified by Target and
+ Lun was reset.
+ @retval EFI_UNSUPPORTED The SCSI channel does not support a target
+ reset operation.
+ @retval EFI_INVALID_PARAMETER Target or Lun are invalid.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting
+ to reset the SCSI device specified by Target
+ and Lun.
+ @retval EFI_TIMEOUT A timeout occurred while attempting to reset
+ the SCSI device specified by Target and Lun.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SCSI_PASS_THRU_RESET_TARGET) (
+ IN EFI_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT32 Target,
+ IN UINT64 Lun
+ )
+;
+
+struct _EFI_SCSI_PASS_THRU_PROTOCOL {
+ EFI_SCSI_PASS_THRU_MODE *Mode;
+ EFI_SCSI_PASS_THRU_PASSTHRU PassThru;
+ EFI_SCSI_PASS_THRU_GET_NEXT_DEVICE GetNextDevice;
+ EFI_SCSI_PASS_THRU_BUILD_DEVICE_PATH BuildDevicePath;
+ EFI_SCSI_PASS_THRU_GET_TARGET_LUN GetTargetLun;
+ EFI_SCSI_PASS_THRU_RESET_CHANNEL ResetChannel;
+ EFI_SCSI_PASS_THRU_RESET_TARGET ResetTarget;
+};
+
+extern EFI_GUID gEfiScsiPassThruProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/ScsiPassThruExt.h b/MdePkg/Include/Protocol/ScsiPassThruExt.h new file mode 100644 index 0000000000..b522792848 --- /dev/null +++ b/MdePkg/Include/Protocol/ScsiPassThruExt.h @@ -0,0 +1,332 @@ +/** @file
+ EFI_EXT_SCSI_PASS_THRU_PROTOCOL as defined in UEFI 2.0.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ScsiPassThruExt.h
+
+**/
+
+#ifndef __EXT_SCSI_PASS_THROUGH_PROTOCOL_H__
+#define __EXT_SCSI_PASS_THROUGH_PROTOCOL_H__
+
+#define EFI_EXT_SCSI_PASS_THRU_PROTOCOL_GUID \
+ { \
+ 0x1d3de7f0, 0x0807, 0x424f, {0xaa, 0x69, 0x11, 0xa5, 0x4e, 0x19, 0xa4, 0x6f } \
+ }
+
+typedef struct _EFI_EXT_SCSI_PASS_THRU_PROTOCOL EFI_EXT_SCSI_PASS_THRU_PROTOCOL;
+
+#define TARGET_MAX_BYTES 0x10
+
+#define EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_PHYSICAL 0x0001
+#define EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_LOGICAL 0x0002
+#define EFI_EXT_SCSI_PASS_THRU_ATTRIBUTES_NONBLOCKIO 0x0004
+
+//
+// DataDirection
+//
+#define EFI_EXT_SCSI_DATA_DIRECTION_READ 0
+#define EFI_EXT_SCSI_DATA_DIRECTION_WRITE 1
+#define EFI_EXT_SCSI_DATA_DIRECTION_BIDIRECTIONAL 2
+//
+// HostAdapterStatus
+//
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OK 0x00
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT_COMMAND 0x09
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_TIMEOUT 0x0b
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_MESSAGE_REJECT 0x0d
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_RESET 0x0e
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PARITY_ERROR 0x0f
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_REQUEST_SENSE_FAILED 0x10
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_SELECTION_TIMEOUT 0x11
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_DATA_OVERRUN_UNDERRUN 0x12
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_BUS_FREE 0x13
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_PHASE_ERROR 0x14
+#define EFI_EXT_SCSI_STATUS_HOST_ADAPTER_OTHER 0x7f
+//
+// TargetStatus
+//
+#define EFI_EXT_SCSI_STATUS_TARGET_GOOD 0x00
+#define EFI_EXT_SCSI_STATUS_TARGET_CHECK_CONDITION 0x02
+#define EFI_EXT_SCSI_STATUS_TARGET_CONDITION_MET 0x04
+#define EFI_EXT_SCSI_STATUS_TARGET_BUSY 0x08
+#define EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE 0x10
+#define EFI_EXT_SCSI_STATUS_TARGET_INTERMEDIATE_CONDITION_MET 0x14
+#define EFI_EXT_SCSI_STATUS_TARGET_RESERVATION_CONFLICT 0x18
+#define EFI_EXT_SCSI_STATUS_TARGET_TASK_SET_FULL 0x28
+#define EFI_EXT_SCSI_STATUS_TARGET_ACA_ACTIVE 0x30
+#define EFI_EXT_SCSI_STATUS_TARGET_TASK_ABORTED 0x40
+
+typedef struct {
+ UINT32 AdapterId;
+ UINT32 Attributes;
+ UINT32 IoAlign;
+} EFI_EXT_SCSI_PASS_THRU_MODE;
+
+typedef struct {
+ UINT64 Timeout;
+ VOID *InDataBuffer;
+ VOID *OutDataBuffer;
+ VOID *SenseData;
+ VOID *Cdb;
+ UINT32 InTransferLength;
+ UINT32 OutTransferLength;
+ UINT8 CdbLength;
+ UINT8 DataDirection;
+ UINT8 HostAdapterStatus;
+ UINT8 TargetStatus;
+ UINT8 SenseDataLength;
+} EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET;
+
+/**
+ Sends a SCSI Request Packet to a SCSI device that is attached to the SCSI channel. This function
+ supports both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the
+ nonblocking I/O functionality is optional.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param Target The Target is an array of size TARGET_MAX_BYTES and it represents
+ the id of the SCSI device to send the SCSI Request Packet. Each
+ transport driver may chose to utilize a subset of this size to suit the needs
+ of transport target representation. For example, a Fibre Channel driver
+ may use only 8 bytes (WWN) to represent an FC target.
+ @param Lun The LUN of the SCSI device to send the SCSI Request Packet.
+ @param Packet A pointer to the SCSI Request Packet to send to the SCSI device
+ specified by Target and Lun.
+ @param Event If nonblocking I/O is not supported then Event is ignored, and blocking
+ I/O is performed. If Event is NULL, then blocking I/O is performed. If
+ Event is not NULL and non blocking I/O is supported, then
+ nonblocking I/O is performed, and Event will be signaled when the
+ SCSI Request Packet completes.
+
+ @retval EFI_SUCCESS The SCSI Request Packet was sent by the host. For bi-directional
+ commands, InTransferLength bytes were transferred from
+ InDataBuffer. For write and bi-directional commands,
+ OutTransferLength bytes were transferred by
+ OutDataBuffer.
+ @retval EFI_BAD_BUFFER_SIZE The SCSI Request Packet was not executed. The number of bytes that
+ could be transferred is returned in InTransferLength. For write
+ and bi-directional commands, OutTransferLength bytes were
+ transferred by OutDataBuffer.
+ @retval EFI_NOT_READY The SCSI Request Packet could not be sent because there are too many
+ SCSI Request Packets already queued. The caller may retry again later.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the SCSI Request
+ Packet.
+ @retval EFI_INVALID_PARAMETER Target, Lun, or the contents of ScsiRequestPacket are invalid.
+ @retval EFI_UNSUPPORTED The command described by the SCSI Request Packet is not supported
+ by the host adapter. This includes the case of Bi-directional SCSI
+ commands not supported by the implementation. The SCSI Request
+ Packet was not sent, so no additional status information is available.
+ @retval EFI_TIMEOUT A timeout occurred while waiting for the SCSI Request Packet to execute.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_PASSTHRU) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_EXT_SCSI_PASS_THRU_SCSI_REQUEST_PACKET *Packet,
+ IN EFI_EVENT Event OPTIONAL
+ )
+;
+
+/**
+ Used to retrieve the list of legal Target IDs and LUNs for SCSI devices on a SCSI channel. These
+ can either be the list SCSI devices that are actually present on the SCSI channel, or the list of legal
+ Target Ids and LUNs for the SCSI channel. Regardless, the caller of this function must probe the
+ Target ID and LUN returned to see if a SCSI device is actually present at that location on the SCSI
+ channel.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param Target On input, a pointer to the Target ID (an array of size
+ TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel.
+ On output, a pointer to the Target ID (an array of
+ TARGET_MAX_BYTES) of the next SCSI device present on a SCSI
+ channel. An input value of 0xF(all bytes in the array are 0xF) in the
+ Target array retrieves the Target ID of the first SCSI device present on a
+ SCSI channel.
+ @param Lun On input, a pointer to the LUN of a SCSI device present on the SCSI
+ channel. On output, a pointer to the LUN of the next SCSI device present
+ on a SCSI channel.
+
+ @retval EFI_SUCCESS The Target ID and LUN of the next SCSI device on the SCSI
+ channel was returned in Target and Lun.
+ @retval EFI_INVALID_PARAMETER Target array is not all 0xF, and Target and Lun were
+ not returned on a previous call to GetNextTargetLun().
+ @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_GET_NEXT_TARGET_LUN) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target,
+ IN OUT UINT64 *Lun
+ )
+;
+
+/**
+ Used to allocate and build a device path node for a SCSI device on a SCSI channel.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param Target The Target is an array of size TARGET_MAX_BYTES and it specifies the
+ Target ID of the SCSI device for which a device path node is to be
+ allocated and built. Transport drivers may chose to utilize a subset of
+ this size to suit the representation of targets. For example, a Fibre
+ Channel driver may use only 8 bytes (WWN) in the array to represent a
+ FC target.
+ @param Lun The LUN of the SCSI device for which a device path node is to be
+ allocated and built.
+
+ @param DevicePath A pointer to a single device path node that describes the SCSI device
+ specified by Target and Lun. This function is responsible for
+ allocating the buffer DevicePath with the boot service
+ AllocatePool(). It is the caller's responsibility to free
+ DevicePath when the caller is finished with DevicePath.
+
+ @retval EFI_SUCCESS The device path node that describes the SCSI device specified by
+ Target and Lun was allocated and returned in
+ DevicePath.
+ @retval EFI_INVALID_PARAMETER DevicePath is NULL.
+ @retval EFI_NOT_FOUND The SCSI devices specified by Target and Lun does not exist
+ on the SCSI channel.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate DevicePath.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_BUILD_DEVICE_PATH) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath
+ )
+;
+
+/**
+ Used to translate a device path node to a Target ID and LUN.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param DevicePath A pointer to a single device path node that describes the SCSI device
+ on the SCSI channel.
+ @param Target A pointer to the Target Array which represents the ID of a SCSI device
+ on the SCSI channel.
+ @param Lun A pointer to the LUN of a SCSI device on the SCSI channel.
+
+ @retval EFI_SUCCESS DevicePath was successfully translated to a Target ID and
+ LUN, and they were returned in Target and Lun.
+ @retval EFI_INVALID_PARAMETER DevicePath or Target or Lun is NULL.
+ @retval EFI_NOT_FOUND A valid translation from DevicePath to a Target ID and LUN
+ does not exist.
+ @retval EFI_UNSUPPORTED This driver does not support the device path node type in
+ DevicePath.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_GET_TARGET_LUN) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
+ OUT UINT8 **Target,
+ OUT UINT64 *Lun
+ )
+;
+
+/**
+ Resets a SCSI channel. This operation resets all the SCSI devices connected to the SCSI channel.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The SCSI channel was reset.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI channel.
+ @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI channel.
+ @retval EFI_UNSUPPORTED The SCSI channel does not support a channel reset operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_RESET_CHANNEL) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This
+ )
+;
+
+/**
+ Resets a SCSI logical unit that is connected to a SCSI channel.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param Target The Target is an array of size TARGET_MAX_BYTE and it represents the
+ target port ID of the SCSI device containing the SCSI logical unit to
+ reset. Transport drivers may chose to utilize a subset of this array to suit
+ the representation of their targets.
+ @param Lun The LUN of the SCSI device to reset.
+
+ @retval EFI_SUCCESS The SCSI device specified by Target and Lun was reset.
+ @retval EFI_INVALID_PARAMETER Target or Lun is NULL.
+ @retval EFI_TIMEOUT A timeout occurred while attempting to reset the SCSI device
+ specified by Target and Lun.
+ @retval EFI_UNSUPPORTED The SCSI channel does not support a target reset operation.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the SCSI device
+ specified by Target and Lun.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_RESET_TARGET_LUN) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN UINT8 *Target,
+ IN UINT64 Lun
+ )
+;
+
+/**
+ Used to retrieve the list of legal Target IDs for SCSI devices on a SCSI channel. These can either
+ be the list SCSI devices that are actually present on the SCSI channel, or the list of legal Target IDs
+ for the SCSI channel. Regardless, the caller of this function must probe the Target ID returned to
+ see if a SCSI device is actually present at that location on the SCSI channel.
+
+ @param This A pointer to the EFI_EXT_SCSI_PASS_THRU_PROTOCOL instance.
+ @param Target (TARGET_MAX_BYTES) of a SCSI device present on the SCSI channel.
+ On output, a pointer to the Target ID (an array of
+ TARGET_MAX_BYTES) of the next SCSI device present on a SCSI
+ channel. An input value of 0xF(all bytes in the array are 0xF) in the
+ Target array retrieves the Target ID of the first SCSI device present on a
+ SCSI channel.
+
+ @retval EFI_SUCCESS The Target ID of the next SCSI device on the SCSI
+ channel was returned in Target.
+ @retval EFI_INVALID_PARAMETER Target or Lun is NULL.
+ @retval EFI_TIMEOUT Target array is not all 0xF, and Target were not
+ returned on a previous call to GetNextTarget().
+ @retval EFI_NOT_FOUND There are no more SCSI devices on this SCSI channel.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXT_SCSI_PASS_THRU_GET_NEXT_TARGET) (
+ IN EFI_EXT_SCSI_PASS_THRU_PROTOCOL *This,
+ IN OUT UINT8 **Target
+ )
+;
+
+struct _EFI_EXT_SCSI_PASS_THRU_PROTOCOL {
+ EFI_EXT_SCSI_PASS_THRU_MODE *Mode;
+ EFI_EXT_SCSI_PASS_THRU_PASSTHRU PassThru;
+ EFI_EXT_SCSI_PASS_THRU_GET_NEXT_TARGET_LUN GetNextTargetLun;
+ EFI_EXT_SCSI_PASS_THRU_BUILD_DEVICE_PATH BuildDevicePath;
+ EFI_EXT_SCSI_PASS_THRU_GET_TARGET_LUN GetTargetLun;
+ EFI_EXT_SCSI_PASS_THRU_RESET_CHANNEL ResetChannel;
+ EFI_EXT_SCSI_PASS_THRU_RESET_TARGET_LUN ResetTargetLun;
+ EFI_EXT_SCSI_PASS_THRU_GET_NEXT_TARGET GetNextTarget;
+};
+
+extern EFI_GUID gEfiExtScsiPassThruProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SectionExtraction.h b/MdePkg/Include/Protocol/SectionExtraction.h new file mode 100644 index 0000000000..9200f8a444 --- /dev/null +++ b/MdePkg/Include/Protocol/SectionExtraction.h @@ -0,0 +1,162 @@ +/** @file
+ This file declares Section Extraction protocols.
+
+ This interface provides a means of decoding a set of sections into a linked list of
+ leaf sections. This provides for an extensible and flexible file format.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SectionExtraction.h
+
+ @par Revision Reference:
+ This protocol is defined in Firmware Volume Specification.
+ Version 0.9
+
+**/
+
+#ifndef __SECTION_EXTRACTION_PROTOCOL_H__
+#define __SECTION_EXTRACTION_PROTOCOL_H__
+
+
+//
+// Protocol GUID definition
+//
+#define EFI_SECTION_EXTRACTION_PROTOCOL_GUID \
+ { \
+ 0x448F5DA4, 0x6DD7, 0x4FE1, {0x93, 0x07, 0x69, 0x22, 0x41, 0x92, 0x21, 0x5D } \
+ }
+
+typedef struct _EFI_SECTION_EXTRACTION_PROTOCOL EFI_SECTION_EXTRACTION_PROTOCOL;
+
+//
+// Protocol member functions
+//
+/**
+ Creates and returns a new section stream handle to represent the new section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamLength Size in bytes of the section stream.
+ @param SectionStream Buffer containing the new section stream.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that,
+ on output, contains the new section stream handle.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section stream handle was returned.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to
+ process the request.
+ @retval EFI_INVALID_PARAMETER The section stream may be corrupt or the value
+ of SectionStreamLength may be incorrect.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_OPEN_SECTION_STREAM) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamLength,
+ IN VOID *SectionStream,
+ OUT UINTN *SectionStreamHandle
+ );
+
+/**
+ Reads and returns a single section from a section stream.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates from which section stream to read.
+ @param SectionType Pointer to an EFI_SECTION_TYPE.
+ @param SectionDefinitionGuid Pointer to an EFI_GUID.If SectionType ==
+ EFI_SECTION_GUID_DEFINED, SectionDefinitionGuid indicates what section GUID
+ to search for.If SectionType !=EFI_SECTION_GUID_DEFINED, then
+ SectionDefinitionGuid is unused and is ignored.
+ @param SectionInstance Indicates which instance of the requested section
+ type to return when SectionType is not NULL.
+ @param SectionStreamHandle A pointer to a caller-allocated UINTN that, on output,
+ contains the new section stream handle.
+ @param Buffer Pointer to a pointer to a buffer in which the section
+ contents are returned.
+ @param BufferSize Pointer to a caller-allocated UINTN.
+ @param AuthenticationStatus Pointer to a caller-allocated UINT32 in
+ which any meta-data from encapsulation GUID-defined sections is returned.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section contents were returned in Buffer.
+ @retval EFI_PROTOCOL_ERROR A GUID-defined section was encountered in
+ the section stream with its EFI_GUIDED_SECTION_PROCESSING_REQUIRED bit set,
+ but there was no corresponding GUIDed Section Extraction Protocol in
+ the handle database.
+ @retval EFI_NOT_FOUND An error was encountered when parsing the SectionStream,
+ which indicates that the SectionStream is not correctly formatted.
+ Or The requested section does not exist.
+ @retval EFI_OUT_OF_RESOURCES The system has insufficient resources to process
+ the request.
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+ @retval EFI_BUFFER_TOO_SMALL The size of the input buffer is insufficient to
+ contain the requested section.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_SECTION) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle,
+ IN EFI_SECTION_TYPE *SectionType,
+ IN EFI_GUID *SectionDefinitionGuid,
+ IN UINTN SectionInstance,
+ IN VOID **Buffer,
+ IN OUT UINTN *BufferSize,
+ OUT UINT32 *AuthenticationStatus
+ );
+
+/**
+ Deletes a section stream handle and returns all associated resources to the system.
+
+ @param This Indicates the EFI_SECTION_EXTRACTION_PROTOCOL instance.
+ @param SectionStreamHandle Indicates the section stream to close.
+
+ @retval EFI_SUCCESS The SectionStream was successfully processed and
+ the section stream handle was returned.
+
+ @retval EFI_INVALID_PARAMETER The SectionStreamHandle does not exist.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CLOSE_SECTION_STREAM) (
+ IN EFI_SECTION_EXTRACTION_PROTOCOL *This,
+ IN UINTN SectionStreamHandle
+ );
+
+//
+// Protocol definition
+//
+/**
+ @par Protocol Description:
+ The Section Extraction Protocol provides a simple method of extracting
+ sections from arbitrarily complex files.
+
+ @param OpenSectionStream
+ Takes a bounded stream of sections and returns a section stream handle.
+
+ @param GetSection
+ Given a section stream handle, retrieves the requested section and
+ meta-data from the section stream.
+
+ @param CloseSectionStream
+ Given a section stream handle, closes the section stream.
+
+**/
+struct _EFI_SECTION_EXTRACTION_PROTOCOL {
+ EFI_OPEN_SECTION_STREAM OpenSectionStream;
+ EFI_GET_SECTION GetSection;
+ EFI_CLOSE_SECTION_STREAM CloseSectionStream;
+};
+
+extern EFI_GUID gEfiSectionExtractionProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SerialIo.h b/MdePkg/Include/Protocol/SerialIo.h new file mode 100644 index 0000000000..89a73409d9 --- /dev/null +++ b/MdePkg/Include/Protocol/SerialIo.h @@ -0,0 +1,266 @@ +/** @file
+ Serial IO protocol as defined in the EFI 1.0 specification.
+
+ Abstraction of a basic serial device. Targeted at 16550 UART, but
+ could be much more generic.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SerialIo.h
+
+**/
+
+#ifndef __SERIAL_IO_PROTOCOL_H__
+#define __SERIAL_IO_PROTOCOL_H__
+
+#define EFI_SERIAL_IO_PROTOCOL_GUID \
+ { \
+ 0xBB25CF6F, 0xF1D4, 0x11D2, {0x9A, 0x0C, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0xFD } \
+ }
+
+typedef struct _EFI_SERIAL_IO_PROTOCOL EFI_SERIAL_IO_PROTOCOL;
+
+//
+// Serial IO Data structures
+//
+typedef enum {
+ DefaultParity,
+ NoParity,
+ EvenParity,
+ OddParity,
+ MarkParity,
+ SpaceParity
+} EFI_PARITY_TYPE;
+
+typedef enum {
+ DefaultStopBits,
+ OneStopBit,
+ OneFiveStopBits,
+ TwoStopBits
+} EFI_STOP_BITS_TYPE;
+
+//
+// define for Control bits, grouped by read only, write only, and read write
+//
+//
+// Read Only
+//
+#define EFI_SERIAL_CLEAR_TO_SEND 0x00000010
+#define EFI_SERIAL_DATA_SET_READY 0x00000020
+#define EFI_SERIAL_RING_INDICATE 0x00000040
+#define EFI_SERIAL_CARRIER_DETECT 0x00000080
+#define EFI_SERIAL_INPUT_BUFFER_EMPTY 0x00000100
+#define EFI_SERIAL_OUTPUT_BUFFER_EMPTY 0x00000200
+
+//
+// Write Only
+//
+#define EFI_SERIAL_REQUEST_TO_SEND 0x00000002
+#define EFI_SERIAL_DATA_TERMINAL_READY 0x00000001
+
+//
+// Read Write
+//
+#define EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE 0x00001000
+#define EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE 0x00002000
+#define EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE 0x00004000
+
+//
+// Serial IO Member Functions
+//
+/**
+ Reset the serial device.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_DEVICE_ERROR The serial device could not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_RESET) (
+ IN EFI_SERIAL_IO_PROTOCOL *This
+ )
+;
+
+/**
+ Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
+ data buts, and stop bits on a serial device.
+
+ @param This Protocol instance pointer.
+ @param BaudRate The requested baud rate. A BaudRate value of 0 will use the the
+ device's default interface speed.
+ @param ReveiveFifoDepth The requested depth of the FIFO on the receive side of the
+ serial interface. A ReceiveFifoDepth value of 0 will use
+ the device's dfault FIFO depth.
+ @param Timeout The requested time out for a single character in microseconds.
+ This timeout applies to both the transmit and receive side of the
+ interface. A Timeout value of 0 will use the device's default time
+ out value.
+ @param Parity The type of parity to use on this serial device. A Parity value of
+ DefaultParity will use the device's default parity value.
+ @param DataBits The number of data bits to use on the serial device. A DataBits
+ vaule of 0 will use the device's default data bit setting.
+ @param StopBits The number of stop bits to use on this serial device. A StopBits
+ value of DefaultStopBits will use the device's default number of
+ stop bits.
+
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_DEVICE_ERROR The serial device could not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_SET_ATTRIBUTES) (
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN UINT64 BaudRate,
+ IN UINT32 ReceiveFifoDepth,
+ IN UINT32 Timeout,
+ IN EFI_PARITY_TYPE Parity,
+ IN UINT8 DataBits,
+ IN EFI_STOP_BITS_TYPE StopBits
+ )
+;
+
+/**
+ Set the control bits on a serial device
+
+ @param This Protocol instance pointer.
+ @param Control Set the bits of Control that are settable.
+
+ @retval EFI_SUCCESS The new control bits were set on the serial device.
+ @retval EFI_UNSUPPORTED The serial device does not support this operation.
+ @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_SET_CONTROL_BITS) (
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN UINT32 Control
+ )
+;
+
+/**
+ Retrieves the status of thecontrol bits on a serial device
+
+ @param This Protocol instance pointer.
+ @param Control A pointer to return the current Control signals from the serial device.
+
+ @retval EFI_SUCCESS The control bits were read from the serial device.
+ @retval EFI_DEVICE_ERROR The serial device is not functioning correctly.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_GET_CONTROL_BITS) (
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ OUT UINT32 *Control
+ )
+;
+
+/**
+ Writes data to a serial device.
+
+ @param This Protocol instance pointer.
+ @param BufferSize On input, the size of the Buffer. On output, the amount of
+ data actually written.
+ @param Buffer The buffer of data to write
+
+ @retval EFI_SUCCESS The data was written.
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_TIMEOUT The data write was stopped due to a timeout.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_WRITE) (
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ Writes data to a serial device.
+
+ @param This Protocol instance pointer.
+ @param BufferSize On input, the size of the Buffer. On output, the amount of
+ data returned in Buffer.
+ @param Buffer The buffer to return the data into.
+
+ @retval EFI_SUCCESS The data was read.
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_TIMEOUT The data write was stopped due to a timeout.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERIAL_READ) (
+ IN EFI_SERIAL_IO_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ The data values in SERIAL_IO_MODE are read-only and are updated by the code
+ that produces the SERIAL_IO_PROTOCOL member functions.
+
+ ControlMask - A mask fo the Control bits that the device supports. The device
+ must always support the Input Buffer Empty control bit.
+ TimeOut - If applicable, the number of microseconds to wait before timing out
+ a Read or Write operation.
+ BaudRate - If applicable, the current baud rate setting of the device; otherwise,
+ baud rate has the value of zero to indicate that device runs at the
+ device's designed speed.
+ ReceiveFifoDepth - The number of characters the device will buffer on input
+ DataBits - The number of characters the device will buffer on input
+ Parity - If applicable, this is the EFI_PARITY_TYPE that is computed or
+ checked as each character is transmitted or reveived. If the device
+ does not support parity the value is the default parity value.
+ StopBits - If applicable, the EFI_STOP_BITS_TYPE number of stop bits per
+ character. If the device does not support stop bits the value is
+ the default stop bit values.
+
+**/
+typedef struct {
+ UINT32 ControlMask;
+
+ //
+ // current Attributes
+ //
+ UINT32 Timeout;
+ UINT64 BaudRate;
+ UINT32 ReceiveFifoDepth;
+ UINT32 DataBits;
+ UINT32 Parity;
+ UINT32 StopBits;
+} EFI_SERIAL_IO_MODE;
+
+#define SERIAL_IO_INTERFACE_REVISION 0x00010000
+#define EFI_SERIAL_IO_PROTOCOL_REVISION SERIAL_IO_INTERFACE_REVISION
+
+struct _EFI_SERIAL_IO_PROTOCOL {
+ UINT32 Revision;
+ EFI_SERIAL_RESET Reset;
+ EFI_SERIAL_SET_ATTRIBUTES SetAttributes;
+ EFI_SERIAL_SET_CONTROL_BITS SetControl;
+ EFI_SERIAL_GET_CONTROL_BITS GetControl;
+ EFI_SERIAL_WRITE Write;
+ EFI_SERIAL_READ Read;
+
+ EFI_SERIAL_IO_MODE *Mode;
+};
+
+extern EFI_GUID gEfiSerialIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/ServiceBinding.h b/MdePkg/Include/Protocol/ServiceBinding.h new file mode 100644 index 0000000000..57ce92f142 --- /dev/null +++ b/MdePkg/Include/Protocol/ServiceBinding.h @@ -0,0 +1,74 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ServiceBinding.h
+
+**/
+
+#ifndef __EFI_SERVICE_BINDING_H__
+#define __EFI_SERVICE_BINDING_H__
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_SERVICE_BINDING_PROTOCOL EFI_SERVICE_BINDING_PROTOCOL;
+
+/**
+ Creates a child handle with a set of I/O services.
+
+ @param This Protocol instance pointer.
+ @param ChildHandle Pointer to the handle of the child to create. If it is NULL,
+ then a new handle is created. If it is not NULL, then the
+ I/O services are added to the existing child handle.
+
+ @retval EFI_SUCCES The child handle was created with the I/O services
+ @retval EFI_INVALID_PARAMETER ChildHandle is NULL.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources availabe to create
+ the child
+ @retval other The child handle was not created
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERVICE_BINDING_CREATE_CHILD) (
+ IN EFI_SERVICE_BINDING_PROTOCOL *This,
+ IN OUT EFI_HANDLE *ChildHandle
+ )
+;
+
+/**
+ Destroys a child handle with a set of I/O services.
+
+ @param This Protocol instance pointer.
+ @param ChildHandle Handle of the child to destroy
+
+ @retval EFI_SUCCES The I/O services were removed from the child handle
+ @retval EFI_UNSUPPORTED The child handle does not support the I/O services
+ that are being removed.
+ @retval EFI_INVALID_PARAMETER Child handle is not a valid EFI Handle.
+ @retval EFI_ACCESS_DENIED The child handle could not be destroyed because its
+ I/O services are being used.
+ @retval other The child handle was not destroyed
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SERVICE_BINDING_DESTROY_CHILD) (
+ IN EFI_SERVICE_BINDING_PROTOCOL *This,
+ IN EFI_HANDLE ChildHandle
+ )
+;
+
+struct _EFI_SERVICE_BINDING_PROTOCOL {
+ EFI_SERVICE_BINDING_CREATE_CHILD CreateChild;
+ EFI_SERVICE_BINDING_DESTROY_CHILD DestroyChild;
+};
+
+#endif
diff --git a/MdePkg/Include/Protocol/SimpleFileSystem.h b/MdePkg/Include/Protocol/SimpleFileSystem.h new file mode 100644 index 0000000000..add8ad6eeb --- /dev/null +++ b/MdePkg/Include/Protocol/SimpleFileSystem.h @@ -0,0 +1,328 @@ +/** @file
+ SimpleFileSystem protocol as defined in the EFI 1.0 specification.
+
+ The SimpleFileSystem protocol is the programatic access to the FAT (12,16,32)
+ file system specified in EFI 1.0. It can also be used to abstract a file
+ system other than FAT.
+
+ EFI 1.0 can boot from any valid EFI image contained in a SimpleFileSystem
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SimpleFileSystem.h
+
+**/
+
+#ifndef __SIMPLE_FILE_SYSTEM_H__
+#define __SIMPLE_FILE_SYSTEM_H__
+
+#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_GUID \
+ { \
+ 0x964e5b22, 0x6459, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+typedef struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL EFI_SIMPLE_FILE_SYSTEM_PROTOCOL;
+typedef struct _EFI_FILE EFI_FILE;
+typedef struct _EFI_FILE *EFI_FILE_HANDLE;
+typedef struct _EFI_FILE EFI_FILE_PROTOCOL;
+
+/**
+ Open the root directory on a volume.
+
+ @param This Protocol instance pointer.
+ @param Root Returns an Open file handle for the root directory
+
+ @retval EFI_SUCCESS The device was opened.
+ @retval EFI_UNSUPPORTED This volume does not suppor the file system.
+ @retval EFI_NO_MEDIA The device has no media.
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_ACCESS_DENIED The service denied access to the file
+ @retval EFI_OUT_OF_RESOURCES The volume was not opened due to lack of resources
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME) (
+ IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This,
+ OUT EFI_FILE **Root
+ )
+;
+
+#define EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION 0x00010000
+
+struct _EFI_SIMPLE_FILE_SYSTEM_PROTOCOL {
+ UINT64 Revision;
+ EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_OPEN_VOLUME OpenVolume;
+};
+
+/**
+ Open the root directory on a volume.
+
+ @param This Protocol instance pointer.
+ @param NewHandle Returns File Handle for FileName
+ @param FileName Null terminated string. "\", ".", and ".." are supported
+ @param OpenMode Open mode for file.
+ @param Attributes Only used for EFI_FILE_MODE_CREATE
+
+ @retval EFI_SUCCESS The device was opened.
+ @retval EFI_NOT_FOUND The specified file could not be found on the device
+ @retval EFI_NO_MEDIA The device has no media.
+ @retval EFI_MEDIA_CHANGED The media has changed
+ @retval EFI_DEVICE_ERROR The device reported an error.
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_ACCESS_DENIED The service denied access to the file
+ @retval EFI_OUT_OF_RESOURCES The volume was not opened due to lack of resources
+ @retval EFI_VOLUME_FULL The volume is full.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_OPEN) (
+ IN EFI_FILE *This,
+ OUT EFI_FILE **NewHandle,
+ IN CHAR16 *FileName,
+ IN UINT64 OpenMode,
+ IN UINT64 Attributes
+ )
+;
+
+//
+// Open modes
+//
+#define EFI_FILE_MODE_READ 0x0000000000000001ULL
+#define EFI_FILE_MODE_WRITE 0x0000000000000002ULL
+#define EFI_FILE_MODE_CREATE 0x8000000000000000ULL
+
+//
+// File attributes
+//
+#define EFI_FILE_READ_ONLY 0x0000000000000001ULL
+#define EFI_FILE_HIDDEN 0x0000000000000002ULL
+#define EFI_FILE_SYSTEM 0x0000000000000004ULL
+#define EFI_FILE_RESERVED 0x0000000000000008ULL
+#define EFI_FILE_DIRECTORY 0x0000000000000010ULL
+#define EFI_FILE_ARCHIVE 0x0000000000000020ULL
+#define EFI_FILE_VALID_ATTR 0x0000000000000037ULL
+
+/**
+ Close the file handle
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The device was opened.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_CLOSE) (
+ IN EFI_FILE *This
+ )
+;
+
+/**
+ Close and delete the file handle
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The device was opened.
+ @retval EFI_WARN_DELETE_FAILURE The handle was closed but the file was not deleted
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_DELETE) (
+ IN EFI_FILE *This
+ )
+;
+
+/**
+ Read data from the file.
+
+ @param This Protocol instance pointer.
+ @param BufferSize On input size of buffer, on output amount of data in buffer.
+ @param Buffer The buffer in which data is read.
+
+ @retval EFI_SUCCESS Data was read.
+ @retval EFI_NO_MEDIA The device has no media
+ @retval EFI_DEVICE_ERROR The device reported an error
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_BUFFER_TO_SMALL BufferSize is too small. BufferSize contains required size
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_READ) (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Write data from to the file.
+
+ @param This Protocol instance pointer.
+ @param BufferSize On input size of buffer, on output amount of data in buffer.
+ @param Buffer The buffer in which data to write.
+
+ @retval EFI_SUCCESS Data was written.
+ @retval EFI_UNSUPPORT Writes to Open directory are not supported
+ @retval EFI_NO_MEDIA The device has no media
+ @retval EFI_DEVICE_ERROR The device reported an error
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_WRITE_PROTECTED The device is write protected
+ @retval EFI_ACCESS_DENIED The file was open for read only
+ @retval EFI_VOLUME_FULL The volume is full
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_WRITE) (
+ IN EFI_FILE *This,
+ IN OUT UINTN *BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ Set a files current position
+
+ @param This Protocol instance pointer.
+ @param Position Byte possition from the start of the file
+
+ @retval EFI_SUCCESS Data was written.
+ @retval EFI_UNSUPPORTED Seek request for non-zero is not valid on open.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_SET_POSITION) (
+ IN EFI_FILE *This,
+ IN UINT64 Position
+ )
+;
+
+/**
+ Get a files current position
+
+ @param This Protocol instance pointer.
+ @param Position Byte possition from the start of the file
+
+ @retval EFI_SUCCESS Data was written.
+ @retval EFI_UNSUPPORTED Seek request for non-zero is not valid on open.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_GET_POSITION) (
+ IN EFI_FILE *This,
+ OUT UINT64 *Position
+ )
+;
+
+/**
+ Get information about a file
+
+ @param This Protocol instance pointer.
+ @param InformationType Type of info to return in Buffer
+ @param BufferSize On input size of buffer, on output amount of data in buffer.
+ @param Buffer The buffer to return data.
+
+ @retval EFI_SUCCESS Data was returned.
+ @retval EFI_UNSUPPORT InformationType is not supported
+ @retval EFI_NO_MEDIA The device has no media
+ @retval EFI_DEVICE_ERROR The device reported an error
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_WRITE_PROTECTED The device is write protected
+ @retval EFI_ACCESS_DENIED The file was open for read only
+ @retval EFI_BUFFER_TOO_SMALL Buffer was too small, required size returned in BufferSize
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_GET_INFO) (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Set information about a file
+
+ @param File Protocol instance pointer.
+ @param InformationType Type of info in Buffer
+ @param BufferSize Size of buffer.
+ @param Buffer The data to write.
+
+ @retval EFI_SUCCESS Data was returned.
+ @retval EFI_UNSUPPORT InformationType is not supported
+ @retval EFI_NO_MEDIA The device has no media
+ @retval EFI_DEVICE_ERROR The device reported an error
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_WRITE_PROTECTED The device is write protected
+ @retval EFI_ACCESS_DENIED The file was open for read only
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_SET_INFO) (
+ IN EFI_FILE *This,
+ IN EFI_GUID *InformationType,
+ IN UINTN BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ Flush data back for the file handle
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS Data was written.
+ @retval EFI_UNSUPPORT Writes to Open directory are not supported
+ @retval EFI_NO_MEDIA The device has no media
+ @retval EFI_DEVICE_ERROR The device reported an error
+ @retval EFI_VOLUME_CORRUPTED The file system structures are corrupted
+ @retval EFI_WRITE_PROTECTED The device is write protected
+ @retval EFI_ACCESS_DENIED The file was open for read only
+ @retval EFI_VOLUME_FULL The volume is full
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FILE_FLUSH) (
+ IN EFI_FILE *This
+ )
+;
+
+#define EFI_FILE_HANDLE_REVISION 0x00010000
+#define EFI_FILE_PROTOCOL_REVISION EFI_FILE_HANDLE_REVISION
+
+struct _EFI_FILE {
+ UINT64 Revision;
+ EFI_FILE_OPEN Open;
+ EFI_FILE_CLOSE Close;
+ EFI_FILE_DELETE Delete;
+ EFI_FILE_READ Read;
+ EFI_FILE_WRITE Write;
+ EFI_FILE_GET_POSITION GetPosition;
+ EFI_FILE_SET_POSITION SetPosition;
+ EFI_FILE_GET_INFO GetInfo;
+ EFI_FILE_SET_INFO SetInfo;
+ EFI_FILE_FLUSH Flush;
+};
+
+
+extern EFI_GUID gEfiSimpleFileSystemProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SimpleNetwork.h b/MdePkg/Include/Protocol/SimpleNetwork.h new file mode 100644 index 0000000000..0da64bbe53 --- /dev/null +++ b/MdePkg/Include/Protocol/SimpleNetwork.h @@ -0,0 +1,580 @@ +/** @file
+ Simple Network protocol as defined in the EFI 1.0 specification.
+
+ Basic network device abstraction.
+
+ Rx - Received
+ Tx - Transmit
+ MCast - MultiCast
+ ...
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SimpleNetwork.h
+
+**/
+
+#ifndef __SIMPLE_NETWORK_H__
+#define __SIMPLE_NETWORK_H__
+
+#define EFI_SIMPLE_NETWORK_PROTOCOL_GUID \
+ { \
+ 0xA19832B9, 0xAC25, 0x11D3, {0x9A, 0x2D, 0x00, 0x90, 0x27, 0x3F, 0xC1, 0x4D } \
+ }
+
+typedef struct _EFI_SIMPLE_NETWORK_PROTOCOL EFI_SIMPLE_NETWORK_PROTOCOL;
+
+//
+// Simple Network Protocol data structures
+//
+typedef struct {
+ //
+ // Total number of frames received. Includes frames with errors and
+ // dropped frames.
+ //
+ UINT64 RxTotalFrames;
+
+ //
+ // Number of valid frames received and copied into receive buffers.
+ //
+ UINT64 RxGoodFrames;
+
+ //
+ // Number of frames below the minimum length for the media.
+ // This would be <64 for ethernet.
+ //
+ UINT64 RxUndersizeFrames;
+
+ //
+ // Number of frames longer than the maxminum length for the
+ // media. This would be >1500 for ethernet.
+ //
+ UINT64 RxOversizeFrames;
+
+ //
+ // Valid frames that were dropped because receive buffers were full.
+ //
+ UINT64 RxDroppedFrames;
+
+ //
+ // Number of valid unicast frames received and not dropped.
+ //
+ UINT64 RxUnicastFrames;
+
+ //
+ // Number of valid broadcast frames received and not dropped.
+ //
+ UINT64 RxBroadcastFrames;
+
+ //
+ // Number of valid mutlicast frames received and not dropped.
+ //
+ UINT64 RxMulticastFrames;
+
+ //
+ // Number of frames w/ CRC or alignment errors.
+ //
+ UINT64 RxCrcErrorFrames;
+
+ //
+ // Total number of bytes received. Includes frames with errors
+ // and dropped frames.
+ //
+ UINT64 RxTotalBytes;
+
+ //
+ // Transmit statistics.
+ //
+ UINT64 TxTotalFrames;
+ UINT64 TxGoodFrames;
+ UINT64 TxUndersizeFrames;
+ UINT64 TxOversizeFrames;
+ UINT64 TxDroppedFrames;
+ UINT64 TxUnicastFrames;
+ UINT64 TxBroadcastFrames;
+ UINT64 TxMulticastFrames;
+ UINT64 TxCrcErrorFrames;
+ UINT64 TxTotalBytes;
+
+ //
+ // Number of collisions detection on this subnet.
+ //
+ UINT64 Collisions;
+
+ //
+ // Number of frames destined for unsupported protocol.
+ //
+ UINT64 UnsupportedProtocol;
+
+} EFI_NETWORK_STATISTICS;
+
+typedef enum {
+ EfiSimpleNetworkStopped,
+ EfiSimpleNetworkStarted,
+ EfiSimpleNetworkInitialized,
+ EfiSimpleNetworkMaxState
+} EFI_SIMPLE_NETWORK_STATE;
+
+#define EFI_SIMPLE_NETWORK_RECEIVE_UNICAST 0x01
+#define EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST 0x02
+#define EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST 0x04
+#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS 0x08
+#define EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST 0x10
+
+#define EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT 0x01
+#define EFI_SIMPLE_NETWORK_TRANSMIT_INTERRUPT 0x02
+#define EFI_SIMPLE_NETWORK_COMMAND_INTERRUPT 0x04
+#define EFI_SIMPLE_NETWORK_SOFTWARE_INTERRUPT 0x08
+
+#define MAX_MCAST_FILTER_CNT 16
+typedef struct {
+ UINT32 State;
+ UINT32 HwAddressSize;
+ UINT32 MediaHeaderSize;
+ UINT32 MaxPacketSize;
+ UINT32 NvRamSize;
+ UINT32 NvRamAccessSize;
+ UINT32 ReceiveFilterMask;
+ UINT32 ReceiveFilterSetting;
+ UINT32 MaxMCastFilterCount;
+ UINT32 MCastFilterCount;
+ EFI_MAC_ADDRESS MCastFilter[MAX_MCAST_FILTER_CNT];
+ EFI_MAC_ADDRESS CurrentAddress;
+ EFI_MAC_ADDRESS BroadcastAddress;
+ EFI_MAC_ADDRESS PermanentAddress;
+ UINT8 IfType;
+ BOOLEAN MacAddressChangeable;
+ BOOLEAN MultipleTxSupported;
+ BOOLEAN MediaPresentSupported;
+ BOOLEAN MediaPresent;
+} EFI_SIMPLE_NETWORK_MODE;
+
+//
+// Protocol Member Functions
+//
+/**
+ Changes the state of a network interface from "stopped" to "started".
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The network interface was started.
+ @retval EFI_ALREADY_STARTED The network interface is already in the started state.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_START) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This
+ )
+;
+
+/**
+ Changes the state of a network interface from "started" to "stopped".
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The network interface was stopped.
+ @retval EFI_ALREADY_STARTED The network interface is already in the stopped state.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_STOP) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This
+ )
+;
+
+/**
+ Resets a network adapter and allocates the transmit and receive buffers
+ required by the network interface; optionally, also requests allocation
+ of additional transmit and receive buffers.
+
+ @param This Protocol instance pointer.
+ @param ExtraRxBufferSize The size, in bytes, of the extra receive buffer space
+ that the driver should allocate for the network interface.
+ Some network interfaces will not be able to use the extra
+ buffer, and the caller will not know if it is actually
+ being used.
+ @param ExtraTxBufferSize The size, in bytes, of the extra transmit buffer space
+ that the driver should allocate for the network interface.
+ Some network interfaces will not be able to use the extra
+ buffer, and the caller will not know if it is actually
+ being used.
+
+ @retval EFI_SUCCESS The network interface was initialized.
+ @retval EFI_NOT_STARTED The network interface has not been started
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory for the transmit and
+ receive buffers. .
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_INITIALIZE) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN UINTN ExtraRxBufferSize OPTIONAL,
+ IN UINTN ExtraTxBufferSize OPTIONAL
+ )
+;
+
+/**
+ Resets a network adapter and re-initializes it with the parameters that were
+ provided in the previous call to Initialize().
+
+ @param This Protocol instance pointer.
+ @param ExtendedVerification Indicates that the driver may perform a more
+ exhaustive verification operation of the device
+ during reset.
+
+ @retval EFI_SUCCESS The network interface was reset.
+ @retval EFI_NOT_STARTED The network interface has not been started
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_RESET) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ )
+;
+
+/**
+ Resets a network adapter and leaves it in a state that is safe for
+ another driver to initialize.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The network interface was shutdown.
+ @retval EFI_NOT_STARTED The network interface has not been started
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_SHUTDOWN) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This
+ )
+;
+
+/**
+ Manages the multicast receive filters of a network interface.
+
+ @param This Protocol instance pointer.
+ @param Enable A bit mask of receive filters to enable on the network interface.
+ @param Disable A bit mask of receive filters to disable on the network interface.
+ @param ResetMCastFilter Set to TRUE to reset the contents of the multicast receive
+ filters on the network interface to their default values.
+ @param McastFilterCnt Number of multicast HW MAC addresses in the new
+ MCastFilter list. This value must be less than or equal to
+ the MCastFilterCnt field of EFI_SIMPLE_NETWORK_MODE. This
+ field is optional if ResetMCastFilter is TRUE.
+ @param MCastFilter A pointer to a list of new multicast receive filter HW MAC
+ addresses. This list will replace any existing multicast
+ HW MAC address list. This field is optional if
+ ResetMCastFilter is TRUE.
+
+ @retval EFI_SUCCESS The multicast receive filter list was updated.
+ @retval EFI_NOT_STARTED The network interface has not been started
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_RECEIVE_FILTERS) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN UINT32 Enable,
+ IN UINT32 Disable,
+ IN BOOLEAN ResetMCastFilter,
+ IN UINTN MCastFilterCnt OPTIONAL,
+ IN EFI_MAC_ADDRESS *MCastFilter OPTIONAL
+ )
+;
+
+/**
+ Modifies or resets the current station address, if supported.
+
+ @param This Protocol instance pointer.
+ @param Reset Flag used to reset the station address to the network interfaces
+ permanent address.
+ @param New New station address to be used for the network interface.
+
+ @retval EFI_SUCCESS The network interfaces station address was updated.
+ @retval EFI_NOT_STARTED The network interface has not been started
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_STATION_ADDRESS) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN BOOLEAN Reset,
+ IN EFI_MAC_ADDRESS *New OPTIONAL
+ )
+;
+
+/**
+ Resets or collects the statistics on a network interface.
+
+ @param This Protocol instance pointer.
+ @param Reset Set to TRUE to reset the statistics for the network interface.
+ @param StatisticsSize On input the size, in bytes, of StatisticsTable. On
+ output the size, in bytes, of the resulting table of
+ statistics.
+ @param StatisticsTable A pointer to the EFI_NETWORK_STATISTICS structure that
+ contains the statistics.
+
+ @retval EFI_SUCCESS The statistics were collected from the network interface.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_BUFFER_TOO_SMALL The Statistics buffer was too small. The current buffer
+ size needed to hold the statistics is returned in
+ StatisticsSize.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_STATISTICS) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN BOOLEAN Reset,
+ IN OUT UINTN *StatisticsSize OPTIONAL,
+ OUT EFI_NETWORK_STATISTICS *StatisticsTable OPTIONAL
+ )
+;
+
+/**
+ Converts a multicast IP address to a multicast HW MAC address.
+
+ @param This Protocol instance pointer.
+ @param IPv6 Set to TRUE if the multicast IP address is IPv6 [RFC 2460]. Set
+ to FALSE if the multicast IP address is IPv4 [RFC 791].
+ @param IP The multicast IP address that is to be converted to a multicast
+ HW MAC address.
+ @param MAC The multicast HW MAC address that is to be generated from IP.
+
+ @retval EFI_SUCCESS The multicast IP address was mapped to the multicast
+ HW MAC address.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_BUFFER_TOO_SMALL The Statistics buffer was too small. The current buffer
+ size needed to hold the statistics is returned in
+ StatisticsSize.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN BOOLEAN IPv6,
+ IN EFI_IP_ADDRESS *IP,
+ OUT EFI_MAC_ADDRESS *MAC
+ )
+;
+
+/**
+ Performs read and write operations on the NVRAM device attached to a
+ network interface.
+
+ @param This Protocol instance pointer.
+ @param ReadWrite TRUE for read operations, FALSE for write operations.
+ @param Offset Byte offset in the NVRAM device at which to start the read or
+ write operation. This must be a multiple of NvRamAccessSize and
+ less than NvRamSize.
+ @param BufferSize The number of bytes to read or write from the NVRAM device.
+ This must also be a multiple of NvramAccessSize.
+ @param Buffer A pointer to the data buffer.
+
+ @retval EFI_SUCCESS The NVRAM access was performed.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_NVDATA) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN BOOLEAN ReadWrite,
+ IN UINTN Offset,
+ IN UINTN BufferSize,
+ IN OUT VOID *Buffer
+ )
+;
+
+/**
+ Reads the current interrupt status and recycled transmit buffer status from
+ a network interface.
+
+ @param This Protocol instance pointer.
+ @param InterruptStatus A pointer to the bit mask of the currently active interrupts
+ If this is NULL, the interrupt status will not be read from
+ the device. If this is not NULL, the interrupt status will
+ be read from the device. When the interrupt status is read,
+ it will also be cleared. Clearing the transmit interrupt
+ does not empty the recycled transmit buffer array.
+ @param TxBuf Recycled transmit buffer address. The network interface will
+ not transmit if its internal recycled transmit buffer array
+ is full. Reading the transmit buffer does not clear the
+ transmit interrupt. If this is NULL, then the transmit buffer
+ status will not be read. If there are no transmit buffers to
+ recycle and TxBuf is not NULL, * TxBuf will be set to NULL.
+
+ @retval EFI_SUCCESS The status of the network interface was retrieved.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_GET_STATUS) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ OUT UINT32 *InterruptStatus OPTIONAL,
+ OUT VOID **TxBuf OPTIONAL
+ )
+;
+
+/**
+ Places a packet in the transmit queue of a network interface.
+
+ @param This Protocol instance pointer.
+ @param HeaderSize The size, in bytes, of the media header to be filled in by
+ the Transmit() function. If HeaderSize is non-zero, then it
+ must be equal to This->Mode->MediaHeaderSize and the DestAddr
+ and Protocol parameters must not be NULL.
+ @param BufferSize The size, in bytes, of the entire packet (media header and
+ data) to be transmitted through the network interface.
+ @param Buffer A pointer to the packet (media header followed by data) to be
+ transmitted. This parameter cannot be NULL. If HeaderSize is zero,
+ then the media header in Buffer must already be filled in by the
+ caller. If HeaderSize is non-zero, then the media header will be
+ filled in by the Transmit() function.
+ @param SrcAddr The source HW MAC address. If HeaderSize is zero, then this parameter
+ is ignored. If HeaderSize is non-zero and SrcAddr is NULL, then
+ This->Mode->CurrentAddress is used for the source HW MAC address.
+ @param DsetAddr The destination HW MAC address. If HeaderSize is zero, then this
+ parameter is ignored.
+ @param Protocol The type of header to build. If HeaderSize is zero, then this
+ parameter is ignored. See RFC 1700, section "Ether Types", for
+ examples.
+
+ @retval EFI_SUCCESS The packet was placed on the transmit queue.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_NOT_READY The network interface is too busy to accept this transmit request.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize parameter is too small.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_TRANSMIT) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ IN UINTN HeaderSize,
+ IN UINTN BufferSize,
+ IN VOID *Buffer,
+ IN EFI_MAC_ADDRESS *SrcAddr OPTIONAL,
+ IN EFI_MAC_ADDRESS *DestAddr OPTIONAL,
+ IN UINT16 *Protocol OPTIONAL
+ )
+;
+
+/**
+ Receives a packet from a network interface.
+
+ @param This Protocol instance pointer.
+ @param HeaderSize The size, in bytes, of the media header received on the network
+ interface. If this parameter is NULL, then the media header size
+ will not be returned.
+ @param BufferSize On entry, the size, in bytes, of Buffer. On exit, the size, in
+ bytes, of the packet that was received on the network interface.
+ @param Buffer A pointer to the data buffer to receive both the media header and
+ the data.
+ @param SrcAddr The source HW MAC address. If this parameter is NULL, the
+ HW MAC source address will not be extracted from the media
+ header.
+ @param DsetAddr The destination HW MAC address. If this parameter is NULL,
+ the HW MAC destination address will not be extracted from the
+ media header.
+ @param Protocol The media header type. If this parameter is NULL, then the
+ protocol will not be extracted from the media header. See
+ RFC 1700 section "Ether Types" for examples.
+
+ @retval EFI_SUCCESS The received data was stored in Buffer, and BufferSize has
+ been updated to the number of bytes received.
+ @retval EFI_NOT_STARTED The network interface has not been started.
+ @retval EFI_NOT_READY The network interface is too busy to accept this transmit
+ request.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize parameter is too small.
+ @retval EFI_INVALID_PARAMETER One or more of the parameters has an unsupported value.
+ @retval EFI_DEVICE_ERROR The command could not be sent to the network interface.
+ @retval EFI_UNSUPPORTED This function is not supported by the network interface.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_NETWORK_RECEIVE) (
+ IN EFI_SIMPLE_NETWORK_PROTOCOL *This,
+ OUT UINTN *HeaderSize OPTIONAL,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer,
+ OUT EFI_MAC_ADDRESS *SrcAddr OPTIONAL,
+ OUT EFI_MAC_ADDRESS *DestAddr OPTIONAL,
+ OUT UINT16 *Protocol OPTIONAL
+ )
+;
+
+#define EFI_SIMPLE_NETWORK_PROTOCOL_REVISION 0x00010000
+
+struct _EFI_SIMPLE_NETWORK_PROTOCOL {
+ UINT64 Revision;
+ EFI_SIMPLE_NETWORK_START Start;
+ EFI_SIMPLE_NETWORK_STOP Stop;
+ EFI_SIMPLE_NETWORK_INITIALIZE Initialize;
+ EFI_SIMPLE_NETWORK_RESET Reset;
+ EFI_SIMPLE_NETWORK_SHUTDOWN Shutdown;
+ EFI_SIMPLE_NETWORK_RECEIVE_FILTERS ReceiveFilters;
+ EFI_SIMPLE_NETWORK_STATION_ADDRESS StationAddress;
+ EFI_SIMPLE_NETWORK_STATISTICS Statistics;
+ EFI_SIMPLE_NETWORK_MCAST_IP_TO_MAC MCastIpToMac;
+ EFI_SIMPLE_NETWORK_NVDATA NvData;
+ EFI_SIMPLE_NETWORK_GET_STATUS GetStatus;
+ EFI_SIMPLE_NETWORK_TRANSMIT Transmit;
+ EFI_SIMPLE_NETWORK_RECEIVE Receive;
+ EFI_EVENT WaitForPacket;
+ EFI_SIMPLE_NETWORK_MODE *Mode;
+};
+
+extern EFI_GUID gEfiSimpleNetworkProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SimplePointer.h b/MdePkg/Include/Protocol/SimplePointer.h new file mode 100644 index 0000000000..a0e0804074 --- /dev/null +++ b/MdePkg/Include/Protocol/SimplePointer.h @@ -0,0 +1,97 @@ +/** @file
+ Simple Pointer protocol from the EFI 1.1 specification.
+
+ Abstraction of a very simple pointer device like a mice or tracekballs.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SimplePointer.h
+
+**/
+
+#ifndef __SIMPLE_POINTER_H__
+#define __SIMPLE_POINTER_H__
+
+#define EFI_SIMPLE_POINTER_PROTOCOL_GUID \
+ { \
+ 0x31878c87, 0xb75, 0x11d5, {0x9a, 0x4f, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_SIMPLE_POINTER_PROTOCOL EFI_SIMPLE_POINTER_PROTOCOL;
+
+//
+// Data structures
+//
+typedef struct {
+ INT32 RelativeMovementX;
+ INT32 RelativeMovementY;
+ INT32 RelativeMovementZ;
+ BOOLEAN LeftButton;
+ BOOLEAN RightButton;
+} EFI_SIMPLE_POINTER_STATE;
+
+typedef struct {
+ UINT64 ResolutionX;
+ UINT64 ResolutionY;
+ UINT64 ResolutionZ;
+ BOOLEAN LeftButton;
+ BOOLEAN RightButton;
+} EFI_SIMPLE_POINTER_MODE;
+
+/**
+ Resets the pointer device hardware.
+
+ @param This A pointer to the EFI_SIMPLE_POINTER_PROTOCOL
+ instance.
+ @param ExtendedVerification Indicates that the driver may perform a more exhaustive
+ verification operation of the device during reset.
+
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_DEVICE_ERROR The device is not functioning correctly and could not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_POINTER_RESET) (
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ );
+
+/**
+ Retrieves the current state of a pointer device.
+
+ @param This A pointer to the EFI_SIMPLE_POINTER_PROTOCOL
+ instance.
+ @param State A pointer to the state information on the pointer device.
+
+ @retval EFI_SUCCESS The state of the pointer device was returned in State.
+ @retval EFI_NOT_READY The state of the pointer device has not changed since the last call to
+ GetState().
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to retrieve the pointer device's
+ current state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIMPLE_POINTER_GET_STATE) (
+ IN EFI_SIMPLE_POINTER_PROTOCOL *This,
+ IN OUT EFI_SIMPLE_POINTER_STATE *State
+ );
+
+struct _EFI_SIMPLE_POINTER_PROTOCOL {
+ EFI_SIMPLE_POINTER_RESET Reset;
+ EFI_SIMPLE_POINTER_GET_STATE GetState;
+ EFI_EVENT WaitForInput;
+ EFI_SIMPLE_POINTER_MODE *Mode;
+};
+
+extern EFI_GUID gEfiSimplePointerProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SimpleTextIn.h b/MdePkg/Include/Protocol/SimpleTextIn.h new file mode 100644 index 0000000000..053ed58b90 --- /dev/null +++ b/MdePkg/Include/Protocol/SimpleTextIn.h @@ -0,0 +1,126 @@ +/** @file
+ Simple Text In protocol from the EFI 1.0 specification.
+
+ Abstraction of a very simple input device like a keyboard or serial
+ terminal.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SimpleTextIn.h
+
+**/
+
+#ifndef __SIMPLE_TEXT_IN_PROTOCOL_H__
+#define __SIMPLE_TEXT_IN_PROTOCOL_H__
+
+#define EFI_SIMPLE_TEXT_IN_PROTOCOL_GUID \
+ { \
+ 0x387477c1, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+#define EFI_SIMPLE_INPUT_PROTOCOL_GUID EFI_SIMPLE_TEXT_IN_PROTOCOL_GUID
+#define EFI_SIMPLE_TEXT_INPUT_PROTOCOL_GUID EFI_SIMPLE_TEXT_IN_PROTOCOL_GUID
+
+typedef struct _EFI_SIMPLE_TEXT_IN_PROTOCOL EFI_SIMPLE_TEXT_IN_PROTOCOL;
+typedef struct _EFI_SIMPLE_TEXT_IN_PROTOCOL EFI_SIMPLE_TEXT_INPUT_PROTOCOL;
+
+//
+// Data structures
+//
+typedef struct {
+ UINT16 ScanCode;
+ CHAR16 UnicodeChar;
+} EFI_INPUT_KEY;
+
+//
+// Required unicode control chars
+//
+#define CHAR_NULL 0x0000
+#define CHAR_BACKSPACE 0x0008
+#define CHAR_TAB 0x0009
+#define CHAR_LINEFEED 0x000A
+#define CHAR_CARRIAGE_RETURN 0x000D
+
+//
+// EFI Scan codes
+//
+#define SCAN_NULL 0x0000
+#define SCAN_UP 0x0001
+#define SCAN_DOWN 0x0002
+#define SCAN_RIGHT 0x0003
+#define SCAN_LEFT 0x0004
+#define SCAN_HOME 0x0005
+#define SCAN_END 0x0006
+#define SCAN_INSERT 0x0007
+#define SCAN_DELETE 0x0008
+#define SCAN_PAGE_UP 0x0009
+#define SCAN_PAGE_DOWN 0x000A
+#define SCAN_F1 0x000B
+#define SCAN_F2 0x000C
+#define SCAN_F3 0x000D
+#define SCAN_F4 0x000E
+#define SCAN_F5 0x000F
+#define SCAN_F6 0x0010
+#define SCAN_F7 0x0011
+#define SCAN_F8 0x0012
+#define SCAN_F9 0x0013
+#define SCAN_F10 0x0014
+#define SCAN_F11 0x0015
+#define SCAN_F12 0x0016
+#define SCAN_ESC 0x0017
+
+/**
+ Reset the input device and optionaly run diagnostics
+
+ @param This Protocol instance pointer.
+ @param ExtendedVerification Driver may perform diagnostics on reset.
+
+ @retval EFI_SUCCESS The device was reset.
+ @retval EFI_DEVICE_ERROR The device is not functioning properly and could not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INPUT_RESET) (
+ IN EFI_SIMPLE_TEXT_IN_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ )
+;
+
+/**
+ Reads the next keystroke from the input device. The WaitForKey Event can
+ be used to test for existance of a keystroke via WaitForEvent () call.
+
+ @param This Protocol instance pointer.
+ @param Key Driver may perform diagnostics on reset.
+
+ @retval EFI_SUCCESS The keystroke information was returned.
+ @retval EFI_NOT_READY There was no keystroke data availiable.
+ @retval EFI_DEVICE_ERROR The keydtroke information was not returned due to
+ hardware errors.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INPUT_READ_KEY) (
+ IN EFI_SIMPLE_TEXT_IN_PROTOCOL *This,
+ OUT EFI_INPUT_KEY *Key
+ )
+;
+
+struct _EFI_SIMPLE_TEXT_IN_PROTOCOL {
+ EFI_INPUT_RESET Reset;
+ EFI_INPUT_READ_KEY ReadKeyStroke;
+ EFI_EVENT WaitForKey;
+} EFI_SIMPLE_INPUT_PROTOCOL;
+
+extern EFI_GUID gEfiSimpleTextInProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SimpleTextOut.h b/MdePkg/Include/Protocol/SimpleTextOut.h new file mode 100644 index 0000000000..b568865f18 --- /dev/null +++ b/MdePkg/Include/Protocol/SimpleTextOut.h @@ -0,0 +1,390 @@ +/** @file
+ Simple Text Out protocol from the EFI 1.0 specification.
+
+ Abstraction of a very simple text based output device like VGA text mode or
+ a serial terminal. The Simple Text Out protocol instance can represent
+ a single hardware device or a virtual device that is an agregation
+ of multiple physical devices.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SimpleTextOut.h
+
+**/
+
+#ifndef __SIMPLE_TEXT_OUT_H__
+#define __SIMPLE_TEXT_OUT_H__
+
+#define EFI_SIMPLE_TEXT_OUT_PROTOCOL_GUID \
+ { \
+ 0x387477c2, 0x69c7, 0x11d2, {0x8e, 0x39, 0x0, 0xa0, 0xc9, 0x69, 0x72, 0x3b } \
+ }
+
+#define EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL_GUID EFI_SIMPLE_TEXT_OUT_PROTOCOL_GUID
+
+typedef struct _EFI_SIMPLE_TEXT_OUT_PROTOCOL EFI_SIMPLE_TEXT_OUT_PROTOCOL;
+typedef struct _EFI_SIMPLE_TEXT_OUT_PROTOCOL EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL;
+
+//
+// Define's for required EFI Unicode Box Draw characters
+//
+#define BOXDRAW_HORIZONTAL 0x2500
+#define BOXDRAW_VERTICAL 0x2502
+#define BOXDRAW_DOWN_RIGHT 0x250c
+#define BOXDRAW_DOWN_LEFT 0x2510
+#define BOXDRAW_UP_RIGHT 0x2514
+#define BOXDRAW_UP_LEFT 0x2518
+#define BOXDRAW_VERTICAL_RIGHT 0x251c
+#define BOXDRAW_VERTICAL_LEFT 0x2524
+#define BOXDRAW_DOWN_HORIZONTAL 0x252c
+#define BOXDRAW_UP_HORIZONTAL 0x2534
+#define BOXDRAW_VERTICAL_HORIZONTAL 0x253c
+#define BOXDRAW_DOUBLE_HORIZONTAL 0x2550
+#define BOXDRAW_DOUBLE_VERTICAL 0x2551
+#define BOXDRAW_DOWN_RIGHT_DOUBLE 0x2552
+#define BOXDRAW_DOWN_DOUBLE_RIGHT 0x2553
+#define BOXDRAW_DOUBLE_DOWN_RIGHT 0x2554
+#define BOXDRAW_DOWN_LEFT_DOUBLE 0x2555
+#define BOXDRAW_DOWN_DOUBLE_LEFT 0x2556
+#define BOXDRAW_DOUBLE_DOWN_LEFT 0x2557
+#define BOXDRAW_UP_RIGHT_DOUBLE 0x2558
+#define BOXDRAW_UP_DOUBLE_RIGHT 0x2559
+#define BOXDRAW_DOUBLE_UP_RIGHT 0x255a
+#define BOXDRAW_UP_LEFT_DOUBLE 0x255b
+#define BOXDRAW_UP_DOUBLE_LEFT 0x255c
+#define BOXDRAW_DOUBLE_UP_LEFT 0x255d
+#define BOXDRAW_VERTICAL_RIGHT_DOUBLE 0x255e
+#define BOXDRAW_VERTICAL_DOUBLE_RIGHT 0x255f
+#define BOXDRAW_DOUBLE_VERTICAL_RIGHT 0x2560
+#define BOXDRAW_VERTICAL_LEFT_DOUBLE 0x2561
+#define BOXDRAW_VERTICAL_DOUBLE_LEFT 0x2562
+#define BOXDRAW_DOUBLE_VERTICAL_LEFT 0x2563
+#define BOXDRAW_DOWN_HORIZONTAL_DOUBLE 0x2564
+#define BOXDRAW_DOWN_DOUBLE_HORIZONTAL 0x2565
+#define BOXDRAW_DOUBLE_DOWN_HORIZONTAL 0x2566
+#define BOXDRAW_UP_HORIZONTAL_DOUBLE 0x2567
+#define BOXDRAW_UP_DOUBLE_HORIZONTAL 0x2568
+#define BOXDRAW_DOUBLE_UP_HORIZONTAL 0x2569
+#define BOXDRAW_VERTICAL_HORIZONTAL_DOUBLE 0x256a
+#define BOXDRAW_VERTICAL_DOUBLE_HORIZONTAL 0x256b
+#define BOXDRAW_DOUBLE_VERTICAL_HORIZONTAL 0x256c
+
+//
+// EFI Required Block Elements Code Chart
+//
+#define BLOCKELEMENT_FULL_BLOCK 0x2588
+#define BLOCKELEMENT_LIGHT_SHADE 0x2591
+
+//
+// EFI Required Geometric Shapes Code Chart
+//
+#define GEOMETRICSHAPE_UP_TRIANGLE 0x25b2
+#define GEOMETRICSHAPE_RIGHT_TRIANGLE 0x25ba
+#define GEOMETRICSHAPE_DOWN_TRIANGLE 0x25bc
+#define GEOMETRICSHAPE_LEFT_TRIANGLE 0x25c4
+
+//
+// EFI Required Arrow shapes
+//
+#define ARROW_LEFT 0x2190
+#define ARROW_UP 0x2191
+#define ARROW_RIGHT 0x2192
+#define ARROW_DOWN 0x2193
+
+//
+// EFI Console Colours
+//
+#define EFI_BLACK 0x00
+#define EFI_BLUE 0x01
+#define EFI_GREEN 0x02
+#define EFI_CYAN (EFI_BLUE | EFI_GREEN)
+#define EFI_RED 0x04
+#define EFI_MAGENTA (EFI_BLUE | EFI_RED)
+#define EFI_BROWN (EFI_GREEN | EFI_RED)
+#define EFI_LIGHTGRAY (EFI_BLUE | EFI_GREEN | EFI_RED)
+#define EFI_BRIGHT 0x08
+#define EFI_DARKGRAY (EFI_BRIGHT)
+#define EFI_LIGHTBLUE (EFI_BLUE | EFI_BRIGHT)
+#define EFI_LIGHTGREEN (EFI_GREEN | EFI_BRIGHT)
+#define EFI_LIGHTCYAN (EFI_CYAN | EFI_BRIGHT)
+#define EFI_LIGHTRED (EFI_RED | EFI_BRIGHT)
+#define EFI_LIGHTMAGENTA (EFI_MAGENTA | EFI_BRIGHT)
+#define EFI_YELLOW (EFI_BROWN | EFI_BRIGHT)
+#define EFI_WHITE (EFI_BLUE | EFI_GREEN | EFI_RED | EFI_BRIGHT)
+
+#define EFI_TEXT_ATTR(f, b) ((f) | ((b) << 4))
+
+#define EFI_BACKGROUND_BLACK 0x00
+#define EFI_BACKGROUND_BLUE 0x10
+#define EFI_BACKGROUND_GREEN 0x20
+#define EFI_BACKGROUND_CYAN (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN)
+#define EFI_BACKGROUND_RED 0x40
+#define EFI_BACKGROUND_MAGENTA (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_RED)
+#define EFI_BACKGROUND_BROWN (EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED)
+#define EFI_BACKGROUND_LIGHTGRAY (EFI_BACKGROUND_BLUE | EFI_BACKGROUND_GREEN | EFI_BACKGROUND_RED)
+
+//
+// We currently define attributes from 0 - 7F for color manipulations
+// To internally handle the local display characteristics for a particular character, we are defining
+// Bit 7 to signify the local glyph representation for a character. If turned on, glyphs will be
+// pulled from the wide glyph database and will display locally as a wide character (16 X 19 versus 8 X 19)
+// If bit 7 is off, the narrow glyph database will be used. This does NOT affect information that is sent to
+// non-local displays (e.g. serial or LAN consoles).
+//
+#define EFI_WIDE_ATTRIBUTE 0x80
+
+/**
+ Reset the text output device hardware and optionaly run diagnostics
+
+ @param This Protocol instance pointer.
+ @param ExtendedVerification Driver may perform more exhaustive verfication
+ operation of the device during reset.
+
+ @retval EFI_SUCCESS The text output device was reset.
+ @retval EFI_DEVICE_ERROR The text output device is not functioning correctly and
+ could not be reset.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_RESET) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ )
+;
+
+/**
+ Write a Unicode string to the output device.
+
+ @param This Protocol instance pointer.
+ @param String The NULL-terminated Unicode string to be displayed on the output
+ device(s). All output devices must also support the Unicode
+ drawing defined in this file.
+
+ @retval EFI_SUCCESS The string was output to the device.
+ @retval EFI_DEVICE_ERROR The device reported an error while attempting to output
+ the text.
+ @retval EFI_UNSUPPORTED The output device's mode is not currently in a
+ defined text mode.
+ @retval EFI_WARN_UNKNOWN_GLYPH This warning code indicates that some of the
+ characters in the Unicode string could not be
+ rendered and were skipped.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_STRING) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN CHAR16 *String
+ )
+;
+
+/**
+ Verifies that all characters in a Unicode string can be output to the
+ target device.
+
+ @param This Protocol instance pointer.
+ @param String The NULL-terminated Unicode string to be examined for the output
+ device(s).
+
+ @retval EFI_SUCCESS The device(s) are capable of rendering the output string.
+ @retval EFI_UNSUPPORTED Some of the characters in the Unicode string cannot be
+ rendered by one or more of the output devices mapped
+ by the EFI handle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_TEST_STRING) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN CHAR16 *String
+ )
+;
+
+/**
+ Returns information for an available text mode that the output device(s)
+ supports.
+
+ @param This Protocol instance pointer.
+ @param ModeNumber The mode number to return information on.
+ @param Columns Returns the geometry of the text output device for the
+ requested ModeNumber.
+ @param Rows Returns the geometry of the text output device for the
+ requested ModeNumber.
+
+ @retval EFI_SUCCESS The requested mode information was returned.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED The mode number was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_QUERY_MODE) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN UINTN ModeNumber,
+ OUT UINTN *Columns,
+ OUT UINTN *Rows
+ )
+;
+
+/**
+ Sets the output device(s) to a specified mode.
+
+ @param This Protocol instance pointer.
+ @param ModeNumber The mode number to set.
+
+ @retval EFI_SUCCESS The requested text mode was set.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED The mode number was not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_SET_MODE) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN UINTN ModeNumber
+ )
+;
+
+/**
+ Sets the background and foreground colors for the OutputString () and
+ ClearScreen () functions.
+
+ @param This Protocol instance pointer.
+ @param Attribute The attribute to set. Bits 0..3 are the foreground color, and
+ bits 4..6 are the background color. All other bits are undefined
+ and must be zero. The valid Attributes are defined in this file.
+
+ @retval EFI_SUCCESS The attribute was set.
+ @retval EFI_DEVICE_ ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED The attribute requested is not defined.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_SET_ATTRIBUTE) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN UINTN Attribute
+ )
+;
+
+/**
+ Clears the output device(s) display to the currently selected background
+ color.
+
+ @param This Protocol instance pointer.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED The output device is not in a valid text mode.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_CLEAR_SCREEN) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This
+ )
+;
+
+/**
+ Sets the current coordinates of the cursor position
+
+ @param This Protocol instance pointer.
+ @param Column The position to set the cursor to. Must be greater than or
+ equal to zero and less than the number of columns and rows
+ by QueryMode ().
+ @param Row The position to set the cursor to. Must be greater than or
+ equal to zero and less than the number of columns and rows
+ by QueryMode ().
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the request.
+ @retval EFI_UNSUPPORTED The output device is not in a valid text mode, or the
+ cursor position is invalid for the current mode.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_SET_CURSOR_POSITION) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN UINTN Column,
+ IN UINTN Row
+ )
+;
+
+/**
+ Makes the cursor visible or invisible
+
+ @param This Protocol instance pointer.
+ @param Visible If TRUE, the cursor is set to be visible. If FALSE, the cursor is
+ set to be invisible.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_DEVICE_ERROR The device had an error and could not complete the
+ request, or the device does not support changing
+ the cursor mode.
+ @retval EFI_UNSUPPORTED The output device is not in a valid text mode.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TEXT_ENABLE_CURSOR) (
+ IN EFI_SIMPLE_TEXT_OUT_PROTOCOL *This,
+ IN BOOLEAN Visible
+ )
+;
+
+/**
+ Mode Structure pointed to by Simple Text Out protocol.
+
+ MaxMode - The number of modes supported by QueryMode () and SetMode ().
+ Mode - The text mode of the output device(s).
+ Attribute - The current character output attribute
+ CursorColumn - The cursor's column.
+ CursorRow - The cursor's row.
+ CursorVisible - The cursor is currently visbile or not.
+
+**/
+typedef struct {
+ INT32 MaxMode;
+
+ //
+ // current settings
+ //
+ INT32 Mode;
+ INT32 Attribute;
+ INT32 CursorColumn;
+ INT32 CursorRow;
+ BOOLEAN CursorVisible;
+} EFI_SIMPLE_TEXT_OUTPUT_MODE;
+
+struct _EFI_SIMPLE_TEXT_OUT_PROTOCOL {
+ EFI_TEXT_RESET Reset;
+
+ EFI_TEXT_STRING OutputString;
+ EFI_TEXT_TEST_STRING TestString;
+
+ EFI_TEXT_QUERY_MODE QueryMode;
+ EFI_TEXT_SET_MODE SetMode;
+ EFI_TEXT_SET_ATTRIBUTE SetAttribute;
+
+ EFI_TEXT_CLEAR_SCREEN ClearScreen;
+ EFI_TEXT_SET_CURSOR_POSITION SetCursorPosition;
+ EFI_TEXT_ENABLE_CURSOR EnableCursor;
+
+ //
+ // Current mode
+ //
+ EFI_SIMPLE_TEXT_OUTPUT_MODE *Mode;
+};
+
+extern EFI_GUID gEfiSimpleTextOutProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Smbus.h b/MdePkg/Include/Protocol/Smbus.h new file mode 100644 index 0000000000..8fe37b17d3 --- /dev/null +++ b/MdePkg/Include/Protocol/Smbus.h @@ -0,0 +1,237 @@ +/** @file
+ This file declares the EFI SMBus Host Controller protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Smbus.h
+
+ @par Revision Reference:
+ This protocol is defined in Framework of EFI SMBus Host Controller Specification
+ Version 0.9
+
+**/
+
+#ifndef _EFI_SMBUS_H
+#define _EFI_SMBUS_H
+
+#define EFI_SMBUS_HC_PROTOCOL_GUID \
+ { \
+ 0xe49d33ed, 0x513d, 0x4634, {0xb6, 0x98, 0x6f, 0x55, 0xaa, 0x75, 0x1c, 0x1b } \
+ }
+
+typedef struct _EFI_SMBUS_HC_PROTOCOL EFI_SMBUS_HC_PROTOCOL;
+
+/**
+ Executes an SMBus operation to an SMBus controller.
+
+ @param This A pointer to the EFI_SMBUS_HC_PROTOCOL instance.
+
+ @param SlaveAddress The SMBus slave address of the device with which to communicate.
+
+ @param Command This command is transmitted by the SMBus host
+ controller to the SMBus slave device and the interpretation is
+ SMBus slave device specific.
+
+ @param Operation Signifies which particular SMBus hardware protocol
+ instance that it will use to execute the SMBus transactions.
+
+ @param PecCheck Defines if Packet Error Code (PEC) checking is required
+ for this operation.
+
+ @param Length Signifies the number of bytes that this operation will do.
+
+ @param Buffer Contains the value of data to execute to the SMBus slave device.
+
+ @retval EFI_SUCCESS The last data that was returned from the access
+ matched the poll exit criteria.
+
+ @retval EFI_CRC_ERROR The checksum is not correct (PEC is incorrect)
+
+ @retval EFI_TIMEOUT Timeout expired before the operation was completed.
+ Timeout is determined by the SMBus host controller device.
+
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+
+ @retval EFI_DEVICE_ERROR The request was not completed because
+ a failure reflected in the Host Status Register bit.
+
+ @retval EFI_INVALID_PARAMETER Operation is not defined in EFI_SMBUS_OPERATION.
+ Or Length/Buffer is NULL for operations except for EfiSmbusQuickRead and
+ EfiSmbusQuickWrite. Length is outside the range of valid values.
+
+ @retval EFI_UNSUPPORTED The SMBus operation or PEC is not supported.
+
+ @retval EFI_BUFFER_TOO_SMALL Buffer is not sufficient for this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMBUS_HC_EXECUTE_OPERATION) (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN EFI_SMBUS_DEVICE_COMMAND Command,
+ IN EFI_SMBUS_OPERATION Operation,
+ IN BOOLEAN PecCheck,
+ IN OUT UINTN *Length,
+ IN OUT VOID *Buffer
+ );
+
+typedef struct {
+ UINT32 VendorSpecificId;
+ UINT16 SubsystemDeviceId;
+ UINT16 SubsystemVendorId;
+ UINT16 Interface;
+ UINT16 DeviceId;
+ UINT16 VendorId;
+ UINT8 VendorRevision;
+ UINT8 DeviceCapabilities;
+} EFI_SMBUS_UDID;
+
+/**
+ CallBack function can be registered in EFI_SMBUS_HC_PROTOCOL_NOTIFY.
+
+ @param SlaveAddress The SMBUS hardware address to which the SMBUS
+ device is preassigned or allocated.
+
+ @param Data Data of the SMBus host notify command that
+ the caller wants to be called.
+
+ @return Status Code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMBUS_NOTIFY_FUNCTION) (
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data
+ );
+
+/**
+ Sets the SMBus slave device addresses for the device with a given unique ID
+ or enumerates the entire bus.
+
+ @param This A pointer to the EFI_SMBUS_HC_PROTOCOL instance.
+
+ @param ArpAll A Boolean expression that indicates if the host drivers need
+ to enumerate all the devices or enumerate only the device that is identified
+ by SmbusUdid. If ArpAll is TRUE, SmbusUdid and SlaveAddress are optional.
+ If ArpAll is FALSE, ArpDevice will enumerate SmbusUdid and the address
+ will be at SlaveAddress.
+
+ @param SmbusUdid The Unique Device Identifier (UDID) that is associated
+ with this device.
+
+ @param SlaveAddress The SMBus slave address that is associated with an SMBus UDID.
+
+ @retval EFI_SUCCESS The SMBus slave device address was set.
+
+ @retval EFI_INVALID_PARAMETER SlaveAddress is NULL.
+
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed
+ due to a lack of resources.
+
+ @retval EFI_TIMEOUT The SMBus slave device did not respond.
+
+ @retval EFI_DEVICE_ERROR The request was not completed because the transaction failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMBUS_HC_PROTOCOL_ARP_DEVICE) (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN BOOLEAN ArpAll,
+ IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL
+ IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL
+ );
+
+typedef struct {
+ EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;
+ EFI_SMBUS_UDID SmbusDeviceUdid;
+} EFI_SMBUS_DEVICE_MAP;
+
+/**
+ The GetArpMap() function returns the mapping of all the SMBus devices
+ that are enumerated by the SMBus host driver.
+
+ @param This A pointer to the EFI_SMBUS_HC_PROTOCOL instance.
+
+ @param Length Size of the buffer that contains the SMBus device map.
+
+ @param SmbusDeviceMap The pointer to the device map as enumerated
+ by the SMBus controller driver.
+
+ @retval EFI_SUCCESS The device map was returned correctly in the buffer.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMBUS_HC_PROTOCOL_GET_ARP_MAP) (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN OUT UINTN *Length,
+ IN OUT EFI_SMBUS_DEVICE_MAP **SmbusDeviceMap
+ );
+
+/**
+ The Notify() function registers all the callback functions to allow the
+ bus driver to call these functions when the SlaveAddress/Data pair happens.
+
+ @param This A pointer to the EFI_SMBUS_HC_PROTOCOL instance.
+
+ @param SlaveAddress Address that the host controller detects as
+ sending a message and calls all the registered functions.
+
+ @param Data Data that the host controller detects as sending a message
+ and calls all the registered functions.
+
+ @param NotifyFunction The function to call when the bus driver
+ detects the SlaveAddress and Data pair.
+
+ @retval EFI_SUCCESS NotifyFunction was registered.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMBUS_HC_PROTOCOL_NOTIFY) (
+ IN EFI_SMBUS_HC_PROTOCOL *This,
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,
+ IN UINTN Data,
+ IN EFI_SMBUS_NOTIFY_FUNCTION NotifyFunction
+ );
+
+/**
+ @par Protocol Description:
+ Provides basic SMBus host controller management and basic data
+ transactions over the SMBus.
+
+ @param Execute
+ Executes the SMBus operation to an SMBus slave device.
+
+ @param ArpDevice
+ Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP)
+
+ @param GetArpMap
+ Allows a driver to retrieve the address that was allocated by the SMBus
+ host controller during enumeration/ARP.
+
+ @param Notify
+ Allows a driver to register for a callback to the SMBus host
+ controller driver when the bus issues a notification to the bus controller driver.
+
+**/
+struct _EFI_SMBUS_HC_PROTOCOL {
+ EFI_SMBUS_HC_EXECUTE_OPERATION Execute;
+ EFI_SMBUS_HC_PROTOCOL_ARP_DEVICE ArpDevice;
+ EFI_SMBUS_HC_PROTOCOL_GET_ARP_MAP GetArpMap;
+ EFI_SMBUS_HC_PROTOCOL_NOTIFY Notify;
+};
+
+extern EFI_GUID gEfiSmbusProtocolGuid;
+#endif
diff --git a/MdePkg/Include/Protocol/SmmAccess.h b/MdePkg/Include/Protocol/SmmAccess.h new file mode 100644 index 0000000000..f405c8f13f --- /dev/null +++ b/MdePkg/Include/Protocol/SmmAccess.h @@ -0,0 +1,172 @@ +/** @file
+ This file declares SMM SMRAM Access abstraction protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmAccess.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+**/
+
+#ifndef _SMM_ACCESS_H_
+#define _SMM_ACCESS_H_
+
+typedef struct _EFI_SMM_ACCESS_PROTOCOL EFI_SMM_ACCESS_PROTOCOL;
+
+#define EFI_SMM_ACCESS_PROTOCOL_GUID \
+ { \
+ 0x3792095a, 0xe309, 0x4c1e, {0xaa, 0x01, 0x85, 0xf5, 0x65, 0x5a, 0x17, 0xf1 } \
+ }
+
+//
+// SMM Access specification constant and types
+//
+// *******************************************************
+// EFI_SMRAM_STATE
+// *******************************************************
+//
+#define EFI_SMRAM_OPEN 0x00000001
+#define EFI_SMRAM_CLOSED 0x00000002
+#define EFI_SMRAM_LOCKED 0x00000004
+#define EFI_CACHEABLE 0x00000008
+#define EFI_ALLOCATED 0x00000010
+
+//
+// SMM Access specification Member Function
+//
+/**
+ Opens the SMRAM area to be accessible by a boot-service driver.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_OPEN) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CLOSE) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Inhibits access to the SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+
+ @param DescriptorIndex Indicates that the driver wishes to open
+ the memory tagged by this index.
+
+ @retval EFI_SUCCESS The operation was successful.
+
+ @retval EFI_DEVICE_ERROR The given DescriptorIndex is not open.
+
+ @retval EFI_INVALID_PARAMETER The given DescriptorIndex is not supported.
+
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_LOCK) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ UINTN DescriptorIndex
+ );
+
+/**
+ Queries the memory controller for the possible regions that will support SMRAM.
+
+ @param This The EFI_SMM_ACCESS_PROTOCOL instance.
+
+ @param SmramMapSize A pointer to the size, in bytes, of the SmramMemoryMap buffer.
+
+ @param SmramMap A pointer to the buffer in which firmware places the current memory map.
+
+ @retval EFI_SUCCESS The chipset supported the given resource.
+
+ @retval EFI_BUFFER_TOO_SMALL The SmramMap parameter was too small.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CAPABILITIES) (
+ IN EFI_SMM_ACCESS_PROTOCOL *This,
+ IN OUT UINTN *SmramMapSize,
+ IN OUT EFI_SMRAM_DESCRIPTOR *SmramMap
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used to control the visibility of the SMRAM on the platform.
+
+ @param Open
+ Opens the SMRAM.
+
+ @param Close
+ Closes the SMRAM.
+
+ @param Lock
+ Locks the SMRAM.
+
+ @param GetCapabilities
+ Gets information on possible SMRAM regions.
+
+ @param LockState
+Indicates the current state of the SMRAM. Set to TRUE if any region is locked.
+
+ @param OpenState
+Indicates the current state of the SMRAM. Set to TRUE if any region is open.
+
+**/
+struct _EFI_SMM_ACCESS_PROTOCOL {
+ EFI_SMM_OPEN Open;
+ EFI_SMM_CLOSE Close;
+ EFI_SMM_LOCK Lock;
+ EFI_SMM_CAPABILITIES GetCapabilities;
+ BOOLEAN LockState;
+ BOOLEAN OpenState;
+};
+
+extern EFI_GUID gEfiSmmAccessProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmBase.h b/MdePkg/Include/Protocol/SmmBase.h new file mode 100644 index 0000000000..6dd3a5dd57 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmBase.h @@ -0,0 +1,310 @@ +/** @file
+ This file declares SMM Base abstraction protocol.
+ This is the base level of compatiblity for SMM drivers.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmBase.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_BASE_H_
+#define _SMM_BASE_H_
+
+#define EFI_SMM_BASE_PROTOCOL_GUID \
+ { \
+ 0x1390954D, 0xda95, 0x4227, {0x93, 0x28, 0x72, 0x82, 0xc2, 0x17, 0xda, 0xa8 } \
+ }
+
+typedef struct _EFI_SMM_BASE_PROTOCOL EFI_SMM_BASE_PROTOCOL;
+
+//
+// SMM Handler Definition
+//
+#define EFI_HANDLER_SUCCESS 0x0000
+#define EFI_HANDLER_CRITICAL_EXIT 0x0001
+#define EFI_HANDLER_SOURCE_QUIESCED 0x0002
+#define EFI_HANDLER_SOURCE_PENDING 0x0003
+
+/**
+ Entry Point to Callback service
+
+ @param SmmImageHandle A handle allocated by the SMM infrastructure code
+ to uniquely designate a specific DXE SMM driver.
+
+ @param CommunicationBuffer A pointer to a collection of data in memory
+ that will be conveyed from a non-SMM environment into an SMM environment.
+ The buffer must be contiguous, physically mapped, and be a physical address.
+
+ @param SourceSize The size of the CommunicationBuffer.
+
+ @return Status code
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_ENTRY_POINT) (
+ IN EFI_HANDLE SmmImageHandle,
+ IN OUT VOID *CommunicationBuffer OPTIONAL,
+ IN OUT UINTN *SourceSize OPTIONAL
+ );
+
+//
+// SMM Base Protocol Definition
+//
+/**
+ Register a given driver into SMRAM.This is the equivalent of performing
+ the LoadImage/StartImage into System Management Mode.
+
+ @param This Protocol instance pointer.
+ @param FilePath Location of the image to be installed as the handler.
+ @param SourceBuffer Optional source buffer in case of the image file
+ being in memory.
+ @param SourceSize Size of the source image file, if in memory.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+ @param LegacyIA32Binary The binary image to load is legacy 16 bit code.
+
+ @retval EFI_SUCCESS The operation was successful.
+ @retval EFI_OUT_OF_RESOURCES There were no additional SMRAM resources to load the handler
+ @retval EFI_UNSUPPORTED This platform does not support 16-bit handlers.
+ @retval EFI_UNSUPPORTED In runtime.
+ @retval EFI_INVALID_PARAMETER The handlers was not the correct image type
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_REGISTER_HANDLER) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN VOID *SourceBuffer OPTIONAL,
+ IN UINTN SourceSize,
+ OUT EFI_HANDLE *ImageHandle,
+ IN BOOLEAN LegacyIA32Binary OPTIONAL
+ )
+;
+
+/**
+ Remove a given driver SMRAM. This is the equivalent of performing
+ the UnloadImage System Management Mode.
+
+ @param This Protocol instance pointer.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_INVALID_PARAMETER The handler did not exist
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_UNREGISTER_HANDLER) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle
+ )
+;
+
+/**
+ The SMM Inter-module Communicate Service Communicate() function
+ provides a services to send/received messages from a registered
+ EFI service. The BASE protocol driver is responsible for doing
+ any of the copies such that the data lives in boot-service accessible RAM.
+
+ @param This Protocol instance pointer.
+ @param ImageHandle Pointer to the handle that reflects the driver
+ loaded into SMM.
+ @param CommunicationBuffer Pointer to the buffer to convey into SMRAM.
+ @param SourceSize Size of the contents of buffer..
+
+ @retval EFI_SUCCESS The message was successfully posted
+ @retval EFI_INVALID_PARAMETER The buffer was NULL
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_COMMUNICATE) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE ImageHandle,
+ IN OUT VOID *CommunicationBuffer,
+ IN OUT UINTN *SourceSize
+ )
+;
+
+/**
+ Register a callback to execute within SMM.
+ This allows receipt of messages created with the Boot Service COMMUNICATE.
+
+ @param This Protocol instance pointer.
+ @param CallbackAddress Address of the callback service
+ @param MakeFirst If present, will stipulate that the handler is posted
+ to be the first module executed in the dispatch table.
+ @param MakeLast If present, will stipulate that the handler is posted
+ to be last executed in the dispatch table.
+ @param FloatingPointSave This is an optional parameter which informs the
+ EFI_SMM_ACCESS_PROTOCOL Driver core if it needs to save
+ the floating point register state. If any of the handlers
+ require this, then the state will be saved for all of the handlers.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_OUT_OF_RESOURCES Not enough space in the dispatch queue
+ @retval EFI_UNSUPPORTED In runtime.
+ @retval EFI_UNSUPPORTED Not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_CALLBACK_SERVICE) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_HANDLE SmmImageHandle,
+ IN EFI_SMM_CALLBACK_ENTRY_POINT CallbackAddress,
+ IN BOOLEAN MakeLast OPTIONAL,
+ IN BOOLEAN FloatingPointSave OPTIONAL
+ )
+;
+
+/**
+ The SmmAllocatePool() function allocates a memory region of Size bytes from memory of
+ type PoolType and returns the address of the allocated memory in the location referenced
+ by Buffer. This function allocates pages from EFI SMRAM Memory as needed to grow the
+ requested pool type. All allocations are eight-byte aligned.
+
+ @param This Protocol instance pointer.
+ @param PoolType The type of pool to allocate.
+ The only supported type is EfiRuntimeServicesData;
+ the interface will internally map this runtime request to SMRAM.
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the call
+ succeeds; undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_INVALID_PARAMETER PoolType was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ALLOCATE_POOL) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ )
+;
+
+/**
+ The SmmFreePool() function returns the memory specified by Buffer to the system.
+ On return, the memory's type is EFI SMRAM Memory. The Buffer that is freed must
+ have been allocated by SmmAllocatePool().
+
+ @param This Protocol instance pointer.
+ @param Buffer Pointer to the buffer allocation.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+ @retval EFI_UNSUPPORTED In runtime.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_FREE_POOL) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN VOID *Buffer
+ )
+;
+
+/**
+ This routine tells caller if execution context is SMM or not.
+
+ @param This Protocol instance pointer.
+ @param InSmm Whether the caller is inside SMM for IA-32 or servicing a PMI for the Itanium processor family.
+
+ @retval EFI_SUCCESS The operation was successful
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_INSIDE_OUT) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ OUT BOOLEAN *InSmm
+ )
+;
+
+/**
+ The GetSmstLocation() function returns the locatin of the System Management
+ Service Table. The use of the API is such that a driver can discover the
+ location of the SMST in its entry point and then cache it in some driver
+ global variable so that the SMST can be invoked in subsequent callbacks.
+
+ @param This Protocol instance pointer.
+ @param Smst Pointer to the SMST.
+
+ @retval EFI_SUCCESS The operation was successful
+ @retval EFI_INVALID_PARAMETER Smst was invalid.
+ @retval EFI_UNSUPPORTED Not in SMM.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_SMST_LOCATION) (
+ IN EFI_SMM_BASE_PROTOCOL *This,
+ IN OUT EFI_SMM_SYSTEM_TABLE **Smst
+ )
+;
+
+/**
+ @par Protocol Description:
+ This protocol is used to install SMM handlers for support of subsequent SMI/PMI
+ activations. This protocol is available on both IA-32 and Itanium-based systems.
+
+ @param Register
+ Registers a handler to run in System Management RAM (SMRAM).
+
+ @param UnRegister
+ Removes a handler from execution in SMRAM.
+
+ @param Communicate
+ Sends/receives a message for a registered handler.
+
+ @param RegisterCallback
+ Registers a callback from the constructor.
+
+ @param InSmm
+ Detects whether the caller is inside or outside of SMM. SName
+
+ @param SmmAllocatePool
+ Allocates SMRAM.
+
+ @param SmmFreePool
+ Deallocates SMRAM.
+
+ @param GetSmstLocation
+ Retrieves the location of the System Management System Table (SMST).
+
+**/
+struct _EFI_SMM_BASE_PROTOCOL {
+ EFI_SMM_REGISTER_HANDLER Register;
+ EFI_SMM_UNREGISTER_HANDLER UnRegister;
+ EFI_SMM_COMMUNICATE Communicate;
+ EFI_SMM_CALLBACK_SERVICE RegisterCallback;
+ EFI_SMM_INSIDE_OUT InSmm;
+ EFI_SMM_ALLOCATE_POOL SmmAllocatePool;
+ EFI_SMM_FREE_POOL SmmFreePool;
+ EFI_SMM_GET_SMST_LOCATION GetSmstLocation;
+};
+
+extern EFI_GUID gEfiSmmBaseProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmControl.h b/MdePkg/Include/Protocol/SmmControl.h new file mode 100644 index 0000000000..3bcd0f772e --- /dev/null +++ b/MdePkg/Include/Protocol/SmmControl.h @@ -0,0 +1,139 @@ +/** @file
+ This file declares SMM Control abstraction protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmControl.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _SMM_CONTROL_H_
+#define _SMM_CONTROL_H_
+
+typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;
+
+#define EFI_SMM_CONTROL_PROTOCOL_GUID \
+ { \
+ 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \
+ }
+
+// SMM Access specification Data Structures
+//
+typedef struct {
+ UINT8 SmiTriggerRegister;
+ UINT8 SmiDataRegister;
+} EFI_SMM_CONTROL_REGISTER;
+
+//
+// SMM Control specification member function
+//
+/**
+ Invokes SMI activation from either the preboot or runtime environment.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+
+ @param ArgumentBuffer Optional sized data to pass into the protocol activation.
+
+ @param ArgumentBufferSize Optional size of the data.
+
+ @param Periodic Optional mechanism to engender a periodic stream.
+
+ @param ActivationInterval Optional parameter to repeat at this period one
+ time or, if the Periodic Boolean is set, periodically.
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+
+ @retval EFI_DEVICE_ERROR The timing is unsupported.
+
+ @retval EFI_INVALID_PARAMETER The activation period is unsupported.
+
+ @retval EFI_NOT_STARTED The SMM base service has not been initialized.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ACTIVATE) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT INT8 *ArgumentBuffer OPTIONAL,
+ IN OUT UINTN *ArgumentBufferSize OPTIONAL,
+ IN BOOLEAN Periodic OPTIONAL,
+ IN UINTN ActivationInterval OPTIONAL
+ );
+
+/**
+ Clears any system state that was created in response to the Active call.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+
+ @param Periodic Optional parameter to repeat at this period one time
+
+ @retval EFI_SUCCESS The SMI/PMI has been engendered.
+
+ @retval EFI_DEVICE_ERROR The source could not be cleared.
+
+ @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_DEACTIVATE) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN BOOLEAN Periodic OPTIONAL
+ );
+
+/**
+ Provides information on the source register used to generate the SMI.
+
+ @param This The EFI_SMM_CONTROL_PROTOCOL instance.
+
+ @param SmiRegister Pointer to the SMI register description structure
+
+ @retval EFI_SUCCESS The register structure has been returned.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GET_REGISTER_INFO) (
+ IN EFI_SMM_CONTROL_PROTOCOL *This,
+ IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister
+ );
+
+/**
+ @par Protocol Description:
+ This protocol is used initiate SMI/PMI activations.
+
+ @param Trigger
+ Initiates the SMI/PMI activation.
+
+ @param Clear
+ Quiesces the SMI/PMI activation.
+
+ @param GetRegisterInfo
+ Provides data on the register used as the source of the SMI.
+
+ @param MinimumTriggerPeriod
+ Minimum interval at which the platform can set the period.
+
+**/
+
+struct _EFI_SMM_CONTROL_PROTOCOL {
+ EFI_SMM_ACTIVATE Trigger;
+ EFI_SMM_DEACTIVATE Clear;
+ EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;
+ UINTN MinimumTriggerPeriod;
+};
+
+extern EFI_GUID gEfiSmmControlProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmGpiDispatch.h b/MdePkg/Include/Protocol/SmmGpiDispatch.h new file mode 100644 index 0000000000..b472e92c5a --- /dev/null +++ b/MdePkg/Include/Protocol/SmmGpiDispatch.h @@ -0,0 +1,150 @@ +/** @file
+ This file declares Smm Gpi Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmGpiDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_GPI_DISPATCH_H_
+#define _EFI_SMM_GPI_DISPATCH_H_
+
+//
+// Global ID for the GPI SMI Protocol
+//
+#define EFI_SMM_GPI_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe0744b81, 0x9513, 0x49cd, {0x8c, 0xea, 0xe9, 0x24, 0x5e, 0x70, 0x39, 0xda } \
+ }
+
+typedef struct _EFI_SMM_GPI_DISPATCH_PROTOCOL EFI_SMM_GPI_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// GpiMask is a bit mask of 32 possible general purpose inputs that can generate a
+// a SMI. Bit 0 corresponds to logical GPI[0], 1 corresponds to logical GPI[1], etc.
+//
+// The logical GPI index to physical pin on device is described by the GPI device name
+// found on the same handle as the GpiSmi child dispatch protocol. The GPI device name
+// is defined as protocol with a GUID name and NULL protocol pointer.
+//
+typedef struct {
+ UINTN GpiNum;
+} EFI_SMM_GPI_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a GPI SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return None
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_GPI_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the GPI(s) for which the dispatch function
+ should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The GPI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_REGISTER) (
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_GPI_DISPATCH DispatchFunction,
+ IN EFI_SMM_GPI_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_GPI_UNREGISTER) (
+ IN EFI_SMM_GPI_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM GPI SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the General Purpose Input
+ (GPI) SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param NumSupportedGpis
+ Denotes the maximum value of inputs that can have handlers attached.
+
+**/
+struct _EFI_SMM_GPI_DISPATCH_PROTOCOL {
+ EFI_SMM_GPI_REGISTER Register;
+ EFI_SMM_GPI_UNREGISTER UnRegister;
+ UINTN NumSupportedGpis;
+};
+
+extern EFI_GUID gEfiSmmGpiDispatchProtocolGuid;
+
+#endif
+
diff --git a/MdePkg/Include/Protocol/SmmIchnDispatch.h b/MdePkg/Include/Protocol/SmmIchnDispatch.h new file mode 100644 index 0000000000..8829f85489 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmIchnDispatch.h @@ -0,0 +1,193 @@ +/** @file
+ This file declares EFI Smm ICH [N] Specific Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmIchnDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_ICHN_DISPATCH_H_
+#define _EFI_SMM_ICHN_DISPATCH_H_
+
+//
+// Global ID for the ICH SMI Protocol
+//
+#define EFI_SMM_ICHN_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xc50b323e, 0x9075, 0x4f2a, {0xac, 0x8e, 0xd2, 0x59, 0x6a, 0x10, 0x85, 0xcc } \
+ }
+
+typedef struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL EFI_SMM_ICHN_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// ICHN Specific SMIs. These are miscellaneous SMI sources that are supported by the
+// ICHN specific SMI implementation. These may change over time. TrapNumber is only
+// valid if the Type is Trap.
+//
+typedef enum {
+ //
+ // NOTE: NEVER delete items from this list/enumeration! Doing so will prevent other versions
+ // of the code from compiling. If the ICH version your driver is written for doesn't support
+ // some of these SMIs, then simply return EFI_UNSUPPORTED when a child/client tries to register
+ // for them.
+ //
+ IchnMch,
+ IchnPme,
+ IchnRtcAlarm,
+ IchnRingIndicate,
+ IchnAc97Wake,
+ IchnSerialIrq,
+ IchnY2KRollover,
+ IchnTcoTimeout,
+ IchnOsTco,
+ IchnNmi,
+ IchnIntruderDetect,
+ IchnBiosWp,
+ IchnMcSmi,
+ IchnPmeB0,
+ IchnThrmSts,
+ IchnSmBus,
+ IchnIntelUsb2,
+ IchnMonSmi7,
+ IchnMonSmi6,
+ IchnMonSmi5,
+ IchnMonSmi4,
+ IchnDevTrap13,
+ IchnDevTrap12,
+ IchnDevTrap11,
+ IchnDevTrap10,
+ IchnDevTrap9,
+ IchnDevTrap8,
+ IchnDevTrap7,
+ IchnDevTrap6,
+ IchnDevTrap5,
+ IchnDevTrap3,
+ IchnDevTrap2,
+ IchnDevTrap1,
+ IchnDevTrap0,
+ IchnIoTrap3,
+ IchnIoTrap2,
+ IchnIoTrap1,
+ IchnIoTrap0,
+ //
+ // INSERT NEW ITEMS JUST BEFORE THIS LINE
+ //
+ NUM_ICHN_TYPES // the number of items in this enumeration
+} EFI_SMM_ICHN_SMI_TYPE;
+
+typedef struct {
+ EFI_SMM_ICHN_SMI_TYPE Type;
+} EFI_SMM_ICHN_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a ICH n specific SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_ICHN_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the ICHN SMI source for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The ICHN input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_REGISTER) (
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_ICHN_DISPATCH DispatchFunction,
+ IN EFI_SMM_ICHN_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_ICHN_UNREGISTER) (
+ IN EFI_SMM_ICHN_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Ich n specific SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_ICHN_DISPATCH_PROTOCOL {
+ EFI_SMM_ICHN_REGISTER Register;
+ EFI_SMM_ICHN_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmIchnDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmPeriodicTimerDispatch.h b/MdePkg/Include/Protocol/SmmPeriodicTimerDispatch.h new file mode 100644 index 0000000000..c94843fcca --- /dev/null +++ b/MdePkg/Include/Protocol/SmmPeriodicTimerDispatch.h @@ -0,0 +1,194 @@ +/** @file
+ This file declares EFI Smm Periodic Timer Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmPeriodicTimerDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+#define _EFI_SMM_PERIODIC_TIMER_DISPATCH_H_
+
+//
+// Global ID for the Periodic Timer SMI Protocol
+//
+#define EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x9cca03fc, 0x4c9e, 0x4a19, {0x9b, 0x6, 0xed, 0x7b, 0x47, 0x9b, 0xde, 0x55 } \
+ }
+
+typedef struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Period is the minimum period of time in 100 nanosecond units that child gets called.
+// The child will be called back after a time greater than the time Period.
+//
+// SmiTickInterval is the period of time interval between SMIs. Children of this interface
+// should use this field when registering for periodic timer intervals when a finer
+// granularity periodic SMI is desired. Valid values for this field are those returned
+// by GetNextInterval. A value of 0 indicates the parent is allowed to use any SMI
+// interval period to satisfy the requested period.
+// Example: A chipset supports periodic SMIs on every 64ms or 2 seconds.
+// A child wishes schedule a period SMI to fire on a period of 3 seconds, there
+// are several ways to approach the problem:
+// 1. The child may accept a 4 second periodic rate, in which case it registers with
+// Period = 40000
+// SmiTickInterval = 20000
+// The resulting SMI will occur every 2 seconds with the child called back on
+// every 2nd SMI.
+// NOTE: the same result would occur if the child set SmiTickInterval = 0.
+// 2. The child may choose the finer granularity SMI (64ms):
+// Period = 30000
+// SmiTickInterval = 640
+// The resulting SMI will occur every 64ms with the child called back on
+// every 47th SMI.
+// NOTE: the child driver should be aware that this will result in more
+// SMIs occuring during system runtime which can negatively impact system
+// performance.
+//
+// ElapsedTime is the actual time in 100 nanosecond units elapsed since last called, a
+// value of 0 indicates an unknown amount of time.
+//
+typedef struct {
+ UINT64 Period;
+ UINT64 SmiTickInterval;
+ UINT64 ElapsedTime;
+} EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Periodic Timer SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Returns the next SMI tick period supported by the chipset. The order
+ returned is from longest to shortest interval period.
+
+ @param This Protocol instance pointer.
+ @param SmiTickInterval Pointer to pointer of next shorter SMI interval
+ period supported by the child. This parameter works as a get-first,
+ get-next field.The first time this function is called, *SmiTickInterval
+ should be set to NULL to get the longest SMI interval.The returned
+ *SmiTickInterval should be passed in on subsequent calls to get the
+ next shorter interval period until *SmiTickInterval = NULL.
+
+ @retval EFI_SUCCESS The service returned successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_INTERVAL) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN OUT UINT64 **SmiTickInterval
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the period at which the dispatch function
+ should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The period input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_REGISTER) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH DispatchFunction,
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_PERIODIC_TIMER_UNREGISTER) (
+ IN EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Periodic Timer Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the periodical timer SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param GetNextShorterInterval
+ Returns the next SMI tick period that is supported by the chipset.
+
+**/
+struct _EFI_SMM_PERIODIC_TIMER_DISPATCH_PROTOCOL {
+ EFI_SMM_PERIODIC_TIMER_REGISTER Register;
+ EFI_SMM_PERIODIC_TIMER_UNREGISTER UnRegister;
+ EFI_SMM_PERIODIC_TIMER_INTERVAL GetNextShorterInterval;
+};
+
+extern EFI_GUID gEfiSmmPeriodicTimerDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmPowerButtonDispatch.h b/MdePkg/Include/Protocol/SmmPowerButtonDispatch.h new file mode 100644 index 0000000000..065d85f09e --- /dev/null +++ b/MdePkg/Include/Protocol/SmmPowerButtonDispatch.h @@ -0,0 +1,147 @@ +/** @file
+ This file declares EFI Smm Power Button Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmPowerButtonDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+#define _EFI_SMM_POWER_BUTTON_DISPATCH_H_
+
+//
+// Global ID for the Power Button SMI Protocol
+//
+#define EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xb709efa0, 0x47a6, 0x4b41, {0xb9, 0x31, 0x12, 0xec, 0xe7, 0xa8, 0xee, 0x56 } \
+ }
+
+typedef struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Power Button. Example, Use for changing LEDs before ACPI OS is on.
+// - DXE/BDS Phase
+// - OS Install Phase
+//
+typedef enum {
+ PowerButtonEntry,
+ PowerButtonExit
+} EFI_POWER_BUTTON_PHASE;
+
+typedef struct {
+ EFI_POWER_BUTTON_PHASE Phase;
+} EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Power Button SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_POWER_BUTTON_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the Power Button SMI phase for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Power Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_REGISTER) (
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_POWER_BUTTON_UNREGISTER) (
+ IN EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Power Button SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the SMM power button SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_POWER_BUTTON_DISPATCH_PROTOCOL {
+ EFI_SMM_POWER_BUTTON_REGISTER Register;
+ EFI_SMM_POWER_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmPowerButtonDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmStandbyButtonDispatch.h b/MdePkg/Include/Protocol/SmmStandbyButtonDispatch.h new file mode 100644 index 0000000000..7c52eb1808 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmStandbyButtonDispatch.h @@ -0,0 +1,147 @@ +/** @file
+ This file declares EFI Smm Standby Button Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmStandbyButtonDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+#define _EFI_SMM_STANDBY_BUTTON_DISPATCH_H_
+
+//
+// Global ID for the Standby Button SMI Protocol
+//
+#define EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x78965b98, 0xb0bf, 0x449e, {0x8b, 0x22, 0xd2, 0x91, 0x4e, 0x49, 0x8a, 0x98 } \
+ }
+
+typedef struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// Standby Button. Example, Use for changing LEDs before ACPI OS is on.
+// - DXE/BDS Phase
+// - OS Install Phase
+//
+typedef enum {
+ Entry,
+ Exit
+} EFI_STANDBY_BUTTON_PHASE;
+
+typedef struct {
+ EFI_STANDBY_BUTTON_PHASE Phase;
+} EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Standby Button SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ @return Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the Standby Button SMI phase for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The Standby Button SMI
+ phase is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_REGISTER) (
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH DispatchFunction,
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_STANDBY_BUTTON_UNREGISTER) (
+ IN EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Standby Button SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the standby button SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_STANDBY_BUTTON_DISPATCH_PROTOCOL {
+ EFI_SMM_STANDBY_BUTTON_REGISTER Register;
+ EFI_SMM_STANDBY_BUTTON_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmStandbyButtonDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmStatusCode.h b/MdePkg/Include/Protocol/SmmStatusCode.h new file mode 100644 index 0000000000..660871548b --- /dev/null +++ b/MdePkg/Include/Protocol/SmmStatusCode.h @@ -0,0 +1,86 @@ +/** @file
+ This file declares SMM Status code Protocol.
+
+ This code abstracts SMM Status Code reporting.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmStatusCode.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _PROTOCOL_SMM_STATUS_CODE_H__
+#define _PROTOCOL_SMM_STATUS_CODE_H__
+
+//
+// Global ID for the Smm Status Code Protocol
+//
+#define EFI_SMM_STATUS_CODE_PROTOCOL_GUID \
+ { \
+ 0x6afd2b77, 0x98c1, 0x4acd, {0xa6, 0xf9, 0x8a, 0x94, 0x39, 0xde, 0xf, 0xb1 } \
+ }
+
+typedef struct _EFI_SMM_STATUS_CODE_PROTOCOL EFI_SMM_STATUS_CODE_PROTOCOL;
+
+/**
+ Service to emit the status code in SMM.
+
+ @param This Pointer to EFI_SMM_STATUS_CODE_PROTOCOL instance.
+
+ @param CodeType Indicates the type of status code being reported.
+
+ @param Value Describes the current status of a hardware or software entity.
+ This included information about the class and subclass that is used to
+ classify the entity as well as an operation.
+
+ @param Instance The enumeration of a hardware or software entity within
+ the system. Valid instance numbers start with 1.
+
+ @param CallerId This optional parameter may be used to identify the caller.
+ This parameter allows the status code driver to apply different rules to
+ different callers.
+
+ @param Data This optional parameter may be used to pass additional data.
+
+ @retval EFI_SUCCESS The function completed successfully
+
+ @retval EFI_DEVICE_ERROR The function should not be completed due to a device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_REPORT_STATUS_CODE) (
+ IN EFI_SMM_STATUS_CODE_PROTOCOL *This,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+/**
+ @par Protocol Description:
+ Provides status code services from SMM.
+
+ @param ReportStatusCode
+ Allows for the SMM agent to produce a status code output.
+
+**/
+struct _EFI_SMM_STATUS_CODE_PROTOCOL {
+ EFI_SMM_REPORT_STATUS_CODE ReportStatusCode;
+};
+
+extern EFI_GUID gEfiSmmStatusCodeProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmSwDispatch.h b/MdePkg/Include/Protocol/SmmSwDispatch.h new file mode 100644 index 0000000000..bc456cb5f2 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmSwDispatch.h @@ -0,0 +1,149 @@ +/** @file
+ This file declares EFI Smm Software Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmSwDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SW_DISPATCH_H_
+#define _EFI_SMM_SW_DISPATCH_H_
+
+//
+// Global ID for the SW SMI Protocol
+//
+#define EFI_SMM_SW_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xe541b773, 0xdd11, 0x420c, {0xb0, 0x26, 0xdf, 0x99, 0x36, 0x53, 0xf8, 0xbf } \
+ }
+
+typedef struct _EFI_SMM_SW_DISPATCH_PROTOCOL EFI_SMM_SW_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+//
+// A particular chipset may not support all possible software SMI input values.
+// For example, the ICH supports only values 00h to 0FFh. The parent only allows a single
+// child registration for each SwSmiInputValue.
+//
+typedef struct {
+ UINTN SwSmiInputValue;
+} EFI_SMM_SW_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Software SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The SwSmiInputValue field is filled in
+ by the software dispatch driver prior to
+ invoking this dispatch function.
+ The dispatch function will only be called
+ for input values for which it is registered.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SW_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function which Software SMI input value the
+ dispatch function should be invoked for.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The SW driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The SW SMI input value
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_REGISTER) (
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SW_DISPATCH DispatchFunction,
+ IN EFI_SMM_SW_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SW_UNREGISTER) (
+ IN EFI_SMM_SW_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Software SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+ @param MaximumSwiValue
+ A read-only field that describes the maximum value that can be used
+ in the EFI_SMM_SW_DISPATCH_PROTOCOL.Register() service.
+
+**/
+struct _EFI_SMM_SW_DISPATCH_PROTOCOL {
+ EFI_SMM_SW_REGISTER Register;
+ EFI_SMM_SW_UNREGISTER UnRegister;
+ UINTN MaximumSwiValue;
+};
+
+extern EFI_GUID gEfiSmmSwDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmSxDispatch.h b/MdePkg/Include/Protocol/SmmSxDispatch.h new file mode 100644 index 0000000000..dcbc6a9b98 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmSxDispatch.h @@ -0,0 +1,160 @@ +/** @file
+ This file declares EFI Smm Sx Smi Child Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmSxDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+
+**/
+
+#ifndef _EFI_SMM_SX_DISPATCH_H_
+#define _EFI_SMM_SX_DISPATCH_H_
+
+//
+// Global ID for the Sx SMI Protocol
+//
+#define EFI_SMM_SX_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0x14fc52be, 0x1dc, 0x426c, {0x91, 0xae, 0xa2, 0x3c, 0x3e, 0x22, 0xa, 0xe8 } \
+ }
+
+typedef struct _EFI_SMM_SX_DISPATCH_PROTOCOL EFI_SMM_SX_DISPATCH_PROTOCOL;
+//
+// Related Definitions
+//
+typedef enum {
+ SxS0,
+ SxS1,
+ SxS2,
+ SxS3,
+ SxS4,
+ SxS5,
+ EfiMaximumSleepType
+} EFI_SLEEP_TYPE;
+
+typedef enum {
+ SxEntry,
+ SxExit,
+ EfiMaximumPhase
+} EFI_SLEEP_PHASE;
+
+typedef struct {
+ EFI_SLEEP_TYPE Type;
+ EFI_SLEEP_PHASE Phase;
+} EFI_SMM_SX_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a Sx state SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function¡¯s context.
+ The Type and Phase fields are filled in by the Sx dispatch driver
+ prior to invoking this dispatch function. For this interface,
+ the Sx driver will call the dispatch function for all Sx type
+ and phases, so the Sx state handler(s) must check the Type and
+ Phase field of EFI_SMM_SX_DISPATCH_CONTEXT and act accordingly.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_SX_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function which Sx state type and phase the caller
+ wishes to be called back on. For this intertace,
+ the Sx driver will call the registered handlers for
+ all Sx type and phases, so the Sx state handler(s)
+ must check the Type and Phase field of the Dispatch
+ context and act accordingly.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_UNSUPPORTED The Sx driver or hardware does not support that
+ Sx Type/Phase.
+ @retval EFI_DEVICE_ERROR The Sx driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. Type & Phase are not
+ within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_REGISTER) (
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_SX_DISPATCH DispatchFunction,
+ IN EFI_SMM_SX_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully unregistered and the
+ SMI source has been disabled if there are no other registered child
+ dispatch functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+ @retval other TBD
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_SX_UNREGISTER) (
+ IN EFI_SMM_SX_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM Child Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for a given Sx-state source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_SX_DISPATCH_PROTOCOL {
+ EFI_SMM_SX_REGISTER Register;
+ EFI_SMM_SX_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmSxDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/SmmUsbDispatch.h b/MdePkg/Include/Protocol/SmmUsbDispatch.h new file mode 100644 index 0000000000..f036171c49 --- /dev/null +++ b/MdePkg/Include/Protocol/SmmUsbDispatch.h @@ -0,0 +1,141 @@ +/** @file
+ This file declares EFI Smm USB Smi Child Protocol.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: SmmUsbDispatch.h
+
+ @par Revision Reference:
+ This Protocol is defined in Framework of EFI SMM Core Interface Spec
+ Version 0.9.
+**/
+
+#ifndef _EFI_SMM_USB_DISPATCH_H_
+#define _EFI_SMM_USB_DISPATCH_H_
+
+//
+// Global ID for the USB Protocol
+//
+#define EFI_SMM_USB_DISPATCH_PROTOCOL_GUID \
+ { \
+ 0xa05b6ffd, 0x87af, 0x4e42, {0x95, 0xc9, 0x62, 0x28, 0xb6, 0x3c, 0xf3, 0xf3 } \
+ }
+
+typedef struct _EFI_SMM_USB_DISPATCH_PROTOCOL EFI_SMM_USB_DISPATCH_PROTOCOL;
+
+//
+// Related Definitions
+//
+typedef enum {
+ UsbLegacy,
+ UsbWake
+} EFI_USB_SMI_TYPE;
+
+typedef struct {
+ EFI_USB_SMI_TYPE Type;
+ EFI_DEVICE_PATH_PROTOCOL *Device;
+} EFI_SMM_USB_DISPATCH_CONTEXT;
+
+//
+// Member functions
+//
+/**
+ Dispatch function for a USB SMI handler.
+
+ @param DispatchHandle Handle of this dispatch function.
+ @param DispatchContext Pointer to the dispatch function's context.
+ The DispatchContext fields are filled in
+ by the dispatching driver prior to
+ invoking this dispatch function.
+
+ Nothing
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SMM_USB_DISPATCH) (
+ IN EFI_HANDLE DispatchHandle,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext
+ );
+
+/**
+ Register a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchFunction Pointer to dispatch function to be invoked for
+ this SMI source
+ @param DispatchContext Pointer to the dispatch function's context.
+ The caller fills this context in before calling
+ the register function to indicate to the register
+ function the USB SMI types for which the dispatch
+ function should be invoked.
+ @param DispatchHandle Handle of dispatch function, for when interfacing
+ with the parent Sx state SMM driver.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ registered and the SMI source has been enabled.
+ @retval EFI_DEVICE_ERROR The driver was unable to enable the SMI source.
+ @retval EFI_OUT_OF_RESOURCES Not enough memory (system or SMM) to manage this
+ child.
+ @retval EFI_INVALID_PARAMETER DispatchContext is invalid. The USB SMI type
+ is not within valid range.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_REGISTER) (
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_SMM_USB_DISPATCH DispatchFunction,
+ IN EFI_SMM_USB_DISPATCH_CONTEXT *DispatchContext,
+ OUT EFI_HANDLE *DispatchHandle
+ );
+
+/**
+ Unregister a child SMI source dispatch function with a parent SMM driver
+
+ @param This Protocol instance pointer.
+ @param DispatchHandle Handle of dispatch function to deregister.
+
+ @retval EFI_SUCCESS The dispatch function has been successfully
+ unregistered and the SMI source has been disabled
+ if there are no other registered child dispatch
+ functions for this SMI source.
+ @retval EFI_INVALID_PARAMETER Handle is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SMM_USB_UNREGISTER) (
+ IN EFI_SMM_USB_DISPATCH_PROTOCOL *This,
+ IN EFI_HANDLE DispatchHandle
+ );
+
+//
+// Interface structure for the SMM USB SMI Dispatch Protocol
+//
+/**
+ @par Protocol Description:
+ Provides the parent dispatch service for the USB SMI source generator.
+
+ @param Register
+ Installs a child service to be dispatched by this protocol.
+
+ @param UnRegister
+ Removes a child service dispatched by this protocol.
+
+**/
+struct _EFI_SMM_USB_DISPATCH_PROTOCOL {
+ EFI_SMM_USB_REGISTER Register;
+ EFI_SMM_USB_UNREGISTER UnRegister;
+};
+
+extern EFI_GUID gEfiSmmUsbDispatchProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/TapeIo.h b/MdePkg/Include/Protocol/TapeIo.h new file mode 100644 index 0000000000..8f15b3a2aa --- /dev/null +++ b/MdePkg/Include/Protocol/TapeIo.h @@ -0,0 +1,236 @@ +/** @file
+ EFI_TAPE_IO_PROTOCOL as defined in the UEFI 2.0.
+ Provide services to control and access a tape device.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: TapeIo.h
+
+**/
+
+#ifndef __EFI_TAPE_IO_PROTOCOL_H__
+#define __EFI_TAPE_IO_PROTOCOL_H__
+
+#define EFI_TAPE_IO_PROTOCOL_GUID \
+ { \
+ 0x1e93e633, 0xd65a, 0x459e, {0xab, 0x84, 0x93, 0xd9, 0xec, 0x26, 0x6d, 0x18 } \
+ }
+
+typedef struct _EFI_TAPE_IO_PROTOCOL EFI_TAPE_IO_PROTOCOL;
+
+typedef struct {
+ UINT64 Signature;
+ UINT32 Revision;
+ UINT32 BootDescSize;
+ UINT32 BootDescCRC;
+ EFI_GUID TapeGUID;
+ EFI_GUID TapeType;
+ EFI_GUID TapeUnique;
+ UINT32 BLLocation;
+ UINT32 BLBlocksize;
+ UINT32 BLFilesize;
+ CHAR8 OSVersion[40];
+ CHAR8 AppVersion[40];
+ CHAR8 CreationDate[10];
+ CHAR8 CreationTime[10];
+ CHAR8 SystemName[256]; // UTF-8
+ CHAR8 TapeTitle[120]; // UTF-8
+ CHAR8 pad[468]; // pad to 1024
+} TAPE_HEADER;
+
+/**
+ Reads from the tape.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+ @param BufferSize Size of the buffer in bytes pointed to by Buffer.
+ @param Buffer Pointer to the buffer for data to be read into.
+
+ @retval EFI_SUCCESS Data was successfully transferred from the media.
+ @retval EFI_END_OF_FILE A filemark was encountered which limited the data
+ transferred by the read operation or the head is positioned
+ just after a filemark.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY The transfer failed since the device was not ready (e.g. not
+ online). The transfer may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of transfer.
+ @retval EFI_TIMEOUT The transfer failed to complete within the timeout specified.
+ @retval EFI_MEDIA_CHANGED The media in the device was changed since the last access.
+ The transfer was aborted since the current position of the
+ media may be incorrect.
+ @retval EFI_INVALID_PARAMETER A NULL Buffer was specified with a non-zero
+ BufferSize or the device is operating in fixed block
+ size mode and the BufferSize was not a multiple of
+ device¡¯s fixed block size
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to transfer data
+ from the media.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_READ) (
+ IN EFI_TAPE_IO_PROTOCOL *This,
+ IN OUT UINTN *BufferSize,
+ OUT VOID *Buffer
+ )
+;
+
+/**
+ Writes to the tape.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+ @param BufferSize Size of the buffer in bytes pointed to by Buffer.
+ @param Buffer Pointer to the buffer for data to be written from.
+
+ @retval EFI_SUCCESS Data was successfully transferred to the media.
+ @retval EFI_END_OF_MEDIA The logical end of media has been reached. Data may have
+ been successfully transferred to the media.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY The transfer failed since the device was not ready (e.g. not
+ online). The transfer may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of transfer.
+ @retval EFI_TIMEOUT The transfer failed to complete within the timeout specified.
+ @retval EFI_MEDIA_CHANGED The media in the device was changed since the last access.
+ The transfer was aborted since the current position of the
+ media may be incorrect.
+ @retval EFI_WRITE_PROTECTED The media in the device is write-protected. The transfer
+ was aborted since a write cannot be completed.
+ @retval EFI_INVALID_PARAMETER A NULL Buffer was specified with a non-zero
+ BufferSize or the device is operating in fixed block
+ size mode and the BufferSize was not a multiple of
+ device¡¯s fixed block size
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to transfer data
+ from the media.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_WRITE) (
+ IN EFI_TAPE_IO_PROTOCOL *This,
+ IN UINTN *BufferSize,
+ IN VOID *Buffer
+ )
+;
+
+
+/**
+ Rewinds the tape.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The media was successfully repositioned.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY Repositioning the media failed since the device was not
+ ready (e.g. not online). The transfer may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of media repositioning.
+ @retval EFI_TIMEOUT Repositioning of the media did not complete within the timeout specified.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to reposition the media.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_REWIND) (
+ IN EFI_TAPE_IO_PROTOCOL *This
+ )
+;
+
+
+/**
+ Positions the tape.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+ @param Direction Direction and number of data blocks or filemarks to space over on media.
+ @param Type Type of mark to space over on media.
+
+ @retval EFI_SUCCESS The media was successfully repositioned.
+ @retval EFI_END_OF_MEDIA Beginning or end of media was reached before the
+ indicated number of data blocks or filemarks were found.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY The reposition failed since the device was not ready (e.g. not
+ online). The reposition may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of repositioning.
+ @retval EFI_TIMEOUT The repositioning failed to complete within the timeout specified.
+ @retval EFI_MEDIA_CHANGED The media in the device was changed since the last access.
+ Repositioning the media was aborted since the current
+ position of the media may be incorrect.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to reposition the media.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_SPACE) (
+ IN EFI_TAPE_IO_PROTOCOL *This,
+ INTN Direction,
+ UINTN Type
+ )
+;
+
+
+/**
+ Writes filemarks to the media.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+ @param Count Number of filemarks to write to the media.
+
+ @retval EFI_SUCCESS Data was successfully transferred from the media.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY The transfer failed since the device was not ready (e.g. not
+ online). The transfer may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of repositioning.
+ @retval EFI_TIMEOUT The transfer failed to complete within the timeout specified.
+ @retval EFI_MEDIA_CHANGED The media in the device was changed since the last access.
+ The transfer was aborted since the current position of the
+ media may be incorrect.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to transfer data from the media.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_WRITEFM) (
+ IN EFI_TAPE_IO_PROTOCOL *This,
+ IN UINTN Count
+ )
+;
+
+
+/**
+ Resets the tape device.
+
+ @param This A pointer to the EFI_TAPE_IO_PROTOCOL instance.
+ @param ExtendedVerification Indicates whether the parent bus should also be reset.
+
+ @retval EFI_SUCCESS The bus and/or device were successfully reset.
+ @retval EFI_NO_MEDIA No media is loaded in the device.
+ @retval EFI_NOT_READY The reset failed since the device and/or bus was not ready.
+ The reset may be retried at a later time.
+ @retval EFI_UNSUPPORTED The device does not support this type of reset.
+ @retval EFI_TIMEOUT The reset did not complete within the timeout allowed.
+ @retval EFI_DEVICE_ERROR A device error occurred while attempting to reset the bus and/or device.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TAPE_RESET) (
+ IN EFI_TAPE_IO_PROTOCOL *This,
+ IN BOOLEAN ExtendedVerification
+ )
+;
+
+struct _EFI_TAPE_IO_PROTOCOL {
+ EFI_TAPE_READ TapeRead;
+ EFI_TAPE_WRITE TapeWrite;
+ EFI_TAPE_REWIND TapeRewind;
+ EFI_TAPE_SPACE TapeSpace;
+ EFI_TAPE_WRITEFM TapeWriteFM;
+ EFI_TAPE_RESET TapeReset;
+};
+
+extern EFI_GUID gEfiTapeIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Tcp4.h b/MdePkg/Include/Protocol/Tcp4.h new file mode 100644 index 0000000000..87dea25e32 --- /dev/null +++ b/MdePkg/Include/Protocol/Tcp4.h @@ -0,0 +1,507 @@ +/** @file
+ EFI TCPv4 Protocol Definition
+ The EFI TCPv4 Service Binding Protocol is used to locate EFI TCPv4 Protocol drivers to create
+ and destroy child of the driver to communicate with other host using TCP protocol.
+ The EFI TCPv4 Protocol provides services to send and receive data stream.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Tcp4.h
+
+**/
+
+#ifndef __EFI_TCP4_PROTOCOL_H__
+#define __EFI_TCP4_PROTOCOL_H__
+
+#define EFI_TCP4_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0x00720665, 0x67EB, 0x4a99, {0xBA, 0xF7, 0xD3, 0xC3, 0x3A, 0x1C, 0x7C, 0xC9 } \
+ }
+
+#define EFI_TCP4_PROTOCOL_GUID \
+ { \
+ 0x65530BC7, 0xA359, 0x410f, {0xB0, 0x10, 0x5A, 0xAD, 0xC7, 0xEC, 0x2B, 0x62 } \
+ }
+
+typedef struct _EFI_TCP4_PROTOCOL EFI_TCP4_PROTOCOL;
+
+typedef struct {
+ EFI_IPv4_ADDRESS LocalAddress;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
+} EFI_TCP4_SERVICE_POINT;
+
+typedef struct {
+ EFI_HANDLE DriverHandle;
+ UINTN ServiceCount;
+ EFI_TCP4_SERVICE_POINT Services[1];
+} EFI_TCP4_VARIABLE_DATA;
+
+typedef struct {
+ BOOLEAN UseDefaultAddress;
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 StationPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
+ BOOLEAN ActiveFlag;
+} EFI_TCP4_ACCESS_POINT;
+
+typedef struct {
+ UINTN ReceiveBufferSize;
+ UINTN SendBufferSize;
+ UINTN MaxSynBackLog;
+ UINTN ConnectionTimeout;
+ UINTN DataRetries;
+ UINTN FinTimeout;
+ UINTN TimeWaitTimeout;
+ UINTN KeepAliveProbes;
+ UINTN KeepAliveTime;
+ UINTN KeepAliveInterval;
+ BOOLEAN EnableNagle;
+ BOOLEAN EnableTimeStamp;
+ BOOLEAN EnableWindowScaling;
+ BOOLEAN EnableSelectiveAck;
+ BOOLEAN EnablePathMtuDiscovery;
+} EFI_TCP4_OPTION;
+
+typedef struct {
+ //
+ // I/O parameters
+ //
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+
+ //
+ // Access Point
+ //
+ EFI_TCP4_ACCESS_POINT AccessPoint;
+
+ //
+ // TCP Control Options
+ //
+ EFI_TCP4_OPTION *ControlOption;
+} EFI_TCP4_CONFIG_DATA;
+
+typedef enum {
+ Tcp4StateClosed = 0,
+ Tcp4StateListen = 1,
+ Tcp4StateSynSent = 2,
+ Tcp4StateSynReceived = 3,
+ Tcp4StateEstablished = 4,
+ Tcp4StateFinWait1 = 5,
+ Tcp4StateFinWait2 = 6,
+ Tcp4StateClosing = 7,
+ Tcp4StateTimeWait = 8,
+ Tcp4StateCloseWait = 9,
+ Tcp4StateLastAck = 10
+} EFI_TCP4_CONNECTION_STATE;
+
+typedef struct {
+ EFI_EVENT Event;
+ EFI_STATUS Status;
+} EFI_TCP4_COMPLETION_TOKEN;
+
+typedef struct {
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+} EFI_TCP4_CONNECTION_TOKEN;
+
+typedef struct {
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ EFI_HANDLE NewChildHandle;
+} EFI_TCP4_LISTEN_TOKEN;
+
+typedef struct {
+ UINTN FragmentLength;
+ VOID *FragmentBuffer;
+} EFI_TCP4_FRAGMENT_DATA;
+
+typedef struct {
+ BOOLEAN UrgentFlag;
+ IN OUT UINTN DataLength;
+ UINTN FragmentCount;
+ EFI_TCP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_TCP4_RECEIVE_DATA;
+
+typedef struct {
+ BOOLEAN Push;
+ BOOLEAN Urgent;
+ UINTN DataLength;
+ UINTN FragmentCount;
+ EFI_TCP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_TCP4_TRANSMIT_DATA;
+
+typedef struct {
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ union {
+ EFI_TCP4_RECEIVE_DATA *RxData;
+ EFI_TCP4_TRANSMIT_DATA *TxData;
+ } Packet;
+} EFI_TCP4_IO_TOKEN;
+
+typedef struct {
+ EFI_TCP4_COMPLETION_TOKEN CompletionToken;
+ BOOLEAN AbortOnClose;
+} EFI_TCP4_CLOSE_TOKEN;
+
+//
+// Interface definition for TCP4 protocol
+//
+
+/**
+ Get the current operational status.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param Tcp4State Pointer to the buffer to receive the current TCP state.
+ @param Tcp4ConfigData Pointer to the buffer to receive the current TCP configuration.
+ @param Ip4ModeData Pointer to the buffer to receive the current IPv4 configuration
+ data used by the TCPv4 instance.
+ @param MnpConfigData Pointer to the buffer to receive the current MNP configuration
+ data used indirectly by the TCPv4 instance.
+ @param SnpModeData Pointer to the buffer to receive the current SNP configuration
+ data used indirectly by the TCPv4 instance.
+
+ @retval EFI_SUCCESS The mode data was read.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_STARTED No configuration data is available because this instance hasn¡¯t
+ been started.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_GET_MODE_DATA) (
+ IN EFI_TCP4_PROTOCOL *This,
+ OUT EFI_TCP4_CONNECTION_STATE *Tcp4State OPTIONAL,
+ OUT EFI_TCP4_CONFIG_DATA *Tcp4ConfigData OPTIONAL,
+ OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL,
+ OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL,
+ OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL
+ )
+;
+
+/**
+ Initialize or brutally reset the operational parameters for this EFI TCPv4 instance.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param Tcp4ConfigData Pointer to the configure data to configure the instance.
+
+ @retval EFI_SUCCESS The operational settings are set, changed, or reset
+ successfully.
+ @retval EFI_INVALID_PARAMETER Some parameter is invalid.
+ @retval EFI_NO_MAPPING When using a default address, configuration (through
+ DHCP, BOOTP, RARP, etc.) is not finished yet.
+ @retval EFI_ACCESS_DENIED Configuring TCP instance when it is configured without
+ calling Configure() with NULL to reset it.
+ @retval EFI_DEVICE_ERROR An unexpected network or system error occurred.
+ @retval EFI_UNSUPPORTED One or more of the control options are not supported in
+ the implementation.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough system resources when
+ executing Configure().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_CONFIGURE) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_CONFIG_DATA *TcpConfigData OPTIONAL
+ )
+;
+
+
+/**
+ Add or delete a route entry to the route table
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param DeleteRoute Set it to TRUE to delete this route from the routing table. Set it to
+ FALSE to add this route to the routing table.
+ DestinationAddress and SubnetMask are used as the
+ keywords to search route entry.
+ @param SubnetAddress The destination network.
+ @param SubnetMask The subnet mask of the destination network.
+ @param GatewayAddress The gateway address for this route. It must be on the same
+ subnet with the station address unless a direct route is specified.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_NOT_STARTED The EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - SubnetAddress is NULL.
+ - SubnetMask is NULL.
+ - GatewayAddress is NULL.
+ - *SubnetAddress is not NULL a valid subnet address.
+ - *SubnetMask is not a valid subnet mask.
+ - *GatewayAddress is not a valid unicast IP address or it
+ is not in the same subnet.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough resources to add the entry to the
+ routing table.
+ @retval EFI_NOT_FOUND This route is not in the routing table.
+ @retval EFI_ACCESS_DENIED The route is already defined in the routing table.
+ @retval EFI_UNSUPPORTED The TCP driver does not support this operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_ROUTES) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN BOOLEAN DeleteRoute,
+ IN EFI_IPv4_ADDRESS *SubnetAddress,
+ IN EFI_IPv4_ADDRESS *SubnetMask,
+ IN EFI_IPv4_ADDRESS *GatewayAddress
+ )
+;
+
+/**
+ Initiate a nonblocking TCP connection request for an active TCP instance.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param ConnectionToken Pointer to the connection token to return when the TCP three
+ way handshake finishes.
+
+ @retval EFI_SUCCESS The connection request is successfully initiated and the state
+ - of this TCPv4 instance has been changed to
+ - Tcp4StateSynSent.
+ @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_ACCESS_DENIED One or more of the following conditions are TRUE:
+ - This instance is not configured as an active one.
+ - This instance is not in Tcp4StateClosed state.
+ @retval EFI_INVALID_PARAMETER One or more of the following are TRUE:
+ - This is NULL.
+ - ConnectionToken is NULL.
+ - ConnectionToken->CompletionToken.Event is NULL.
+ @retval EFI_OUT_OF_RESOURCES The driver can¡¯t allocate enough resource to initiate the activeopen.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_CONNECT) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_CONNECTION_TOKEN *ConnectionToken
+ )
+;
+
+
+/**
+ Listen on the passive instance to accept an incoming connection request. This is a nonblocking operation.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param ListenToken Pointer to the listen token to return when operation finishes.
+
+ @retval EFI_SUCCESS The listen token has been queued successfully.
+ @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_ACCESS_DENIED One or more of the following are TRUE:
+ - This instance is not a passive instance.
+ - This instance is not in Tcp4StateListen state.
+ - The same listen token has already existed in the listen
+ token queue of this TCP instance.
+ @retval EFI_INVALID_PARAMETER One or more of the following are TRUE:
+ - This is NULL.
+ - ListenToken is NULL.
+ - ListentToken->CompletionToken.Event is NULL.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough resource to finish the operation.
+ @retval EFI_DEVICE_ERROR Any unexpected and not belonged to above category error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_ACCEPT) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_LISTEN_TOKEN *ListenToken
+ )
+;
+
+/**
+ Queues outgoing data into the transmit queue.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param Token Pointer to the completion token to queue to the transmit queue.
+
+ @retval EFI_SUCCESS The data has been queued for transmission.
+ @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following are TRUE:
+ - This is NULL.
+ - Token is NULL.
+ - Token->CompletionToken.Event is NULL.
+ - Token->Packet.TxData is NULL L.
+ - Token->Packet.FragmentCount is zero.
+ - Token->Packet.DataLength is not equal to the sum of fragment lengths.
+ @retval EFI_ACCESS_DENIED One or more of the following conditions is TRUE:
+ - A transmit completion token with the same Token->CompletionToken.Event
+ was already in the transmission queue.
+ - The current instance is in Tcp4StateClosed state.
+ - The current instance is a passive one and it is in
+ Tcp4StateListen state.
+ - User has called Close() to disconnect this connection.
+ @retval EFI_NOT_READY The completion token could not be queued because the
+ transmit queue is full.
+ @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data because of resource
+ shortage.
+ @retval EFI_NETWORK_UNREACHABLE There is no route to the destination network or address.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_TRANSMIT) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_IO_TOKEN *Token
+ )
+;
+
+
+/**
+ Places an asynchronous receive request into the receiving queue.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param Token Pointer to a token that is associated with the receive data
+ descriptor.
+
+ @retval EFI_SUCCESS The receive completion token was cached.
+ @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, RARP,
+ etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - Token is NULL.
+ - Token->CompletionToken.Event is NULL.
+ - Token->Packet.RxData is NULL.
+ - Token->Packet.RxData->DataLength is 0.
+ - The Token->Packet.RxData->DataLength is not
+ the sum of all FragmentBuffer length in FragmentTable.
+ @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of
+ system resources (usually memory).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_ACCESS_DENIED One or more of the following conditions is TRUE:
+ - A receive completion token with the same Token-
+ >CompletionToken.Event was already in the receive
+ queue.
+ - The current instance is in Tcp4StateClosed state.
+ - The current instance is a passive one and it is in
+ Tcp4StateListen state.
+ - User has called Close() to disconnect this connection.
+ @retval EFI_CONNECTION_FIN The communication peer has closed the connection and there is
+ no any buffered data in the receive buffer of this instance.
+ @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_RECEIVE) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_IO_TOKEN *Token
+ )
+;
+
+/**
+ Disconnecting a TCP connection gracefully or reset a TCP connection. This function is a
+ nonblocking operation.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param CloseToken Pointer to the close token to return when operation finishes.
+
+ @retval EFI_SUCCESS The Close() is called successfully.
+ @retval EFI_NOT_STARTED This EFI TCPv4 Protocol instance has not been configured.
+ @retval EFI_ACCESS_DENIED One or more of the following are TRUE:
+ - Configure() has been called with
+ TcpConfigData set to NULL and this function has
+ not returned.
+ - Previous Close() call on this instance has not
+ finished.
+ @retval EFI_INVALID_PARAMETER One or more of the following are TRUE:
+ - This is NULL.
+ - CloseToken is NULL.
+ - CloseToken->CompletionToken.Event is NULL.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate enough resource to finish the operation.
+ @retval EFI_DEVICE_ERROR Any unexpected and not belonged to above category error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_CLOSE) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_CLOSE_TOKEN *CloseToken
+ )
+;
+
+/**
+ Abort an asynchronous connection, listen, transmission or receive request.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+ @param Token Pointer to a token that has been issued by
+ EFI_TCP4_PROTOCOL.Connect(),
+ EFI_TCP4_PROTOCOL.Accept(),
+ EFI_TCP4_PROTOCOL.Transmit() or
+ EFI_TCP4_PROTOCOL.Receive(). If NULL, all pending
+ tokens issued by above four functions will be aborted. Type
+ EFI_TCP4_COMPLETION_TOKEN is defined in
+ EFI_TCP4_PROTOCOL.Connect().
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_NOT_READY No incoming or outgoing data is processed.
+ @retval EFI_TIMEOUT Data was dropped out of the transmission or receive queue.
+ Consider increasing the polling rate.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_CANCEL) (
+ IN EFI_TCP4_PROTOCOL *This,
+ IN EFI_TCP4_COMPLETION_TOKEN *Token OPTIONAL
+ )
+;
+
+
+/**
+ Poll to receive incoming data and transmit outgoing segments.
+
+ @param This Pointer to the EFI_TCP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_NOT_READY No incoming or outgoing data is processed.
+ @retval EFI_TIMEOUT Data was dropped out of the transmission or receive queue.
+ Consider increasing the polling rate.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_TCP4_POLL) (
+ IN EFI_TCP4_PROTOCOL *This
+ )
+;
+
+struct _EFI_TCP4_PROTOCOL {
+ EFI_TCP4_GET_MODE_DATA GetModeData;
+ EFI_TCP4_CONFIGURE Configure;
+ EFI_TCP4_ROUTES Routes;
+ EFI_TCP4_CONNECT Connect;
+ EFI_TCP4_ACCEPT Accept;
+ EFI_TCP4_TRANSMIT Transmit;
+ EFI_TCP4_RECEIVE Receive;
+ EFI_TCP4_CLOSE Close;
+ EFI_TCP4_CANCEL Cancel;
+ EFI_TCP4_POLL Poll;
+};
+
+#define EFI_CONNECTION_FIN EFIERR (104)
+#define EFI_CONNECTION_RESET EFIERR (105)
+#define EFI_CONNECTION_REFUSED EFIERR (106)
+
+extern EFI_GUID gEfiTcp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiTcp4ProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Udp4.h b/MdePkg/Include/Protocol/Udp4.h new file mode 100644 index 0000000000..7ac3c80f6c --- /dev/null +++ b/MdePkg/Include/Protocol/Udp4.h @@ -0,0 +1,363 @@ +/** @file
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Udp4.h
+
+**/
+
+#ifndef __EFI_UDP4_PROTOCOL_H__
+#define __EFI_UDP4_PROTOCOL_H__
+
+//
+//GUID definitions
+//
+#define EFI_UDP4_SERVICE_BINDING_PROTOCOL_GUID \
+ { \
+ 0x83f01464, 0x99bd, 0x45e5, {0xb3, 0x83, 0xaf, 0x63, 0x05, 0xd8, 0xe9, 0xe6 } \
+ }
+
+#define EFI_UDP4_PROTOCOL_GUID \
+ { \
+ 0x3ad9df29, 0x4501, 0x478d, {0xb1, 0xf8, 0x7f, 0x7f, 0xe7, 0x0e, 0x50, 0xf3 } \
+ }
+
+typedef struct _EFI_UDP4_PROTOCOL EFI_UDP4_PROTOCOL;
+
+typedef struct {
+ EFI_HANDLE InstanceHandle;
+ EFI_IPv4_ADDRESS LocalAddress;
+ UINT16 LocalPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
+} EFI_UDP4_SERVICE_POINT;
+
+typedef struct {
+ EFI_HANDLE DriverHandle;
+ UINT32 ServiceCount;
+ EFI_UDP4_SERVICE_POINT Services[1];
+} EFI_UDP4_VARIABLE_DATA;
+
+//
+//ICMP error definitions
+//
+#define EFI_NETWORK_UNREACHABLE EFIERR(100)
+#define EFI_HOST_UNREACHABLE EFIERR(101)
+#define EFI_PROTOCOL_UNREACHABLE EFIERR(102)
+#define EFI_PORT_UNREACHABLE EFIERR(103)
+
+
+typedef struct {
+ UINT32 FragmentLength;
+ VOID *FragmentBuffer;
+} EFI_UDP4_FRAGMENT_DATA;
+
+typedef struct {
+ EFI_IPv4_ADDRESS SourceAddress;
+ UINT16 SourcePort;
+ EFI_IPv4_ADDRESS DestinationAddress;
+ UINT16 DestinationPort;
+} EFI_UDP4_SESSION_DATA;
+typedef struct {
+ //
+ // Receiving Filters
+ //
+ BOOLEAN AcceptBroadcast;
+ BOOLEAN AcceptPromiscuous;
+ BOOLEAN AcceptAnyPort;
+ BOOLEAN AllowDuplicatePort;
+ //
+ // I/O parameters
+ //
+ UINT8 TypeOfService;
+ UINT8 TimeToLive;
+ BOOLEAN DoNotFragment;
+ UINT32 ReceiveTimeout;
+ UINT32 TransmitTimeout;
+ //
+ // Access Point
+ //
+ BOOLEAN UseDefaultAddress;
+ EFI_IPv4_ADDRESS StationAddress;
+ EFI_IPv4_ADDRESS SubnetMask;
+ UINT16 StationPort;
+ EFI_IPv4_ADDRESS RemoteAddress;
+ UINT16 RemotePort;
+} EFI_UDP4_CONFIG_DATA;
+
+typedef struct {
+ EFI_UDP4_SESSION_DATA *UdpSessionData; //OPTIONAL
+ EFI_IPv4_ADDRESS *GatewayAddress; //OPTIONAL
+ UINT32 DataLength;
+ UINT32 FragmentCount;
+ EFI_UDP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_UDP4_TRANSMIT_DATA;
+
+typedef struct {
+ EFI_TIME TimeStamp;
+ EFI_EVENT RecycleSignal;
+ EFI_UDP4_SESSION_DATA UdpSession;
+ UINT32 DataLength;
+ UINT32 FragmentCount;
+ EFI_UDP4_FRAGMENT_DATA FragmentTable[1];
+} EFI_UDP4_RECEIVE_DATA;
+
+
+typedef struct {
+ EFI_EVENT Event;
+ EFI_STATUS Status;
+ union {
+ EFI_UDP4_RECEIVE_DATA *RxData;
+ EFI_UDP4_TRANSMIT_DATA *TxData;
+ } Packet;
+} EFI_UDP4_COMPLETION_TOKEN;
+
+/**
+ Reads the current operational settings.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param Udp4ConfigData Pointer to the buffer to receive the current configuration data.
+ @param Ip4ModeData Pointer to the EFI IPv4 Protocol mode data structure.
+ @param MnpConfigData Pointer to the managed network configuration data structure.
+ @param SnpModeData Pointer to the simple network mode data structure.
+
+ @retval EFI_SUCCESS The mode data was read.
+ @retval EFI_NOT_STARTED When Udp4ConfigData is queried, no configuration data is
+ available because this instance has not been started.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_GET_MODE_DATA) (
+ IN EFI_UDP4_PROTOCOL *This,
+ OUT EFI_UDP4_CONFIG_DATA *Udp4ConfigData OPTIONAL,
+ OUT EFI_IP4_MODE_DATA *Ip4ModeData OPTIONAL,
+ OUT EFI_MANAGED_NETWORK_CONFIG_DATA *MnpConfigData OPTIONAL,
+ OUT EFI_SIMPLE_NETWORK_MODE *SnpModeData OPTIONAL
+ )
+;
+
+
+/**
+ Initializes, changes, or resets the operational parameters for this instance of the EFI UDPv4
+ Protocol.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param Udp4ConfigData Pointer to the buffer to receive the current configuration data.
+
+ @retval EFI_SUCCESS The configuration settings were set, changed, or reset successfully.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more following conditions are TRUE:
+ @retval EFI_ALREADY_STARTED The EFI UDPv4 Protocol instance is already started/configured
+ and must be stopped/reset before it can be reconfigured.
+ @retval EFI_ACCESS_DENIED UdpConfigData. AllowDuplicatePort is FALSE
+ and UdpConfigData.StationPort is already used by
+ other instance.
+ @retval EFI_OUT_OF_RESOURCES The EFI UDPv4 Protocol driver cannot allocate memory for this
+ EFI UDPv4 Protocol instance.
+ @retval EFI_DEVICE_ERROR An unexpected network or system error occurred and this instance
+ was not opened.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_CONFIGURE) (
+ IN EFI_UDP4_PROTOCOL *This,
+ IN EFI_UDP4_CONFIG_DATA *UdpConfigData OPTIONAL
+ )
+;
+
+/**
+ Joins and leaves multicast groups.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param JoinFlag Set to TRUE to join a multicast group. Set to FALSE to leave one
+ or all multicast groups.
+ @param MulticastAddress Pointer to multicast group address to join or leave.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_NOT_STARTED The EFI UDPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_OUT_OF_RESOURCES Could not allocate resources to join the group.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ - This is NULL.
+ - JoinFlag is TRUE and MulticastAddress is NULL.
+ - JoinFlag is TRUE and *MulticastAddress is not
+ a valid multicast address.
+ @retval EFI_ALREADY_STARTED The group address is already in the group table (when
+ JoinFlag is TRUE).
+ @retval EFI_NOT_FOUND The group address is not in the group table (when JoinFlag is
+ FALSE).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_GROUPS) (
+ IN EFI_UDP4_PROTOCOL *This,
+ IN BOOLEAN JoinFlag,
+ IN EFI_IPv4_ADDRESS *MulticastAddress OPTIONAL
+ )
+;
+
+/**
+ Adds and deletes routing table entries.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param DeleteRoute Set to TRUE to delete this route from the routing table.
+ Set to FALSE to add this route to the routing table.
+ @param SubnetAddress The destination network address that needs to be routed.
+ @param SubnetMask The subnet mask of SubnetAddress.
+ @param GatewayAddress The gateway IP address for this route.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_NOT_STARTED The EFI UDPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ - RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES Could not add the entry to the routing table.
+ @retval EFI_NOT_FOUND This route is not in the routing table.
+ @retval EFI_ACCESS_DENIED The route is already defined in the routing table.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_ROUTES) (
+ IN EFI_UDP4_PROTOCOL *This,
+ IN BOOLEAN DeleteRoute,
+ IN EFI_IPv4_ADDRESS *SubnetAddress,
+ IN EFI_IPv4_ADDRESS *SubnetMask,
+ IN EFI_IPv4_ADDRESS *GatewayAddress
+ )
+;
+
+/**
+ Polls for incoming data packets and processes outgoing data packets.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+
+ @retval EFI_SUCCESS Incoming or outgoing data was processed.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_TIMEOUT Data was dropped out of the transmit and/or receive queue.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_POLL) (
+ IN EFI_UDP4_PROTOCOL *This
+ )
+;
+
+/**
+ Places an asynchronous receive request into the receiving queue.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param Token Pointer to a token that is associated with the receive data
+ descriptor.
+
+ @retval EFI_SUCCESS The receive completion token was cached.
+ @retval EFI_NOT_STARTED This EFI UDPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP, RARP, etc.)
+ is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more of the following conditions is TRUE:
+ @retval EFI_OUT_OF_RESOURCES The receive completion token could not be queued due to a lack of system
+ resources (usually memory).
+ @retval EFI_DEVICE_ERROR An unexpected system or network error occurred.
+ @retval EFI_ACCESS_DENIED A receive completion token with the same Token.Event was already in
+ the receive queue.
+ @retval EFI_NOT_READY The receive request could not be queued because the receive queue is full.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_RECEIVE) (
+ IN EFI_UDP4_PROTOCOL *This,
+ IN EFI_UDP4_COMPLETION_TOKEN *Token
+ )
+;
+
+/**
+ Queues outgoing data packets into the transmit queue.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param Token Pointer to the completion token that will be placed into the
+ transmit queue.
+
+ @retval EFI_SUCCESS The data has been queued for transmission.
+ @retval EFI_NOT_STARTED This EFI UDPv4 Protocol instance has not been started.
+ @retval EFI_NO_MAPPING When using a default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_ACCESS_DENIED The transmit completion token with the same
+ Token.Event was already in the transmit queue.
+ @retval EFI_NOT_READY The completion token could not be queued because the
+ transmit queue is full.
+ @retval EFI_OUT_OF_RESOURCES Could not queue the transmit data.
+ @retval EFI_NOT_FOUND There is no route to the destination network or address.
+ @retval EFI_BAD_BUFFER_SIZE The data length is greater than the maximum UDP packet
+ size. Or the length of the IP header + UDP header + data
+ length is greater than MTU if DoNotFragment is TRUE.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_TRANSMIT) (
+ IN EFI_UDP4_PROTOCOL *This,
+ IN EFI_UDP4_COMPLETION_TOKEN *Token
+ )
+;
+
+/**
+ Aborts an asynchronous transmit or receive request.
+
+ @param This Pointer to the EFI_UDP4_PROTOCOL instance.
+ @param Token Pointer to a token that has been issued by
+ EFI_UDP4_PROTOCOL.Transmit() or
+ EFI_UDP4_PROTOCOL.Receive().If NULL, all pending
+ tokens are aborted.
+
+ @retval EFI_SUCCESS The asynchronous I/O request was aborted and Token.Event
+ was signaled. When Token is NULL, all pending requests are
+ aborted and their events are signaled.
+ @retval EFI_INVALID_PARAMETER This is NULL.
+ @retval EFI_NOT_STARTED This instance has not been started.
+ @retval EFI_NO_MAPPING When using the default address, configuration (DHCP, BOOTP,
+ RARP, etc.) is not finished yet.
+ @retval EFI_NOT_FOUND When Token is not NULL, the asynchronous I/O request was
+ not found in the transmit or receive queue. It has either completed
+ or was not issued by Transmit() and Receive().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UDP4_CANCEL)(
+ IN EFI_UDP4_PROTOCOL *This,
+ IN EFI_UDP4_COMPLETION_TOKEN *Token OPTIONAL
+ )
+;
+
+struct _EFI_UDP4_PROTOCOL {
+ EFI_UDP4_GET_MODE_DATA GetModeData;
+ EFI_UDP4_CONFIGURE Configure;
+ EFI_UDP4_GROUPS Groups;
+ EFI_UDP4_ROUTES Routes;
+ EFI_UDP4_TRANSMIT Transmit;
+ EFI_UDP4_RECEIVE Receive;
+ EFI_UDP4_CANCEL Cancel;
+ EFI_UDP4_POLL Poll;
+};
+
+extern EFI_GUID gEfiUdp4ServiceBindingProtocolGuid;
+extern EFI_GUID gEfiUdp4ProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/UgaDraw.h b/MdePkg/Include/Protocol/UgaDraw.h new file mode 100644 index 0000000000..5586bdfffb --- /dev/null +++ b/MdePkg/Include/Protocol/UgaDraw.h @@ -0,0 +1,168 @@ +/** @file
+ UGA Draw protocol from the EFI 1.1 specification.
+
+ Abstraction of a very simple graphics device.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UgaDraw.h
+
+**/
+
+#ifndef __UGA_DRAW_H__
+#define __UGA_DRAW_H__
+
+#define EFI_UGA_DRAW_PROTOCOL_GUID \
+ { \
+ 0x982c298b, 0xf4fa, 0x41cb, {0xb8, 0x38, 0x77, 0xaa, 0x68, 0x8f, 0xb8, 0x39 } \
+ }
+
+typedef struct _EFI_UGA_DRAW_PROTOCOL EFI_UGA_DRAW_PROTOCOL;
+
+/**
+ Return the current video mode information.
+
+ @param This Protocol instance pointer.
+ @param HorizontalResolution Current video horizontal resolution in pixels
+ @param VerticalResolution Current video vertical resolution in pixels
+ @param ColorDepth Current video color depth in bits per pixel
+ @param RefreshRate Current video refresh rate in Hz.
+
+ @retval EFI_SUCCESS Mode information returned.
+ @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()
+ @retval EFI_INVALID_PARAMETER One of the input args was NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UGA_DRAW_PROTOCOL_GET_MODE) (
+ IN EFI_UGA_DRAW_PROTOCOL *This,
+ OUT UINT32 *HorizontalResolution,
+ OUT UINT32 *VerticalResolution,
+ OUT UINT32 *ColorDepth,
+ OUT UINT32 *RefreshRate
+ )
+;
+
+/**
+ Return the current video mode information.
+
+ @param This Protocol instance pointer.
+ @param HorizontalResolution Current video horizontal resolution in pixels
+ @param VerticalResolution Current video vertical resolution in pixels
+ @param ColorDepth Current video color depth in bits per pixel
+ @param RefreshRate Current video refresh rate in Hz.
+
+ @retval EFI_SUCCESS Mode information returned.
+ @retval EFI_NOT_STARTED Video display is not initialized. Call SetMode ()
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UGA_DRAW_PROTOCOL_SET_MODE) (
+ IN EFI_UGA_DRAW_PROTOCOL *This,
+ IN UINT32 HorizontalResolution,
+ IN UINT32 VerticalResolution,
+ IN UINT32 ColorDepth,
+ IN UINT32 RefreshRate
+ )
+;
+
+typedef struct {
+ UINT8 Blue;
+ UINT8 Green;
+ UINT8 Red;
+ UINT8 Reserved;
+} EFI_UGA_PIXEL;
+
+typedef union {
+ EFI_UGA_PIXEL Pixel;
+ UINT32 Raw;
+} EFI_UGA_PIXEL_UNION;
+
+typedef enum {
+ EfiUgaVideoFill,
+ EfiUgaVideoToBltBuffer,
+ EfiUgaBltBufferToVideo,
+ EfiUgaVideoToVideo,
+ EfiUgaBltMax
+} EFI_UGA_BLT_OPERATION;
+
+/**
+ Type specifying a pointer to a function to perform an UGA Blt operation.
+
+ The following table defines actions for BltOperations:
+
+ <B>EfiUgaVideoFill</B> - Write data from the BltBuffer pixel (SourceX, SourceY)
+ directly to every pixel of the video display rectangle
+ (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height).
+ Only one pixel will be used from the BltBuffer. Delta is NOT used.
+
+ <B>EfiUgaVideoToBltBuffer</B> - Read data from the video display rectangle
+ (SourceX, SourceY) (SourceX + Width, SourceY + Height) and place it in
+ the BltBuffer rectangle (DestinationX, DestinationY )
+ (DestinationX + Width, DestinationY + Height). If DestinationX or
+ DestinationY is not zero then Delta must be set to the length in bytes
+ of a row in the BltBuffer.
+
+ <B>EfiUgaBltBufferToVideo</B> - Write data from the BltBuffer rectangle
+ (SourceX, SourceY) (SourceX + Width, SourceY + Height) directly to the
+ video display rectangle (DestinationX, DestinationY)
+ (DestinationX + Width, DestinationY + Height). If SourceX or SourceY is
+ not zero then Delta must be set to the length in bytes of a row in the
+ BltBuffer.
+
+ <B>EfiUgaVideoToVideo</B> - Copy from the video display rectangle (SourceX, SourceY)
+ (SourceX + Width, SourceY + Height) .to the video display rectangle
+ (DestinationX, DestinationY) (DestinationX + Width, DestinationY + Height).
+ The BltBuffer and Delta are not used in this mode.
+
+
+ @param[in] This - Protocol instance pointer.
+ @param[in] BltBuffer - Buffer containing data to blit into video buffer. This
+ buffer has a size of Width*Height*sizeof(EFI_UGA_PIXEL)
+ @param[in] BltOperation - Operation to perform on BlitBuffer and video memory
+ @param[in] SourceX - X coordinate of source for the BltBuffer.
+ @param[in] SourceY - Y coordinate of source for the BltBuffer.
+ @param[in] DestinationX - X coordinate of destination for the BltBuffer.
+ @param[in] DestinationY - Y coordinate of destination for the BltBuffer.
+ @param[in] Width - Width of rectangle in BltBuffer in pixels.
+ @param[in] Height - Hight of rectangle in BltBuffer in pixels.
+ @param[in] Delta - OPTIONAL
+
+ @retval EFI_SUCCESS - The Blt operation completed.
+ @retval EFI_INVALID_PARAMETER - BltOperation is not valid.
+ @retval EFI_DEVICE_ERROR - A hardware error occured writting to the video buffer.
+
+--*/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UGA_DRAW_PROTOCOL_BLT) (
+ IN EFI_UGA_DRAW_PROTOCOL * This,
+ IN EFI_UGA_PIXEL * BltBuffer, OPTIONAL
+ IN EFI_UGA_BLT_OPERATION BltOperation,
+ IN UINTN SourceX,
+ IN UINTN SourceY,
+ IN UINTN DestinationX,
+ IN UINTN DestinationY,
+ IN UINTN Width,
+ IN UINTN Height,
+ IN UINTN Delta OPTIONAL
+ );
+
+struct _EFI_UGA_DRAW_PROTOCOL {
+ EFI_UGA_DRAW_PROTOCOL_GET_MODE GetMode;
+ EFI_UGA_DRAW_PROTOCOL_SET_MODE SetMode;
+ EFI_UGA_DRAW_PROTOCOL_BLT Blt;
+};
+
+extern EFI_GUID gEfiUgaDrawProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/UnicodeCollation.h b/MdePkg/Include/Protocol/UnicodeCollation.h new file mode 100644 index 0000000000..e0278038f7 --- /dev/null +++ b/MdePkg/Include/Protocol/UnicodeCollation.h @@ -0,0 +1,183 @@ +/** @file
+ Unicode Collation protocol that follows the EFI 1.0 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UnicodeCollation.h
+
+**/
+
+#ifndef __UNICODE_COLLATION_H__
+#define __UNICODE_COLLATION_H__
+
+#define EFI_UNICODE_COLLATION_PROTOCOL_GUID \
+ { \
+ 0x1d85cd7f, 0xf43d, 0x11d2, {0x9a, 0xc, 0x0, 0x90, 0x27, 0x3f, 0xc1, 0x4d } \
+ }
+
+typedef struct _EFI_UNICODE_COLLATION_PROTOCOL EFI_UNICODE_COLLATION_PROTOCOL;
+
+//
+// Protocol data structures and defines
+//
+#define EFI_UNICODE_BYTE_ORDER_MARK (CHAR16) (0xfeff)
+
+//
+// Protocol member functions
+//
+/**
+ Performs a case-insensitive comparison of two Null-terminated Unicode
+ strings.
+
+ @param This Protocol instance pointer.
+ @param Str1 A pointer to a Null-terminated Unicode string.
+ @param Str2 A pointer to a Null-terminated Unicode string.
+
+ @retval 0 Str1 is equivalent to Str2
+ @retval >_0 Str1 is lexically greater than Str2
+ @retval <_0 Str1 is lexically less than Str2
+
+**/
+typedef
+INTN
+(EFIAPI *EFI_UNICODE_COLLATION_STRICOLL) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN CHAR16 *Str1,
+ IN CHAR16 *Str2
+ )
+;
+
+/**
+ Performs a case-insensitive comparison of a Null-terminated Unicode
+ pattern string and a Null-terminated Unicode string.
+
+ @param This Protocol instance pointer.
+ @param String A pointer to a Null-terminated Unicode string.
+ @param Pattern A pointer to a Null-terminated Unicode pattern string.
+
+ @retval TRUE Pattern was found in String.
+ @retval FALSE Pattern was not found in String.
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_UNICODE_COLLATION_METAIMATCH) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN CHAR16 *String,
+ IN CHAR16 *Pattern
+ )
+;
+
+/**
+ Converts all the Unicode characters in a Null-terminated Unicode string to
+ lower case Unicode characters.
+
+ @param This Protocol instance pointer.
+ @param String A pointer to a Null-terminated Unicode string.
+
+ NONE
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_UNICODE_COLLATION_STRLWR) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN OUT CHAR16 *Str
+ )
+;
+
+/**
+ Converts all the Unicode characters in a Null-terminated Unicode string to upper
+ case Unicode characters.
+
+ @param This Protocol instance pointer.
+ @param String A pointer to a Null-terminated Unicode string.
+
+ NONE
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_UNICODE_COLLATION_STRUPR) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN OUT CHAR16 *Str
+ )
+;
+
+/**
+ Converts an 8.3 FAT file name in an OEM character set to a Null-terminated
+ Unicode string.
+
+ @param This Protocol instance pointer.
+ @param FatSize The size of the string Fat in bytes.
+ @param Fat A pointer to a Null-terminated string that contains an 8.3 file
+ name using an OEM character set.
+ @param String A pointer to a Null-terminated Unicode string. The string must
+ be preallocated to hold FatSize Unicode characters.
+
+ NONE
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_UNICODE_COLLATION_FATTOSTR) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN UINTN FatSize,
+ IN CHAR8 *Fat,
+ OUT CHAR16 *String
+ )
+;
+
+/**
+ Converts a Null-terminated Unicode string to legal characters in a FAT
+ filename using an OEM character set.
+
+ @param This Protocol instance pointer.
+ @param String A pointer to a Null-terminated Unicode string. The string must
+ be preallocated to hold FatSize Unicode characters.
+ @param FatSize The size of the string Fat in bytes.
+ @param Fat A pointer to a Null-terminated string that contains an 8.3 file
+ name using an OEM character set.
+
+ @retval TRUE Fat is a Long File Name
+ @retval FALSE Fat is an 8.3 file name
+
+**/
+typedef
+BOOLEAN
+(EFIAPI *EFI_UNICODE_COLLATION_STRTOFAT) (
+ IN EFI_UNICODE_COLLATION_PROTOCOL *This,
+ IN CHAR16 *String,
+ IN UINTN FatSize,
+ OUT CHAR8 *Fat
+ )
+;
+
+struct _EFI_UNICODE_COLLATION_PROTOCOL {
+ //
+ // general
+ //
+ EFI_UNICODE_COLLATION_STRICOLL StriColl;
+ EFI_UNICODE_COLLATION_METAIMATCH MetaiMatch;
+ EFI_UNICODE_COLLATION_STRLWR StrLwr;
+ EFI_UNICODE_COLLATION_STRUPR StrUpr;
+
+ //
+ // for supporting fat volumes
+ //
+ EFI_UNICODE_COLLATION_FATTOSTR FatToStr;
+ EFI_UNICODE_COLLATION_STRTOFAT StrToFat;
+
+ CHAR8 *SupportedLanguages;
+};
+
+extern EFI_GUID gEfiUnicodeCollationProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/Usb2HostController.h b/MdePkg/Include/Protocol/Usb2HostController.h new file mode 100644 index 0000000000..5326d5b623 --- /dev/null +++ b/MdePkg/Include/Protocol/Usb2HostController.h @@ -0,0 +1,497 @@ +/** @file
+ EFI_USB2_HC_PROTOCOL as defined in UEFI 2.0.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: Usb2HostController.h
+
+**/
+
+#ifndef _USB2_HOSTCONTROLLER_H_
+#define _USB2_HOSTCONTROLLER_H_
+
+#define EFI_USB2_HC_PROTOCOL_GUID \
+ { \
+ 0x3e745226, 0x9818, 0x45b6, {0xa2, 0xac, 0xd7, 0xcd, 0xe, 0x8b, 0xa2, 0xbc } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_USB2_HC_PROTOCOL EFI_USB2_HC_PROTOCOL;
+
+#define EFI_USB_SPEED_FULL 0x0000 // 12 Mb/s, USB 1.1 OHCI and UHCI HC.
+#define EFI_USB_SPEED_LOW 0x0001 // 1 Mb/s, USB 1.1 OHCI and UHCI HC.
+#define EFI_USB_SPEED_HIGH 0x0002 // 480 Mb/s, USB 2.0 EHCI HC.
+
+typedef struct {
+ UINT8 TranslatorHubAddress;
+ UINT8 TranslatorPortNumber;
+} EFI_USB2_HC_TRANSACTION_TRANSLATOR;
+
+//
+// Protocol definitions
+//
+
+/**
+ Retrieves the Host Controller capabilities.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param MaxSpeed Host controller data transfer speed.
+ @param PortNumber Number of the root hub ports.
+ @param Is64BitCapable TRUE if controller supports 64-bit memory addressing,
+ FALSE otherwise.
+
+ @retval EFI_SUCCESS The host controller capabilities were retrieved successfully.
+ @retval EFI_INVALID_PARAMETER One of the input args was NULL.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to
+ retrieve the capabilities.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_GET_CAPABILITY) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ OUT UINT8 *MaxSpeed,
+ OUT UINT8 *PortNumber,
+ OUT UINT8 *Is64BitCapable
+ )
+;
+
+/**
+ Provides software reset for the USB host controller.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param Attributes A bit mask of the reset operation to perform.
+
+ @retval EFI_SUCCESS The reset operation succeeded.
+ @retval EFI_INVALID_PARAMETER Attributes is not valid.
+ @retval EFI_UNSUPPORTED The type of reset specified by Attributes is not currently
+ supported by the host controller hardware.
+ @retval EFI_ACCESS_DENIED Reset operation is rejected due to the debug port being configured
+ and active; only EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG or
+ EFI_USB_HC_RESET_HOST_WITH_DEBUG reset Attributes can be used to
+ perform reset operation for this host controller.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to
+ retrieve the capabilities.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_RESET) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT16 Attributes
+ )
+;
+
+/**
+ Retrieves current state of the USB host controller.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param State A pointer to the EFI_USB_HC_STATE data structure that
+ indicates current state of the USB host controller.
+
+ @retval EFI_SUCCESS The state information of the host controller was returned in State.
+ @retval EFI_INVALID_PARAMETER State is NULL.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to retrieve the
+ host controller¡¯s current state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_GET_STATE) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ OUT EFI_USB_HC_STATE *State
+ )
+;
+
+/**
+ Sets the USB host controller to a specific state.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param State Indicates the state of the host controller that will be set.
+
+ @retval EFI_SUCCESS The USB host controller was successfully placed in the state
+ specified by State.
+ @retval EFI_INVALID_PARAMETER State is not valid.
+ @retval EFI_DEVICE_ERROR Failed to set the state specified by State due to device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_SET_STATE) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN EFI_USB_HC_STATE State
+ )
+;
+
+/**
+ Submits control transfer to a target USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control transfer
+ endpoint is capable of sending or receiving.
+ @param Request A pointer to the USB device request that will be sent to the USB device.
+ @param TransferDirection Specifies the data direction for the transfer. There are three values
+ available, EfiUsbDataIn, EfiUsbDataOut and EfiUsbNoData.
+ @param Data A pointer to the buffer of data that will be transmitted to USB device or
+ received from USB device.
+ @param DataLength On input, indicates the size, in bytes, of the data buffer specified by Data.
+ On output, indicates the amount of data actually transferred.
+ @param Translator A pointer to the transaction translator data.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer is
+ allowed to complete.
+ @param TransferResult A pointer to the detailed result information generated by this control
+ transfer.
+
+ @retval EFI_SUCCESS The control transfer was completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The control transfer could not be completed due to a lack of resources.
+ @retval EFI_TIMEOUT The control transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The control transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_CONTROL_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
+ )
+;
+
+#define EFI_USB_MAX_BULK_BUFFER_NUM 10
+
+/**
+ Submits bulk transfer to a bulk endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param EndPointAddress The combination of an endpoint number and an endpoint direction of the
+ target USB device.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size the target endpoint is capable of
+ sending or receiving.
+ @param DataBuffersNumber Number of data buffers prepared for the transfer.
+ @param Data Array of pointers to the buffers of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength When input, indicates the size, in bytes, of the data buffers specified by
+ Data. When output, indicates the actually transferred data size.
+ @param DataToggle A pointer to the data toggle value.
+ @param Translator A pointer to the transaction translator data.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer is
+ allowed to complete.
+ @param TransferResult A pointer to the detailed result information of the bulk transfer.
+
+ @retval EFI_SUCCESS The bulk transfer was completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The bulk transfer could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The bulk transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_BULK_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINT8 DataBuffersNumber,
+ IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
+ )
+;
+
+/**
+ Submits an asynchronous interrupt transfer to an interrupt endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param EndPointAddress The combination of an endpoint number and an endpoint direction of the
+ target USB device.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size the target endpoint is capable of
+ sending or receiving.
+ @param IsNewTransfer If TRUE, an asynchronous interrupt pipe is built between the host and the
+ target interrupt endpoint. If FALSE, the specified asynchronous interrupt
+ pipe is canceled. If TRUE, and an interrupt transfer exists for the target
+ end point, then EFI_INVALID_PARAMETER is returned.
+ @param DataToggle A pointer to the data toggle value.
+ @param PollingInterval Indicates the interval, in milliseconds, that the asynchronous interrupt
+ transfer is polled.
+ @param DataLength Indicates the length of data to be received at the rate specified by
+ PollingInterval from the target asynchronous interrupt endpoint.
+ @param CallBackFunction The Callback function. This function is called at the rate specified by
+ PollingInterval.
+ @param Context The context that is passed to the CallBackFunction. This is an
+ optional parameter and may be NULL.
+
+ @retval EFI_SUCCESS The asynchronous interrupt transfer request has been successfully
+ submitted or canceled.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaxiumPacketLength,
+ IN BOOLEAN IsNewTransfer,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN PollingInterval OPTIONAL,
+ IN UINTN DataLength OPTIONAL,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction OPTIONAL,
+ IN VOID *Context OPTIONAL
+ )
+;
+
+/**
+ Submits synchronous interrupt transfer to an interrupt endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param EndPointAddress The combination of an endpoint number and an endpoint direction of the
+ target USB device.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size the target endpoint is capable of
+ sending or receiving.
+ @param Data A pointer to the buffer of data that will be transmitted to USB device or
+ received from USB device.
+ @param DataLength On input, the size, in bytes, of the data buffer specified by Data. On
+ output, the number of bytes transferred.
+ @param DataToggle A pointer to the data toggle value.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer is
+ allowed to complete.
+ @param TransferResult A pointer to the detailed result information from the synchronous
+ interrupt transfer.
+
+ @retval EFI_SUCCESS The synchronous interrupt transfer was completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The synchronous interrupt transfer could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The synchronous interrupt transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The synchronous interrupt transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ )
+;
+
+#define EFI_USB_MAX_ISO_BUFFER_NUM 7
+#define EFI_USB_MAX_ISO_BUFFER_NUM1 2
+
+/**
+ Submits isochronous transfer to an isochronous endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param EndPointAddress The combination of an endpoint number and an endpoint direction of the
+ target USB device.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size the target endpoint is capable of
+ sending or receiving.
+ @param DataBuffersNumber Number of data buffers prepared for the transfer.
+ @param Data Array of pointers to the buffers of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength Specifies the length, in bytes, of the data to be sent to or received from
+ the USB device.
+ @param Translator A pointer to the transaction translator data.
+ @param TransferResult A pointer to the detailed result information of the isochronous transfer.
+
+ @retval EFI_SUCCESS The isochronous transfer was completed successfully.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The isochronous transfer could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The isochronous transfer cannot be completed within the one USB frame time.
+ @retval EFI_DEVICE_ERROR The isochronous transfer failed due to host controller or device error.
+ Caller should check TransferResult for detailed error information.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINT8 DataBuffersNumber,
+ IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
+ IN UINTN DataLength,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ OUT UINT32 *TransferResult
+ )
+;
+
+/**
+ Submits nonblocking isochronous transfer to an isochronous endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB.
+ @param EndPointAddress The combination of an endpoint number and an endpoint direction of the
+ target USB device.
+ @param DeviceSpeed Indicates device speed.
+ @param MaximumPacketLength Indicates the maximum packet size the target endpoint is capable of
+ sending or receiving.
+ @param DataBuffersNumber Number of data buffers prepared for the transfer.
+ @param Data Array of pointers to the buffers of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength Specifies the length, in bytes, of the data to be sent to or received from
+ the USB device.
+ @param Translator A pointer to the transaction translator data.
+ @param IsochronousCallback The Callback function. This function is called if the requested
+ isochronous transfer is completed.
+ @param Context Data passed to the IsochronousCallback function. This is an
+ optional parameter and may be NULL.
+
+ @retval EFI_SUCCESS The asynchronous isochronous transfer request has been successfully
+ submitted or canceled.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The asynchronous isochronous transfer could not be submitted due to
+ a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 DeviceSpeed,
+ IN UINTN MaximumPacketLength,
+ IN UINT8 DataBuffersNumber,
+ IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
+ IN UINTN DataLength,
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
+ IN VOID *Context OPTIONAL
+ )
+;
+
+/**
+ Retrieves the current status of a USB root hub port.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port from which the status is to be retrieved.
+ This value is zero based.
+ @param PortStatus A pointer to the current port status bits and port status change bits.
+
+ @retval EFI_SUCCESS The status of the USB root hub port specified by PortNumber
+ was returned in PortStatus.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
+ )
+;
+
+/**
+ Sets a feature for the specified root hub port.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port whose feature is requested to be set. This
+ value is zero based.
+ @param PortFeature Indicates the feature selector associated with the feature set request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was set for the USB
+ root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid for this function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ )
+;
+
+/**
+ Clears a feature for the specified root hub port.
+
+ @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port whose feature is requested to be cleared. This
+ value is zero based.
+ @param PortFeature Indicates the feature selector associated with the feature clear request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was cleared for the USB
+ root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid for this function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB2_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE) (
+ IN EFI_USB2_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ )
+;
+
+struct _EFI_USB2_HC_PROTOCOL {
+ EFI_USB2_HC_PROTOCOL_GET_CAPABILITY GetCapability;
+ EFI_USB2_HC_PROTOCOL_RESET Reset;
+ EFI_USB2_HC_PROTOCOL_GET_STATE GetState;
+ EFI_USB2_HC_PROTOCOL_SET_STATE SetState;
+ EFI_USB2_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
+ EFI_USB2_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
+ EFI_USB2_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
+ EFI_USB2_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
+ EFI_USB2_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
+ EFI_USB2_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
+ EFI_USB2_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ EFI_USB2_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ EFI_USB2_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+ UINT16 MajorRevision;
+ UINT16 MinorRevision;
+};
+
+extern EFI_GUID gEfiUsb2HcProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/UsbHostController.h b/MdePkg/Include/Protocol/UsbHostController.h new file mode 100644 index 0000000000..f816d73002 --- /dev/null +++ b/MdePkg/Include/Protocol/UsbHostController.h @@ -0,0 +1,446 @@ +/** @file
+ EFI_USB_HC_PROTOCOL as defined in EFI 1.10.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UsbHostController.h
+
+**/
+
+#ifndef _USB_HOSTCONTROLLER_H_
+#define _USB_HOSTCONTROLLER_H_
+
+#define EFI_USB_HC_PROTOCOL_GUID \
+ { \
+ 0xf5089266, 0x1aa0, 0x4953, {0x97, 0xd8, 0x56, 0x2f, 0x8a, 0x73, 0xb5, 0x19 } \
+ }
+
+//
+// Forward reference for pure ANSI compatability
+//
+typedef struct _EFI_USB_HC_PROTOCOL EFI_USB_HC_PROTOCOL;
+
+//
+// Protocol definitions
+//
+
+/**
+ Provides software reset for the USB host controller.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param Attributes A bit mask of the reset operation to perform.
+
+ @retval EFI_SUCCESS The reset operation succeeded.
+ @retval EFI_UNSUPPORTED The type of reset specified by Attributes is not currently supported
+ by the host controller hardware.
+ @retval EFI_INVALID_PARAMETER Attributes is not valid.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to perform the reset operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_RESET) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT16 Attributes
+ );
+
+/**
+ Retrieves current state of the USB host controller.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param State A pointer to the EFI_USB_HC_STATE data structure that
+ indicates current state of the USB host controller.
+
+ @retval EFI_SUCCESS The state information of the host controller was returned in State.
+ @retval EFI_INVALID_PARAMETER State is NULL.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to retrieve the host controller¡¯s
+ current state.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_GET_STATE) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ OUT EFI_USB_HC_STATE *State
+ );
+
+/**
+ Sets the USB host controller to a specific state.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param State Indicates the state of the host controller that will be set.
+
+ @retval EFI_SUCCESS The USB host controller was successfully placed in the state specified by
+ State.
+ @retval EFI_INVALID_PARAMETER State is NULL.
+ @retval EFI_DEVICE_ERROR Failed to set the state specified by State due to device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_SET_STATE) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN EFI_USB_HC_STATE State
+ );
+
+/**
+ Submits control transfer to a target USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param IsSlowDevice Indicates whether the target device is slow device or full-speed
+ device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param Request A pointer to the USB device request that will be sent to the USB
+ device.
+ @param TransferDirection Specifies the data direction for the transfer.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength On input, indicates the size, in bytes, of the data buffer specified
+ by Data. On output, indicates the amount of data actually
+ transferred.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer
+ is allowed to complete.
+ @param TransferResult A pointer to the detailed result information generated by this
+ control transfer.
+
+ @retval EFI_SUCCESS The control transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The control transfer could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT The control transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The control transfer failed due to host controller or device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_CONTROL_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN BOOLEAN IsSlowDevice,
+ IN UINT8 MaximumPacketLength,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION TransferDirection,
+ IN OUT VOID *Data OPTIONAL,
+ IN OUT UINTN *DataLength OPTIONAL,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Submits bulk transfer to a bulk endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param EndPointAddress The combination of an endpoint number and an endpoint
+ direction of the target USB device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength On input, indicates the size, in bytes, of the data buffer specified
+ by Data. On output, indicates the amount of data actually
+ transferred.
+ @param DataToggle A pointer to the data toggle value.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer
+ is allowed to complete.
+ @param TransferResult A pointer to the detailed result information of the bulk transfer.
+
+ @retval EFI_SUCCESS The bulk transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The bulk transfer could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT The bulk transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller or device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_BULK_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Submits an asynchronous interrupt transfer to an interrupt endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param EndPointAddress The combination of an endpoint number and an endpoint
+ direction of the target USB device.
+ @param IsSlowDevice Indicates whether the target device is slow device or full-speed
+ device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param IsNewTransfer If TRUE, an asynchronous interrupt pipe is built between the host
+ and the target interrupt endpoint. If FALSE, the specified
+
+ @param DataToggle A pointer to the data toggle value.
+ @param PollingInterval Indicates the interval, in milliseconds, that the asynchronous
+ interrupt transfer is polled. asynchronous interrupt pipe is canceled.
+ @param DataLength Indicates the length of data to be received at the rate specified by
+ PollingInterval from the target asynchronous interrupt
+ endpoint.
+ @param CallBackFunction The Callback function.
+ @param Context The context that is passed to the CallBackFunction.
+
+ @retval EFI_SUCCESS The asynchronous interrupt transfer request has been successfully
+ submitted or canceled.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT The bulk transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The bulk transfer failed due to host controller or device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN BOOLEAN IsSlowDevice,
+ IN UINT8 MaxiumPacketLength,
+ IN BOOLEAN IsNewTransfer,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN PollingInterval OPTIONAL,
+ IN UINTN DataLength OPTIONAL,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction OPTIONAL,
+ IN VOID *Context OPTIONAL
+ );
+
+/**
+ Submits synchronous interrupt transfer to an interrupt endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param EndPointAddress The combination of an endpoint number and an endpoint
+ direction of the target USB device.
+ @param IsSlowDevice Indicates whether the target device is slow device or full-speed
+ device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device. asynchronous interrupt pipe is canceled.
+ @param DataLength On input, the size, in bytes, of the data buffer specified by Data.
+ On output, the number of bytes transferred.
+ @param DataToggle A pointer to the data toggle value.
+ @param TimeOut Indicates the maximum time, in milliseconds, which the transfer
+ is allowed to complete.
+ @param TransferResult A pointer to the detailed result information from the synchronous
+ interrupt transfer.
+
+ @retval EFI_SUCCESS The synchronous interrupt transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT The synchronous interrupt transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The synchronous interrupt transfer failed due to host controller or device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN BOOLEAN IsSlowDevice,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN OUT UINT8 *DataToggle,
+ IN UINTN TimeOut,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Submits isochronous transfer to an isochronous endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param EndPointAddress The combination of an endpoint number and an endpoint
+ direction of the target USB device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device. asynchronous interrupt pipe is canceled.
+ @param DataLength Specifies the length, in bytes, of the data to be sent to or received
+ from the USB device.
+ @param TransferResult A pointer to the detailed result information from the isochronous
+ transfer.
+
+ @retval EFI_SUCCESS The isochronous transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The isochronous could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+ @retval EFI_TIMEOUT The isochronous transfer failed due to timeout.
+ @retval EFI_DEVICE_ERROR The isochronous transfer failed due to host controller or device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ OUT UINT32 *TransferResult
+ );
+
+/**
+ Submits nonblocking isochronous transfer to an isochronous endpoint of a USB device.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param DeviceAddress Represents the address of the target device on the USB, which is
+ assigned during USB enumeration.
+ @param EndPointAddress The combination of an endpoint number and an endpoint
+ direction of the target USB device.
+ @param MaximumPacketLength Indicates the maximum packet size that the default control
+ transfer endpoint is capable of sending or receiving.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device. asynchronous interrupt pipe is canceled.
+ @param DataLength Specifies the length, in bytes, of the data to be sent to or received
+ from the USB device.
+ @param IsochronousCallback The Callback function.
+ @param Context Data passed to the IsochronousCallback function. This is
+ an optional parameter and may be NULL.
+
+ @retval EFI_SUCCESS The asynchronous isochronous transfer was completed successfully.
+ @retval EFI_OUT_OF_RESOURCES The asynchronous isochronous could not be completed due to a lack of resources.
+ @retval EFI_INVALID_PARAMETER Some parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 DeviceAddress,
+ IN UINT8 EndPointAddress,
+ IN UINT8 MaximumPacketLength,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
+ IN VOID *Context OPTIONAL
+ );
+
+/**
+ Retrieves the number of root hub ports.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param PortNumber A pointer to the number of the root hub ports.
+
+ @retval EFI_SUCCESS The port number was retrieved successfully.
+ @retval EFI_DEVICE_ERROR An error was encountered while attempting to retrieve the port number.
+ @retval EFI_INVALID_PARAMETER PortNumber is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_NUMBER) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ OUT UINT8 *PortNumber
+ );
+
+/**
+ Retrieves the current status of a USB root hub port.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port from which the status is to be retrieved.
+ This value is zero based.
+ @param PortStatus A pointer to the current port status bits and port status change bits.
+
+ @retval EFI_SUCCESS The status of the USB root hub port specified by PortNumber
+ was returned in PortStatus.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ OUT EFI_USB_PORT_STATUS *PortStatus
+ );
+
+/**
+ Sets a feature for the specified root hub port.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port from which the status is to be retrieved.
+ This value is zero based.
+ @param PortFeature Indicates the feature selector associated with the feature set
+ request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was set for the USB
+ root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid for this function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+/**
+ Clears a feature for the specified root hub port.
+
+ @param This A pointer to the EFI_USB_HC_PROTOCOL instance.
+ @param PortNumber Specifies the root hub port from which the status is to be cleared.
+ This value is zero based.
+ @param PortFeature Indicates the feature selector associated with the feature clear
+ request.
+
+ @retval EFI_SUCCESS The feature specified by PortFeature was cleared for the USB
+ root hub port specified by PortNumber.
+ @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid for this function.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE) (
+ IN EFI_USB_HC_PROTOCOL *This,
+ IN UINT8 PortNumber,
+ IN EFI_USB_PORT_FEATURE PortFeature
+ );
+
+struct _EFI_USB_HC_PROTOCOL {
+ EFI_USB_HC_PROTOCOL_RESET Reset;
+ EFI_USB_HC_PROTOCOL_GET_STATE GetState;
+ EFI_USB_HC_PROTOCOL_SET_STATE SetState;
+ EFI_USB_HC_PROTOCOL_CONTROL_TRANSFER ControlTransfer;
+ EFI_USB_HC_PROTOCOL_BULK_TRANSFER BulkTransfer;
+ EFI_USB_HC_PROTOCOL_ASYNC_INTERRUPT_TRANSFER AsyncInterruptTransfer;
+ EFI_USB_HC_PROTOCOL_SYNC_INTERRUPT_TRANSFER SyncInterruptTransfer;
+ EFI_USB_HC_PROTOCOL_ISOCHRONOUS_TRANSFER IsochronousTransfer;
+ EFI_USB_HC_PROTOCOL_ASYNC_ISOCHRONOUS_TRANSFER AsyncIsochronousTransfer;
+ EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_NUMBER GetRootHubPortNumber;
+ EFI_USB_HC_PROTOCOL_GET_ROOTHUB_PORT_STATUS GetRootHubPortStatus;
+ EFI_USB_HC_PROTOCOL_SET_ROOTHUB_PORT_FEATURE SetRootHubPortFeature;
+ EFI_USB_HC_PROTOCOL_CLEAR_ROOTHUB_PORT_FEATURE ClearRootHubPortFeature;
+ UINT16 MajorRevision;
+ UINT16 MinorRevision;
+};
+
+extern EFI_GUID gEfiUsbHcProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/Protocol/UsbIo.h b/MdePkg/Include/Protocol/UsbIo.h new file mode 100644 index 0000000000..30309e3035 --- /dev/null +++ b/MdePkg/Include/Protocol/UsbIo.h @@ -0,0 +1,418 @@ +/** @file
+ EFI Usb I/O Protocol
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UsbIo.h
+
+**/
+
+#ifndef __USB_IO_H__
+#define __USB_IO_H__
+
+//
+// Global ID for the USB I/O Protocol
+//
+#define EFI_USB_IO_PROTOCOL_GUID \
+ { \
+ 0x2B2F68D6, 0x0CD2, 0x44cf, {0x8E, 0x8B, 0xBB, 0xA2, 0x0B, 0x1B, 0x5B, 0x75 } \
+ }
+
+typedef struct _EFI_USB_IO_PROTOCOL EFI_USB_IO_PROTOCOL;
+
+/**
+ Async USB transfer callback routine.
+
+ @param Data Data received or sent via the USB Asynchronous Transfer, if the
+ transfer completed successfully.
+ @param DataLength The length of Data received or sent via the Asynchronous
+ Transfer, if transfer successfully completes.
+ @param Context Data passed from UsbAsyncInterruptTransfer() request.
+ @param Status Indicates the result of the asynchronous transfer.
+
+ @retval EFI_SUCCESS The asynchronous USB transfer request has been successfully executed.
+ @retval EFI_DEVICE_ERROR The asynchronous USB transfer request failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ASYNC_USB_TRANSFER_CALLBACK) (
+ IN VOID *Data,
+ IN UINTN DataLength,
+ IN VOID *Context,
+ IN UINT32 Status
+ );
+
+//
+// Prototype for EFI USB I/O protocol
+//
+
+
+/**
+ This function is used to manage a USB device with a control transfer pipe. A control transfer is
+ typically used to perform device initialization and configuration.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param Request A pointer to the USB device request that will be sent to the USB
+ device.
+ @param Direction Indicates the data direction.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param Timeout Indicating the transfer should be completed within this time frame.
+ The units are in milliseconds.
+ @param DataLength The size, in bytes, of the data buffer specified by Data.
+ @param Status A pointer to the result of the USB transfer.
+
+ @retval EFI_SUCCESS The control transfer has been successfully executed.
+ @retval EFI_DEVICE_ERROR The transfer failed. The transfer status is returned in Status.
+ @retval EFI_INVALID_PARAMETE One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
+ @retval EFI_TIMEOUT The control transfer fails due to timeout.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_CONTROL_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN EFI_USB_DEVICE_REQUEST *Request,
+ IN EFI_USB_DATA_DIRECTION Direction,
+ IN UINT32 Timeout,
+ IN OUT VOID *Data OPTIONAL,
+ IN UINTN DataLength OPTIONAL,
+ OUT UINT32 *Status
+ );
+
+/**
+ This function is used to manage a USB device with the bulk transfer pipe. Bulk Transfers are
+ typically used to transfer large amounts of data to/from USB devices.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceEndpoint A pointer to the USB device request that will be sent to the USB
+ device.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength The size, in bytes, of the data buffer specified by Data.
+ @param Timeout Indicating the transfer should be completed within this time frame.
+ The units are in milliseconds.
+ @param Status This parameter indicates the USB transfer status.
+
+ @retval EFI_SUCCESS The bulk transfer has been successfully executed.
+ @retval EFI_DEVICE_ERROR The transfer failed. The transfer status is returned in Status.
+ @retval EFI_INVALID_PARAMETE One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The control transfer fails due to timeout.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_BULK_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *Status
+ );
+
+/**
+ This function is used to manage a USB device with an interrupt transfer pipe. An Asynchronous
+ Interrupt Transfer is typically used to query a device¡¯s status at a fixed rate. For example,
+ keyboard, mouse, and hub devices use this type of transfer to query their interrupt endpoints at
+ a fixed rate.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceEndpoint A pointer to the USB device request that will be sent to the USB
+ device.
+ @param IsNewTransfer If TRUE, a new transfer will be submitted to USB controller. If
+ FALSE, the interrupt transfer is deleted from the device¡¯s interrupt
+ transfer queue.
+ @param PollingInterval Indicates the periodic rate, in milliseconds, that the transfer is to be
+ executed.
+ @param DataLength Specifies the length, in bytes, of the data to be received from the
+ USB device.
+ @param Context Data passed to the InterruptCallback function.
+ @param InterruptCallback The Callback function. This function is called if the asynchronous
+ interrupt transfer is completed.
+
+ @retval EFI_SUCCESS The asynchronous USB transfer request transfer has been successfully executed.
+ @retval EFI_DEVICE_ERROR The asynchronous USB transfer request failed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_ASYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN BOOLEAN IsNewTransfer,
+ IN UINTN PollingInterval OPTIONAL,
+ IN UINTN DataLength OPTIONAL,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack OPTIONAL,
+ IN VOID *Context OPTIONAL
+ );
+
+/**
+ This function is used to manage a USB device with an interrupt transfer pipe.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceEndpoint A pointer to the USB device request that will be sent to the USB
+ device.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength On input, then size, in bytes, of the buffer Data. On output, the
+ amount of data actually transferred.
+ @param Timeout The time out, in seconds, for this transfer.
+ @param Status This parameter indicates the USB transfer status.
+
+ @retval EFI_SUCCESS The sync interrupt transfer has been successfully executed.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The sync interrupt transfer request failed.
+ @retval EFI_OUT_OF_RESOURCES The request could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The transfer fails due to timeout.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_SYNC_INTERRUPT_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN OUT UINTN *DataLength,
+ IN UINTN Timeout,
+ OUT UINT32 *Status
+ );
+
+/**
+ This function is used to manage a USB device with an isochronous transfer pipe. An Isochronous
+ transfer is typically used to transfer streaming data.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceEndpoint A pointer to the USB device request that will be sent to the USB
+ device.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength The size, in bytes, of the data buffer specified by Data.
+ @param Status This parameter indicates the USB transfer status.
+
+ @retval EFI_SUCCESS The isochronous transfer has been successfully executed.
+ @retval EFI_INVALID_PARAMETER The parameter DeviceEndpoint is not valid.
+ @retval EFI_DEVICE_ERROR The transfer failed due to the reason other than timeout, The error status
+ is returned in Status.
+ @retval EFI_OUT_OF_RESOURCES The request could not be submitted due to a lack of resources.
+ @retval EFI_TIMEOUT The transfer fails due to timeout.
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ OUT UINT32 *Status
+ );
+
+/**
+ This function is used to manage a USB device with an isochronous transfer pipe. An Isochronous
+ transfer is typically used to transfer streaming data.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceEndpoint A pointer to the USB device request that will be sent to the USB
+ device.
+ @param Data A pointer to the buffer of data that will be transmitted to USB
+ device or received from USB device.
+ @param DataLength The size, in bytes, of the data buffer specified by Data.
+ @param Context Data passed to the IsochronousCallback() function.
+ @param IsochronousCallback The IsochronousCallback() function.
+
+ @retval EFI_SUCCESS The asynchronous isochronous transfer has been successfully submitted
+ to the system.
+ @retval EFI_INVALID_PARAMETER The parameter DeviceEndpoint is not valid.
+ @retval EFI_OUT_OF_RESOURCES The request could not be submitted due to a lack of resources.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_ASYNC_ISOCHRONOUS_TRANSFER) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 DeviceEndpoint,
+ IN OUT VOID *Data,
+ IN UINTN DataLength,
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
+ IN VOID *Context OPTIONAL
+ );
+
+/**
+ Resets and reconfigures the USB controller. This function will work for all USB devices except
+ USB Hub Controllers.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+
+ @retval EFI_SUCCESS The USB controller was reset.
+ @retval EFI_INVALID_PARAMETER If the controller specified by This is a USB hub.
+ @retval EFI_DEVICE_ERROR An error occurred during the reconfiguration process.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_PORT_RESET) (
+ IN EFI_USB_IO_PROTOCOL *This
+ );
+
+/**
+ Retrieves the USB Device Descriptor.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param DeviceDescriptor A pointer to the caller allocated USB Device Descriptor.
+
+ @retval EFI_SUCCESS The device descriptor was retrieved successfully.
+ @retval EFI_INVALID_PARAMETER DeviceDescriptor is NULL.
+ @retval EFI_NOT_FOUND The device descriptor was not found. The device may not be configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_DEVICE_DESCRIPTOR) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_DEVICE_DESCRIPTOR *DeviceDescriptor
+ );
+
+/**
+ Retrieves the USB Device Descriptor.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param ConfigurationDescriptor A pointer to the caller allocated USB Active Configuration
+ Descriptor.
+ @retval EFI_SUCCESS The active configuration descriptor was retrieved successfully.
+ @retval EFI_INVALID_PARAMETER ConfigurationDescriptor is NULL.
+ @retval EFI_NOT_FOUND An active configuration descriptor cannot be found. The device may not
+ be configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_CONFIG_DESCRIPTOR) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_CONFIG_DESCRIPTOR *ConfigurationDescriptor
+ );
+
+/**
+ Retrieves the Interface Descriptor for a USB Device Controller. As stated earlier, an interface
+ within a USB device is equivalently to a USB Controller within the current configuration.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param InterfaceDescriptor A pointer to the caller allocated USB Interface Descriptor within
+ the configuration setting.
+ @retval EFI_SUCCESS The interface descriptor retrieved successfully.
+ @retval EFI_INVALID_PARAMETER InterfaceDescriptor is NULL.
+ @retval EFI_NOT_FOUND The interface descriptor cannot be found. The device may not be
+ correctly configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_INTERFACE_DESCRIPTOR) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT EFI_USB_INTERFACE_DESCRIPTOR *InterfaceDescriptor
+ );
+
+/**
+ Retrieves an Endpoint Descriptor within a USB Controller.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param EndpointIndex Indicates which endpoint descriptor to retrieve.
+ @param EndpointDescriptor A pointer to the caller allocated USB Endpoint Descriptor of
+ a USB controller.
+
+ @retval EFI_SUCCESS The endpoint descriptor was retrieved successfully.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_NOT_FOUND The endpoint descriptor cannot be found. The device may not be
+ correctly configured.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_ENDPOINT_DESCRIPTOR) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT8 EndpointIndex,
+ OUT EFI_USB_ENDPOINT_DESCRIPTOR *EndpointDescriptor
+ );
+
+/**
+ Retrieves a Unicode string stored in a USB Device.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param LangID The Language ID for the string being retrieved.
+ @param StringID The ID of the string being retrieved.
+ @param String A pointer to a buffer allocated by this function with
+ AllocatePool() to store the string.
+
+ @retval EFI_SUCCESS The string was retrieved successfully.
+ @retval EFI_NOT_FOUND The string specified by LangID and StringID was not found.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate the return buffer String.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_STRING_DESCRIPTOR) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ IN UINT16 LangID,
+ IN UINT8 StringID,
+ OUT CHAR16 **String
+ );
+
+/**
+ Retrieves all the language ID codes that the USB device supports.
+
+ @param This A pointer to the EFI_USB_IO_PROTOCOL instance.
+ @param LangIDTable Language ID for the string the caller wants to get.
+ @param TableSize The size, in bytes, of the table LangIDTable.
+
+ @retval EFI_SUCCESS The support languages were retrieved successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_USB_IO_GET_SUPPORTED_LANGUAGE) (
+ IN EFI_USB_IO_PROTOCOL *This,
+ OUT UINT16 **LangIDTable,
+ OUT UINT16 *TableSize
+ );
+
+//
+// Protocol Interface Structure
+//
+struct _EFI_USB_IO_PROTOCOL {
+ //
+ // IO transfer
+ //
+ EFI_USB_IO_CONTROL_TRANSFER UsbControlTransfer;
+ EFI_USB_IO_BULK_TRANSFER UsbBulkTransfer;
+ EFI_USB_IO_ASYNC_INTERRUPT_TRANSFER UsbAsyncInterruptTransfer;
+ EFI_USB_IO_SYNC_INTERRUPT_TRANSFER UsbSyncInterruptTransfer;
+ EFI_USB_IO_ISOCHRONOUS_TRANSFER UsbIsochronousTransfer;
+ EFI_USB_IO_ASYNC_ISOCHRONOUS_TRANSFER UsbAsyncIsochronousTransfer;
+
+ //
+ // Common device request
+ //
+ EFI_USB_IO_GET_DEVICE_DESCRIPTOR UsbGetDeviceDescriptor;
+ EFI_USB_IO_GET_CONFIG_DESCRIPTOR UsbGetConfigDescriptor;
+ EFI_USB_IO_GET_INTERFACE_DESCRIPTOR UsbGetInterfaceDescriptor;
+ EFI_USB_IO_GET_ENDPOINT_DESCRIPTOR UsbGetEndpointDescriptor;
+ EFI_USB_IO_GET_STRING_DESCRIPTOR UsbGetStringDescriptor;
+ EFI_USB_IO_GET_SUPPORTED_LANGUAGE UsbGetSupportedLanguages;
+
+ //
+ // Reset controller's parent port
+ //
+ EFI_USB_IO_PORT_RESET UsbPortReset;
+};
+
+extern EFI_GUID gEfiUsbIoProtocolGuid;
+
+#endif
diff --git a/MdePkg/Include/ToBeRemoved/Variable.h b/MdePkg/Include/ToBeRemoved/Variable.h new file mode 100644 index 0000000000..bc0d6408d7 --- /dev/null +++ b/MdePkg/Include/ToBeRemoved/Variable.h @@ -0,0 +1,78 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ EfiVariable.h
+
+Abstract:
+
+ Header file for EFI Variable Services
+
+--*/
+
+#ifndef _EFI_VARIABLE_H_
+#define _EFI_VARIABLE_H_
+
+#define VARIABLE_STORE_SIGNATURE EFI_SIGNATURE_32 ('$', 'V', 'S', 'S')
+
+#define MAX_VARIABLE_SIZE 1024
+
+#define VARIABLE_DATA 0x55AA
+
+//
+// Variable Store Header flags
+//
+#define VARIABLE_STORE_FORMATTED 0x5a
+#define VARIABLE_STORE_HEALTHY 0xfe
+
+//
+// Variable Store Status
+//
+typedef enum {
+ EfiRaw,
+ EfiValid,
+ EfiInvalid,
+ EfiUnknown
+} VARIABLE_STORE_STATUS;
+
+//
+// Variable State flags
+//
+#define VAR_IN_DELETED_TRANSITION 0xfe // Variable is in obsolete transistion
+#define VAR_DELETED 0xfd // Variable is obsolete
+#define VAR_ADDED 0x7f // Variable has been completely added
+#define IS_VARIABLE_STATE(_c, _Mask) (BOOLEAN) (((~_c) & (~_Mask)) != 0)
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Signature;
+ UINT32 Size;
+ UINT8 Format;
+ UINT8 State;
+ UINT16 Reserved;
+ UINT32 Reserved1;
+} VARIABLE_STORE_HEADER;
+
+typedef struct {
+ UINT16 StartId;
+ UINT8 State;
+ UINT8 Reserved;
+ UINT32 Attributes;
+ UINTN NameSize;
+ UINTN DataSize;
+ EFI_GUID VendorGuid;
+} VARIABLE_HEADER;
+
+#pragma pack()
+
+#endif // _EFI_VARIABLE_H_
diff --git a/MdePkg/Include/ToBeRemoved/WorkingBlockHeader.h b/MdePkg/Include/ToBeRemoved/WorkingBlockHeader.h new file mode 100644 index 0000000000..235b740e83 --- /dev/null +++ b/MdePkg/Include/ToBeRemoved/WorkingBlockHeader.h @@ -0,0 +1,47 @@ +/*++
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+Module Name:
+
+ EfiWorkingBlockHeader.h
+
+Abstract:
+
+ Defines data structure that is the headers found at the runtime
+ updatable firmware volumes, such as the FileSystemGuid of the
+ working block, the header structure of the variable block, FTW
+ working block, or event log block.
+
+--*/
+
+#ifndef _EFI_WORKING_BLOCK_HEADER_H_
+#define _EFI_WORKING_BLOCK_HEADER_H_
+
+//
+// EFI Fault tolerant working block header
+// The header is immediately followed by the write queue.
+//
+typedef struct {
+ EFI_GUID Signature;
+ UINT32 Crc;
+ UINT32 WorkingBlockValid : 1;
+ UINT32 WorkingBlockInvalid : 1;
+#define WORKING_BLOCK_VALID 0x1
+#define WORKING_BLOCK_INVALID 0x2
+ UINT32 Reserved : 6;
+ UINT8 Reserved3[3];
+ UINTN WriteQueueSize;
+ //
+ // UINT8 WriteQueue[WriteQueueSize];
+ //
+} EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER;
+
+#endif
diff --git a/MdePkg/Include/Uefi.h b/MdePkg/Include/Uefi.h new file mode 100644 index 0000000000..fcaaeb262c --- /dev/null +++ b/MdePkg/Include/Uefi.h @@ -0,0 +1,66 @@ +/** @file
+
+ Root include file for Mde Package UEFI modules.
+
+ UEFI modules follow the public EFI 1.10 or UEFI 2.0 specifications and
+ also contains the infrastructure required to build modules. The build
+ infrastructure must set EFI_SPECIFICATION_VERSION before including this
+ file. To support R9/UEFI2.0 set EFI_SPECIFIATION_VERSION to 0x00020000. To
+ support R8.5/EFI 1.10 set EFI_SPECIFIATION_VERSION to 0x00010010.
+ Seting EDK_RELEASE_VERSION to zero implies no Tiano extensions and a
+ non zero value implies Tiano extensions are availible.
+ EFI_SPECIFIATION_VERSION and EDK_RELEASE_VERSION are set automatically
+ by the build infrastructure for every module.
+
+Copyright (c) 2006, Intel Corporation
+All rights reserved. This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution. The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+#ifndef __UEFI_H__
+#define __UEFI_H__
+
+
+//
+// Check to make sure EFI_SPECIFICATION_VERSION and EDK_RELEASE_VERSION are defined.
+// also check for legal combinations
+//
+#if !defined(EFI_SPECIFICATION_VERSION)
+ #error EFI_SPECIFICATION_VERSION not defined
+#elif !defined(EDK_RELEASE_VERSION)
+ #error EDK_RELEASE_VERSION not defined
+#elif EDK_RELEASE_VERSION == 0x00000000
+//
+// UEFI mode with no Tiano extensions is legal
+//
+#elif (EDK_RELEASE_VERSION <= 0x00080005) && (EFI_SPECIFICATION_VERSION >= 0x00020000)
+ #error Illegal combination of EFI_SPECIFICATION_VERSION and EDK_RELEASE_VERSION versions
+#endif
+
+
+
+#include <Common/UefiBaseTypes.h>
+#include <Uefi/UefiSpec.h>
+
+//
+// Need due to R8.5 Tiano contamination of UEFI enumes.
+// There is a UEFI library that does things the new way and the old way
+// This is why these definitions are need in Uefi.h
+//
+#include <Guid/EventLegacyBios.h>
+#include <Guid/FrameworkDevicePath.h>
+
+
+//
+// All module types types have access to PCD for build support
+//
+#include <Protocol/Pcd.h>
+
+#endif
diff --git a/MdePkg/Include/Uefi/EfiPxe.h b/MdePkg/Include/Uefi/EfiPxe.h new file mode 100644 index 0000000000..eadac3c850 --- /dev/null +++ b/MdePkg/Include/Uefi/EfiPxe.h @@ -0,0 +1,1780 @@ +/** @file
+ This header file contains all of the PXE type definitions,
+ structure prototypes, global variables and constants that
+ are needed for porting PXE to EFI.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module name: EfiPxe.h
+
+ @par Revision Reference:
+ 32/64-bit PXE specification:
+ alpha-4, 99-Dec-17
+
+**/
+
+#ifndef __EFI_PXE_H__
+#define __EFI_PXE_H__
+
+#pragma pack(1)
+
+
+
+#define PXE_BUSTYPE(a, b, c, d) \
+ ( \
+ (((PXE_UINT32) (d) & 0xFF) << 24) | (((PXE_UINT32) (c) & 0xFF) << 16) | (((PXE_UINT32) (b) & 0xFF) << 8) | \
+ ((PXE_UINT32) (a) & 0xFF) \
+ )
+
+//
+// UNDI ROM ID and devive ID signature
+//
+#define PXE_BUSTYPE_PXE PXE_BUSTYPE ('!', 'P', 'X', 'E')
+
+//
+// BUS ROM ID signatures
+//
+#define PXE_BUSTYPE_PCI PXE_BUSTYPE ('P', 'C', 'I', 'R')
+#define PXE_BUSTYPE_PC_CARD PXE_BUSTYPE ('P', 'C', 'C', 'R')
+#define PXE_BUSTYPE_USB PXE_BUSTYPE ('U', 'S', 'B', 'R')
+#define PXE_BUSTYPE_1394 PXE_BUSTYPE ('1', '3', '9', '4')
+
+#define PXE_SWAP_UINT16(n) ((((PXE_UINT16) (n) & 0x00FF) << 8) | (((PXE_UINT16) (n) & 0xFF00) >> 8))
+
+#define PXE_SWAP_UINT32(n) \
+ ((((PXE_UINT32)(n) & 0x000000FF) << 24) | \
+ (((PXE_UINT32)(n) & 0x0000FF00) << 8) | \
+ (((PXE_UINT32)(n) & 0x00FF0000) >> 8) | \
+ (((PXE_UINT32)(n) & 0xFF000000) >> 24))
+
+#define PXE_SWAP_UINT64(n) \
+ ((((PXE_UINT64)(n) & 0x00000000000000FFULL) << 56) | \
+ (((PXE_UINT64)(n) & 0x000000000000FF00ULL) << 40) | \
+ (((PXE_UINT64)(n) & 0x0000000000FF0000ULL) << 24) | \
+ (((PXE_UINT64)(n) & 0x00000000FF000000ULL) << 8) | \
+ (((PXE_UINT64)(n) & 0x000000FF00000000ULL) >> 8) | \
+ (((PXE_UINT64)(n) & 0x0000FF0000000000ULL) >> 24) | \
+ (((PXE_UINT64)(n) & 0x00FF000000000000ULL) >> 40) | \
+ (((PXE_UINT64)(n) & 0xFF00000000000000ULL) >> 56))
+
+
+#define PXE_CPBSIZE_NOT_USED 0 // zero
+#define PXE_DBSIZE_NOT_USED 0 // zero
+#define PXE_CPBADDR_NOT_USED (PXE_UINT64) 0 // zero
+#define PXE_DBADDR_NOT_USED (PXE_UINT64) 0 // zero
+#define PXE_CONST const
+
+#define PXE_VOLATILE volatile
+
+typedef VOID PXE_VOID;
+typedef UINT8 PXE_UINT8;
+typedef UINT16 PXE_UINT16;
+typedef UINT32 PXE_UINT32;
+typedef UINTN PXE_UINTN;
+
+//
+// typedef unsigned long PXE_UINT64;
+//
+typedef UINT64 PXE_UINT64;
+
+typedef PXE_UINT8 PXE_BOOL;
+#define PXE_FALSE 0 // zero
+#define PXE_TRUE (!PXE_FALSE)
+
+typedef PXE_UINT16 PXE_OPCODE;
+
+//
+// Return UNDI operational state.
+//
+#define PXE_OPCODE_GET_STATE 0x0000
+
+//
+// Change UNDI operational state from Stopped to Started.
+//
+#define PXE_OPCODE_START 0x0001
+
+//
+// Change UNDI operational state from Started to Stopped.
+//
+#define PXE_OPCODE_STOP 0x0002
+
+//
+// Get UNDI initialization information.
+//
+#define PXE_OPCODE_GET_INIT_INFO 0x0003
+
+//
+// Get NIC configuration information.
+//
+#define PXE_OPCODE_GET_CONFIG_INFO 0x0004
+
+//
+// Changed UNDI operational state from Started to Initialized.
+//
+#define PXE_OPCODE_INITIALIZE 0x0005
+
+//
+// Re-initialize the NIC H/W.
+//
+#define PXE_OPCODE_RESET 0x0006
+
+//
+// Change the UNDI operational state from Initialized to Started.
+//
+#define PXE_OPCODE_SHUTDOWN 0x0007
+
+//
+// Read & change state of external interrupt enables.
+//
+#define PXE_OPCODE_INTERRUPT_ENABLES 0x0008
+
+//
+// Read & change state of packet receive filters.
+//
+#define PXE_OPCODE_RECEIVE_FILTERS 0x0009
+
+//
+// Read & change station MAC address.
+//
+#define PXE_OPCODE_STATION_ADDRESS 0x000A
+
+//
+// Read traffic statistics.
+//
+#define PXE_OPCODE_STATISTICS 0x000B
+
+//
+// Convert multicast IP address to multicast MAC address.
+//
+#define PXE_OPCODE_MCAST_IP_TO_MAC 0x000C
+
+//
+// Read or change non-volatile storage on the NIC.
+//
+#define PXE_OPCODE_NVDATA 0x000D
+
+//
+// Get & clear interrupt status.
+//
+#define PXE_OPCODE_GET_STATUS 0x000E
+
+//
+// Fill media header in packet for transmit.
+//
+#define PXE_OPCODE_FILL_HEADER 0x000F
+
+//
+// Transmit packet(s).
+//
+#define PXE_OPCODE_TRANSMIT 0x0010
+
+//
+// Receive packet.
+//
+#define PXE_OPCODE_RECEIVE 0x0011
+
+//
+// Last valid PXE UNDI OpCode number.
+//
+#define PXE_OPCODE_LAST_VALID 0x0011
+
+typedef PXE_UINT16 PXE_OPFLAGS;
+
+#define PXE_OPFLAGS_NOT_USED 0x0000
+
+//
+// //////////////////////////////////////
+// UNDI Get State
+//
+// No OpFlags
+
+////////////////////////////////////////
+// UNDI Start
+//
+// No OpFlags
+
+////////////////////////////////////////
+// UNDI Stop
+//
+// No OpFlags
+
+////////////////////////////////////////
+// UNDI Get Init Info
+//
+// No Opflags
+
+////////////////////////////////////////
+// UNDI Get Config Info
+//
+// No Opflags
+
+////////////////////////////////////////
+// UNDI Initialize
+//
+#define PXE_OPFLAGS_INITIALIZE_CABLE_DETECT_MASK 0x0001
+#define PXE_OPFLAGS_INITIALIZE_DETECT_CABLE 0x0000
+#define PXE_OPFLAGS_INITIALIZE_DO_NOT_DETECT_CABLE 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Reset
+//
+#define PXE_OPFLAGS_RESET_DISABLE_INTERRUPTS 0x0001
+#define PXE_OPFLAGS_RESET_DISABLE_FILTERS 0x0002
+
+//
+// //////////////////////////////////////
+// UNDI Shutdown
+//
+// No OpFlags
+
+////////////////////////////////////////
+// UNDI Interrupt Enables
+//
+//
+// Select whether to enable or disable external interrupt signals.
+// Setting both enable and disable will return PXE_STATCODE_INVALID_OPFLAGS.
+//
+#define PXE_OPFLAGS_INTERRUPT_OPMASK 0xC000
+#define PXE_OPFLAGS_INTERRUPT_ENABLE 0x8000
+#define PXE_OPFLAGS_INTERRUPT_DISABLE 0x4000
+#define PXE_OPFLAGS_INTERRUPT_READ 0x0000
+
+//
+// Enable receive interrupts. An external interrupt will be generated
+// after a complete non-error packet has been received.
+//
+#define PXE_OPFLAGS_INTERRUPT_RECEIVE 0x0001
+
+//
+// Enable transmit interrupts. An external interrupt will be generated
+// after a complete non-error packet has been transmitted.
+//
+#define PXE_OPFLAGS_INTERRUPT_TRANSMIT 0x0002
+
+//
+// Enable command interrupts. An external interrupt will be generated
+// when command execution stops.
+//
+#define PXE_OPFLAGS_INTERRUPT_COMMAND 0x0004
+
+//
+// Generate software interrupt. Setting this bit generates an external
+// interrupt, if it is supported by the hardware.
+//
+#define PXE_OPFLAGS_INTERRUPT_SOFTWARE 0x0008
+
+//
+// //////////////////////////////////////
+// UNDI Receive Filters
+//
+//
+// Select whether to enable or disable receive filters.
+// Setting both enable and disable will return PXE_STATCODE_INVALID_OPCODE.
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_OPMASK 0xC000
+#define PXE_OPFLAGS_RECEIVE_FILTER_ENABLE 0x8000
+#define PXE_OPFLAGS_RECEIVE_FILTER_DISABLE 0x4000
+#define PXE_OPFLAGS_RECEIVE_FILTER_READ 0x0000
+
+//
+// To reset the contents of the multicast MAC address filter list,
+// set this OpFlag:
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_RESET_MCAST_LIST 0x2000
+
+//
+// Enable unicast packet receiving. Packets sent to the current station
+// MAC address will be received.
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_UNICAST 0x0001
+
+//
+// Enable broadcast packet receiving. Packets sent to the broadcast
+// MAC address will be received.
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
+
+//
+// Enable filtered multicast packet receiving. Packets sent to any
+// of the multicast MAC addresses in the multicast MAC address filter
+// list will be received. If the filter list is empty, no multicast
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
+
+//
+// Enable promiscuous packet receiving. All packets will be received.
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
+
+//
+// Enable promiscuous multicast packet receiving. All multicast
+// packets will be received.
+//
+#define PXE_OPFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
+
+//
+// //////////////////////////////////////
+// UNDI Station Address
+//
+#define PXE_OPFLAGS_STATION_ADDRESS_READ 0x0000
+#define PXE_OPFLAGS_STATION_ADDRESS_WRITE 0x0000
+#define PXE_OPFLAGS_STATION_ADDRESS_RESET 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Statistics
+//
+#define PXE_OPFLAGS_STATISTICS_READ 0x0000
+#define PXE_OPFLAGS_STATISTICS_RESET 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI MCast IP to MAC
+//
+//
+// Identify the type of IP address in the CPB.
+//
+#define PXE_OPFLAGS_MCAST_IP_TO_MAC_OPMASK 0x0003
+#define PXE_OPFLAGS_MCAST_IPV4_TO_MAC 0x0000
+#define PXE_OPFLAGS_MCAST_IPV6_TO_MAC 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI NvData
+//
+//
+// Select the type of non-volatile data operation.
+//
+#define PXE_OPFLAGS_NVDATA_OPMASK 0x0001
+#define PXE_OPFLAGS_NVDATA_READ 0x0000
+#define PXE_OPFLAGS_NVDATA_WRITE 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Get Status
+//
+//
+// Return current interrupt status. This will also clear any interrupts
+// that are currently set. This can be used in a polling routine. The
+// interrupt flags are still set and cleared even when the interrupts
+// are disabled.
+//
+#define PXE_OPFLAGS_GET_INTERRUPT_STATUS 0x0001
+
+//
+// Return list of transmitted buffers for recycling. Transmit buffers
+// must not be changed or unallocated until they have recycled. After
+// issuing a transmit command, wait for a transmit complete interrupt.
+// When a transmit complete interrupt is received, read the transmitted
+// buffers. Do not plan on getting one buffer per interrupt. Some
+// NICs and UNDIs may transmit multiple buffers per interrupt.
+//
+#define PXE_OPFLAGS_GET_TRANSMITTED_BUFFERS 0x0002
+
+//
+// //////////////////////////////////////
+// UNDI Fill Header
+//
+#define PXE_OPFLAGS_FILL_HEADER_OPMASK 0x0001
+#define PXE_OPFLAGS_FILL_HEADER_FRAGMENTED 0x0001
+#define PXE_OPFLAGS_FILL_HEADER_WHOLE 0x0000
+
+//
+// //////////////////////////////////////
+// UNDI Transmit
+//
+//
+// S/W UNDI only. Return after the packet has been transmitted. A
+// transmit complete interrupt will still be generated and the transmit
+// buffer will have to be recycled.
+//
+#define PXE_OPFLAGS_SWUNDI_TRANSMIT_OPMASK 0x0001
+#define PXE_OPFLAGS_TRANSMIT_BLOCK 0x0001
+#define PXE_OPFLAGS_TRANSMIT_DONT_BLOCK 0x0000
+
+//
+//
+//
+#define PXE_OPFLAGS_TRANSMIT_OPMASK 0x0002
+#define PXE_OPFLAGS_TRANSMIT_FRAGMENTED 0x0002
+#define PXE_OPFLAGS_TRANSMIT_WHOLE 0x0000
+
+//
+// //////////////////////////////////////
+// UNDI Receive
+//
+// No OpFlags
+//
+typedef PXE_UINT16 PXE_STATFLAGS;
+
+#define PXE_STATFLAGS_INITIALIZE 0x0000
+
+//
+// //////////////////////////////////////
+// Common StatFlags that can be returned by all commands.
+//
+//
+// The COMMAND_COMPLETE and COMMAND_FAILED status flags must be
+// implemented by all UNDIs. COMMAND_QUEUED is only needed by UNDIs
+// that support command queuing.
+//
+#define PXE_STATFLAGS_STATUS_MASK 0xC000
+#define PXE_STATFLAGS_COMMAND_COMPLETE 0xC000
+#define PXE_STATFLAGS_COMMAND_FAILED 0x8000
+#define PXE_STATFLAGS_COMMAND_QUEUED 0x4000
+
+//
+// //////////////////////////////////////
+// UNDI Get State
+//
+#define PXE_STATFLAGS_GET_STATE_MASK 0x0003
+#define PXE_STATFLAGS_GET_STATE_INITIALIZED 0x0002
+#define PXE_STATFLAGS_GET_STATE_STARTED 0x0001
+#define PXE_STATFLAGS_GET_STATE_STOPPED 0x0000
+
+//
+// //////////////////////////////////////
+// UNDI Start
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI Get Init Info
+//
+#define PXE_STATFLAGS_CABLE_DETECT_MASK 0x0001
+#define PXE_STATFLAGS_CABLE_DETECT_NOT_SUPPORTED 0x0000
+#define PXE_STATFLAGS_CABLE_DETECT_SUPPORTED 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Initialize
+//
+#define PXE_STATFLAGS_INITIALIZED_NO_MEDIA 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Reset
+//
+#define PXE_STATFLAGS_RESET_NO_MEDIA 0x0001
+
+//
+// //////////////////////////////////////
+// UNDI Shutdown
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI Interrupt Enables
+//
+//
+// If set, receive interrupts are enabled.
+//
+#define PXE_STATFLAGS_INTERRUPT_RECEIVE 0x0001
+
+//
+// If set, transmit interrupts are enabled.
+//
+#define PXE_STATFLAGS_INTERRUPT_TRANSMIT 0x0002
+
+//
+// If set, command interrupts are enabled.
+//
+#define PXE_STATFLAGS_INTERRUPT_COMMAND 0x0004
+
+//
+// //////////////////////////////////////
+// UNDI Receive Filters
+//
+//
+// If set, unicast packets will be received.
+//
+#define PXE_STATFLAGS_RECEIVE_FILTER_UNICAST 0x0001
+
+//
+// If set, broadcast packets will be received.
+//
+#define PXE_STATFLAGS_RECEIVE_FILTER_BROADCAST 0x0002
+
+//
+// If set, multicast packets that match up with the multicast address
+// filter list will be received.
+//
+#define PXE_STATFLAGS_RECEIVE_FILTER_FILTERED_MULTICAST 0x0004
+
+//
+// If set, all packets will be received.
+//
+#define PXE_STATFLAGS_RECEIVE_FILTER_PROMISCUOUS 0x0008
+
+//
+// If set, all multicast packets will be received.
+//
+#define PXE_STATFLAGS_RECEIVE_FILTER_ALL_MULTICAST 0x0010
+
+//
+// //////////////////////////////////////
+// UNDI Station Address
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI Statistics
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI MCast IP to MAC
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI NvData
+//
+// No additional StatFlags
+
+
+////////////////////////////////////////
+// UNDI Get Status
+//
+//
+// Use to determine if an interrupt has occurred.
+//
+#define PXE_STATFLAGS_GET_STATUS_INTERRUPT_MASK 0x000F
+#define PXE_STATFLAGS_GET_STATUS_NO_INTERRUPTS 0x0000
+
+//
+// If set, at least one receive interrupt occurred.
+//
+#define PXE_STATFLAGS_GET_STATUS_RECEIVE 0x0001
+
+//
+// If set, at least one transmit interrupt occurred.
+//
+#define PXE_STATFLAGS_GET_STATUS_TRANSMIT 0x0002
+
+//
+// If set, at least one command interrupt occurred.
+//
+#define PXE_STATFLAGS_GET_STATUS_COMMAND 0x0004
+
+//
+// If set, at least one software interrupt occurred.
+//
+#define PXE_STATFLAGS_GET_STATUS_SOFTWARE 0x0008
+
+//
+// This flag is set if the transmitted buffer queue is empty. This flag
+// will be set if all transmitted buffer addresses get written into the DB.
+//
+#define PXE_STATFLAGS_GET_STATUS_TXBUF_QUEUE_EMPTY 0x0010
+
+//
+// This flag is set if no transmitted buffer addresses were written
+// into the DB. (This could be because DBsize was too small.)
+//
+#define PXE_STATFLAGS_GET_STATUS_NO_TXBUFS_WRITTEN 0x0020
+
+//
+// //////////////////////////////////////
+// UNDI Fill Header
+//
+// No additional StatFlags
+
+////////////////////////////////////////
+// UNDI Transmit
+//
+// No additional StatFlags.
+
+////////////////////////////////////////
+// UNDI Receive
+//
+// No additional StatFlags.
+//
+typedef PXE_UINT16 PXE_STATCODE;
+
+#define PXE_STATCODE_INITIALIZE 0x0000
+
+//
+// //////////////////////////////////////
+// Common StatCodes returned by all UNDI commands, UNDI protocol functions
+// and BC protocol functions.
+//
+#define PXE_STATCODE_SUCCESS 0x0000
+
+#define PXE_STATCODE_INVALID_CDB 0x0001
+#define PXE_STATCODE_INVALID_CPB 0x0002
+#define PXE_STATCODE_BUSY 0x0003
+#define PXE_STATCODE_QUEUE_FULL 0x0004
+#define PXE_STATCODE_ALREADY_STARTED 0x0005
+#define PXE_STATCODE_NOT_STARTED 0x0006
+#define PXE_STATCODE_NOT_SHUTDOWN 0x0007
+#define PXE_STATCODE_ALREADY_INITIALIZED 0x0008
+#define PXE_STATCODE_NOT_INITIALIZED 0x0009
+#define PXE_STATCODE_DEVICE_FAILURE 0x000A
+#define PXE_STATCODE_NVDATA_FAILURE 0x000B
+#define PXE_STATCODE_UNSUPPORTED 0x000C
+#define PXE_STATCODE_BUFFER_FULL 0x000D
+#define PXE_STATCODE_INVALID_PARAMETER 0x000E
+#define PXE_STATCODE_INVALID_UNDI 0x000F
+#define PXE_STATCODE_IPV4_NOT_SUPPORTED 0x0010
+#define PXE_STATCODE_IPV6_NOT_SUPPORTED 0x0011
+#define PXE_STATCODE_NOT_ENOUGH_MEMORY 0x0012
+#define PXE_STATCODE_NO_DATA 0x0013
+
+typedef PXE_UINT16 PXE_IFNUM;
+
+//
+// This interface number must be passed to the S/W UNDI Start command.
+//
+#define PXE_IFNUM_START 0x0000
+
+//
+// This interface number is returned by the S/W UNDI Get State and
+// Start commands if information in the CDB, CPB or DB is invalid.
+//
+#define PXE_IFNUM_INVALID 0x0000
+
+typedef PXE_UINT16 PXE_CONTROL;
+
+//
+// Setting this flag directs the UNDI to queue this command for later
+// execution if the UNDI is busy and it supports command queuing.
+// If queuing is not supported, a PXE_STATCODE_INVALID_CONTROL error
+// is returned. If the queue is full, a PXE_STATCODE_CDB_QUEUE_FULL
+// error is returned.
+//
+#define PXE_CONTROL_QUEUE_IF_BUSY 0x0002
+
+//
+// These two bit values are used to determine if there are more UNDI
+// CDB structures following this one. If the link bit is set, there
+// must be a CDB structure following this one. Execution will start
+// on the next CDB structure as soon as this one completes successfully.
+// If an error is generated by this command, execution will stop.
+//
+#define PXE_CONTROL_LINK 0x0001
+#define PXE_CONTROL_LAST_CDB_IN_LIST 0x0000
+
+typedef PXE_UINT8 PXE_FRAME_TYPE;
+
+#define PXE_FRAME_TYPE_NONE 0x00
+#define PXE_FRAME_TYPE_UNICAST 0x01
+#define PXE_FRAME_TYPE_BROADCAST 0x02
+#define PXE_FRAME_TYPE_FILTERED_MULTICAST 0x03
+#define PXE_FRAME_TYPE_PROMISCUOUS 0x04
+#define PXE_FRAME_TYPE_PROMISCUOUS_MULTICAST 0x05
+
+#define PXE_FRAME_TYPE_MULTICAST PXE_FRAME_TYPE_FILTERED_MULTICAST
+
+typedef PXE_UINT32 PXE_IPV4;
+
+typedef PXE_UINT32 PXE_IPV6[4];
+#define PXE_MAC_LENGTH 32
+
+typedef PXE_UINT8 PXE_MAC_ADDR[PXE_MAC_LENGTH];
+
+typedef PXE_UINT8 PXE_IFTYPE;
+typedef UINT16 PXE_MEDIA_PROTOCOL;
+
+//
+// This information is from the ARP section of RFC 1700.
+//
+// 1 Ethernet (10Mb) [JBP]
+// 2 Experimental Ethernet (3Mb) [JBP]
+// 3 Amateur Radio AX.25 [PXK]
+// 4 Proteon ProNET Token Ring [JBP]
+// 5 Chaos [GXP]
+// 6 IEEE 802 Networks [JBP]
+// 7 ARCNET [JBP]
+// 8 Hyperchannel [JBP]
+// 9 Lanstar [TU]
+// 10 Autonet Short Address [MXB1]
+// 11 LocalTalk [JKR1]
+// 12 LocalNet (IBM* PCNet or SYTEK* LocalNET) [JXM]
+// 13 Ultra link [RXD2]
+// 14 SMDS [GXC1]
+// 15 Frame Relay [AGM]
+// 16 Asynchronous Transmission Mode (ATM) [JXB2]
+// 17 HDLC [JBP]
+// 18 Fibre Channel [Yakov Rekhter]
+// 19 Asynchronous Transmission Mode (ATM) [Mark Laubach]
+// 20 Serial Line [JBP]
+// 21 Asynchronous Transmission Mode (ATM) [MXB1]
+//
+// * Other names and brands may be claimed as the property of others.
+//
+#define PXE_IFTYPE_ETHERNET 0x01
+#define PXE_IFTYPE_TOKENRING 0x04
+#define PXE_IFTYPE_FIBRE_CHANNEL 0x12
+
+typedef struct s_pxe_hw_undi {
+ PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
+ PXE_UINT8 Len; // sizeof(PXE_HW_UNDI)
+ PXE_UINT8 Fudge; // makes 8-bit cksum equal zero
+ PXE_UINT8 Rev; // PXE_ROMID_REV
+ PXE_UINT8 IFcnt; // physical connector count
+ PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
+ PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
+ PXE_UINT16 reserved; // zero, not used
+ PXE_UINT32 Implementation; // implementation flags
+ // reserved // vendor use
+ // UINT32 Status; // status port
+ // UINT32 Command; // command port
+ // UINT64 CDBaddr; // CDB address port
+ //
+} PXE_HW_UNDI;
+
+//
+// Status port bit definitions
+//
+//
+// UNDI operation state
+//
+#define PXE_HWSTAT_STATE_MASK 0xC0000000
+#define PXE_HWSTAT_BUSY 0xC0000000
+#define PXE_HWSTAT_INITIALIZED 0x80000000
+#define PXE_HWSTAT_STARTED 0x40000000
+#define PXE_HWSTAT_STOPPED 0x00000000
+
+//
+// If set, last command failed
+//
+#define PXE_HWSTAT_COMMAND_FAILED 0x20000000
+
+//
+// If set, identifies enabled receive filters
+//
+#define PXE_HWSTAT_PROMISCUOUS_MULTICAST_RX_ENABLED 0x00001000
+#define PXE_HWSTAT_PROMISCUOUS_RX_ENABLED 0x00000800
+#define PXE_HWSTAT_BROADCAST_RX_ENABLED 0x00000400
+#define PXE_HWSTAT_MULTICAST_RX_ENABLED 0x00000200
+#define PXE_HWSTAT_UNICAST_RX_ENABLED 0x00000100
+
+//
+// If set, identifies enabled external interrupts
+//
+#define PXE_HWSTAT_SOFTWARE_INT_ENABLED 0x00000080
+#define PXE_HWSTAT_TX_COMPLETE_INT_ENABLED 0x00000040
+#define PXE_HWSTAT_PACKET_RX_INT_ENABLED 0x00000020
+#define PXE_HWSTAT_CMD_COMPLETE_INT_ENABLED 0x00000010
+
+//
+// If set, identifies pending interrupts
+//
+#define PXE_HWSTAT_SOFTWARE_INT_PENDING 0x00000008
+#define PXE_HWSTAT_TX_COMPLETE_INT_PENDING 0x00000004
+#define PXE_HWSTAT_PACKET_RX_INT_PENDING 0x00000002
+#define PXE_HWSTAT_CMD_COMPLETE_INT_PENDING 0x00000001
+
+//
+// Command port definitions
+//
+//
+// If set, CDB identified in CDBaddr port is given to UNDI.
+// If not set, other bits in this word will be processed.
+//
+#define PXE_HWCMD_ISSUE_COMMAND 0x80000000
+#define PXE_HWCMD_INTS_AND_FILTS 0x00000000
+
+//
+// Use these to enable/disable receive filters.
+//
+#define PXE_HWCMD_PROMISCUOUS_MULTICAST_RX_ENABLE 0x00001000
+#define PXE_HWCMD_PROMISCUOUS_RX_ENABLE 0x00000800
+#define PXE_HWCMD_BROADCAST_RX_ENABLE 0x00000400
+#define PXE_HWCMD_MULTICAST_RX_ENABLE 0x00000200
+#define PXE_HWCMD_UNICAST_RX_ENABLE 0x00000100
+
+//
+// Use these to enable/disable external interrupts
+//
+#define PXE_HWCMD_SOFTWARE_INT_ENABLE 0x00000080
+#define PXE_HWCMD_TX_COMPLETE_INT_ENABLE 0x00000040
+#define PXE_HWCMD_PACKET_RX_INT_ENABLE 0x00000020
+#define PXE_HWCMD_CMD_COMPLETE_INT_ENABLE 0x00000010
+
+//
+// Use these to clear pending external interrupts
+//
+#define PXE_HWCMD_CLEAR_SOFTWARE_INT 0x00000008
+#define PXE_HWCMD_CLEAR_TX_COMPLETE_INT 0x00000004
+#define PXE_HWCMD_CLEAR_PACKET_RX_INT 0x00000002
+#define PXE_HWCMD_CLEAR_CMD_COMPLETE_INT 0x00000001
+
+typedef struct s_pxe_sw_undi {
+ PXE_UINT32 Signature; // PXE_ROMID_SIGNATURE
+ PXE_UINT8 Len; // sizeof(PXE_SW_UNDI)
+ PXE_UINT8 Fudge; // makes 8-bit cksum zero
+ PXE_UINT8 Rev; // PXE_ROMID_REV
+ PXE_UINT8 IFcnt; // physical connector count
+ PXE_UINT8 MajorVer; // PXE_ROMID_MAJORVER
+ PXE_UINT8 MinorVer; // PXE_ROMID_MINORVER
+ PXE_UINT16 reserved1; // zero, not used
+ PXE_UINT32 Implementation; // Implementation flags
+ PXE_UINT64 EntryPoint; // API entry point
+ PXE_UINT8 reserved2[3]; // zero, not used
+ PXE_UINT8 BusCnt; // number of bustypes supported
+ PXE_UINT32 BusType[1]; // list of supported bustypes
+} PXE_SW_UNDI;
+
+typedef union u_pxe_undi {
+ PXE_HW_UNDI hw;
+ PXE_SW_UNDI sw;
+} PXE_UNDI;
+
+//
+// Signature of !PXE structure
+//
+#define PXE_ROMID_SIGNATURE PXE_BUSTYPE ('!', 'P', 'X', 'E')
+
+//
+// !PXE structure format revision
+//
+#define PXE_ROMID_REV 0x02
+
+//
+// UNDI command interface revision. These are the values that get sent
+// in option 94 (Client Network Interface Identifier) in the DHCP Discover
+// and PXE Boot Server Request packets.
+//
+#define PXE_ROMID_MAJORVER 0x03
+#define PXE_ROMID_MINORVER 0x01
+
+//
+// Implementation flags
+//
+#define PXE_ROMID_IMP_HW_UNDI 0x80000000
+#define PXE_ROMID_IMP_SW_VIRT_ADDR 0x40000000
+#define PXE_ROMID_IMP_64BIT_DEVICE 0x00010000
+#define PXE_ROMID_IMP_FRAG_SUPPORTED 0x00008000
+#define PXE_ROMID_IMP_CMD_LINK_SUPPORTED 0x00004000
+#define PXE_ROMID_IMP_CMD_QUEUE_SUPPORTED 0x00002000
+#define PXE_ROMID_IMP_MULTI_FRAME_SUPPORTED 0x00001000
+#define PXE_ROMID_IMP_NVDATA_SUPPORT_MASK 0x00000C00
+#define PXE_ROMID_IMP_NVDATA_BULK_WRITABLE 0x00000C00
+#define PXE_ROMID_IMP_NVDATA_SPARSE_WRITABLE 0x00000800
+#define PXE_ROMID_IMP_NVDATA_READ_ONLY 0x00000400
+#define PXE_ROMID_IMP_NVDATA_NOT_AVAILABLE 0x00000000
+#define PXE_ROMID_IMP_STATISTICS_SUPPORTED 0x00000200
+#define PXE_ROMID_IMP_STATION_ADDR_SETTABLE 0x00000100
+#define PXE_ROMID_IMP_PROMISCUOUS_MULTICAST_RX_SUPPORTED 0x00000080
+#define PXE_ROMID_IMP_PROMISCUOUS_RX_SUPPORTED 0x00000040
+#define PXE_ROMID_IMP_BROADCAST_RX_SUPPORTED 0x00000020
+#define PXE_ROMID_IMP_FILTERED_MULTICAST_RX_SUPPORTED 0x00000010
+#define PXE_ROMID_IMP_SOFTWARE_INT_SUPPORTED 0x00000008
+#define PXE_ROMID_IMP_TX_COMPLETE_INT_SUPPORTED 0x00000004
+#define PXE_ROMID_IMP_PACKET_RX_INT_SUPPORTED 0x00000002
+#define PXE_ROMID_IMP_CMD_COMPLETE_INT_SUPPORTED 0x00000001
+
+typedef struct s_pxe_cdb {
+ PXE_OPCODE OpCode;
+ PXE_OPFLAGS OpFlags;
+ PXE_UINT16 CPBsize;
+ PXE_UINT16 DBsize;
+ PXE_UINT64 CPBaddr;
+ PXE_UINT64 DBaddr;
+ PXE_STATCODE StatCode;
+ PXE_STATFLAGS StatFlags;
+ PXE_UINT16 IFnum;
+ PXE_CONTROL Control;
+} PXE_CDB;
+
+typedef union u_pxe_ip_addr {
+ PXE_IPV6 IPv6;
+ PXE_IPV4 IPv4;
+} PXE_IP_ADDR;
+
+typedef union pxe_device {
+ //
+ // PCI and PC Card NICs are both identified using bus, device
+ // and function numbers. For PC Card, this may require PC
+ // Card services to be loaded in the BIOS or preboot
+ // environment.
+ //
+ struct {
+ //
+ // See S/W UNDI ROMID structure definition for PCI and
+ // PCC BusType definitions.
+ //
+ PXE_UINT32 BusType;
+
+ //
+ // Bus, device & function numbers that locate this device.
+ //
+ PXE_UINT16 Bus;
+ PXE_UINT8 Device;
+ PXE_UINT8 Function;
+ }
+ PCI, PCC;
+
+ //
+ // %%TBD - More information is needed about enumerating
+ // USB and 1394 devices.
+ //
+ struct {
+ PXE_UINT32 BusType;
+ PXE_UINT32 tdb;
+ }
+ USB, _1394;
+} PXE_DEVICE;
+
+//
+// cpb and db definitions
+//
+#define MAX_PCI_CONFIG_LEN 64 // # of dwords
+#define MAX_EEPROM_LEN 128 // #of dwords
+#define MAX_XMIT_BUFFERS 32 // recycling Q length for xmit_done
+#define MAX_MCAST_ADDRESS_CNT 8
+
+typedef struct s_pxe_cpb_start_30 {
+ //
+ // PXE_VOID Delay(UINTN microseconds);
+ //
+ // UNDI will never request a delay smaller than 10 microseconds
+ // and will always request delays in increments of 10 microseconds.
+ // The Delay() CallBack routine must delay between n and n + 10
+ // microseconds before returning control to the UNDI.
+ //
+ // This field cannot be set to zero.
+ //
+ UINT64 Delay;
+
+ //
+ // PXE_VOID Block(UINT32 enable);
+ //
+ // UNDI may need to block multi-threaded/multi-processor access to
+ // critical code sections when programming or accessing the network
+ // device. To this end, a blocking service is needed by the UNDI.
+ // When UNDI needs a block, it will call Block() passing a non-zero
+ // value. When UNDI no longer needs a block, it will call Block()
+ // with a zero value. When called, if the Block() is already enabled,
+ // do not return control to the UNDI until the previous Block() is
+ // disabled.
+ //
+ // This field cannot be set to zero.
+ //
+ UINT64 Block;
+
+ //
+ // PXE_VOID Virt2Phys(UINT64 virtual, UINT64 physical_ptr);
+ //
+ // UNDI will pass the virtual address of a buffer and the virtual
+ // address of a 64-bit physical buffer. Convert the virtual address
+ // to a physical address and write the result to the physical address
+ // buffer. If virtual and physical addresses are the same, just
+ // copy the virtual address to the physical address buffer.
+ //
+ // This field can be set to zero if virtual and physical addresses
+ // are equal.
+ //
+ UINT64 Virt2Phys;
+ //
+ // PXE_VOID Mem_IO(UINT8 read_write, UINT8 len, UINT64 port,
+ // UINT64 buf_addr);
+ //
+ // UNDI will read or write the device io space using this call back
+ // function. It passes the number of bytes as the len parameter and it
+ // will be either 1,2,4 or 8.
+ //
+ // This field can not be set to zero.
+ //
+ UINT64 Mem_IO;
+} PXE_CPB_START_30;
+
+typedef struct s_pxe_cpb_start_31 {
+ //
+ // PXE_VOID Delay(UINT64 UnqId, UINTN microseconds);
+ //
+ // UNDI will never request a delay smaller than 10 microseconds
+ // and will always request delays in increments of 10 microseconds.
+ // The Delay() CallBack routine must delay between n and n + 10
+ // microseconds before returning control to the UNDI.
+ //
+ // This field cannot be set to zero.
+ //
+ UINT64 Delay;
+
+ //
+ // PXE_VOID Block(UINT64 unq_id, UINT32 enable);
+ //
+ // UNDI may need to block multi-threaded/multi-processor access to
+ // critical code sections when programming or accessing the network
+ // device. To this end, a blocking service is needed by the UNDI.
+ // When UNDI needs a block, it will call Block() passing a non-zero
+ // value. When UNDI no longer needs a block, it will call Block()
+ // with a zero value. When called, if the Block() is already enabled,
+ // do not return control to the UNDI until the previous Block() is
+ // disabled.
+ //
+ // This field cannot be set to zero.
+ //
+ UINT64 Block;
+
+ //
+ // PXE_VOID Virt2Phys(UINT64 UnqId, UINT64 virtual, UINT64 physical_ptr);
+ //
+ // UNDI will pass the virtual address of a buffer and the virtual
+ // address of a 64-bit physical buffer. Convert the virtual address
+ // to a physical address and write the result to the physical address
+ // buffer. If virtual and physical addresses are the same, just
+ // copy the virtual address to the physical address buffer.
+ //
+ // This field can be set to zero if virtual and physical addresses
+ // are equal.
+ //
+ UINT64 Virt2Phys;
+ //
+ // PXE_VOID Mem_IO(UINT64 UnqId, UINT8 read_write, UINT8 len, UINT64 port,
+ // UINT64 buf_addr);
+ //
+ // UNDI will read or write the device io space using this call back
+ // function. It passes the number of bytes as the len parameter and it
+ // will be either 1,2,4 or 8.
+ //
+ // This field can not be set to zero.
+ //
+ UINT64 Mem_IO;
+ //
+ // PXE_VOID Map_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
+ // UINT32 Direction, UINT64 mapped_addr);
+ //
+ // UNDI will pass the virtual address of a buffer, direction of the data
+ // flow from/to the mapped buffer (the constants are defined below)
+ // and a place holder (pointer) for the mapped address.
+ // This call will Map the given address to a physical DMA address and write
+ // the result to the mapped_addr pointer. If there is no need to
+ // map the given address to a lower address (i.e. the given address is
+ // associated with a physical address that is already compatible to be
+ // used with the DMA, it converts the given virtual address to it's
+ // physical address and write that in the mapped address pointer.
+ //
+ // This field can be set to zero if there is no mapping service available
+ //
+ UINT64 Map_Mem;
+
+ //
+ // PXE_VOID UnMap_Mem(UINT64 unq_id, UINT64 virtual_addr, UINT32 size,
+ // UINT32 Direction, UINT64 mapped_addr);
+ //
+ // UNDI will pass the virtual and mapped addresses of a buffer
+ // This call will un map the given address
+ //
+ // This field can be set to zero if there is no unmapping service available
+ //
+ UINT64 UnMap_Mem;
+
+ //
+ // PXE_VOID Sync_Mem(UINT64 unq_id, UINT64 virtual,
+ // UINT32 size, UINT32 Direction, UINT64 mapped_addr);
+ //
+ // UNDI will pass the virtual and mapped addresses of a buffer
+ // This call will synchronize the contents of both the virtual and mapped
+ // buffers for the given Direction.
+ //
+ // This field can be set to zero if there is no service available
+ //
+ UINT64 Sync_Mem;
+
+ //
+ // protocol driver can provide anything for this Unique_ID, UNDI remembers
+ // that as just a 64bit value assocaited to the interface specified by
+ // the ifnum and gives it back as a parameter to all the call-back routines
+ // when calling for that interface!
+ //
+ UINT64 Unique_ID;
+ //
+} PXE_CPB_START_31;
+
+#define TO_AND_FROM_DEVICE 0
+#define FROM_DEVICE 1
+#define TO_DEVICE 2
+
+#define PXE_DELAY_MILLISECOND 1000
+#define PXE_DELAY_SECOND 1000000
+#define PXE_IO_READ 0
+#define PXE_IO_WRITE 1
+#define PXE_MEM_READ 2
+#define PXE_MEM_WRITE 4
+
+typedef struct s_pxe_db_get_init_info {
+ //
+ // Minimum length of locked memory buffer that must be given to
+ // the Initialize command. Giving UNDI more memory will generally
+ // give better performance.
+ //
+ // If MemoryRequired is zero, the UNDI does not need and will not
+ // use system memory to receive and transmit packets.
+ //
+ PXE_UINT32 MemoryRequired;
+
+ //
+ // Maximum frame data length for Tx/Rx excluding the media header.
+ //
+ PXE_UINT32 FrameDataLen;
+
+ //
+ // Supported link speeds are in units of mega bits. Common ethernet
+ // values are 10, 100 and 1000. Unused LinkSpeeds[] entries are zero
+ // filled.
+ //
+ PXE_UINT32 LinkSpeeds[4];
+
+ //
+ // Number of non-volatile storage items.
+ //
+ PXE_UINT32 NvCount;
+
+ //
+ // Width of non-volatile storage item in bytes. 0, 1, 2 or 4
+ //
+ PXE_UINT16 NvWidth;
+
+ //
+ // Media header length. This is the typical media header length for
+ // this UNDI. This information is needed when allocating receive
+ // and transmit buffers.
+ //
+ PXE_UINT16 MediaHeaderLen;
+
+ //
+ // Number of bytes in the NIC hardware (MAC) address.
+ //
+ PXE_UINT16 HWaddrLen;
+
+ //
+ // Maximum number of multicast MAC addresses in the multicast
+ // MAC address filter list.
+ //
+ PXE_UINT16 MCastFilterCnt;
+
+ //
+ // Default number and size of transmit and receive buffers that will
+ // be allocated by the UNDI. If MemoryRequired is non-zero, this
+ // allocation will come out of the memory buffer given to the Initialize
+ // command. If MemoryRequired is zero, this allocation will come out of
+ // memory on the NIC.
+ //
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
+
+ //
+ // Hardware interface types defined in the Assigned Numbers RFC
+ // and used in DHCP and ARP packets.
+ // See the PXE_IFTYPE typedef and PXE_IFTYPE_xxx macros.
+ //
+ PXE_UINT8 IFtype;
+
+ //
+ // Supported duplex. See PXE_DUPLEX_xxxxx #defines below.
+ //
+ PXE_UINT8 SupportedDuplexModes;
+
+ //
+ // Supported loopback options. See PXE_LOOPBACK_xxxxx #defines below.
+ //
+ PXE_UINT8 SupportedLoopBackModes;
+} PXE_DB_GET_INIT_INFO;
+
+#define PXE_MAX_TXRX_UNIT_ETHER 1500
+
+#define PXE_HWADDR_LEN_ETHER 0x0006
+#define PXE_MAC_HEADER_LEN_ETHER 0x000E
+
+#define PXE_DUPLEX_ENABLE_FULL_SUPPORTED 1
+#define PXE_DUPLEX_FORCE_FULL_SUPPORTED 2
+
+#define PXE_LOOPBACK_INTERNAL_SUPPORTED 1
+#define PXE_LOOPBACK_EXTERNAL_SUPPORTED 2
+
+typedef struct s_pxe_pci_config_info {
+ //
+ // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
+ // For PCI bus devices, this field is set to PXE_BUSTYPE_PCI.
+ //
+ UINT32 BusType;
+
+ //
+ // This identifies the PCI network device that this UNDI interface
+ // is bound to.
+ //
+ UINT16 Bus;
+ UINT8 Device;
+ UINT8 Function;
+
+ //
+ // This is a copy of the PCI configuration space for this
+ // network device.
+ //
+ union {
+ UINT8 Byte[256];
+ UINT16 Word[128];
+ UINT32 Dword[64];
+ } Config;
+} PXE_PCI_CONFIG_INFO;
+
+typedef struct s_pxe_pcc_config_info {
+ //
+ // This is the flag field for the PXE_DB_GET_CONFIG_INFO union.
+ // For PCC bus devices, this field is set to PXE_BUSTYPE_PCC.
+ //
+ PXE_UINT32 BusType;
+
+ //
+ // This identifies the PCC network device that this UNDI interface
+ // is bound to.
+ //
+ PXE_UINT16 Bus;
+ PXE_UINT8 Device;
+ PXE_UINT8 Function;
+
+ //
+ // This is a copy of the PCC configuration space for this
+ // network device.
+ //
+ union {
+ PXE_UINT8 Byte[256];
+ PXE_UINT16 Word[128];
+ PXE_UINT32 Dword[64];
+ } Config;
+} PXE_PCC_CONFIG_INFO;
+
+typedef union u_pxe_db_get_config_info {
+ PXE_PCI_CONFIG_INFO pci;
+ PXE_PCC_CONFIG_INFO pcc;
+} PXE_DB_GET_CONFIG_INFO;
+
+typedef struct s_pxe_cpb_initialize {
+ //
+ // Address of first (lowest) byte of the memory buffer. This buffer must
+ // be in contiguous physical memory and cannot be swapped out. The UNDI
+ // will be using this for transmit and receive buffering.
+ //
+ PXE_UINT64 MemoryAddr;
+
+ //
+ // MemoryLength must be greater than or equal to MemoryRequired
+ // returned by the Get Init Info command.
+ //
+ PXE_UINT32 MemoryLength;
+
+ //
+ // Desired link speed in Mbit/sec. Common ethernet values are 10, 100
+ // and 1000. Setting a value of zero will auto-detect and/or use the
+ // default link speed (operation depends on UNDI/NIC functionality).
+ //
+ PXE_UINT32 LinkSpeed;
+
+ //
+ // Suggested number and size of receive and transmit buffers to
+ // allocate. If MemoryAddr and MemoryLength are non-zero, this
+ // allocation comes out of the supplied memory buffer. If MemoryAddr
+ // and MemoryLength are zero, this allocation comes out of memory
+ // on the NIC.
+ //
+ // If these fields are set to zero, the UNDI will allocate buffer
+ // counts and sizes as it sees fit.
+ //
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
+
+ //
+ // The following configuration parameters are optional and must be zero
+ // to use the default values.
+ //
+ PXE_UINT8 DuplexMode;
+
+ PXE_UINT8 LoopBackMode;
+} PXE_CPB_INITIALIZE;
+
+#define PXE_DUPLEX_DEFAULT 0x00
+#define PXE_FORCE_FULL_DUPLEX 0x01
+#define PXE_ENABLE_FULL_DUPLEX 0x02
+#define PXE_FORCE_HALF_DUPLEX 0x04
+#define PXE_DISABLE_FULL_DUPLEX 0x08
+
+#define LOOPBACK_NORMAL 0
+#define LOOPBACK_INTERNAL 1
+#define LOOPBACK_EXTERNAL 2
+
+typedef struct s_pxe_db_initialize {
+ //
+ // Actual amount of memory used from the supplied memory buffer. This
+ // may be less that the amount of memory suppllied and may be zero if
+ // the UNDI and network device do not use external memory buffers.
+ //
+ // Memory used by the UNDI and network device is allocated from the
+ // lowest memory buffer address.
+ //
+ PXE_UINT32 MemoryUsed;
+
+ //
+ // Actual number and size of receive and transmit buffers that were
+ // allocated.
+ //
+ PXE_UINT16 TxBufCnt;
+ PXE_UINT16 TxBufSize;
+ PXE_UINT16 RxBufCnt;
+ PXE_UINT16 RxBufSize;
+} PXE_DB_INITIALIZE;
+
+typedef struct s_pxe_cpb_receive_filters {
+ //
+ // List of multicast MAC addresses. This list, if present, will
+ // replace the existing multicast MAC address filter list.
+ //
+ PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
+} PXE_CPB_RECEIVE_FILTERS;
+
+typedef struct s_pxe_db_receive_filters {
+ //
+ // Filtered multicast MAC address list.
+ //
+ PXE_MAC_ADDR MCastList[MAX_MCAST_ADDRESS_CNT];
+} PXE_DB_RECEIVE_FILTERS;
+
+typedef struct s_pxe_cpb_station_address {
+ //
+ // If supplied and supported, the current station MAC address
+ // will be changed.
+ //
+ PXE_MAC_ADDR StationAddr;
+} PXE_CPB_STATION_ADDRESS;
+
+typedef struct s_pxe_dpb_station_address {
+ //
+ // Current station MAC address.
+ //
+ PXE_MAC_ADDR StationAddr;
+
+ //
+ // Station broadcast MAC address.
+ //
+ PXE_MAC_ADDR BroadcastAddr;
+
+ //
+ // Permanent station MAC address.
+ //
+ PXE_MAC_ADDR PermanentAddr;
+} PXE_DB_STATION_ADDRESS;
+
+typedef struct s_pxe_db_statistics {
+ //
+ // Bit field identifying what statistic data is collected by the
+ // UNDI/NIC.
+ // If bit 0x00 is set, Data[0x00] is collected.
+ // If bit 0x01 is set, Data[0x01] is collected.
+ // If bit 0x20 is set, Data[0x20] is collected.
+ // If bit 0x21 is set, Data[0x21] is collected.
+ // Etc.
+ //
+ PXE_UINT64 Supported;
+
+ //
+ // Statistic data.
+ //
+ PXE_UINT64 Data[64];
+} PXE_DB_STATISTICS;
+
+//
+// Total number of frames received. Includes frames with errors and
+// dropped frames.
+//
+#define PXE_STATISTICS_RX_TOTAL_FRAMES 0x00
+
+//
+// Number of valid frames received and copied into receive buffers.
+//
+#define PXE_STATISTICS_RX_GOOD_FRAMES 0x01
+
+//
+// Number of frames below the minimum length for the media.
+// This would be <64 for ethernet.
+//
+#define PXE_STATISTICS_RX_UNDERSIZE_FRAMES 0x02
+
+//
+// Number of frames longer than the maxminum length for the
+// media. This would be >1500 for ethernet.
+//
+#define PXE_STATISTICS_RX_OVERSIZE_FRAMES 0x03
+
+//
+// Valid frames that were dropped because receive buffers were full.
+//
+#define PXE_STATISTICS_RX_DROPPED_FRAMES 0x04
+
+//
+// Number of valid unicast frames received and not dropped.
+//
+#define PXE_STATISTICS_RX_UNICAST_FRAMES 0x05
+
+//
+// Number of valid broadcast frames received and not dropped.
+//
+#define PXE_STATISTICS_RX_BROADCAST_FRAMES 0x06
+
+//
+// Number of valid mutlicast frames received and not dropped.
+//
+#define PXE_STATISTICS_RX_MULTICAST_FRAMES 0x07
+
+//
+// Number of frames w/ CRC or alignment errors.
+//
+#define PXE_STATISTICS_RX_CRC_ERROR_FRAMES 0x08
+
+//
+// Total number of bytes received. Includes frames with errors
+// and dropped frames.
+//
+#define PXE_STATISTICS_RX_TOTAL_BYTES 0x09
+
+//
+// Transmit statistics.
+//
+#define PXE_STATISTICS_TX_TOTAL_FRAMES 0x0A
+#define PXE_STATISTICS_TX_GOOD_FRAMES 0x0B
+#define PXE_STATISTICS_TX_UNDERSIZE_FRAMES 0x0C
+#define PXE_STATISTICS_TX_OVERSIZE_FRAMES 0x0D
+#define PXE_STATISTICS_TX_DROPPED_FRAMES 0x0E
+#define PXE_STATISTICS_TX_UNICAST_FRAMES 0x0F
+#define PXE_STATISTICS_TX_BROADCAST_FRAMES 0x10
+#define PXE_STATISTICS_TX_MULTICAST_FRAMES 0x11
+#define PXE_STATISTICS_TX_CRC_ERROR_FRAMES 0x12
+#define PXE_STATISTICS_TX_TOTAL_BYTES 0x13
+
+//
+// Number of collisions detection on this subnet.
+//
+#define PXE_STATISTICS_COLLISIONS 0x14
+
+//
+// Number of frames destined for unsupported protocol.
+//
+#define PXE_STATISTICS_UNSUPPORTED_PROTOCOL 0x15
+
+typedef struct s_pxe_cpb_mcast_ip_to_mac {
+ //
+ // Multicast IP address to be converted to multicast MAC address.
+ //
+ PXE_IP_ADDR IP;
+} PXE_CPB_MCAST_IP_TO_MAC;
+
+typedef struct s_pxe_db_mcast_ip_to_mac {
+ //
+ // Multicast MAC address.
+ //
+ PXE_MAC_ADDR MAC;
+} PXE_DB_MCAST_IP_TO_MAC;
+
+typedef struct s_pxe_cpb_nvdata_sparse {
+ //
+ // NvData item list. Only items in this list will be updated.
+ //
+ struct {
+ //
+ // Non-volatile storage address to be changed.
+ //
+ PXE_UINT32 Addr;
+
+ //
+ // Data item to write into above storage address.
+ //
+ union {
+ PXE_UINT8 Byte;
+ PXE_UINT16 Word;
+ PXE_UINT32 Dword;
+ } Data;
+ } Item[MAX_EEPROM_LEN];
+}
+PXE_CPB_NVDATA_SPARSE;
+
+//
+// When using bulk update, the size of the CPB structure must be
+// the same size as the non-volatile NIC storage.
+//
+typedef union u_pxe_cpb_nvdata_bulk {
+ //
+ // Array of byte-wide data items.
+ //
+ PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
+
+ //
+ // Array of word-wide data items.
+ //
+ PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
+
+ //
+ // Array of dword-wide data items.
+ //
+ PXE_UINT32 Dword[MAX_EEPROM_LEN];
+} PXE_CPB_NVDATA_BULK;
+
+typedef struct s_pxe_db_nvdata {
+ //
+ // Arrays of data items from non-volatile storage.
+ //
+ union {
+ //
+ // Array of byte-wide data items.
+ //
+ PXE_UINT8 Byte[MAX_EEPROM_LEN << 2];
+
+ //
+ // Array of word-wide data items.
+ //
+ PXE_UINT16 Word[MAX_EEPROM_LEN << 1];
+
+ //
+ // Array of dword-wide data items.
+ //
+ PXE_UINT32 Dword[MAX_EEPROM_LEN];
+ } Data;
+} PXE_DB_NVDATA;
+
+typedef struct s_pxe_db_get_status {
+ //
+ // Length of next receive frame (header + data). If this is zero,
+ // there is no next receive frame available.
+ //
+ PXE_UINT32 RxFrameLen;
+
+ //
+ // Reserved, set to zero.
+ //
+ PXE_UINT32 reserved;
+
+ //
+ // Addresses of transmitted buffers that need to be recycled.
+ //
+ PXE_UINT64 TxBuffer[MAX_XMIT_BUFFERS];
+} PXE_DB_GET_STATUS;
+
+typedef struct s_pxe_cpb_fill_header {
+ //
+ // Source and destination MAC addresses. These will be copied into
+ // the media header without doing byte swapping.
+ //
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
+
+ //
+ // Address of first byte of media header. The first byte of packet data
+ // follows the last byte of the media header.
+ //
+ PXE_UINT64 MediaHeader;
+
+ //
+ // Length of packet data in bytes (not including the media header).
+ //
+ PXE_UINT32 PacketLen;
+
+ //
+ // Protocol type. This will be copied into the media header without
+ // doing byte swapping. Protocol type numbers can be obtained from
+ // the Assigned Numbers RFC 1700.
+ //
+ PXE_UINT16 Protocol;
+
+ //
+ // Length of the media header in bytes.
+ //
+ PXE_UINT16 MediaHeaderLen;
+} PXE_CPB_FILL_HEADER;
+
+#define PXE_PROTOCOL_ETHERNET_IP 0x0800
+#define PXE_PROTOCOL_ETHERNET_ARP 0x0806
+#define MAX_XMIT_FRAGMENTS 16
+
+typedef struct s_pxe_cpb_fill_header_fragmented {
+ //
+ // Source and destination MAC addresses. These will be copied into
+ // the media header without doing byte swapping.
+ //
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
+
+ //
+ // Length of packet data in bytes (not including the media header).
+ //
+ PXE_UINT32 PacketLen;
+
+ //
+ // Protocol type. This will be copied into the media header without
+ // doing byte swapping. Protocol type numbers can be obtained from
+ // the Assigned Numbers RFC 1700.
+ //
+ PXE_MEDIA_PROTOCOL Protocol;
+
+ //
+ // Length of the media header in bytes.
+ //
+ PXE_UINT16 MediaHeaderLen;
+
+ //
+ // Number of packet fragment descriptors.
+ //
+ PXE_UINT16 FragCnt;
+
+ //
+ // Reserved, must be set to zero.
+ //
+ PXE_UINT16 reserved;
+
+ //
+ // Array of packet fragment descriptors. The first byte of the media
+ // header is the first byte of the first fragment.
+ //
+ struct {
+ //
+ // Address of this packet fragment.
+ //
+ PXE_UINT64 FragAddr;
+
+ //
+ // Length of this packet fragment.
+ //
+ PXE_UINT32 FragLen;
+
+ //
+ // Reserved, must be set to zero.
+ //
+ PXE_UINT32 reserved;
+ } FragDesc[MAX_XMIT_FRAGMENTS];
+}
+PXE_CPB_FILL_HEADER_FRAGMENTED;
+
+typedef struct s_pxe_cpb_transmit {
+ //
+ // Address of first byte of frame buffer. This is also the first byte
+ // of the media header.
+ //
+ PXE_UINT64 FrameAddr;
+
+ //
+ // Length of the data portion of the frame buffer in bytes. Do not
+ // include the length of the media header.
+ //
+ PXE_UINT32 DataLen;
+
+ //
+ // Length of the media header in bytes.
+ //
+ PXE_UINT16 MediaheaderLen;
+
+ //
+ // Reserved, must be zero.
+ //
+ PXE_UINT16 reserved;
+} PXE_CPB_TRANSMIT;
+
+typedef struct s_pxe_cpb_transmit_fragments {
+ //
+ // Length of packet data in bytes (not including the media header).
+ //
+ PXE_UINT32 FrameLen;
+
+ //
+ // Length of the media header in bytes.
+ //
+ PXE_UINT16 MediaheaderLen;
+
+ //
+ // Number of packet fragment descriptors.
+ //
+ PXE_UINT16 FragCnt;
+
+ //
+ // Array of frame fragment descriptors. The first byte of the first
+ // fragment is also the first byte of the media header.
+ //
+ struct {
+ //
+ // Address of this frame fragment.
+ //
+ PXE_UINT64 FragAddr;
+
+ //
+ // Length of this frame fragment.
+ //
+ PXE_UINT32 FragLen;
+
+ //
+ // Reserved, must be set to zero.
+ //
+ PXE_UINT32 reserved;
+ } FragDesc[MAX_XMIT_FRAGMENTS];
+}
+PXE_CPB_TRANSMIT_FRAGMENTS;
+
+typedef struct s_pxe_cpb_receive {
+ //
+ // Address of first byte of receive buffer. This is also the first byte
+ // of the frame header.
+ //
+ PXE_UINT64 BufferAddr;
+
+ //
+ // Length of receive buffer. This must be large enough to hold the
+ // received frame (media header + data). If the length of smaller than
+ // the received frame, data will be lost.
+ //
+ PXE_UINT32 BufferLen;
+
+ //
+ // Reserved, must be set to zero.
+ //
+ PXE_UINT32 reserved;
+} PXE_CPB_RECEIVE;
+
+typedef struct s_pxe_db_receive {
+ //
+ // Source and destination MAC addresses from media header.
+ //
+ PXE_MAC_ADDR SrcAddr;
+ PXE_MAC_ADDR DestAddr;
+
+ //
+ // Length of received frame. May be larger than receive buffer size.
+ // The receive buffer will not be overwritten. This is how to tell
+ // if data was lost because the receive buffer was too small.
+ //
+ PXE_UINT32 FrameLen;
+
+ //
+ // Protocol type from media header.
+ //
+ PXE_MEDIA_PROTOCOL Protocol;
+
+ //
+ // Length of media header in received frame.
+ //
+ PXE_UINT16 MediaHeaderLen;
+
+ //
+ // Type of receive frame.
+ //
+ PXE_FRAME_TYPE Type;
+
+ //
+ // Reserved, must be zero.
+ //
+ PXE_UINT8 reserved[7];
+
+} PXE_DB_RECEIVE;
+
+#pragma pack()
+
+#endif
diff --git a/MdePkg/Include/Uefi/Errors.h b/MdePkg/Include/Uefi/Errors.h new file mode 100644 index 0000000000..fd1dc02c81 --- /dev/null +++ b/MdePkg/Include/Uefi/Errors.h @@ -0,0 +1,24 @@ +/** @file
+ Include file that supportes UEFI Error Codes.
+
+ This include file must only contain things defined in the UEFI 2.0 specification.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiErrors.h
+
+**/
+
+#ifndef __UEFI_ERRORS_H__
+#define __UEFI_ERRORS_H__
+
+
+
+#endif
diff --git a/MdePkg/Include/Uefi/UefiSpec.h b/MdePkg/Include/Uefi/UefiSpec.h new file mode 100644 index 0000000000..d648b1b9f1 --- /dev/null +++ b/MdePkg/Include/Uefi/UefiSpec.h @@ -0,0 +1,2460 @@ +/** @file
+ Include file that supportes UEFI.
+
+ This include file must only contain things defined in the UEFI 2.0 specification.
+ If a code construct is defined in the UEFI 2.0 specification it must be included
+ by this include file.
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: UefiSpec.h
+
+**/
+
+#ifndef __UEFI_SPEC_H__
+#define __UEFI_SPEC_H__
+
+#include <Common/MultiPhase.h>
+
+//
+// EFI Data Types based on ANSI C integer types in EfiBind.h
+//
+
+
+//
+// EFI Data Types derived from other EFI data types.
+//
+
+#define NULL_HANDLE ((VOID *) 0)
+
+typedef VOID *EFI_EVENT;
+typedef UINTN EFI_TPL;
+
+//
+// EFI Time Abstraction:
+// Year: 2000 - 20XX
+// Month: 1 - 12
+// Day: 1 - 31
+// Hour: 0 - 23
+// Minute: 0 - 59
+// Second: 0 - 59
+// Nanosecond: 0 - 999,999,999
+// TimeZone: -1440 to 1440 or 2047
+//
+typedef struct {
+ UINT16 Year;
+ UINT8 Month;
+ UINT8 Day;
+ UINT8 Hour;
+ UINT8 Minute;
+ UINT8 Second;
+ UINT8 Pad1;
+ UINT32 Nanosecond;
+ INT16 TimeZone;
+ UINT8 Daylight;
+ UINT8 Pad2;
+} EFI_TIME;
+
+//
+// Bit definitions for EFI_TIME.Daylight
+//
+#define EFI_TIME_ADJUST_DAYLIGHT 0x01
+#define EFI_TIME_IN_DAYLIGHT 0x02
+
+//
+// Value definition for EFI_TIME.TimeZone
+//
+#define EFI_UNSPECIFIED_TIMEZONE 0x07FF
+
+//
+// Networking
+//
+typedef struct {
+ UINT8 Addr[4];
+} EFI_IPv4_ADDRESS;
+
+typedef struct {
+ UINT8 Addr[16];
+} EFI_IPv6_ADDRESS;
+
+typedef struct {
+ UINT8 Addr[32];
+} EFI_MAC_ADDRESS;
+
+typedef union {
+ UINT32 Addr[4];
+ EFI_IPv4_ADDRESS v4;
+ EFI_IPv6_ADDRESS v6;
+} EFI_IP_ADDRESS;
+
+
+typedef enum {
+ AllocateAnyPages,
+ AllocateMaxAddress,
+ AllocateAddress,
+ MaxAllocateType
+} EFI_ALLOCATE_TYPE;
+
+
+//
+// possible caching types for the memory range
+//
+#define EFI_MEMORY_UC 0x0000000000000001ULL
+#define EFI_MEMORY_WC 0x0000000000000002ULL
+#define EFI_MEMORY_WT 0x0000000000000004ULL
+#define EFI_MEMORY_WB 0x0000000000000008ULL
+#define EFI_MEMORY_UCE 0x0000000000000010ULL
+
+//
+// physical memory protection on range
+//
+#define EFI_MEMORY_WP 0x0000000000001000ULL
+#define EFI_MEMORY_RP 0x0000000000002000ULL
+#define EFI_MEMORY_XP 0x0000000000004000ULL
+
+//
+// range requires a runtime mapping
+//
+#define EFI_MEMORY_RUNTIME 0x8000000000000000ULL
+
+typedef UINT64 EFI_VIRTUAL_ADDRESS;
+
+#define EFI_MEMORY_DESCRIPTOR_VERSION 1
+typedef struct {
+ UINT32 Type;
+ UINT32 Pad;
+ EFI_PHYSICAL_ADDRESS PhysicalStart;
+ EFI_VIRTUAL_ADDRESS VirtualStart;
+ UINT64 NumberOfPages;
+ UINT64 Attribute;
+} EFI_MEMORY_DESCRIPTOR;
+
+//
+// EFI_FIELD_OFFSET - returns the byte offset to a field within a structure
+//
+#define EFI_FIELD_OFFSET(TYPE,Field) ((UINTN)(&(((TYPE *) 0)->Field)))
+
+#include <Protocol/DevicePath.h>
+#include <Protocol/SimpleTextIn.h>
+#include <Protocol/SimpleTextOut.h>
+
+//
+// Declare forward referenced data structures
+//
+typedef struct _EFI_SYSTEM_TABLE EFI_SYSTEM_TABLE;
+
+/**
+ Allocates memory pages from the system.
+
+ @param Type The type of allocation to perform.
+ @param MemoryType The type of memory to allocate.
+ @param Pages The number of contiguous 4 KB pages to allocate.
+ @param Memory Pointer to a physical address. On input, the way in which the address is
+ used depends on the value of Type.
+
+ @retval EFI_SUCCESS The requested pages were allocated.
+ @retval EFI_INVALID_PARAMETER 1) Type is not AllocateAnyPages or
+ AllocateMaxAddress or AllocateAddress.
+ 2) MemoryType is in the range
+ EfiMaxMemoryType..0x7FFFFFFF.
+ @retval EFI_OUT_OF_RESOURCES The pages could not be allocated.
+ @retval EFI_NOT_FOUND The requested pages could not be found.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ALLOCATE_PAGES) (
+ IN EFI_ALLOCATE_TYPE Type,
+ IN EFI_MEMORY_TYPE MemoryType,
+ IN UINTN Pages,
+ IN OUT EFI_PHYSICAL_ADDRESS *Memory
+ );
+
+/**
+ Frees memory pages.
+
+ @param Memory The base physical address of the pages to be freed.
+ @param Pages The number of contiguous 4 KB pages to free.
+
+ @retval EFI_SUCCESS The requested pages were freed.
+ @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or Pages is invalid.
+ @retval EFI_NOT_FOUND The requested memory pages were not allocated with
+ AllocatePages().
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FREE_PAGES) (
+ IN EFI_PHYSICAL_ADDRESS Memory,
+ IN UINTN Pages
+ );
+
+/**
+ Returns the current memory map.
+
+ @param MemoryMapSize A pointer to the size, in bytes, of the MemoryMap buffer.
+ @param MemoryMap A pointer to the buffer in which firmware places the current memory
+ map.
+ @param MapKey A pointer to the location in which firmware returns the key for the
+ current memory map.
+ @param DescriptorSize A pointer to the location in which firmware returns the size, in bytes, of
+ an individual EFI_MEMORY_DESCRIPTOR.
+ @param DescriptorVersion A pointer to the location in which firmware returns the version number
+ associated with the EFI_MEMORY_DESCRIPTOR.
+
+ @retval EFI_SUCCESS The memory map was returned in the MemoryMap buffer.
+ @retval EFI_BUFFER_TOO_SMALL The MemoryMap buffer was too small. The current buffer size
+ needed to hold the memory map is returned in MemoryMapSize.
+ @retval EFI_INVALID_PARAMETER 1) MemoryMapSize is NULL.
+ 2) The MemoryMap buffer is not too small and MemoryMap is
+ NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_MEMORY_MAP) (
+ IN OUT UINTN *MemoryMapSize,
+ IN OUT EFI_MEMORY_DESCRIPTOR *MemoryMap,
+ OUT UINTN *MapKey,
+ OUT UINTN *DescriptorSize,
+ OUT UINT32 *DescriptorVersion
+ );
+
+#define NextMemoryDescriptor(_Ptr, _Size) ((EFI_MEMORY_DESCRIPTOR *) (((UINT8 *) (_Ptr)) + (_Size)))
+#define NEXT_MEMORY_DESCRIPTOR(_Ptr, _Size) NextMemoryDescriptor (_Ptr, _Size)
+
+/**
+ Allocates pool memory.
+
+ @param PoolType The type of pool to allocate.
+ @param Size The number of bytes to allocate from the pool.
+ @param Buffer A pointer to a pointer to the allocated buffer if the call succeeds;
+ undefined otherwise.
+
+ @retval EFI_SUCCESS The requested number of bytes was allocated.
+ @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.
+ @retval EFI_INVALID_PARAMETER PoolType was invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_ALLOCATE_POOL) (
+ IN EFI_MEMORY_TYPE PoolType,
+ IN UINTN Size,
+ OUT VOID **Buffer
+ );
+
+/**
+ Returns pool memory to the system.
+
+ @param Buffer Pointer to the buffer to free.
+
+ @retval EFI_SUCCESS The memory was returned to the system.
+ @retval EFI_INVALID_PARAMETER Buffer was invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_FREE_POOL) (
+ IN VOID *Buffer
+ );
+
+/**
+ Changes the runtime addressing mode of EFI firmware from physical to virtual.
+
+ @param MemoryMapSize The size in bytes of VirtualMap.
+ @param DescriptorSize The size in bytes of an entry in the VirtualMap.
+ @param DescriptorVersion The version of the structure entries in VirtualMap.
+ @param VirtualMap An array of memory descriptors which contain new virtual
+ address mapping information for all runtime ranges.
+
+ @retval EFI_SUCCESS The virtual address map has been applied.
+ @retval EFI_UNSUPPORTED EFI firmware is not at runtime, or the EFI firmware is already in
+ virtual address mapped mode.
+ @retval EFI_INVALID_PARAMETER DescriptorSize or DescriptorVersion is invalid.
+ @retval EFI_NO_MAPPING A virtual address was not supplied for a range in the memory
+ map that requires a mapping.
+ @retval EFI_NOT_FOUND A virtual address was supplied for an address that is not found
+ in the memory map.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_VIRTUAL_ADDRESS_MAP) (
+ IN UINTN MemoryMapSize,
+ IN UINTN DescriptorSize,
+ IN UINT32 DescriptorVersion,
+ IN EFI_MEMORY_DESCRIPTOR *VirtualMap
+ );
+
+/**
+ Connects one or more drivers to a controller.
+
+ @param ControllerHandle The handle of the controller to which driver(s) are to be connected.
+ @param DriverImageHandle A pointer to an ordered list handles that support the
+ EFI_DRIVER_BINDING_PROTOCOL.
+ @param RemainingDevicePath A pointer to the device path that specifies a child of the
+ controller specified by ControllerHandle.
+ @param Recursive If TRUE, then ConnectController() is called recursively
+ until the entire tree of controllers below the controller specified
+ by ControllerHandle have been created. If FALSE, then
+ the tree of controllers is only expanded one level.
+
+ @retval EFI_SUCCESS 1) One or more drivers were connected to ControllerHandle.
+ 2) No drivers were connected to ControllerHandle, but
+ RemainingDevicePath is not NULL, and it is an End Device
+ Path Node.
+ @retval EFI_INVALID_PARAMETER ControllerHandle is not a valid EFI_HANDLE.
+ @retval EFI_NOT_FOUND 1) There are no EFI_DRIVER_BINDING_PROTOCOL instances
+ present in the system.
+ 2) No drivers were connected to ControllerHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CONNECT_CONTROLLER) (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE *DriverImageHandle, OPTIONAL
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath, OPTIONAL
+ IN BOOLEAN Recursive
+ );
+
+/**
+ Disconnects one or more drivers from a controller.
+
+ @param ControllerHandle The handle of the controller from which driver(s) are to be disconnected.
+ @param DriverImageHandle The driver to disconnect from ControllerHandle.
+ @param ChildHandle The handle of the child to destroy.
+
+ @retval EFI_SUCCESS 1) One or more drivers were disconnected from the controller.
+ 2) On entry, no drivers are managing ControllerHandle.
+ 3) DriverImageHandle is not NULL, and on entry
+ DriverImageHandle is not managing ControllerHandle.
+
+ @retval EFI_INVALID_PARAMETER One ore more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to disconnect any drivers from
+ ControllerHandle.
+ @retval EFI_DEVICE_ERROR The controller could not be disconnected because of a device error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_DISCONNECT_CONTROLLER) (
+ IN EFI_HANDLE ControllerHandle,
+ IN EFI_HANDLE DriverImageHandle, OPTIONAL
+ IN EFI_HANDLE ChildHandle OPTIONAL
+ );
+
+//
+// ConvertPointer DebugDisposition type.
+//
+#define EFI_OPTIONAL_PTR 0x00000001
+#define EFI_OPTIONAL_POINTER EFI_OPTIONAL_PTR
+
+/**
+ Determines the new virtual address that is to be used on subsequent memory accesses.
+
+ @param DebugDisposition Supplies type information for the pointer being converted.
+ @param Address A pointer to a pointer that is to be fixed to be the value needed
+ for the new virtual address mappings being applied.
+
+ @retval EFI_SUCCESS The pointer pointed to by Address was modified.
+ @retval EFI_INVALID_PARAMETER 1) Address is NULL.
+ 2) *Address is NULL and DebugDisposition does
+ not have the EFI_OPTIONAL_PTR bit set.
+ @retval EFI_NOT_FOUND The pointer pointed to by Address was not found to be part
+ of the current memory map. This is normally fatal.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CONVERT_POINTER) (
+ IN UINTN DebugDisposition,
+ IN OUT VOID **Address
+ );
+
+//
+// EFI Event Types (name defined in spec)
+//
+#define EVENT_TIMER 0x80000000
+#define EVENT_RUNTIME 0x40000000
+#define EVENT_RUNTIME_CONTEXT 0x20000000
+
+#define EVENT_NOTIFY_WAIT 0x00000100
+#define EVENT_NOTIFY_SIGNAL 0x00000200
+
+#define EVENT_SIGNAL_EXIT_BOOT_SERVICES 0x00000201
+#define EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE 0x60000202
+
+#if ((EDK_RELEASE_VERSION != 0) && (EFI_SPECIFICATION_VERSION < 0x00020000))
+//
+// Prior to UEFI 2.0 Tiano extended these enums. This was replaced by
+// CreateEventEx() Event Groups in UEFI 2.0
+//
+#define EFI_EVENT_NOTIFY_SIGNAL_ALL 0x00000400
+
+#define EFI_EVENT_SIGNAL_READY_TO_BOOT 0x00000203
+#define EFI_EVENT_SIGNAL_LEGACY_BOOT 0x00000204
+
+#endif
+
+//
+// EFI Event Types (name following coding style)
+//
+#define EFI_EVENT_TIMER EVENT_TIMER
+#define EFI_EVENT_RUNTIME EVENT_RUNTIME
+#define EFI_EVENT_RUNTIME_CONTEXT EVENT_RUNTIME_CONTEXT
+
+#define EFI_EVENT_NOTIFY_WAIT EVENT_NOTIFY_WAIT
+#define EFI_EVENT_NOTIFY_SIGNAL EVENT_NOTIFY_SIGNAL
+
+#define EFI_EVENT_SIGNAL_EXIT_BOOT_SERVICES EVENT_SIGNAL_EXIT_BOOT_SERVICES
+#define EFI_EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE EVENT_SIGNAL_VIRTUAL_ADDRESS_CHANGE
+
+
+/**
+ Invoke a notification event
+
+ @param Event Event whose notification function is being invoked.
+ @param Context Pointer to the notification function¡¯s context,
+ which is implementation-dependent.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_EVENT_NOTIFY) (
+ IN EFI_EVENT Event,
+ IN VOID *Context
+ );
+
+/**
+ Creates an event.
+
+ @param Type The type of event to create and its mode and attributes.
+ @param NotifyTpl Pointer to the notification function¡¯s context.
+ @param NotifyFunction Pointer to the event¡¯s notification function, if any.
+ @param NotifyContext Pointer to the notification function¡¯s context; corresponds to parameter
+ Context in the notification function.
+ @param Event Pointer to the newly created event if the call succeeds; undefined
+ otherwise.
+
+ @retval EFI_SUCCESS The event structure was created.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The event could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CREATE_EVENT) (
+ IN UINT32 Type,
+ IN EFI_TPL NotifyTpl,
+ IN EFI_EVENT_NOTIFY NotifyFunction,
+ IN VOID *NotifyContext,
+ OUT EFI_EVENT *Event
+ );
+
+/**
+ Creates an event in a group.
+
+ @param Type The type of event to create and its mode and attributes.
+ @param NotifyTpl Pointer to the notification function¡¯s context.
+ @param NotifyFunction Pointer to the event¡¯s notification function, if any.
+ @param NotifyContext Pointer to the notification function¡¯s context; corresponds to parameter
+ Context in the notification function.
+ @param EventGroup Pointer to the unique identifier of the group to which this event belongs.
+ @param Event Pointer to the newly created event if the call succeeds; undefined
+ otherwise.
+
+ @retval EFI_SUCCESS The event structure was created.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_OUT_OF_RESOURCES The event could not be allocated.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CREATE_EVENT_EX) (
+ IN UINT32 Type,
+ IN EFI_TPL NotifyTpl OPTIONAL,
+ IN EFI_EVENT_NOTIFY NotifyFunction OPTIONAL,
+ IN CONST VOID *NotifyContext OPTIONAL,
+ IN CONST EFI_GUID *EventGroup OPTIONAL,
+ OUT EFI_EVENT *Event
+ );
+
+typedef enum {
+ TimerCancel,
+ TimerPeriodic,
+ TimerRelative
+} EFI_TIMER_DELAY;
+
+/**
+ Sets the type of timer and the trigger time for a timer event.
+
+ @param Event The timer event that is to be signaled at the specified time.
+ @param Type The type of time that is specified in TriggerTime.
+ @param TriggerTime The number of 100ns units until the timer expires.
+
+ @retval EFI_SUCCESS The event has been set to be signaled at the requested time.
+ @retval EFI_INVALID_PARAMETER Event or Type is not valid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_TIMER) (
+ IN EFI_EVENT Event,
+ IN EFI_TIMER_DELAY Type,
+ IN UINT64 TriggerTime
+ );
+
+/**
+ Signals an event.
+
+ @param Event The event to signal.
+
+ @retval EFI_SUCCESS The event has been signaled.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SIGNAL_EVENT) (
+ IN EFI_EVENT Event
+ );
+
+/**
+ Stops execution until an event is signaled.
+
+ @param NumberOfEvents The number of events in the Event array.
+ @param Event An array of EFI_EVENT.
+ @param Index Pointer to the index of the event which satisfied the wait condition.
+
+ @retval EFI_SUCCESS The event indicated by Index was signaled.
+ @retval EFI_INVALID_PARAMETER 1) NumberOfEvents is 0.
+ 2) The event indicated by Index is of type
+ EVT_NOTIFY_SIGNAL.
+ @retval EFI_UNSUPPORTED The current TPL is not TPL_APPLICATION.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_WAIT_FOR_EVENT) (
+ IN UINTN NumberOfEvents,
+ IN EFI_EVENT *Event,
+ OUT UINTN *Index
+ );
+
+/**
+ Closes an event.
+
+ @param Event The event to close.
+
+ @retval EFI_SUCCESS The event has been closed.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CLOSE_EVENT) (
+ IN EFI_EVENT Event
+ );
+
+/**
+ Checks whether an event is in the signaled state.
+
+ @param Event The event to check.
+
+ @retval EFI_SUCCESS The event is in the signaled state.
+ @retval EFI_NOT_READY The event is not in the signaled state.
+ @retval EFI_INVALID_PARAMETER Event is of type EVT_NOTIFY_SIGNAL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CHECK_EVENT) (
+ IN EFI_EVENT Event
+ );
+
+//
+// Task priority level (name defined in spec).
+//
+#define TPL_APPLICATION 4
+#define TPL_CALLBACK 8
+#define TPL_NOTIFY 16
+#define TPL_HIGH_LEVEL 31
+
+//
+// Task priority level (name following coding style).
+//
+#define EFI_TPL_APPLICATION TPL_APPLICATION
+#define EFI_TPL_CALLBACK TPL_CALLBACK
+#define EFI_TPL_NOTIFY TPL_NOTIFY
+#define EFI_TPL_HIGH_LEVEL TPL_HIGH_LEVEL
+
+/**
+ Raises a task¡¯s priority level and returns its previous level.
+
+ @param NewTpl The new task priority level.
+
+ @retval Previous task priority level
+
+**/
+typedef
+EFI_TPL
+(EFIAPI *EFI_RAISE_TPL) (
+ IN EFI_TPL NewTpl
+ );
+
+/**
+ Restores a task¡¯s priority level to its previous value.
+
+ @param OldTpl The previous task priority level to restore
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_RESTORE_TPL) (
+ IN EFI_TPL OldTpl
+ );
+
+//
+// Variable attributes
+//
+#define EFI_VARIABLE_NON_VOLATILE 0x00000001
+#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
+#define EFI_VARIABLE_RUNTIME_ACCESS 0x00000004
+
+/**
+ Returns the value of a variable.
+
+ @param VariableName A Null-terminated Unicode string that is the name of the
+ vendor¡¯s variable.
+ @param VendorGuid A unique identifier for the vendor.
+ @param Attributes If not NULL, a pointer to the memory location to return the
+ attributes bitmask for the variable.
+ @param DataSize On input, the size in bytes of the return Data buffer.
+ On output the size of data returned in Data.
+ @param Data The buffer to return the contents of the variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The DataSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_VARIABLE) (
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ OUT UINT32 *Attributes, OPTIONAL
+ IN OUT UINTN *DataSize,
+ OUT VOID *Data
+ );
+
+/**
+ Enumerates the current variable names.
+
+ @param VariableNameSize The size of the VariableName buffer.
+ @param VariableName On input, supplies the last VariableName that was returned
+ by GetNextVariableName(). On output, returns the Nullterminated
+ Unicode string of the current variable.
+ @param VendorGuid On input, supplies the last VendorGuid that was returned by
+ GetNextVariableName(). On output, returns the
+ VendorGuid of the current variable.
+
+ @retval EFI_SUCCESS The function completed successfully.
+ @retval EFI_NOT_FOUND The next variable was not found.
+ @retval EFI_BUFFER_TOO_SMALL The VariableNameSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_NEXT_VARIABLE_NAME) (
+ IN OUT UINTN *VariableNameSize,
+ IN OUT CHAR16 *VariableName,
+ IN OUT EFI_GUID *VendorGuid
+ );
+
+/**
+ Sets the value of a variable.
+
+ @param VariableName A Null-terminated Unicode string that is the name of the
+ vendor¡¯s variable.
+ @param VendorGuid A unique identifier for the vendor.
+ @param Attributes Attributes bitmask to set for the variable.
+ @param DataSize The size in bytes of the Data buffer.
+ @param Data The contents for the variable.
+
+ @retval EFI_SUCCESS The firmware has successfully stored the variable and its data as
+ defined by the Attributes.
+ @retval EFI_WRITE_PROTECTED The variable in question is read-only.
+ @retval EFI_OUT_OF_RESOURCES Not enough storage is available to hold the variable and its data.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_DEVICE_ERROR The variable could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_VARIABLE) (
+ IN CHAR16 *VariableName,
+ IN EFI_GUID *VendorGuid,
+ IN UINT32 Attributes,
+ IN UINTN DataSize,
+ IN VOID *Data
+ );
+
+//
+// EFI Time
+//
+typedef struct {
+ UINT32 Resolution;
+ UINT32 Accuracy;
+ BOOLEAN SetsToZero;
+} EFI_TIME_CAPABILITIES;
+
+/**
+ Returns the current time and date information, and the time-keeping capabilities
+ of the hardware platform.
+
+ @param Time A pointer to storage to receive a snapshot of the current time.
+ @param Capabilities An optional pointer to a buffer to receive the real time clock
+ device¡¯s capabilities.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER Time is NULL.
+ @retval EFI_DEVICE_ERROR The time could not be retrieved due to hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_TIME) (
+ OUT EFI_TIME *Time,
+ OUT EFI_TIME_CAPABILITIES *Capabilities OPTIONAL
+ );
+
+/**
+ Sets the current local time and date information.
+
+ @param Time A pointer to the current time.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+ @retval EFI_INVALID_PARAMETER A time field is out of range.
+ @retval EFI_DEVICE_ERROR The time could not be set due due to hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_TIME) (
+ IN EFI_TIME *Time
+ );
+
+/**
+ Returns the current wakeup alarm clock setting.
+
+ @param Enabled Indicates if the alarm is currently enabled or disabled.
+ @param Pending Indicates if the alarm signal is pending and requires acknowledgement.
+ @param Time The current alarm setting.
+
+ @retval EFI_SUCCESS The alarm settings were returned.
+ @retval EFI_INVALID_PARAMETER Any parameter is NULL.
+ @retval EFI_DEVICE_ERROR The wakeup time could not be retrieved due to a hardware error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_WAKEUP_TIME) (
+ OUT BOOLEAN *Enabled,
+ OUT BOOLEAN *Pending,
+ OUT EFI_TIME *Time
+ );
+
+/**
+ Sets the system wakeup alarm clock time.
+
+ @param Enabled Enable or disable the wakeup alarm.
+ @param Time If Enable is TRUE, the time to set the wakeup alarm for.
+
+ @retval EFI_SUCCESS If Enable is TRUE, then the wakeup alarm was enabled. If
+ Enable is FALSE, then the wakeup alarm was disabled.
+ @retval EFI_INVALID_PARAMETER A time field is out of range.
+ @retval EFI_DEVICE_ERROR The wakeup time could not be set due to a hardware error.
+ @retval EFI_UNSUPPORTED A wakeup timer is not supported on this platform.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_WAKEUP_TIME) (
+ IN BOOLEAN Enable,
+ IN EFI_TIME *Time OPTIONAL
+ );
+
+/**
+ This is the declaration of an EFI image entry point. This can be the entry point to an application
+ written to this specification, an EFI boot service driver, or an EFI runtime driver.
+
+ @param ImageHandle Handle that identifies the loaded image.
+ @param SystemTable System Table for this image.
+
+ @retval EFI_SUCCESS The operation completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IMAGE_ENTRY_POINT) (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_SYSTEM_TABLE *SystemTable
+ );
+
+/**
+ Loads an EFI image into memory.
+
+ @param BootPolicy If TRUE, indicates that the request originates from the boot
+ manager, and that the boot manager is attempting to load
+ FilePath as a boot selection. Ignored if SourceBuffer is
+ not NULL.
+ @param ParentImageHandle The caller¡¯s image handle.
+ @param FilePath The DeviceHandle specific file path from which the image is
+ loaded.
+ @param SourceBuffer If not NULL, a pointer to the memory location containing a copy
+ of the image to be loaded.
+ @param SourceSize The size in bytes of SourceBuffer.
+ @param ImageHandle Pointer to the returned image handle that is created when the
+ image is successfully loaded.
+
+ @retval EFI_SUCCESS Image was loaded into memory correctly.
+ @retval EFI_NOT_FOUND Both SourceBuffer and FilePath are NULL.
+ @retval EFI_INVALID_PARAMETER One or more parametes are invalid.
+ @retval EFI_UNSUPPORTED The image type is not supported.
+ @retval EFI_OUT_OF_RESOURCES Image was not loaded due to insufficient resources.
+ @retval EFI_LOAD_ERROR Image was not loaded because the image format was corrupt or not
+ understood.
+ @retval EFI_DEVICE_ERROR Image was not loaded because the device returned a read error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IMAGE_LOAD) (
+ IN BOOLEAN BootPolicy,
+ IN EFI_HANDLE ParentImageHandle,
+ IN EFI_DEVICE_PATH_PROTOCOL *FilePath,
+ IN VOID *SourceBuffer OPTIONAL,
+ IN UINTN SourceSize,
+ OUT EFI_HANDLE *ImageHandle
+ );
+
+/**
+ Transfers control to a loaded image¡¯s entry point.
+
+ @param ImageHandle Handle of image to be started.
+ @param ExitDataSize Pointer to the size, in bytes, of ExitData.
+ @param ExitData Pointer to a pointer to a data buffer that includes a Null-terminated
+ Unicode string, optionally followed by additional binary data.
+
+ @retval EFI_INVALID_PARAMETER ImageHandle is either an invalid image handle or the image
+ has already been initialized with StartImage
+ @retval Exit code from image Exit code from image
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IMAGE_START) (
+ IN EFI_HANDLE ImageHandle,
+ OUT UINTN *ExitDataSize,
+ OUT CHAR16 **ExitData OPTIONAL
+ );
+
+/**
+ Terminates a loaded EFI image and returns control to boot services.
+
+ @param ImageHandle Handle that identifies the image.
+ @param ExitStatus The image¡¯s exit code.
+ @param ExitDataSize The size, in bytes, of ExitData.
+ @param ExitData Pointer to a data buffer that includes a Null-terminated Unicode string,
+ optionally followed by additional binary data.
+
+ @retval EFI_SUCCESS The image specified by ImageHandle was unloaded.
+ @retval EFI_INVALID_PARAMETER The image specified by ImageHandle has been loaded and
+ started with LoadImage() and StartImage(), but the
+ image is not the currently executing image.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXIT) (
+ IN EFI_HANDLE ImageHandle,
+ IN EFI_STATUS ExitStatus,
+ IN UINTN ExitDataSize,
+ IN CHAR16 *ExitData OPTIONAL
+ );
+
+/**
+ Unloads an image.
+
+ @param ImageHandle Handle that identifies the image to be unloaded.
+
+ @retval EFI_SUCCESS The image has been unloaded.
+ @retval EFI_INVALID_PARAMETER ImageHandle is not a valid image handle.
+ @retval EFI_UNSUPPORTED The image has been started, and does not support unload.
+ @retval Exit code from the image's unload handler
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_IMAGE_UNLOAD) (
+ IN EFI_HANDLE ImageHandle
+ );
+
+/**
+ Terminates all boot services.
+
+ @param ImageHandle Handle that identifies the exiting image.
+ @param MapKey Key to the latest memory map.
+
+ @retval EFI_SUCCESS Boot services have been terminated.
+ @retval EFI_INVALID_PARAMETER MapKey is incorrect.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_EXIT_BOOT_SERVICES) (
+ IN EFI_HANDLE ImageHandle,
+ IN UINTN MapKey
+ );
+
+/**
+ Induces a fine-grained stall.
+
+ @param Microseconds The number of microseconds to stall execution.
+
+ @retval EFI_SUCCESS Execution was stalled at least the requested number of
+ Microseconds.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_STALL) (
+ IN UINTN Microseconds
+ );
+
+/**
+ Sets the system¡¯s watchdog timer.
+
+ @param Timeout The number of seconds to set the watchdog timer to.
+ @param WatchdogCode The numeric code to log on a watchdog timer timeout event.
+ @param DataSize The size, in bytes, of WatchdogData.
+ @param WatchdogData A data buffer that includes a Null-terminated Unicode string, optionally
+ followed by additional binary data.
+
+ @retval EFI_SUCCESS The timeout has been set.
+ @retval EFI_INVALID_PARAMETER The supplied WatchdogCode is invalid.
+ @retval EFI_UNSUPPORTED The system does not have a watchdog timer.
+ @retval EFI_DEVICE_ERROR The watch dog timer could not be programmed due to a hardware
+ error.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_SET_WATCHDOG_TIMER) (
+ IN UINTN Timeout,
+ IN UINT64 WatchdogCode,
+ IN UINTN DataSize,
+ IN CHAR16 *WatchdogData OPTIONAL
+ );
+
+typedef enum {
+ EfiResetCold,
+ EfiResetWarm,
+ EfiResetShutdown,
+#if ((EDK_RELEASE_VERSION != 0) && (EFI_SPECIFICATION_VERSION < 0x00020000))
+ //
+ // Tiano extension for capsules that was removed after UEFI 2.0 came out
+ //
+ EfiResetUpdate
+#endif
+} EFI_RESET_TYPE;
+
+/**
+ Resets the entire platform.
+
+ @param ResetType The type of reset to perform.
+ @param ResetStatus The status code for the reset.
+ @param DataSize The size, in bytes, of WatchdogData.
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or
+ EfiResetShutdown the data buffer starts with a Null-terminated
+ Unicode string, optionally followed by additional binary data.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_RESET_SYSTEM) (
+ IN EFI_RESET_TYPE ResetType,
+ IN EFI_STATUS ResetStatus,
+ IN UINTN DataSize,
+ IN CHAR16 *ResetData OPTIONAL
+ );
+
+/**
+ Returns a monotonically increasing count for the platform.
+
+ @param Count Pointer to returned value.
+
+ @retval EFI_SUCCESS The next monotonic count was returned.
+ @retval EFI_INVALID_PARAMETER Count is NULL.
+ @retval EFI_DEVICE_ERROR The device is not functioning properly.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_NEXT_MONOTONIC_COUNT) (
+ OUT UINT64 *Count
+ );
+
+/**
+ Returns the next high 32 bits of the platform¡¯s monotonic counter.
+
+ @param HighCount Pointer to returned value.
+
+ @retval EFI_SUCCESS The next high monotonic count was returned.
+ @retval EFI_INVALID_PARAMETER HighCount is NULL.
+ @retval EFI_DEVICE_ERROR The device is not functioning properly.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_GET_NEXT_HIGH_MONO_COUNT) (
+ OUT UINT32 *HighCount
+ );
+
+/**
+ Computes and returns a 32-bit CRC for a data buffer.
+
+ @param Data A pointer to the buffer on which the 32-bit CRC is to be computed.
+ @param DataSize The number of bytes in the buffer Data.
+ @param Crc32 The 32-bit CRC that was computed for the data buffer specified by Data
+ and DataSize.
+
+ @retval EFI_SUCCESS The 32-bit CRC was computed for the data buffer and returned in
+ Crc32.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CALCULATE_CRC32) (
+ IN VOID *Data,
+ IN UINTN DataSize,
+ OUT UINT32 *Crc32
+ );
+
+/**
+ Copies the contents of one buffer to another buffer.
+
+ @param Destination Pointer to the destination buffer of the memory copy.
+ @param Source Pointer to the source buffer of the memory copy.
+ @param Length Number of bytes to copy from Source to Destination.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_COPY_MEM) (
+ IN VOID *Destination,
+ IN VOID *Source,
+ IN UINTN Length
+ );
+
+/**
+ The SetMem() function fills a buffer with a specified value.
+
+ @param Buffer Pointer to the buffer to fill.
+ @param Size Number of bytes in Buffer to fill.
+ @param Value Value to fill Buffer with.
+
+**/
+typedef
+VOID
+(EFIAPI *EFI_SET_MEM) (
+ IN VOID *Buffer,
+ IN UINTN Size,
+ IN UINT8 Value
+ );
+
+//
+// Protocol handler functions
+//
+typedef enum {
+ EFI_NATIVE_INTERFACE
+} EFI_INTERFACE_TYPE;
+
+/**
+ Installs a protocol interface on a device handle. If the handle does not exist, it is created and added
+ to the list of handles in the system. InstallMultipleProtocolInterfaces() performs
+ more error checking than InstallProtocolInterface(), so it is recommended that
+ InstallMultipleProtocolInterfaces() be used in place of
+ InstallProtocolInterface()
+
+ @param Handle A pointer to the EFI_HANDLE on which the interface is to be installed.
+ @param Protocol The numeric ID of the protocol interface.
+ @param InterfaceType Indicates whether Interface is supplied in native form.
+ @param Interface A pointer to the protocol interface.
+
+ @retval EFI_SUCCESS The protocol interface was installed.
+ @retval EFI_OUT_OF_RESOURCES Space for a new handle could not be allocated.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INSTALL_PROTOCOL_INTERFACE) (
+ IN OUT EFI_HANDLE *Handle,
+ IN EFI_GUID *Protocol,
+ IN EFI_INTERFACE_TYPE InterfaceType,
+ IN VOID *Interface
+ );
+
+/**
+ Installs one or more protocol interfaces into the boot services environment.
+
+ @param Handle The handle to install the new protocol interfaces on, or NULL if a new
+ handle is to be allocated.
+ @param ... A variable argument list containing pairs of protocol GUIDs and protocol
+ interfaces.
+
+ @retval EFI_SUCCESS All the protocol interface was installed.
+ @retval EFI_OUT_OF_RESOURCES There was not enough memory in pool to install all the protocols.
+ @retval EFI_ALREADY_STARTED A Device Path Protocol instance was passed in that is already present in
+ the handle database.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES) (
+ IN OUT EFI_HANDLE *Handle,
+ ...
+ );
+
+/**
+ Reinstalls a protocol interface on a device handle.
+
+ @param Handle Handle on which the interface is to be reinstalled.
+ @param Protocol The numeric ID of the interface.
+ @param OldInterface A pointer to the old interface. NULL can be used if a structure is not
+ associated with Protocol.
+ @param NewInterface A pointer to the new interface.
+
+ @retval EFI_SUCCESS The protocol interface was reinstalled.
+ @retval EFI_NOT_FOUND The OldInterface on the handle was not found.
+ @retval EFI_ACCESS_DENIED The protocol interface could not be reinstalled,
+ because OldInterface is still being used by a
+ driver that will not release it.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REINSTALL_PROTOCOL_INTERFACE) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ IN VOID *OldInterface,
+ IN VOID *NewInterface
+ );
+
+/**
+ Removes a protocol interface from a device handle. It is recommended that
+ UninstallMultipleProtocolInterfaces() be used in place of
+ UninstallProtocolInterface().
+
+ @param Handle The handle on which the interface was installed.
+ @param Protocol The numeric ID of the interface.
+ @param Interface A pointer to the interface.
+
+ @retval EFI_SUCCESS The interface was removed.
+ @retval EFI_NOT_FOUND The interface was not found.
+ @retval EFI_ACCESS_DENIED The interface was not removed because the interface
+ is still being used by a driver.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UNINSTALL_PROTOCOL_INTERFACE) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ IN VOID *Interface
+ );
+
+/**
+ Removes one or more protocol interfaces into the boot services environment.
+
+ @param Handle The handle to remove the protocol interfaces from.
+ @param ... A variable argument list containing pairs of protocol GUIDs and
+ protocol interfaces.
+
+ @retval EFI_SUCCESS All the protocol interfaces were removed.
+ @retval EFI_INVALID_PARAMETER One of the protocol interfaces was not previously installed on Handle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES) (
+ IN EFI_HANDLE Handle,
+ ...
+ );
+
+/**
+ Queries a handle to determine if it supports a specified protocol.
+
+ @param Handle The handle being queried.
+ @param Protocol The published unique identifier of the protocol.
+ @param Interface Supplies the address where a pointer to the corresponding Protocol
+ Interface is returned.
+ @retval EFI_SUCCESS The interface information for the specified protocol was returned.
+ @retval EFI_UNSUPPORTED The device does not support the specified protocol.
+ @retval EFI_INVALID_PARAMETER One of the protocol interfaces was not previously installed on Handle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_HANDLE_PROTOCOL) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ OUT VOID **Interface
+ );
+
+#define EFI_OPEN_PROTOCOL_BY_HANDLE_PROTOCOL 0x00000001
+#define EFI_OPEN_PROTOCOL_GET_PROTOCOL 0x00000002
+#define EFI_OPEN_PROTOCOL_TEST_PROTOCOL 0x00000004
+#define EFI_OPEN_PROTOCOL_BY_CHILD_CONTROLLER 0x00000008
+#define EFI_OPEN_PROTOCOL_BY_DRIVER 0x00000010
+#define EFI_OPEN_PROTOCOL_EXCLUSIVE 0x00000020
+
+/**
+ Queries a handle to determine if it supports a specified protocol. If the protocol is supported by the
+ handle, it opens the protocol on behalf of the calling agent.
+
+ @param Handle The handle for the protocol interface that is being opened.
+ @param Protocol The published unique identifier of the protocol.
+ @param Interface Supplies the address where a pointer to the corresponding Protocol
+ Interface is returned.
+ @param AgentHandle The handle of the agent that is opening the protocol interface
+ specified by Protocol and Interface.
+ @param ControllerHandle If the agent that is opening a protocol is a driver that follows the
+ UEFI Driver Model, then this parameter is the controller handle
+ that requires the protocol interface. If the agent does not follow
+ the UEFI Driver Model, then this parameter is optional and may
+ be NULL.
+ @param Attributes The open mode of the protocol interface specified by Handle
+ and Protocol.
+
+ @retval EFI_SUCCESS An item was added to the open list for the protocol interface, and the
+ protocol interface was returned in Interface.
+ @retval EFI_UNSUPPORTED Handle does not support Protocol.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_ACCESS_DENIED Required attributes can't be supported in current environment.
+ @retval EFI_ALREADY_STARTED Item on the open list already has requierd attributes whose agent
+ handle is the same as AgentHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_OPEN_PROTOCOL) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ OUT VOID **Interface,
+ IN EFI_HANDLE AgentHandle,
+ IN EFI_HANDLE ControllerHandle, OPTIONAL
+ IN UINT32 Attributes
+ );
+
+
+/**
+ Closes a protocol on a handle that was opened using OpenProtocol().
+
+ @param Handle The handle for the protocol interface that was previously opened
+ with OpenProtocol(), and is now being closed.
+ @param Protocol The published unique identifier of the protocol.
+ @param Interface Supplies the address where a pointer to the corresponding Protocol
+ Interface is returned.
+ @param AgentHandle The handle of the agent that is closing the protocol interface.
+ @param ControllerHandle If the agent that opened a protocol is a driver that follows the
+ UEFI Driver Model, then this parameter is the controller handle
+ that required the protocol interface.
+
+ @retval EFI_SUCCESS The protocol instance was closed.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+ @retval EFI_NOT_FOUND 1) Handle does not support the protocol specified by Protocol.
+ 2) The protocol interface specified by Handle and Protocol is not
+ currently open by AgentHandle and ControllerHandle.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_CLOSE_PROTOCOL) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ IN EFI_HANDLE AgentHandle,
+ IN EFI_HANDLE ControllerHandle
+ );
+
+typedef struct {
+ EFI_HANDLE AgentHandle;
+ EFI_HANDLE ControllerHandle;
+ UINT32 Attributes;
+ UINT32 OpenCount;
+} EFI_OPEN_PROTOCOL_INFORMATION_ENTRY;
+
+/**
+ Retrieves the list of agents that currently have a protocol interface opened.
+
+ @param Handle The handle for the protocol interface that is being queried.
+ @param Protocol The published unique identifier of the protocol.
+ @param EntryBuffer A pointer to a buffer of open protocol information in the form of
+ EFI_OPEN_PROTOCOL_INFORMATION_ENTRY structures.
+ @param EntryCount A pointer to the number of entries in EntryBuffer.
+
+ @retval EFI_SUCCESS The open protocol information was returned in EntryBuffer, and the
+ number of entries was returned EntryCount.
+ @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate EntryBuffer.
+ @retval EFI_NOT_FOUND Handle does not support the protocol specified by Protocol.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_OPEN_PROTOCOL_INFORMATION) (
+ IN EFI_HANDLE Handle,
+ IN EFI_GUID *Protocol,
+ IN EFI_OPEN_PROTOCOL_INFORMATION_ENTRY **EntryBuffer,
+ OUT UINTN *EntryCount
+ );
+
+/**
+ Retrieves the list of protocol interface GUIDs that are installed on a handle in a buffer allocated
+ from pool.
+
+ @param Handle The handle from which to retrieve the list of protocol interface
+ GUIDs.
+ @param ProtocolBuffer A pointer to the list of protocol interface GUID pointers that are
+ installed on Handle.
+ @param ProtocolBufferCount A pointer to the number of GUID pointers present in
+ ProtocolBuffer.
+
+ @retval EFI_SUCCESS The list of protocol interface GUIDs installed on Handle was returned in
+ ProtocolBuffer. The number of protocol interface GUIDs was
+ returned in ProtocolBufferCount.
+ @retval EFI_OUT_OF_RESOURCES There is not enough pool memory to store the results.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_PROTOCOLS_PER_HANDLE) (
+ IN EFI_HANDLE Handle,
+ OUT EFI_GUID ***ProtocolBuffer,
+ OUT UINTN *ProtocolBufferCount
+ );
+
+/**
+ Creates an event that is to be signaled whenever an interface is installed for a specified protocol.
+
+ @param Protocol The numeric ID of the protocol for which the event is to be registered.
+ @param Event Event that is to be signaled whenever a protocol interface is registered
+ for Protocol.
+ @param Registration A pointer to a memory location to receive the registration value.
+
+ @retval EFI_SUCCESS The notification event has been registered.
+ @retval EFI_OUT_OF_RESOURCES Space for the notification event could not be allocated.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_REGISTER_PROTOCOL_NOTIFY) (
+ IN EFI_GUID *Protocol,
+ IN EFI_EVENT Event,
+ OUT VOID **Registration
+ );
+
+typedef enum {
+ AllHandles,
+ ByRegisterNotify,
+ ByProtocol
+} EFI_LOCATE_SEARCH_TYPE;
+
+/**
+ Returns an array of handles that support a specified protocol.
+
+ @param SearchType Specifies which handle(s) are to be returned.
+ @param Protocol Specifies the protocol to search by.
+ @param SearchKey Specifies the search key.
+ @param BufferSize On input, the size in bytes of Buffer. On output, the size in bytes of
+ the array returned in Buffer (if the buffer was large enough) or the
+ size, in bytes, of the buffer needed to obtain the array (if the buffer was
+ not large enough).
+ @param Buffer The buffer in which the array is returned.
+
+ @retval EFI_SUCCESS The array of handles was returned.
+ @retval EFI_NOT_FOUND No handles match the search.
+ @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small for the result.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LOCATE_HANDLE) (
+ IN EFI_LOCATE_SEARCH_TYPE SearchType,
+ IN EFI_GUID *Protocol, OPTIONAL
+ IN VOID *SearchKey, OPTIONAL
+ IN OUT UINTN *BufferSize,
+ OUT EFI_HANDLE *Buffer
+ );
+
+/**
+ Locates the handle to a device on the device path that supports the specified protocol.
+
+ @param Protocol Specifies the protocol to search for.
+ @param DevicePath On input, a pointer to a pointer to the device path. On output, the device
+ path pointer is modified to point to the remaining part of the device
+ path.
+ @param Device A pointer to the returned device handle.
+
+ @retval EFI_SUCCESS The resulting handle was returned.
+ @retval EFI_NOT_FOUND No handles match the search.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LOCATE_DEVICE_PATH) (
+ IN EFI_GUID *Protocol,
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath,
+ OUT EFI_HANDLE *Device
+ );
+
+/**
+ Adds, updates, or removes a configuration table entry from the EFI System Table.
+
+ @param Guid A pointer to the GUID for the entry to add, update, or remove.
+ @param Table A pointer to the configuration table for the entry to add, update, or
+ remove. May be NULL.
+
+ @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.
+ @retval EFI_NOT_FOUND An attempt was made to delete a nonexistent entry.
+ @retval EFI_INVALID_PARAMETER Guid is not valid.
+ @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_INSTALL_CONFIGURATION_TABLE) (
+ IN EFI_GUID *Guid,
+ IN VOID *Table
+ );
+
+/**
+ Reserved service.
+
+ @retval EFI_SUCCESS The operation has been completed successfully.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_RESERVED_SERVICE) (
+ VOID
+ );
+
+/**
+ Returns an array of handles that support the requested protocol in a buffer allocated from pool.
+
+ @param SearchType Specifies which handle(s) are to be returned.
+ @param Protocol Specifies the protocol to search by.
+ @param SearchKey Supplies the search key depending on the SearchType.
+ @param NoHandles The number of handles returned in Buffer.
+ @param Buffer A pointer to the buffer to return the requested array of handles that
+ support Protocol.
+
+ @retval EFI_SUCCESS The array of handles was returned in Buffer, and the number of
+ handles in Buffer was returned in NoHandles.
+ @retval EFI_NOT_FOUND No handles match the search.
+ @retval EFI_OUT_OF_RESOURCES There is not enough pool memory to store the matching results.
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LOCATE_HANDLE_BUFFER) (
+ IN EFI_LOCATE_SEARCH_TYPE SearchType,
+ IN EFI_GUID *Protocol, OPTIONAL
+ IN VOID *SearchKey, OPTIONAL
+ IN OUT UINTN *NoHandles,
+ OUT EFI_HANDLE **Buffer
+ );
+
+/**
+ Returns the first protocol instance that matches the given protocol.
+
+ @param Protocol Provides the protocol to search for.
+ @param Registration Optional registration key returned from
+ RegisterProtocolNotify().
+ @param Interface On return, a pointer to the first interface that matches Protocol and
+ Registration.
+
+ @retval EFI_SUCCESS A protocol instance matching Protocol was found and returned in
+ Interface.
+ @retval EFI_NOT_FOUND No protocol instances were found that match Protocol and
+ Registration.
+ @retval EFI_INVALID_PARAMETER Interface is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_LOCATE_PROTOCOL) (
+ IN EFI_GUID *Protocol,
+ IN VOID *Registration, OPTIONAL
+ OUT VOID **Interface
+ );
+
+
+typedef struct {
+ UINT64 Length;
+ union {
+ EFI_PHYSICAL_ADDRESS DataBlock;
+ EFI_PHYSICAL_ADDRESS ContinuationPointer;
+ } Union;
+} UEFI_CAPSULE_BLOCK_DESCRIPTOR;
+
+typedef struct {
+ EFI_GUID CapsuleGuid;
+ UINT32 HeaderSize;
+ UINT32 Flags;
+ UINT32 CapsuleImageSize;
+} UEFI_CAPSULE_HEADER;
+
+#define CAPSULE_FLAGS_PERSIST_ACROSS_RESET 0x00010000
+#define CAPSULE_FLAGS_POPULATE_SYSTEM_TABLE 0x00020000
+
+/**
+ Passes capsules to the firmware with both virtual and physical mapping. Depending on the intended
+ consumption, the firmware may process the capsule immediately. If the payload should persist
+ across a system reset, the reset value returned from EFI_QueryCapsuleCapabilities must
+ be passed into ResetSystem() and will cause the capsule to be processed by the firmware as
+ part of the reset process.
+
+ @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules
+ being passed into update capsule.
+ @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in
+ CaspuleHeaderArray.
+ @param ScatterGatherList Physical pointer to a set of
+ EFI_CAPSULE_BLOCK_DESCRIPTOR that describes the
+ location in physical memory of a set of capsules.
+
+ @retval EFI_SUCCESS Valid capsule was passed. If
+ CAPSULE_FLAGS_PERSIT_ACROSS_RESET is not set, the
+ capsule has been successfully processed by the firmware.
+ @retval EFI_DEVICE_ERROR The capsule update was started, but failed due to a device error.
+ @retval EFI_INVALID_PARAMETER CapsuleSize is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_UPDATE_CAPSULE) (
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
+ IN UINTN CapsuleCount,
+ IN EFI_PHYSICAL_ADDRESS ScatterGatherList OPTIONAL
+ );
+
+/**
+ Returns if the capsule can be supported via UpdateCapsule().
+
+ @param CapsuleHeaderArray Virtual pointer to an array of virtual pointers to the capsules
+ being passed into update capsule.
+ @param CapsuleCount Number of pointers to EFI_CAPSULE_HEADER in
+ CaspuleHeaderArray.
+ @param MaxiumCapsuleSize On output the maximum size that UpdateCapsule() can
+ support as an argument to UpdateCapsule() via
+ CapsuleHeaderArray and ScatterGatherList.
+ @param ResetType Returns the type of reset required for the capsule update.
+
+ @retval EFI_SUCCESS Valid answer returned.
+ @retval EFI_UNSUPPORTED The capsule type is not supported on this platform, and
+ MaximumCapsuleSize and ResetType are undefined.
+ @retval EFI_INVALID_PARAMETER MaximumCapsuleSize is NULL.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_QUERY_CAPSULE_CAPABILITIES) (
+ IN UEFI_CAPSULE_HEADER **CapsuleHeaderArray,
+ IN UINTN CapsuleCount,
+ OUT UINT64 *MaximumCapsuleSize,
+ OUT EFI_RESET_TYPE *ResetType
+ );
+
+/**
+ Returns information about the EFI variables.
+
+ @param Attributes Attributes bitmask to specify the type of variables on
+ which to return information.
+ @param MaximumVariableStorageSize On output the maximum size of the storage space
+ available for the EFI variables associated with the
+ attributes specified.
+ @param RemainingVariableStorageSize Returns the remaining size of the storage space
+ available for the EFI variables associated with the
+ attributes specified.
+ @param MaximumVariableSize Returns the maximum size of the individual EFI
+ variables associated with the attributes specified.
+
+ @retval EFI_SUCCESS Valid answer returned.
+ @retval EFI_INVALID_PARAMETER An invalid combination of attribute bits was supplied
+ @retval EFI_UNSUPPORTED The attribute is not supported on this platform, and the
+ MaximumVariableStorageSize,
+ RemainingVariableStorageSize, MaximumVariableSize
+ are undefined.
+
+**/
+typedef
+EFI_STATUS
+(EFIAPI *EFI_QUERY_VARIABLE_INFO) (
+ IN UINT32 Attributes,
+ OUT UINT64 *MaximumVariableStorageSize,
+ OUT UINT64 *RemainingVariableStorageSize,
+ OUT UINT64 *MaximumVariableSize
+ );
+
+
+//
+// EFI Runtime Services Table
+//
+#define EFI_1_02_SYSTEM_TABLE_REVISION ((1 << 16) | 02)
+#define EFI_1_10_SYSTEM_TABLE_REVISION ((1 << 16) | 10)
+#define EFI_2_00_SYSTEM_TABLE_REVISION ((2 << 16) | 0)
+
+#define EFI_RUNTIME_SERVICES_SIGNATURE 0x56524553544e5552ULL
+#define EFI_RUNTIME_SERVICES_REVISION (EFI_2_00_SYSTEM_TABLE_REVISION)
+
+#if (EDK_RELEASE_VERSION != 0) && (EFI_SPECIFICATION_VERSION < 0x00020000)
+//
+// Include the definition for TIANO_REPORT_STATUS_CODE if this is the version
+// of Tiano that extended the EFI specification. If Tiano mode is diabled
+// don't include it.
+//
+#include <Dxe/ArchProtocol/StatusCode.h>
+#endif
+
+
+typedef struct {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Time services
+ //
+ EFI_GET_TIME GetTime;
+ EFI_SET_TIME SetTime;
+ EFI_GET_WAKEUP_TIME GetWakeupTime;
+ EFI_SET_WAKEUP_TIME SetWakeupTime;
+
+ //
+ // Virtual memory services
+ //
+ EFI_SET_VIRTUAL_ADDRESS_MAP SetVirtualAddressMap;
+ EFI_CONVERT_POINTER ConvertPointer;
+
+ //
+ // Variable services
+ //
+ EFI_GET_VARIABLE GetVariable;
+ EFI_GET_NEXT_VARIABLE_NAME GetNextVariableName;
+ EFI_SET_VARIABLE SetVariable;
+
+ //
+ // Misc
+ //
+ EFI_GET_NEXT_HIGH_MONO_COUNT GetNextHighMonotonicCount;
+ EFI_RESET_SYSTEM ResetSystem;
+
+#if (EFI_SPECIFICATION_VERSION >= 0x00020000)
+ //
+ // New Boot Services added by UEFI 2.0
+ //
+ EFI_UPDATE_CAPSULE UpdateCapsule;
+ EFI_QUERY_CAPSULE_CAPABILITIES QueryCapsuleCapabilities;
+ EFI_QUERY_VARIABLE_INFO QueryVariableInfo;
+#elif (EDK_RELEASE_VERSION != 0)
+ //
+ // Tiano extension to EFI 1.10 runtime table
+ // It was moved to a protocol to not conflict with UEFI 2.0
+ // If Tiano is disabled this item is not enabled for EFI 1.10
+ //
+ TIANO_REPORT_STATUS_CODE ReportStatusCode;
+#endif
+} EFI_RUNTIME_SERVICES;
+
+//
+// EFI Boot Services Table
+//
+#define EFI_BOOT_SERVICES_SIGNATURE 0x56524553544f4f42ULL
+#define EFI_BOOT_SERVICES_REVISION (EFI_2_00_SYSTEM_TABLE_REVISION)
+
+typedef struct {
+ EFI_TABLE_HEADER Hdr;
+
+ //
+ // Task priority functions
+ //
+ EFI_RAISE_TPL RaiseTPL;
+ EFI_RESTORE_TPL RestoreTPL;
+
+ //
+ // Memory functions
+ //
+ EFI_ALLOCATE_PAGES AllocatePages;
+ EFI_FREE_PAGES FreePages;
+ EFI_GET_MEMORY_MAP GetMemoryMap;
+ EFI_ALLOCATE_POOL AllocatePool;
+ EFI_FREE_POOL FreePool;
+
+ //
+ // Event & timer functions
+ //
+ EFI_CREATE_EVENT CreateEvent;
+ EFI_SET_TIMER SetTimer;
+ EFI_WAIT_FOR_EVENT WaitForEvent;
+ EFI_SIGNAL_EVENT SignalEvent;
+ EFI_CLOSE_EVENT CloseEvent;
+ EFI_CHECK_EVENT CheckEvent;
+
+ //
+ // Protocol handler functions
+ //
+ EFI_INSTALL_PROTOCOL_INTERFACE InstallProtocolInterface;
+ EFI_REINSTALL_PROTOCOL_INTERFACE ReinstallProtocolInterface;
+ EFI_UNINSTALL_PROTOCOL_INTERFACE UninstallProtocolInterface;
+ EFI_HANDLE_PROTOCOL HandleProtocol;
+ VOID *Reserved;
+ EFI_REGISTER_PROTOCOL_NOTIFY RegisterProtocolNotify;
+ EFI_LOCATE_HANDLE LocateHandle;
+ EFI_LOCATE_DEVICE_PATH LocateDevicePath;
+ EFI_INSTALL_CONFIGURATION_TABLE InstallConfigurationTable;
+
+ //
+ // Image functions
+ //
+ EFI_IMAGE_LOAD LoadImage;
+ EFI_IMAGE_START StartImage;
+ EFI_EXIT Exit;
+ EFI_IMAGE_UNLOAD UnloadImage;
+ EFI_EXIT_BOOT_SERVICES ExitBootServices;
+
+ //
+ // Misc functions
+ //
+ EFI_GET_NEXT_MONOTONIC_COUNT GetNextMonotonicCount;
+ EFI_STALL Stall;
+ EFI_SET_WATCHDOG_TIMER SetWatchdogTimer;
+
+ //
+ // ////////////////////////////////////////////////////
+ // EFI 1.1 Services
+ //////////////////////////////////////////////////////
+ //
+ // DriverSupport Services
+ //
+ EFI_CONNECT_CONTROLLER ConnectController;
+ EFI_DISCONNECT_CONTROLLER DisconnectController;
+
+ //
+ // Added Open and Close protocol for the new driver model
+ //
+ EFI_OPEN_PROTOCOL OpenProtocol;
+ EFI_CLOSE_PROTOCOL CloseProtocol;
+ EFI_OPEN_PROTOCOL_INFORMATION OpenProtocolInformation;
+
+ //
+ // Added new services to EFI 1.1 as Lib to reduce code size.
+ //
+ EFI_PROTOCOLS_PER_HANDLE ProtocolsPerHandle;
+ EFI_LOCATE_HANDLE_BUFFER LocateHandleBuffer;
+ EFI_LOCATE_PROTOCOL LocateProtocol;
+
+ EFI_INSTALL_MULTIPLE_PROTOCOL_INTERFACES InstallMultipleProtocolInterfaces;
+ EFI_UNINSTALL_MULTIPLE_PROTOCOL_INTERFACES UninstallMultipleProtocolInterfaces;
+
+ //
+ // CRC32 services
+ //
+ EFI_CALCULATE_CRC32 CalculateCrc32;
+
+ //
+ // Memory Utility Services
+ //
+ EFI_COPY_MEM CopyMem;
+ EFI_SET_MEM SetMem;
+
+#if (EFI_SPECIFICATION_VERSION >= 0x00020000)
+ //
+ // UEFI 2.0 Extension to the table
+ //
+ EFI_CREATE_EVENT_EX CreateEventEx;
+#endif
+} EFI_BOOT_SERVICES;
+
+//
+// EFI Configuration Table
+//
+typedef struct {
+ EFI_GUID VendorGuid;
+ VOID *VendorTable;
+} EFI_CONFIGURATION_TABLE;
+
+//
+// EFI System Table
+//
+#define EFI_SYSTEM_TABLE_SIGNATURE 0x5453595320494249ULL
+#define EFI_SYSTEM_TABLE_REVISION (EFI_2_00_SYSTEM_TABLE_REVISION)
+
+struct _EFI_SYSTEM_TABLE {
+ EFI_TABLE_HEADER Hdr;
+
+ CHAR16 *FirmwareVendor;
+ UINT32 FirmwareRevision;
+
+ EFI_HANDLE ConsoleInHandle;
+ EFI_SIMPLE_TEXT_IN_PROTOCOL *ConIn;
+
+ EFI_HANDLE ConsoleOutHandle;
+ EFI_SIMPLE_TEXT_OUT_PROTOCOL *ConOut;
+
+ EFI_HANDLE StandardErrorHandle;
+ EFI_SIMPLE_TEXT_OUT_PROTOCOL *StdErr;
+
+ EFI_RUNTIME_SERVICES *RuntimeServices;
+ EFI_BOOT_SERVICES *BootServices;
+
+ UINTN NumberOfTableEntries;
+ EFI_CONFIGURATION_TABLE *ConfigurationTable;
+
+};
+
+//
+// Device Path information
+//
+
+#pragma pack(1)
+
+//
+// Hardware Device Paths
+//
+#define HARDWARE_DEVICE_PATH 0x01
+
+#define HW_PCI_DP 0x01
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 Function;
+ UINT8 Device;
+} PCI_DEVICE_PATH;
+
+#define HW_PCCARD_DP 0x02
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 FunctionNumber;
+} PCCARD_DEVICE_PATH;
+
+#define HW_MEMMAP_DP 0x03
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 MemoryType;
+ EFI_PHYSICAL_ADDRESS StartingAddress;
+ EFI_PHYSICAL_ADDRESS EndingAddress;
+} MEMMAP_DEVICE_PATH;
+
+#define HW_VENDOR_DP 0x04
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID Guid;
+} VENDOR_DEVICE_PATH;
+
+#define HW_CONTROLLER_DP 0x05
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+#if EDK_RELEASE_VERSION >= 0x00020000
+ UINT32 ControllerNumber;
+#else
+ UINT32 Controller;
+#endif
+} CONTROLLER_DEVICE_PATH;
+
+//
+// ACPI Device Paths
+//
+#define ACPI_DEVICE_PATH 0x02
+
+#define ACPI_DP 0x01
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 HID;
+ UINT32 UID;
+} ACPI_HID_DEVICE_PATH;
+
+#define ACPI_EXTENDED_DP 0x02
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 HID;
+ UINT32 UID;
+ UINT32 CID;
+ //
+ // Optional variable length _HIDSTR
+ // Optional variable length _UIDSTR
+ //
+} ACPI_EXTENDED_HID_DEVICE_PATH;
+
+//
+// EISA ID Macro
+// EISA ID Definition 32-bits
+// bits[15:0] - three character compressed ASCII EISA ID.
+// bits[31:16] - binary number
+// Compressed ASCII is 5 bits per character 0b00001 = 'A' 0b11010 = 'Z'
+//
+#define PNP_EISA_ID_CONST 0x41d0
+#define EISA_ID(_Name, _Num) ((UINT32) ((_Name) | (_Num) << 16))
+#define EISA_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
+#define EFI_PNP_ID(_PNPId) (EISA_ID(PNP_EISA_ID_CONST, (_PNPId)))
+
+#define PNP_EISA_ID_MASK 0xffff
+#define EISA_ID_TO_NUM(_Id) ((_Id) >> 16)
+
+
+#define ACPI_ADR_DP 0x03
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 ADR;
+} ACPI_ADR_DEVICE_PATH;
+
+
+//
+// Messaging Device Paths
+//
+#define MESSAGING_DEVICE_PATH 0x03
+
+#define MSG_ATAPI_DP 0x01
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 PrimarySecondary;
+ UINT8 SlaveMaster;
+ UINT16 Lun;
+} ATAPI_DEVICE_PATH;
+
+#define MSG_SCSI_DP 0x02
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT16 Pun;
+ UINT16 Lun;
+} SCSI_DEVICE_PATH;
+
+#define MSG_FIBRECHANNEL_DP 0x03
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 Reserved;
+ UINT64 WWN;
+ UINT64 Lun;
+} FIBRECHANNEL_DEVICE_PATH;
+
+#define MSG_1394_DP 0x04
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 Reserved;
+ UINT64 Guid;
+} F1394_DEVICE_PATH;
+
+#define MSG_USB_DP 0x05
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 ParentPortNumber;
+ UINT8 InterfaceNumber;
+} USB_DEVICE_PATH;
+
+#define MSG_USB_CLASS_DP 0x0f
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT16 VendorId;
+ UINT16 ProductId;
+ UINT8 DeviceClass;
+ UINT8 DeviceSubClass;
+ UINT8 DeviceProtocol;
+} USB_CLASS_DEVICE_PATH;
+
+#define MSG_USB_WWID_DP 0x10
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT16 InterfaceNumber;
+ UINT16 VendorId;
+ UINT16 ProductId;
+ // CHAR16 SerialNumber[];
+} USB_WWID_DEVICE_PATH;
+
+#define MSG_DEVICE_LOGICAL_UNIT_DP 0x11
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT8 LUN;
+} DEVICE_LOGICAL_UNIT_DEVICE_PATH;
+
+#define MSG_I2O_DP 0x06
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 Tid;
+} I2O_DEVICE_PATH;
+
+#define MSG_MAC_ADDR_DP 0x0b
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_MAC_ADDRESS MacAddress;
+ UINT8 IfType;
+} MAC_ADDR_DEVICE_PATH;
+
+#define MSG_IPv4_DP 0x0c
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_IPv4_ADDRESS LocalIpAddress;
+ EFI_IPv4_ADDRESS RemoteIpAddress;
+ UINT16 LocalPort;
+ UINT16 RemotePort;
+ UINT16 Protocol;
+ BOOLEAN StaticIpAddress;
+} IPv4_DEVICE_PATH;
+
+#define MSG_IPv6_DP 0x0d
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_IPv6_ADDRESS LocalIpAddress;
+ EFI_IPv6_ADDRESS RemoteIpAddress;
+ UINT16 LocalPort;
+ UINT16 RemotePort;
+ UINT16 Protocol;
+ BOOLEAN StaticIpAddress;
+} IPv6_DEVICE_PATH;
+
+#define MSG_INFINIBAND_DP 0x09
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 ResourceFlags;
+ UINT8 PortGid[16];
+ UINT64 ServiceId;
+ UINT64 TargetPortId;
+ UINT64 DeviceId;
+} INFINIBAND_DEVICE_PATH;
+
+#define INFINIBAND_RESOURCE_FLAG_IOC_SERVICE 0x01
+#define INFINIBAND_RESOURCE_FLAG_EXTENDED_BOOT_ENVIRONMENT 0x02
+#define INFINIBAND_RESOURCE_FLAG_CONSOLE_PROTOCOL 0x04
+#define INFINIBAND_RESOURCE_FLAG_STORAGE_PROTOCOL 0x08
+#define INFINIBAND_RESOURCE_FLAG_NETWORK_PROTOCOL 0x10
+
+#define MSG_UART_DP 0x0e
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 Reserved;
+ UINT64 BaudRate;
+ UINT8 DataBits;
+ UINT8 Parity;
+ UINT8 StopBits;
+} UART_DEVICE_PATH;
+
+//
+// Use VENDOR_DEVICE_PATH struct
+//
+#define MSG_VENDOR_DP 0x0a
+
+#define DEVICE_PATH_MESSAGING_PC_ANSI EFI_PC_ANSI_GUID
+#define DEVICE_PATH_MESSAGING_VT_100 EFI_VT_100_GUID
+#define DEVICE_PATH_MESSAGING_VT_100_PLUS EFI_VT_100_PLUS_GUID
+#define DEVICE_PATH_MESSAGING_VT_UTF8 EFI_VT_UTF8_GUID
+#define DEVICE_PATH_MESSAGING_SAS EFI_SAS_DEVICE_PATH_GUID
+
+
+#define MSG_ISCSI_DP 0x13
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT16 NetworkProtocol;
+ UINT16 LoginOption;
+ UINT16 Reserved;
+ UINT16 TargetPortalGroupTag;
+ UINT64 LUN;
+ // CHAR8 iSCSI Target Name
+} ISCSI_DEVICE_PATH;
+
+#define ISCSI_LOGIN_OPTION_NO_HEADER_DIGEST 0x0000
+#define ISCSI_LOGIN_OPTION_HEADER_DIGEST_USING_CRC32C 0x0002
+#define ISCSI_LOGIN_OPTION_NO_DATA_DIGEST 0x0000
+#define ISCSI_LOGIN_OPTION_DATA_DIGEST_USING_CRC32C 0x0008
+#define ISCSI_LOGIN_OPTION_AUTHMETHOD_CHAP 0x0000
+#define ISCSI_LOGIN_OPTION_AUTHMETHOD_NON 0x1000
+#define ISCSI_LOGIN_OPTION_CHAP_BI 0x0000
+#define ISCSI_LOGIN_OPTION_CHAP_UNI 0x2000
+
+
+//
+// Media Device Path
+//
+#define MEDIA_DEVICE_PATH 0x04
+
+#define MEDIA_HARDDRIVE_DP 0x01
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 PartitionNumber;
+ UINT64 PartitionStart;
+ UINT64 PartitionSize;
+ UINT8 Signature[16];
+ UINT8 MBRType;
+ UINT8 SignatureType;
+} HARDDRIVE_DEVICE_PATH;
+
+#define MBR_TYPE_PCAT 0x01
+#define MBR_TYPE_EFI_PARTITION_TABLE_HEADER 0x02
+
+#define SIGNATURE_TYPE_MBR 0x01
+#define SIGNATURE_TYPE_GUID 0x02
+
+#define MEDIA_CDROM_DP 0x02
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT32 BootEntry;
+ UINT64 PartitionStart;
+ UINT64 PartitionSize;
+} CDROM_DEVICE_PATH;
+
+//
+// Use VENDOR_DEVICE_PATH struct
+//
+#define MEDIA_VENDOR_DP 0x03
+
+#define MEDIA_FILEPATH_DP 0x04
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ CHAR16 PathName[1];
+} FILEPATH_DEVICE_PATH;
+
+#define SIZE_OF_FILEPATH_DEVICE_PATH EFI_FIELD_OFFSET(FILEPATH_DEVICE_PATH,PathName)
+
+#define MEDIA_PROTOCOL_DP 0x05
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID Protocol;
+} MEDIA_PROTOCOL_DEVICE_PATH;
+
+#if ((EDK_RELEASE_VERSION != 0) && (EFI_SPECIFICATION_VERSION < 0x00020000))
+//
+// Prior to UEFI 2.0 Tiano extended this enum. UEFI owns device path values
+// and we moved to a new GUID'ed device path for Tiano
+//
+
+#define MEDIA_FV_FILEPATH_DP 0x06
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID NameGuid;
+} MEDIA_FW_VOL_FILEPATH_DEVICE_PATH;
+
+#else
+
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ EFI_GUID PiwgSpecificDevicePath;
+ UINT32 Type;
+} PIWG_DEVICE_PATH;
+
+#define PIWG_MEDIA_FW_VOL_FILEPATH_DEVICE_PATH_TYPE 0x01
+typedef struct {
+ PIWG_DEVICE_PATH Piwg;
+ EFI_GUID NameGuid;
+} MEDIA_FW_VOL_FILEPATH_DEVICE_PATH;
+
+//
+// Place holder for a future extension
+//
+#define PIWG_MEDIAFW_VOL_DEVICE_PATH_TYPE 0x02
+typedef struct {
+ PIWG_DEVICE_PATH Piwg;
+ EFI_GUID VolumeGuid;
+} MEDIA_FW_VOL_DEVICE_PATH;
+
+#endif
+
+
+//
+// BBS Device Path
+//
+#define BBS_DEVICE_PATH 0x05
+#define BBS_BBS_DP 0x01
+typedef struct {
+ EFI_DEVICE_PATH_PROTOCOL Header;
+ UINT16 DeviceType;
+ UINT16 StatusFlag;
+ CHAR8 String[1];
+} BBS_BBS_DEVICE_PATH;
+
+//
+// DeviceType definitions - from BBS specification
+//
+#define BBS_TYPE_FLOPPY 0x01
+#define BBS_TYPE_HARDDRIVE 0x02
+#define BBS_TYPE_CDROM 0x03
+#define BBS_TYPE_PCMCIA 0x04
+#define BBS_TYPE_USB 0x05
+#define BBS_TYPE_EMBEDDED_NETWORK 0x06
+#define BBS_TYPE_BEV 0x80
+#define BBS_TYPE_UNKNOWN 0xFF
+
+
+//
+// Union of all possible Device Paths and pointers to Device Paths
+//
+
+typedef union {
+ EFI_DEVICE_PATH_PROTOCOL DevPath;
+ PCI_DEVICE_PATH Pci;
+ PCCARD_DEVICE_PATH PcCard;
+ MEMMAP_DEVICE_PATH MemMap;
+ VENDOR_DEVICE_PATH Vendor;
+
+ CONTROLLER_DEVICE_PATH Controller;
+ ACPI_HID_DEVICE_PATH Acpi;
+
+ ATAPI_DEVICE_PATH Atapi;
+ SCSI_DEVICE_PATH Scsi;
+ FIBRECHANNEL_DEVICE_PATH FibreChannel;
+
+ F1394_DEVICE_PATH F1394;
+ USB_DEVICE_PATH Usb;
+ USB_CLASS_DEVICE_PATH UsbClass;
+ I2O_DEVICE_PATH I2O;
+ MAC_ADDR_DEVICE_PATH MacAddr;
+ IPv4_DEVICE_PATH Ipv4;
+ IPv6_DEVICE_PATH Ipv6;
+ INFINIBAND_DEVICE_PATH InfiniBand;
+ UART_DEVICE_PATH Uart;
+
+ HARDDRIVE_DEVICE_PATH HardDrive;
+ CDROM_DEVICE_PATH CD;
+
+ FILEPATH_DEVICE_PATH FilePath;
+ MEDIA_PROTOCOL_DEVICE_PATH MediaProtocol;
+
+ BBS_BBS_DEVICE_PATH Bbs;
+} EFI_DEV_PATH;
+
+
+
+typedef union {
+ EFI_DEVICE_PATH_PROTOCOL *DevPath;
+ PCI_DEVICE_PATH *Pci;
+ PCCARD_DEVICE_PATH *PcCard;
+ MEMMAP_DEVICE_PATH *MemMap;
+ VENDOR_DEVICE_PATH *Vendor;
+
+ CONTROLLER_DEVICE_PATH *Controller;
+ ACPI_HID_DEVICE_PATH *Acpi;
+ ACPI_EXTENDED_HID_DEVICE_PATH *ExtendedAcpi;
+
+ ATAPI_DEVICE_PATH *Atapi;
+ SCSI_DEVICE_PATH *Scsi;
+ FIBRECHANNEL_DEVICE_PATH *FibreChannel;
+
+ F1394_DEVICE_PATH *F1394;
+ USB_DEVICE_PATH *Usb;
+ USB_CLASS_DEVICE_PATH *UsbClass;
+ I2O_DEVICE_PATH *I2O;
+ MAC_ADDR_DEVICE_PATH *MacAddr;
+ IPv4_DEVICE_PATH *Ipv4;
+ IPv6_DEVICE_PATH *Ipv6;
+ INFINIBAND_DEVICE_PATH *InfiniBand;
+ UART_DEVICE_PATH *Uart;
+
+ HARDDRIVE_DEVICE_PATH *HardDrive;
+ CDROM_DEVICE_PATH *CD;
+
+ FILEPATH_DEVICE_PATH *FilePath;
+ MEDIA_PROTOCOL_DEVICE_PATH *MediaProtocol;
+
+ BBS_BBS_DEVICE_PATH *Bbs;
+ UINT8 *Raw;
+} EFI_DEV_PATH_PTR;
+
+#pragma pack()
+
+
+//
+// PXE Informations
+//
+
+//
+// Packet definitions
+//
+typedef struct {
+ UINT8 BootpOpcode;
+ UINT8 BootpHwType;
+ UINT8 BootpHwAddrLen;
+ UINT8 BootpGateHops;
+ UINT32 BootpIdent;
+ UINT16 BootpSeconds;
+ UINT16 BootpFlags;
+ UINT8 BootpCiAddr[4];
+ UINT8 BootpYiAddr[4];
+ UINT8 BootpSiAddr[4];
+ UINT8 BootpGiAddr[4];
+ UINT8 BootpHwAddr[16];
+ UINT8 BootpSrvName[64];
+ UINT8 BootpBootFile[128];
+ UINT32 DhcpMagik;
+ UINT8 DhcpOptions[56];
+} EFI_PXE_BASE_CODE_DHCPV4_PACKET;
+
+typedef union {
+ UINT8 Raw[1472];
+ EFI_PXE_BASE_CODE_DHCPV4_PACKET Dhcpv4;
+
+ //
+ // EFI_PXE_BASE_CODE_DHCPV6_PACKET Dhcpv6;
+ //
+} EFI_PXE_BASE_CODE_PACKET;
+
+#include <Uefi/EfiPxe.h>
+
+//
+// EFI Revision information
+//
+#define EFI_FIRMWARE_REVISION (EFI_2_00_SYSTEM_TABLE_REVISION)
+
+#include <Common/EfiImage.h>
+#include <IndustryStandard/Usb.h>
+
+
+#define EFI_USB_HC_RESET_GLOBAL 0x0001
+#define EFI_USB_HC_RESET_HOST_CONTROLLER 0x0002
+#define EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG 0x0004
+#define EFI_USB_HC_RESET_HOST_WITH_DEBUG 0x0008
+
+//
+// USB Host Controller state
+//
+typedef enum {
+ EfiUsbHcStateHalt,
+ EfiUsbHcStateOperational,
+ EfiUsbHcStateSuspend,
+ EfiUsbHcStateMaximum
+} EFI_USB_HC_STATE;
+
+
+//
+// EFI File location to boot from on removable media devices
+//
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA32 L"\\EFI\\BOOT\\BOOTIA32.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_IA64 L"\\EFI\\BOOT\\BOOTIA64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_X64 L"\\EFI\\BOOT\\BOOTX64.EFI"
+#define EFI_REMOVABLE_MEDIA_FILE_NAME_EBC L"\\EFI\\BOOT\\BOOTEBC.EFI"
+
+#if defined (MDE_CPU_IA32)
+ #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA32
+#elif defined (MDE_CPU_IPF)
+ #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_IA64
+#elif defined (MDE_CPU_X64)
+ #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_X64
+#elif defined (MDE_CPU_EBC)
+ #define EFI_REMOVABLE_MEDIA_FILE_NAME EFI_REMOVABLE_MEDIA_FILE_NAME_EBC
+#else
+ #error Unknown Processor Type
+#endif
+
+
+//
+// Protocols from EFI 1.10 that got thier names fixed in UEFI 2.0
+//
+#include <Protocol/LoadedImage.h>
+#include <Protocol/SimpleTextIn.h>
+#include <Protocol/SimpleTextOut.h>
+#include <Protocol/SerialIo.h>
+#include <Protocol/LoadFile.h>
+#include <Protocol/SimpleFileSystem.h>
+#include <Protocol/DiskIo.h>
+#include <Protocol/BlockIo.h>
+#include <Protocol/UnicodeCollation.h>
+#include <Protocol/SimpleNetwork.h>
+#include <Protocol/EfiNetworkInterfaceIdentifier.h>
+#include <Protocol/PxeBaseCode.h>
+#include <Protocol/PxeBaseCodeCallBack.h>
+
+//
+// EFI 1.10 Protocols
+//
+#include <Protocol/Bis.h>
+#include <Protocol/BusSpecificDriverOverride.h>
+#include <Protocol/ComponentName.h>
+#include <Protocol/DebugPort.h>
+#include <Protocol/DebugSupport.h>
+#include <Protocol/Decompress.h>
+#include <Protocol/DriverBinding.h>
+#include <Protocol/DriverConfiguration.h>
+#include <Protocol/DriverDiagnostics.h>
+#include <Protocol/Ebc.h>
+#include <Protocol/EfiNetworkInterfaceIdentifier.h>
+#include <Protocol/FileInfo.h>
+#include <Protocol/FileSystemInfo.h>
+#include <Protocol/FileSystemVolumeLabelInfo.h>
+#include <Protocol/PciIo.h>
+#include <Protocol/PciRootBridgeIo.h>
+#include <Protocol/PlatformDriverOverride.h>
+#include <Protocol/SimplePointer.h>
+#include <Protocol/ScsiPassThru.h>
+#include <Protocol/UsbIo.h>
+#include <Protocol/UsbHostController.h>
+#include <Protocol/UgaDraw.h>
+
+//
+// EFI 1.10 GUIDs
+//
+#include <Guid/Acpi.h>
+#include <Guid/DebugImageInfoTable.h>
+#include <Guid/GlobalVariable.h>
+#include <Guid/Gpt.h>
+#include <Guid/PcAnsi.h>
+#include <Guid/SmBios.h>
+#include <Guid/SalSystemTable.h>
+
+
+#if (EFI_SPECIFICATION_VERSION >= 0x00020000)
+//
+// Turn on UEFI 2.0 Protocols and GUIDs
+//
+#include <Protocol/AuthenticationInfo.h>
+#include <Protocol/DevicePathUtilities.h>
+#include <Protocol/DevicePathToText.h>
+#include <Protocol/DevicePathFromText.h>
+#include <Protocol/GraphicsOutput.h>
+#include <Protocol/EdidDiscovered.h>
+#include <Protocol/EdidActive.h>
+#include <Protocol/EdidOverride.h>
+#include <Protocol/ScsiIo.h>
+#include <Protocol/ScsiPassThruExt.h>
+#include <Protocol/IScsiInitatorName.h>
+#include <Protocol/Usb2HostController.h>
+#include <Protocol/TapeIo.h>
+#include <Protocol/ManagedNetwork.h>
+#include <Protocol/Arp.h>
+#include <Protocol/Dhcp4.h>
+#include <Protocol/IP4.h>
+#include <Protocol/IP4Config.h>
+#include <Protocol/Tcp4.h>
+#include <Protocol/Udp4.h>
+#include <Protocol/Mtftp4.h>
+#include <Protocol/ServiceBinding.h>
+#include <Protocol/Hash.h>
+
+#include <Guid/EventGroup.h>
+//#include <Guid/WinCertificateUefi.h>
+#endif
+
+
+#endif
diff --git a/MdePkg/Include/x64/ProcessorBind.h b/MdePkg/Include/x64/ProcessorBind.h new file mode 100644 index 0000000000..c61966e154 --- /dev/null +++ b/MdePkg/Include/x64/ProcessorBind.h @@ -0,0 +1,193 @@ +/** @file
+ Processor or Compiler specific defines and types x64 (Intel(r) EM64T, AMD64).
+
+ Copyright (c) 2006, Intel Corporation
+ All rights reserved. This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ Module Name: ProcessorBind.h
+
+**/
+
+#ifndef __PROCESSOR_BIND_H__
+#define __PROCESSOR_BIND_H__
+
+//
+// Define the processor type so other code can make processor based choices
+//
+#define MDE_CPU_X64
+
+
+//
+// Make sure we are useing the correct packing rules per EFI specification
+//
+#pragma pack()
+
+
+#if _MSC_EXTENSIONS
+
+//
+// Disable warning that make it impossible to compile at /W4
+// This only works for Microsoft* tools
+//
+
+//
+// Disabling bitfield type checking warnings.
+//
+#pragma warning ( disable : 4214 )
+
+//
+// Disabling the unreferenced formal parameter warnings.
+//
+#pragma warning ( disable : 4100 )
+
+//
+// Disable slightly different base types warning as CHAR8 * can not be set
+// to a constant string.
+//
+#pragma warning ( disable : 4057 )
+
+//
+// ASSERT(FALSE) or while (TRUE) are legal constructes so supress this warning
+//
+#pragma warning ( disable : 4127 )
+
+
+#endif
+
+
+#if (__STDC_VERSION__ < 199901L)
+ //
+ // No ANSI C 2000 stdint.h integer width declarations, so define equivalents
+ //
+
+ #if _MSC_EXTENSIONS
+
+
+ //
+ // use Microsoft C complier dependent interger width types
+ //
+ typedef unsigned __int64 UINT64;
+ typedef __int64 INT64;
+ typedef unsigned __int32 UINT32;
+ typedef __int32 INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #else
+ #ifdef _EFI_P64
+ //
+ // P64 - is Intel Itanium(TM) speak for pointers being 64-bit and longs and ints
+ // are 32-bits
+ //
+ typedef unsigned long long UINT64;
+ typedef long long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short CHAR16;
+ typedef unsigned short UINT16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #else
+ //
+ // Assume LP64 - longs and pointers are 64-bit. Ints are 32-bit.
+ //
+ typedef unsigned long UINT64;
+ typedef long INT64;
+ typedef unsigned int UINT32;
+ typedef int INT32;
+ typedef unsigned short UINT16;
+ typedef unsigned short CHAR16;
+ typedef short INT16;
+ typedef unsigned char BOOLEAN;
+ typedef unsigned char UINT8;
+ typedef char CHAR8;
+ typedef char INT8;
+ #endif
+ #endif
+
+ #define UINT8_MAX 0xff
+
+#else
+ //
+ // Use ANSI C 2000 stdint.h integer width declarations
+ //
+ #include <stdint.h>
+ typedef uint8_t BOOLEAN;
+ typedef int8_t INT8;
+ typedef uint8_t UINT8;
+ typedef int16_t INT16;
+ typedef uint16_t UINT16;
+ typedef int32_t INT32;
+ typedef uint32_t UINT32;
+ typedef int64_t INT64;
+ typedef uint64_t UINT64;
+ typedef char CHAR8;
+ typedef uint16_t CHAR16;
+
+#endif
+
+typedef UINT64 UINTN;
+typedef INT64 INTN;
+
+
+//
+// Processor specific defines
+//
+#define MAX_BIT 0x8000000000000000
+#define MAX_2_BITS 0xC000000000000000
+
+//
+// Maximum legal Itanium-based address
+//
+#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFF
+
+//
+// Modifier to ensure that all protocol member functions and EFI intrinsics
+// use the correct C calling convention. All protocol member functions and
+// EFI intrinsics are required to modify thier member functions with EFIAPI.
+//
+#if _MSC_EXTENSIONS
+ ///
+ /// Define the standard calling convention reguardless of optimization level.
+ /// __cdecl is Microsoft* specific C extension.
+ ///
+ #define EFIAPI __cdecl
+#elif __GNUC__
+ ///
+ /// Define the standard calling convention reguardless of optimization level.
+ /// efidecl is an extension to GCC that supports the differnece between x64
+ /// GCC ABI and x64 Microsoft* ABI. EFI is closer to the Microsoft* ABI and
+ /// EFIAPI makes sure the right ABI is used for public interfaces.
+ /// eficecl is a work in progress and we do not yet have the compiler
+ ///
+ #define EFIAPI __attribute__((efidecl))
+#else
+ #define EFIAPI
+#endif
+
+//
+// The Microsoft* C compiler can removed references to unreferenced data items
+// if the /OPT:REF linker option is used. We defined a macro as this is a
+// a non standard extension
+//
+#if _MSC_EXTENSIONS
+ #define GLOBAL_REMOVE_IF_UNREFERENCED __declspec(selectany)
+#else
+ #define GLOBAL_REMOVE_IF_UNREFERENCED
+#endif
+
+#endif
+
|