Minor grammatical work--mostly adding periods. Sending separately a list of files missing Doxygen @param and @return information.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10572 6f19259b-4bc3-4df7-8a09-765794883524

4 files changed, 48 insertions, 48 deletions

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
index be907e9548..79c84a0982 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/ArmCache.c
@@ -7,7 +7,7 @@
   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

+  http://opensource.org/licenses/bsd-license.php.

 

   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

@@ -47,7 +47,7 @@ InvalidateInstructionCache (
   aligned on a cache line boundary, then the entire instruction cache line

   containing Address + Length -1 is invalidated. This function may choose to

   invalidate the entire instruction cache if that is more efficient than

-  invalidating the specified range. If Length is 0, the no instruction cache

+  invalidating the specified range. If Length is 0, then no instruction cache

   lines are invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -75,7 +75,7 @@ InvalidateInstructionCacheRange (
 }

 

 /**

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU.

 

   Writes Back and Invalidates the entire data cache in cache coherency domain

@@ -94,17 +94,17 @@ WriteBackInvalidateDataCache (
 }

 

 /**

-  Writes Back and Invalidates a range of data cache lines in the cache

+  Writes back and invalidates a range of data cache lines in the cache

   coherency domain of the calling CPU.

 

-  Writes Back and Invalidate the data cache lines specified by Address and

+  Writes back and invalidates the data cache lines specified by Address and

   Length. If Address is not aligned on a cache line boundary, then entire data

   cache line containing Address is written back and invalidated. If Address +

   Length is not aligned on a cache line boundary, then the entire data cache

   line containing Address + Length -1 is written back and invalidated. This

   function may choose to write back and invalidate the entire data cache if

   that is more efficient than writing back and invalidating the specified

-  range. If Length is 0, the no data cache lines are written back and

+  range. If Length is 0, then no data cache lines are written back and

   invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -132,10 +132,10 @@ WriteBackInvalidateDataCacheRange (
 }

 

 /**

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU.

 

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU. This function guarantees that all dirty cache lines are written back to

   system memory. This function may also invalidate all the data cache lines in

   the cache coherency domain of the calling CPU.

@@ -151,16 +151,16 @@ WriteBackDataCache (
 }

 

 /**

-  Writes Back a range of data cache lines in the cache coherency domain of the

+  Writes back a range of data cache lines in the cache coherency domain of the

   calling CPU.

 

-  Writes Back the data cache lines specified by Address and Length. If Address

+  Writes back the data cache lines specified by Address and Length. If Address

   is not aligned on a cache line boundary, then entire data cache line

   containing Address is written back. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is written back. This function may choose to write back the entire

   data cache if that is more efficient than writing back the specified range.

-  If Length is 0, the no data cache lines are written back. This function may

+  If Length is 0, then no data cache lines are written back. This function may

   also invalidate all the data cache lines in the specified range of the cache

   coherency domain of the calling CPU. Address is returned.

 

@@ -216,7 +216,7 @@ InvalidateDataCache (
   containing Address is invalidated. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is invalidated. This function must never invalidate any cache lines

-  outside the specified range. If Length is 0, the no data cache lines are

+  outside the specified range. If Length is 0, then no data cache lines are

   invalidated. Address is returned. This function must be used with care

   because dirty cache lines are not written back to system memory. It is

   typically used for cache diagnostics. If the CPU does not support

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
index cfa9530c3d..4740590571 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/EbcCache.c
@@ -5,7 +5,7 @@
   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

+  http://opensource.org/licenses/bsd-license.php.

 

   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

@@ -38,7 +38,7 @@ InvalidateInstructionCache (
   aligned on a cache line boundary, then the entire instruction cache line

   containing Address + Length -1 is invalidated. This function may choose to

   invalidate the entire instruction cache if that is more efficient than

-  invalidating the specified range. If Length is 0, the no instruction cache

+  invalidating the specified range. If Length is 0, then no instruction cache

   lines are invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -65,10 +65,10 @@ InvalidateInstructionCacheRange (
 }

 

 /**

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU.

 

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU. This function guarantees that all dirty cache lines are

   written back to system memory, and also invalidates all the data cache lines

   in the cache coherency domain of the calling CPU.

@@ -83,7 +83,7 @@ WriteBackInvalidateDataCache (
 }

 

 /**

-  Writes Back and Invalidates a range of data cache lines in the cache

+  Writes back and invalidates a range of data cache lines in the cache

   coherency domain of the calling CPU.

 

   Writes Back and Invalidate the data cache lines specified by Address and

@@ -93,7 +93,7 @@ WriteBackInvalidateDataCache (
   line containing Address + Length -1 is written back and invalidated. This

   function may choose to write back and invalidate the entire data cache if

   that is more efficient than writing back and invalidating the specified

-  range. If Length is 0, the no data cache lines are written back and

+  range. If Length is 0, then no data cache lines are written back and

   invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -120,10 +120,10 @@ WriteBackInvalidateDataCacheRange (
 }

 

 /**

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU.

 

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU. This function guarantees that all dirty cache lines are written back to

   system memory. This function may also invalidate all the data cache lines in

   the cache coherency domain of the calling CPU.

@@ -138,16 +138,16 @@ WriteBackDataCache (
 }

 

 /**

-  Writes Back a range of data cache lines in the cache coherency domain of the

+  Writes back a range of data cache lines in the cache coherency domain of the

   calling CPU.

 

-  Writes Back the data cache lines specified by Address and Length. If Address

+  Writes back the data cache lines specified by Address and Length. If Address

   is not aligned on a cache line boundary, then entire data cache line

   containing Address is written back. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is written back. This function may choose to write back the entire

   data cache if that is more efficient than writing back the specified range.

-  If Length is 0, the no data cache lines are written back. This function may

+  If Length is 0, then no data cache lines are written back. This function may

   also invalidate all the data cache lines in the specified range of the cache

   coherency domain of the calling CPU. Address is returned.

 

@@ -201,7 +201,7 @@ InvalidateDataCache (
   containing Address is invalidated. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is invalidated. This function must never invalidate any cache lines

-  outside the specified range. If Length is 0, the no data cache lines are

+  outside the specified range. If Length is 0, then no data cache lines are

   invalidated. Address is returned. This function must be used with care

   because dirty cache lines are not written back to system memory. It is

   typically used for cache diagnostics. If the CPU does not support

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
index 1d3d8d4395..24e985174e 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/IpfCache.c
@@ -5,7 +5,7 @@
   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

+  http://opensource.org/licenses/bsd-license.php.

 

   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

@@ -42,7 +42,7 @@ InvalidateInstructionCache (
   aligned on a cache line boundary, then the entire instruction cache line

   containing Address + Length -1 is invalidated. This function may choose to

   invalidate the entire instruction cache if that is more efficient than

-  invalidating the specified range. If Length is 0, the no instruction cache

+  invalidating the specified range. If Length is 0, then no instruction cache

   lines are invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -68,10 +68,10 @@ InvalidateInstructionCacheRange (
 }

 

 /**

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU.

 

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU. This function guarantees that all dirty cache lines are

   written back to system memory, and also invalidates all the data cache lines

   in the cache coherency domain of the calling CPU.

@@ -87,17 +87,17 @@ WriteBackInvalidateDataCache (
 }

 

 /**

-  Writes Back and Invalidates a range of data cache lines in the cache

+  Writes back and invalidates a range of data cache lines in the cache

   coherency domain of the calling CPU.

 

-  Writes Back and Invalidate the data cache lines specified by Address and

+  Writes back and invalidates the data cache lines specified by Address and

   Length. If Address is not aligned on a cache line boundary, then entire data

   cache line containing Address is written back and invalidated. If Address +

   Length is not aligned on a cache line boundary, then the entire data cache

   line containing Address + Length -1 is written back and invalidated. This

   function may choose to write back and invalidate the entire data cache if

   that is more efficient than writing back and invalidating the specified

-  range. If Length is 0, the no data cache lines are written back and

+  range. If Length is 0, then no data cache lines are written back and

   invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -151,7 +151,7 @@ WriteBackDataCache (
   cache line boundary, then the entire data cache line containing Address +

   Length -1 is written back. This function may choose to write back the entire

   data cache if that is more efficient than writing back the specified range.

-  If Length is 0, the no data cache lines are written back. This function may

+  If Length is 0, then no data cache lines are written back. This function may

   also invalidate all the data cache lines in the specified range of the cache

   coherency domain of the calling CPU. Address is returned.

 

@@ -194,8 +194,8 @@ InvalidateDataCache (
   )

 {

   //

-  // Invalidation of entire data cache without writing back is not supported on

-  // IPF architecture, so write back and invalidate operation is performed.

+  // Invalidation of the entire data cache without writing back is not supported 

+  // on IPF architecture, so a write back and invalidate operation is performed.

   //

   WriteBackInvalidateDataCache ();

 }

@@ -209,7 +209,7 @@ InvalidateDataCache (
   containing Address is invalidated. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is invalidated. This function must never invalidate any cache lines

-  outside the specified range. If Length is 0, the no data cache lines are

+  outside the specified range. If Length is 0, then no data cache lines are

   invalidated. Address is returned. This function must be used with care

   because dirty cache lines are not written back to system memory. It is

   typically used for cache diagnostics. If the CPU does not support

diff --git a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
index b546c59037..060a146ab0 100644
--- a/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
+++ b/MdePkg/Library/BaseCacheMaintenanceLib/X86Cache.c
@@ -5,7 +5,7 @@
   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

   which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

+  http://opensource.org/licenses/bsd-license.php.

 

   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

@@ -46,7 +46,7 @@ InvalidateInstructionCache (
   aligned on a cache line boundary, then the entire instruction cache line

   containing Address + Length -1 is invalidated. This function may choose to

   invalidate the entire instruction cache if that is more efficient than

-  invalidating the specified range. If Length is 0, the no instruction cache

+  invalidating the specified range. If Length is 0, then no instruction cache

   lines are invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -77,10 +77,10 @@ InvalidateInstructionCacheRange (
 }

 

 /**

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU.

 

-  Writes Back and Invalidates the entire data cache in cache coherency domain

+  Writes back and invalidates the entire data cache in cache coherency domain

   of the calling CPU. This function guarantees that all dirty cache lines are

   written back to system memory, and also invalidates all the data cache lines

   in the cache coherency domain of the calling CPU.

@@ -96,17 +96,17 @@ WriteBackInvalidateDataCache (
 }

 

 /**

-  Writes Back and Invalidates a range of data cache lines in the cache

+  Writes back and invalidates a range of data cache lines in the cache

   coherency domain of the calling CPU.

 

-  Writes Back and Invalidate the data cache lines specified by Address and

+  Writes back and invalidates the data cache lines specified by Address and

   Length. If Address is not aligned on a cache line boundary, then entire data

   cache line containing Address is written back and invalidated. If Address +

   Length is not aligned on a cache line boundary, then the entire data cache

   line containing Address + Length -1 is written back and invalidated. This

   function may choose to write back and invalidate the entire data cache if

   that is more efficient than writing back and invalidating the specified

-  range. If Length is 0, the no data cache lines are written back and

+  range. If Length is 0, then no data cache lines are written back and

   invalidated. Address is returned.

 

   If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().

@@ -151,10 +151,10 @@ WriteBackInvalidateDataCacheRange (
 }

 

 /**

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU.

 

-  Writes Back the entire data cache in cache coherency domain of the calling

+  Writes back the entire data cache in cache coherency domain of the calling

   CPU. This function guarantees that all dirty cache lines are written back to

   system memory. This function may also invalidate all the data cache lines in

   the cache coherency domain of the calling CPU.

@@ -170,16 +170,16 @@ WriteBackDataCache (
 }

 

 /**

-  Writes Back a range of data cache lines in the cache coherency domain of the

+  Writes back a range of data cache lines in the cache coherency domain of the

   calling CPU.

 

-  Writes Back the data cache lines specified by Address and Length. If Address

+  Writes back the data cache lines specified by Address and Length. If Address

   is not aligned on a cache line boundary, then entire data cache line

   containing Address is written back. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is written back. This function may choose to write back the entire

   data cache if that is more efficient than writing back the specified range.

-  If Length is 0, the no data cache lines are written back. This function may

+  If Length is 0, then no data cache lines are written back. This function may

   also invalidate all the data cache lines in the specified range of the cache

   coherency domain of the calling CPU. Address is returned.

 

@@ -233,7 +233,7 @@ InvalidateDataCache (
   containing Address is invalidated. If Address + Length is not aligned on a

   cache line boundary, then the entire data cache line containing Address +

   Length -1 is invalidated. This function must never invalidate any cache lines

-  outside the specified range. If Length is 0, the no data cache lines are

+  outside the specified range. If Length is 0, then no data cache lines are

   invalidated. Address is returned. This function must be used with care

   because dirty cache lines are not written back to system memory. It is

   typically used for cache diagnostics. If the CPU does not support