diff options
| author | Qin Long <qin.long@intel.com> | 2015-11-16 06:38:00 +0000 |
|---|---|---|
| committer | vanjeff <vanjeff@Edk2> | 2015-11-16 06:38:00 +0000 |
| commit | 01c307eacd05fc15cfc1d2d0444867f7f9e9da82 (patch) | |
| tree | 2116f5cd0439d461a7ad2d60ccafb603a49ef577 /MdePkg/Library/BaseLib/BaseLib.inf | |
| parent | af7fca3649779f0e55220a7acda9bd11bc660fc3 (diff) | |
| download | edk2-platforms-01c307eacd05fc15cfc1d2d0444867f7f9e9da82.tar.xz | |
MdePkg: Add CPU RdRand access APIs for random number generation
Add AsmRdRand16/32/64 APIs for RdRand instruction access to generate
high-quality random number.
(Sync patch r18518 from main trunk.)
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qin Long <qin.long@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@18785 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/BaseLib/BaseLib.inf')
| -rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index 4a37e60fe3..4cc86d7e5d 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -159,6 +159,7 @@ Ia32/EnablePaging64.asm | MSFT
Ia32/EnableCache.c | MSFT
Ia32/DisableCache.c | MSFT
+ Ia32/RdRand.asm | MSFT
Ia32/Wbinvd.asm | INTEL
Ia32/WriteMm7.asm | INTEL
@@ -252,6 +253,7 @@ Ia32/EnablePaging64.asm | INTEL
Ia32/EnableCache.asm | INTEL
Ia32/DisableCache.asm | INTEL
+ Ia32/RdRand.asm | INTEL
Ia32/GccInline.c | GCC
Ia32/Thunk16.nasm | GCC
@@ -279,6 +281,7 @@ Ia32/LShiftU64.S | GCC
Ia32/EnableCache.S | GCC
Ia32/DisableCache.S | GCC
+ Ia32/RdRand.S | GCC
Ia32/DivS64x64Remainder.c
Ia32/InternalSwitchStack.c | MSFT
@@ -383,10 +386,12 @@ X64/CpuBreakpoint.c | MSFT
X64/WriteMsr64.c | MSFT
X64/ReadMsr64.c | MSFT
+ X64/RdRand.asm | MSFT
X64/CpuBreakpoint.asm | INTEL
X64/WriteMsr64.asm | INTEL
X64/ReadMsr64.asm | INTEL
+ X64/RdRand.asm | INTEL
X64/Non-existing.c
Math64.c
@@ -417,6 +422,7 @@ X64/CpuIdEx.S | GCC
X64/EnableCache.S | GCC
X64/DisableCache.S | GCC
+ X64/RdRand.S | GCC
ChkStkGcc.c | GCC
[Sources.IPF]
|