diff options
author | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-07-02 09:34:25 +0000 |
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committer | vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524> | 2007-07-02 09:34:25 +0000 |
commit | f1baef624fb7119c54c3389a2cd99b108ee08f0e (patch) | |
tree | d713f9ecb9bcb40f62ace27aa135db8c4b0e86e0 /MdePkg/Library/BaseLib/Ia32/CpuIdEx.S | |
parent | 29b052646a5f5fa0b28cbe9ca6224541e688f251 (diff) | |
download | edk2-platforms-f1baef624fb7119c54c3389a2cd99b108ee08f0e.tar.xz |
1. Port X64, IPF and EBC arch for BaseLib
2. Port X64 arch codes for BaseMemoryLibRepStr and BaseMemoryLibSee2
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@2955 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/BaseLib/Ia32/CpuIdEx.S')
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/CpuIdEx.S | 139 |
1 files changed, 67 insertions, 72 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S index 2d7ec493cf..48554cc96b 100644 --- a/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S +++ b/MdePkg/Library/BaseLib/Ia32/CpuIdEx.S @@ -1,72 +1,67 @@ -//
-// Include common header file for this module.
-//
-#include "CommonHeader.h"
-
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2006, Intel Corporation
-# All rights reserved. This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-# Module Name:
-#
-# CpuIdEx.Asm
-#
-# Abstract:
-#
-# AsmCpuidEx function
-#
-# Notes:
-#
-#------------------------------------------------------------------------------
-
- .686:
- .code:
-
-#------------------------------------------------------------------------------
-# UINT32
-# EFIAPI
-# AsmCpuidEx (
-# IN UINT32 RegisterInEax,
-# IN UINT32 RegisterInEcx,
-# OUT UINT32 *RegisterOutEax OPTIONAL,
-# OUT UINT32 *RegisterOutEbx OPTIONAL,
-# OUT UINT32 *RegisterOutEcx OPTIONAL,
-# OUT UINT32 *RegisterOutEdx OPTIONAL
-# )
-#------------------------------------------------------------------------------
-.globl ASM_PFX(AsmCpuidEx)
-ASM_PFX(AsmCpuidEx):
- push %ebx
- push %ebp
- movl %esp, %ebp
- movl 12(%ebp), %eax
- movl 16(%ebp), %ecx
- cpuid
- push %ecx
- movl 20(%ebp), %ecx
- jecxz L1
- movl %eax, (%ecx)
-L1:
- movl 24(%ebp), %ecx
- jecxz L2
- movl %ebx, (%ecx)
-L2:
- movl 28(%ebp), %ecx
- jecxz L3
- popl (%ecx)
-L3:
- movl 32(%ebp), %edx
- jecxz L4
- movl %edx, (%ecx)
-L4:
- movl 12(%ebp), %eax
- leave
- pop %ebx
- ret
+#------------------------------------------------------------------------------ +# +# Copyright (c) 2006, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuIdEx.Asm +# +# Abstract: +# +# AsmCpuidEx function +# +# Notes: +# +#------------------------------------------------------------------------------ + + .686: + .code: + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# AsmCpuidEx ( +# IN UINT32 RegisterInEax, +# IN UINT32 RegisterInEcx, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +.globl ASM_PFX(AsmCpuidEx) +ASM_PFX(AsmCpuidEx): + push %ebx + push %ebp + movl %esp, %ebp + movl 12(%ebp), %eax + movl 16(%ebp), %ecx + cpuid + push %ecx + movl 20(%ebp), %ecx + jecxz L1 + movl %eax, (%ecx) +L1: + movl 24(%ebp), %ecx + jecxz L2 + movl %ebx, (%ecx) +L2: + movl 28(%ebp), %ecx + jecxz L3 + popl (%ecx) +L3: + movl 32(%ebp), %edx + jecxz L4 + movl %edx, (%ecx) +L4: + movl 12(%ebp), %eax + leave + pop %ebx + ret |