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authorlgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524>2012-12-25 02:25:50 +0000
committerlgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524>2012-12-25 02:25:50 +0000
commit94952554cc604750f3df3d4e8ae068703481d258 (patch)
tree943da134082610ef812da34b008fe1a0feb107f9 /MdePkg/Library/UefiPciLibPciRootBridgeIo
parent2a956f7490cbac07c8eccf2cfc55fb0c02c0654c (diff)
downloadedk2-platforms-94952554cc604750f3df3d4e8ae068703481d258.tar.xz
Add ASSERT() for BitField operations to make sure the input value is valid.
Signed-off-by: Liming Gao <liming.gao@intel.com> Reviewed-by: Kinney, Michael D <Michael.D.Kinney@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14019 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg/Library/UefiPciLibPciRootBridgeIo')
-rw-r--r--MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
index 4d4c7f2d58..148e12c190 100644
--- a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
+++ b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
@@ -1,7 +1,7 @@
/** @file
PCI Library using PCI Root Bridge I/O Protocol.
- Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are
licensed and made available under the terms and conditions of
the BSD License which accompanies this distribution. The full
@@ -364,6 +364,7 @@ PciBitFieldRead8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -405,6 +406,7 @@ PciBitFieldWrite8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -446,6 +448,7 @@ PciBitFieldOr8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -489,6 +492,8 @@ PciBitFieldAnd8 (
If StartBit is greater than 7, then ASSERT().
If EndBit is greater than 7, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -715,6 +720,7 @@ PciBitFieldRead16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -757,6 +763,7 @@ PciBitFieldWrite16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -799,6 +806,7 @@ PciBitFieldOr16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -843,6 +851,8 @@ PciBitFieldAnd16 (
If StartBit is greater than 15, then ASSERT().
If EndBit is greater than 15, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1069,6 +1079,7 @@ PciBitFieldRead32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1111,6 +1122,7 @@ PciBitFieldWrite32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1153,6 +1165,7 @@ PciBitFieldOr32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.
@@ -1197,6 +1210,8 @@ PciBitFieldAnd32 (
If StartBit is greater than 31, then ASSERT().
If EndBit is greater than 31, then ASSERT().
If EndBit is less than StartBit, then ASSERT().
+ If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
+ If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().
@param Address The PCI configuration register to write.
@param StartBit The ordinal of the least significant bit in the bit field.