Minor grammatical work--mostly adding periods. Items with ONLY period added did not have the heading date changed, but Items with content changes had heading copyright dates updated. Sending separately a list of files missing Doxygen @param and @return information. (PENDING)

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10604 6f19259b-4bc3-4df7-8a09-765794883524

2 files changed, 45 insertions, 45 deletions

diff --git a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
index ba51019a77..622a7ccd1a 100644
--- a/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
+++ b/MdePkg/Library/UefiPciLibPciRootBridgeIo/PciLib.c
@@ -6,7 +6,7 @@
   licensed and made available under the terms and conditions of

   the BSD License which accompanies this distribution.  The full

   text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php

+  http://opensource.org/licenses/bsd-license.php.

   

   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

@@ -36,7 +36,7 @@
 /**

   Translate PCI Lib address into format of PCI Root Bridge I/O Protocol.

 

-  @param  A  Address that encodes the PCI Bus, Device, Function and

+  @param  A  The address that encodes the PCI Bus, Device, Function and

              Register.

 

 **/

@@ -83,7 +83,7 @@ PciLibConstructor (
   It reads and returns the PCI configuration register specified by Address,

   the width of data is specified by Width.

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  Width   Width of data to read

 

@@ -117,7 +117,7 @@ DxePciLibPciRootBridgeIoReadWorker (
   value specified by Data. The width of data is specifed by Width.

   Data is returned.

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  Width   Width of data to write

   @param  Data    The value to write.

@@ -151,7 +151,7 @@ DxePciLibPciRootBridgeIoWriteWorker (
   

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   

   @retval RETURN_SUCCESS           The PCI device was registered for runtime access.

@@ -182,7 +182,7 @@ PciRegisterForRuntimeAccess (
 

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

 

   @return The read value from the PCI configuration register.

@@ -208,7 +208,7 @@ PciRead8 (
 

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  Value   The value to write.

 

@@ -240,7 +240,7 @@ PciWrite8 (
 

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  OrData  The value to OR with the PCI configuration register.

 

@@ -270,7 +270,7 @@ PciOr8 (
 

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

 

@@ -301,7 +301,7 @@ PciAnd8 (
 

   If Address > 0x0FFFFFFF, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

   @param  OrData  The value to OR with the result of the AND operation.

@@ -332,7 +332,7 @@ PciAndThenOr8 (
   If EndBit is greater than 7, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to read.

+  @param  Address   The PCI configuration register to read.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..7.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -365,12 +365,12 @@ PciBitFieldRead8 (
   If EndBit is greater than 7, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..7.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

                     Range 0..7.

-  @param  Value     New value of the bit field.

+  @param  Value     The new value of the bit field.

 

   @return The value written back to the PCI configuration register.

 

@@ -406,7 +406,7 @@ PciBitFieldWrite8 (
   If EndBit is greater than 7, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..7.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -447,7 +447,7 @@ PciBitFieldOr8 (
   If EndBit is greater than 7, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..7.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -490,7 +490,7 @@ PciBitFieldAnd8 (
   If EndBit is greater than 7, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..7.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -527,7 +527,7 @@ PciBitFieldAndThenOr8 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 16-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

 

   @return The read value from the PCI configuration register.

@@ -554,7 +554,7 @@ PciRead16 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 16-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  Value   The value to write.

 

@@ -587,7 +587,7 @@ PciWrite16 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 16-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  OrData  The value to OR with the PCI configuration register.

 

@@ -618,7 +618,7 @@ PciOr16 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 16-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

 

@@ -650,7 +650,7 @@ PciAnd16 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 16-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

   @param  OrData  The value to OR with the result of the AND operation.

@@ -682,7 +682,7 @@ PciAndThenOr16 (
   If EndBit is greater than 15, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to read.

+  @param  Address   The PCI configuration register to read.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..15.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -716,12 +716,12 @@ PciBitFieldRead16 (
   If EndBit is greater than 15, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..15.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

                     Range 0..15.

-  @param  Value     New value of the bit field.

+  @param  Value     The new value of the bit field.

 

   @return The value written back to the PCI configuration register.

 

@@ -758,7 +758,7 @@ PciBitFieldWrite16 (
   If EndBit is greater than 15, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..15.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -800,7 +800,7 @@ PciBitFieldOr16 (
   If EndBit is greater than 15, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..15.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -844,7 +844,7 @@ PciBitFieldAnd16 (
   If EndBit is greater than 15, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..15.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -881,7 +881,7 @@ PciBitFieldAndThenOr16 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 32-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

 

   @return The read value from the PCI configuration register.

@@ -908,7 +908,7 @@ PciRead32 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 32-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  Value   The value to write.

 

@@ -941,7 +941,7 @@ PciWrite32 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 32-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  OrData  The value to OR with the PCI configuration register.

 

@@ -972,7 +972,7 @@ PciOr32 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 32-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

 

@@ -1004,7 +1004,7 @@ PciAnd32 (
   If Address > 0x0FFFFFFF, then ASSERT().

   If Address is not aligned on a 32-bit boundary, then ASSERT().

 

-  @param  Address Address that encodes the PCI Bus, Device, Function and

+  @param  Address The address that encodes the PCI Bus, Device, Function and

                   Register.

   @param  AndData The value to AND with the PCI configuration register.

   @param  OrData  The value to OR with the result of the AND operation.

@@ -1036,7 +1036,7 @@ PciAndThenOr32 (
   If EndBit is greater than 31, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to read.

+  @param  Address   The PCI configuration register to read.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..31.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -1070,12 +1070,12 @@ PciBitFieldRead32 (
   If EndBit is greater than 31, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..31.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

                     Range 0..31.

-  @param  Value     New value of the bit field.

+  @param  Value     The new value of the bit field.

 

   @return The value written back to the PCI configuration register.

 

@@ -1112,7 +1112,7 @@ PciBitFieldWrite32 (
   If EndBit is greater than 31, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..31.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -1154,7 +1154,7 @@ PciBitFieldOr32 (
   If EndBit is greater than 31, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..31.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -1198,7 +1198,7 @@ PciBitFieldAnd32 (
   If EndBit is greater than 31, then ASSERT().

   If EndBit is less than StartBit, then ASSERT().

 

-  @param  Address   PCI configuration register to write.

+  @param  Address   The PCI configuration register to write.

   @param  StartBit  The ordinal of the least significant bit in the bit field.

                     Range 0..31.

   @param  EndBit    The ordinal of the most significant bit in the bit field.

@@ -1240,10 +1240,10 @@ PciBitFieldAndThenOr32 (
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

   If Size > 0 and Buffer is NULL, then ASSERT().

 

-  @param  StartAddress  Starting address that encodes the PCI Bus, Device,

+  @param  StartAddress  The starting address that encodes the PCI Bus, Device,

                         Function and Register.

-  @param  Size          Size in bytes of the transfer.

-  @param  Buffer        Pointer to a buffer receiving the data read.

+  @param  Size          The size in bytes of the transfer.

+  @param  Buffer        The pointer to a buffer receiving the data read.

 

   @return Size

 

@@ -1338,10 +1338,10 @@ PciReadBuffer (
   If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

   If Size > 0 and Buffer is NULL, then ASSERT().

 

-  @param  StartAddress  Starting address that encodes the PCI Bus, Device,

+  @param  StartAddress  The starting address that encodes the PCI Bus, Device,

                         Function and Register.

-  @param  Size          Size in bytes of the transfer.

-  @param  Buffer        Pointer to a buffer containing the data to write.

+  @param  Size          The size in bytes of the transfer.

+  @param  Buffer        The pointer to a buffer containing the data to write.

 

   @return Size written to StartAddress.

 

diff --git a/MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.inf b/MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.inf
index ef651daac1..b6cfe67b3e 100644
--- a/MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.inf
+++ b/MdePkg/Library/UefiPciLibPciRootBridgeIo/UefiPciLibPciRootBridgeIo.inf
@@ -12,7 +12,7 @@
 #  This program and the accompanying materials

 #  are licensed and made available under the terms and conditions of the BSD License

 #  which accompanies this distribution. The full text of the license may be found at

-#  http://opensource.org/licenses/bsd-license.php

+#  http://opensource.org/licenses/bsd-license.php.

 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

 #