diff options
author | Michael Kinney <michael.d.kinney@intel.com> | 2015-04-27 19:38:39 +0000 |
---|---|---|
committer | mdkinney <mdkinney@Edk2> | 2015-04-27 19:38:39 +0000 |
commit | 88a75d260cadc67cc0edf6ad5f57241ed89a7d4b (patch) | |
tree | 0684c5232be5941ba6ffd0a3f62cec8e1746bfa0 /MdePkg | |
parent | 881813d7a93d9009c873515b043c41c4554779e4 (diff) | |
download | edk2-platforms-88a75d260cadc67cc0edf6ad5f57241ed89a7d4b.tar.xz |
MdePkg/BaseLib: Support IA32 processors without CMOVx
Remove use of CMOVx instruction from IA32 assembly files in BaseLib.
This matches compiler flags for all supported C compilers.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17213 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg')
-rw-r--r-- | MdePkg/Library/BaseLib/BaseLib.inf | 4 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/ARShiftU64.S | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/ARShiftU64.c | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LRotU64.S | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LRotU64.asm | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LRotU64.c | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LShiftU64.S | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LShiftU64.asm | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/LShiftU64.c | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RRotU64.S | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RRotU64.asm | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RRotU64.c | 10 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RShiftU64.S | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RShiftU64.asm | 8 | ||||
-rw-r--r-- | MdePkg/Library/BaseLib/Ia32/RShiftU64.c | 8 |
16 files changed, 83 insertions, 53 deletions
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index fc0cb9638b..4a37e60fe3 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -1,7 +1,7 @@ ## @file
# Base Library implementation.
#
-# Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2007 - 2015, Intel Corporation. All rights reserved.<BR>
# Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
#
@@ -21,7 +21,7 @@ MODULE_UNI_FILE = BaseLib.uni
FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30
MODULE_TYPE = BASE
- VERSION_STRING = 1.0
+ VERSION_STRING = 1.1
LIBRARY_CLASS = BaseLib
#
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S index 8f73ed4f69..9138c423fc 100644 --- a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -34,8 +34,10 @@ ASM_PFX(InternalMathARShiftU64): movl 8(%esp), %eax
cltd
testb $32, %cl
- cmovz %eax, %edx
- cmovz 4(%esp), %eax
+ jnz L0
+ movl %eax, %edx
+ movl 4(%esp), %eax
+L0:
shrdl %cl, %edx, %eax
sar %cl, %edx
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm index 9d53969bb6..10f04c3875 100644 --- a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -36,8 +36,10 @@ InternalMathARShiftU64 PROC mov eax, [esp + 8]
cdq
test cl, 32
- cmovz edx, eax
- cmovz eax, [esp + 4]
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
shrd eax, edx, cl
sar edx, cl
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c index 754b25f511..b1edc675e0 100644 --- a/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c +++ b/MdePkg/Library/BaseLib/Ia32/ARShiftU64.c @@ -1,7 +1,7 @@ /** @file
64-bit arithmetic right shift function for IA-32.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -40,8 +40,10 @@ InternalMathARShiftU64 ( mov eax, dword ptr [Operand + 4]
cdq
test cl, 32
- cmovz edx, eax
- cmovz eax, dword ptr [Operand + 0]
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
shrd eax, edx, cl
sar edx, cl
}
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.S b/MdePkg/Library/BaseLib/Ia32/LRotU64.S index e9aeeb6387..ff450fa1f5 100644 --- a/MdePkg/Library/BaseLib/Ia32/LRotU64.S +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -39,8 +39,10 @@ ASM_PFX(InternalMathLRotU64): rorl %cl, %ebx
shldl %cl, %ebx, %eax
testb $32, %cl # Count >= 32?
- cmovnz %eax, %ecx
- cmovnz %edx, %eax
- cmovnz %ecx, %edx
+ jz L0
+ movl %eax, %ecx
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
pop %ebx
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.asm b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm index bfdf82d459..9e6a94e792 100644 --- a/MdePkg/Library/BaseLib/Ia32/LRotU64.asm +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -40,9 +40,11 @@ InternalMathLRotU64 PROC USES ebx ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz @F
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+@@:
ret
InternalMathLRotU64 ENDP
diff --git a/MdePkg/Library/BaseLib/Ia32/LRotU64.c b/MdePkg/Library/BaseLib/Ia32/LRotU64.c index 1c805aad99..2e01ed8bb0 100644 --- a/MdePkg/Library/BaseLib/Ia32/LRotU64.c +++ b/MdePkg/Library/BaseLib/Ia32/LRotU64.c @@ -1,7 +1,7 @@ /** @file
64-bit left rotation for Ia32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -45,9 +45,11 @@ InternalMathLRotU64 ( ror ebx, cl
shld eax, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
}
}
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.S b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S index 31df0d6768..dcdbeae1d7 100644 --- a/MdePkg/Library/BaseLib/Ia32/LShiftU64.S +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -34,8 +34,10 @@ ASM_PFX(InternalMathLShiftU64): xorl %eax, %eax
movl 4(%esp), %edx
testb $32, %cl # Count >= 32?
- cmovz %edx, %eax
- cmovz 0x8(%esp), %edx
+ jnz L0
+ movl %edx, %eax
+ movl 0x8(%esp), %edx
+L0:
shld %cl, %eax, %edx
shl %cl, %eax
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm index a5447e8f58..15b724270c 100644 --- a/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -36,8 +36,10 @@ InternalMathLShiftU64 PROC xor eax, eax
mov edx, [esp + 4]
test cl, 32 ; Count >= 32?
- cmovz eax, edx
- cmovz edx, [esp + 8]
+ jnz @F
+ mov eax, edx
+ mov edx, [esp + 8]
+@@:
shld edx, eax, cl
shl eax, cl
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/LShiftU64.c b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c index 472fed1d29..9fb2532acf 100644 --- a/MdePkg/Library/BaseLib/Ia32/LShiftU64.c +++ b/MdePkg/Library/BaseLib/Ia32/LShiftU64.c @@ -1,7 +1,7 @@ /** @file
64-bit left shift function for IA-32.
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -40,8 +40,10 @@ InternalMathLShiftU64 ( xor eax, eax
mov edx, dword ptr [Operand + 0]
test cl, 32 // Count >= 32?
- cmovz eax, edx
- cmovz edx, dword ptr [Operand + 4]
+ jnz L0
+ mov eax, edx
+ mov edx, dword ptr [Operand + 4]
+L0:
shld edx, eax, cl
shl eax, cl
}
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.S b/MdePkg/Library/BaseLib/Ia32/RRotU64.S index 54fc089023..f42f450189 100644 --- a/MdePkg/Library/BaseLib/Ia32/RRotU64.S +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -39,8 +39,10 @@ ASM_PFX(InternalMathRRotU64): roll %cl, %ebx
shrdl %cl, %ebx, %edx
testb $32, %cl # Count >= 32?
- cmovnz %eax, %ecx # switch eax & edx if Count >= 32
- cmovnz %edx, %eax
- cmovnz %ecx, %edx
+ jz L0
+ movl %eax, %ecx # switch eax & edx if Count >= 32
+ movl %edx, %eax
+ movl %ecx, %edx
+L0:
pop %ebx
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.asm b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm index a719d29765..6afb0cc0fc 100644 --- a/MdePkg/Library/BaseLib/Ia32/RRotU64.asm +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -40,9 +40,11 @@ InternalMathRRotU64 PROC USES ebx rol ebx, cl
shrd edx, ebx, cl
test cl, 32 ; Count >= 32?
- cmovnz ecx, eax ; switch eax & edx if Count >= 32
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz @F
+ mov ecx, eax ; switch eax & edx if Count >= 32
+ mov eax, edx
+ mov edx, ecx
+@@:
ret
InternalMathRRotU64 ENDP
diff --git a/MdePkg/Library/BaseLib/Ia32/RRotU64.c b/MdePkg/Library/BaseLib/Ia32/RRotU64.c index f6ee6d65eb..17fde84b9d 100644 --- a/MdePkg/Library/BaseLib/Ia32/RRotU64.c +++ b/MdePkg/Library/BaseLib/Ia32/RRotU64.c @@ -1,7 +1,7 @@ /** @file
64-bit right rotation for Ia32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -45,9 +45,11 @@ InternalMathRRotU64 ( rol ebx, cl
shrd edx, ebx, cl
test cl, 32 // Count >= 32?
- cmovnz ecx, eax
- cmovnz eax, edx
- cmovnz edx, ecx
+ jz L0
+ mov ecx, eax
+ mov eax, edx
+ mov edx, ecx
+L0:
}
}
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.S b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S index 17cdedb212..0bf9292281 100644 --- a/MdePkg/Library/BaseLib/Ia32/RShiftU64.S +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.S @@ -1,6 +1,6 @@ #------------------------------------------------------------------------------
#
-# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
@@ -37,8 +37,10 @@ ASM_PFX(InternalMathRShiftU64): xorl %edx, %edx
movl 8(%esp), %eax
testb $32, %cl # Count >= 32?
- cmovz %eax, %edx
- cmovz 0x4(%esp), %eax
+ jnz L0
+ movl %eax, %edx
+ movl 0x4(%esp), %eax
+L0:
shrdl %cl, %edx, %eax
shr %cl, %edx
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm index 2fe60572ee..94f70466dd 100644 --- a/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.asm @@ -1,6 +1,6 @@ ;------------------------------------------------------------------------------
;
-; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
@@ -36,8 +36,10 @@ InternalMathRShiftU64 PROC xor edx, edx
mov eax, [esp + 8]
test cl, 32 ; Count >= 32?
- cmovz edx, eax
- cmovz eax, [esp + 4]
+ jnz @F
+ mov edx, eax
+ mov eax, [esp + 4]
+@@:
shrd eax, edx, cl
shr edx, cl
ret
diff --git a/MdePkg/Library/BaseLib/Ia32/RShiftU64.c b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c index 89b0e95d54..8b49485635 100644 --- a/MdePkg/Library/BaseLib/Ia32/RShiftU64.c +++ b/MdePkg/Library/BaseLib/Ia32/RShiftU64.c @@ -1,7 +1,7 @@ /** @file
64-bit logical right shift function for IA-32
- Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -40,8 +40,10 @@ InternalMathRShiftU64 ( xor edx, edx
mov eax, dword ptr [Operand + 4]
test cl, 32
- cmovz edx, eax
- cmovz eax, dword ptr [Operand + 0]
+ jnz L0
+ mov edx, eax
+ mov eax, dword ptr [Operand + 0]
+L0:
shrd eax, edx, cl
shr edx, cl
}
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