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authorLiming Gao <liming.gao@intel.com>2013-07-22 06:41:52 +0000
committerlgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524>2013-07-22 06:41:52 +0000
commit775180651d4bd91cc021a0a4d6c229848dde0599 (patch)
tree92ce4ef5b1a78efb1169b19344b629a34adbe36e /MdePkg
parent499ceb8ef084924d3e9a5e73488d9e0a67cc6d83 (diff)
downloadedk2-platforms-775180651d4bd91cc021a0a4d6c229848dde0599.tar.xz
Correctly character in comments of BaseLib BitField.
Signed-off-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14497 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg')
-rw-r--r--MdePkg/Library/BaseLib/BitField.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/MdePkg/Library/BaseLib/BitField.c b/MdePkg/Library/BaseLib/BitField.c
index 167ee5b692..eb9e276acc 100644
--- a/MdePkg/Library/BaseLib/BitField.c
+++ b/MdePkg/Library/BaseLib/BitField.c
@@ -71,8 +71,8 @@ InternalBaseLibBitFieldOrUint (
//
// Higher bits in OrData those are not used must be zero.
//
- // EndBit – StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
- // So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
+ // EndBit - StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
+ // So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
//
ASSERT ((OrData >> (EndBit - StartBit)) == ((OrData >> (EndBit - StartBit)) & 1));
@@ -113,8 +113,8 @@ InternalBaseLibBitFieldAndUint (
//
// Higher bits in AndData those are not used must be zero.
//
- // EndBit – StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
- // So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
+ // EndBit - StartBit + 1 might be 32 while the result right shifting 32 on a 32bit integer is undefined,
+ // So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
//
ASSERT ((AndData >> (EndBit - StartBit)) == ((AndData >> (EndBit - StartBit)) & 1));
@@ -811,8 +811,8 @@ BitFieldOr64 (
//
// Higher bits in OrData those are not used must be zero.
//
- // EndBit – StartBit + 1 might be 64 while the result right shifting 64 on RShiftU64() API is invalid,
- // So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
+ // EndBit - StartBit + 1 might be 64 while the result right shifting 64 on RShiftU64() API is invalid,
+ // So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
//
ASSERT (RShiftU64 (OrData, EndBit - StartBit) == (RShiftU64 (OrData, EndBit - StartBit) & 1));
@@ -863,8 +863,8 @@ BitFieldAnd64 (
//
// Higher bits in AndData those are not used must be zero.
//
- // EndBit – StartBit + 1 might be 64 while the right shifting 64 on RShiftU64() API is invalid,
- // So the logic is updated to right shift (EndBit – StartBit) bits and compare the last bit directly.
+ // EndBit - StartBit + 1 might be 64 while the right shifting 64 on RShiftU64() API is invalid,
+ // So the logic is updated to right shift (EndBit - StartBit) bits and compare the last bit directly.
//
ASSERT (RShiftU64 (AndData, EndBit - StartBit) == (RShiftU64 (AndData, EndBit - StartBit) & 1));