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authorJordan Justen <jordan.l.justen@intel.com>2014-09-01 17:24:08 +0000
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2014-09-01 17:24:08 +0000
commit03e9db1575f063f968f5d369ec648e22df252a87 (patch)
tree162d0cadd9b31fa111b9fa55dea2cecd25951368 /MdePkg
parent7458df400cc77fde6940bde211285c37ee642dc4 (diff)
downloadedk2-platforms-03e9db1575f063f968f5d369ec648e22df252a87.tar.xz
MdePkg BaseLib NASM Thunk16: Initialize _16GdtrBase to 0
Previously we were setting it to the start of the GDT in the UEFI driver's copy of BaseLib. This address is irrelavent, since the C code will initialize it to the cooresponding address after the Thunk16 code has been placed in low memory. Additionally, initializing this was causing a link error for the XCLANG toolchain. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16025 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'MdePkg')
-rw-r--r--MdePkg/Library/BaseLib/Ia32/Thunk16.nasm2
-rw-r--r--MdePkg/Library/BaseLib/X64/Thunk16.nasm2
2 files changed, 2 insertions, 2 deletions
diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm b/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm
index c08e41de9d..e8468a3fbf 100644
--- a/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.nasm
@@ -139,7 +139,7 @@ _16Idtr:
_16Gdtr:
DW GdtEnd - _NullSegDesc - 1
_16GdtrBase:
- DD _NullSegDesc
+ DD 0
;------------------------------------------------------------------------------
; _ToUserCode() takes control in real mode before passing control to user code.
diff --git a/MdePkg/Library/BaseLib/X64/Thunk16.nasm b/MdePkg/Library/BaseLib/X64/Thunk16.nasm
index d15984b01c..6084fac8c4 100644
--- a/MdePkg/Library/BaseLib/X64/Thunk16.nasm
+++ b/MdePkg/Library/BaseLib/X64/Thunk16.nasm
@@ -145,7 +145,7 @@ _EntryPoint:
_16Gdtr:
DW GDT_SIZE - 1
_16GdtrBase:
- DQ _NullSeg
+ DQ 0
_16Idtr:
DW (1 << 10) - 1
DD 0