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authorOlivier Martin <olivier.martin@arm.com>2013-11-28 21:38:32 +0000
committeroliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524>2013-11-28 21:38:32 +0000
commitd4c92adef76ef0a52b3590946f4571f8f5c85365 (patch)
tree46f9994deaa2cc8b54e0533ace5808637a19d4b0 /NetworkPkg/Udp6Dxe
parent6cc28dc4c06c193d5f8a945823245ef85ae55064 (diff)
downloadedk2-platforms-d4c92adef76ef0a52b3590946f4571f8f5c85365.tar.xz
ArmPlatformPkg/ArmVExpressLibCTA9x4: Fixed the initial secondary core bringup when remapping DRAM at 0x0
If the DRAM is remapped at 0x0 then we need to wake up the secondary cores from wfe (waiting for the memory to be initialized) as the instruction is still in the remapped flash region at 0x0 to make them jumping into the C-code which lives in the NOR1 at 0x44000000 before the region 0x0 is remapped as DRAM. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14910 6f19259b-4bc3-4df7-8a09-765794883524
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