diff options
| author | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-01-25 11:28:06 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-01-25 11:28:06 +0000 |
| commit | 1e57a46299244793beb27e74be171d1540606999 (patch) | |
| tree | 8644a24d6e4b4cfd080d4c40ccf2d3d9f13760f9 /Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h | |
| parent | 5767f22fca7c337cdc113e14b411c1fd0ea7bd53 (diff) | |
| download | edk2-platforms-1e57a46299244793beb27e74be171d1540606999.tar.xz | |
ARM Packages: Fixed line endings
This large code change only modifies the line endings to be CRLF to be
compliant with the EDK2 coding convention document.
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14088 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h')
| -rw-r--r-- | Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h | 96 |
1 files changed, 48 insertions, 48 deletions
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h b/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h index 9d1036d0dc..774d873015 100644 --- a/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530Interrupt.h @@ -1,48 +1,48 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __OMAP3530INTERRUPT_H__ -#define __OMAP3530INTERRUPT_H__ - -#define INTERRUPT_BASE (0x48200000) - -#define INT_NROF_VECTORS (96) -#define MAX_VECTOR (INT_NROF_VECTORS - 1) -#define INTCPS_SYSCONFIG (INTERRUPT_BASE + 0x0010) -#define INTCPS_SYSSTATUS (INTERRUPT_BASE + 0x0014) -#define INTCPS_SIR_IRQ (INTERRUPT_BASE + 0x0040) -#define INTCPS_SIR_IFQ (INTERRUPT_BASE + 0x0044) -#define INTCPS_CONTROL (INTERRUPT_BASE + 0x0048) -#define INTCPS_PROTECTION (INTERRUPT_BASE + 0x004C) -#define INTCPS_IDLE (INTERRUPT_BASE + 0x0050) -#define INTCPS_IRQ_PRIORITY (INTERRUPT_BASE + 0x0060) -#define INTCPS_FIQ_PRIORITY (INTERRUPT_BASE + 0x0064) -#define INTCPS_THRESHOLD (INTERRUPT_BASE + 0x0068) -#define INTCPS_ITR(n) (INTERRUPT_BASE + 0x0080 + (0x20 * (n))) -#define INTCPS_MIR(n) (INTERRUPT_BASE + 0x0084 + (0x20 * (n))) -#define INTCPS_MIR_CLEAR(n) (INTERRUPT_BASE + 0x0088 + (0x20 * (n))) -#define INTCPS_MIR_SET(n) (INTERRUPT_BASE + 0x008C + (0x20 * (n))) -#define INTCPS_ISR_SET(n) (INTERRUPT_BASE + 0x0090 + (0x20 * (n))) -#define INTCPS_ISR_CLEAR(n) (INTERRUPT_BASE + 0x0094 + (0x20 * (n))) -#define INTCPS_PENDING_IRQ(n) (INTERRUPT_BASE + 0x0098 + (0x20 * (n))) -#define INTCPS_PENDING_FIQ(n) (INTERRUPT_BASE + 0x009C + (0x20 * (n))) -#define INTCPS_ILR(m) (INTERRUPT_BASE + 0x0100 + (0x04 * (m))) - -#define INTCPS_ILR_FIQ BIT0 -#define INTCPS_SIR_IRQ_MASK (0x7F) -#define INTCPS_CONTROL_NEWIRQAGR BIT0 -#define INTCPS_CONTROL_NEWFIQAGR BIT1 - -#endif // __OMAP3530INTERRUPT_H__ - +/** @file
+
+ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __OMAP3530INTERRUPT_H__
+#define __OMAP3530INTERRUPT_H__
+
+#define INTERRUPT_BASE (0x48200000)
+
+#define INT_NROF_VECTORS (96)
+#define MAX_VECTOR (INT_NROF_VECTORS - 1)
+#define INTCPS_SYSCONFIG (INTERRUPT_BASE + 0x0010)
+#define INTCPS_SYSSTATUS (INTERRUPT_BASE + 0x0014)
+#define INTCPS_SIR_IRQ (INTERRUPT_BASE + 0x0040)
+#define INTCPS_SIR_IFQ (INTERRUPT_BASE + 0x0044)
+#define INTCPS_CONTROL (INTERRUPT_BASE + 0x0048)
+#define INTCPS_PROTECTION (INTERRUPT_BASE + 0x004C)
+#define INTCPS_IDLE (INTERRUPT_BASE + 0x0050)
+#define INTCPS_IRQ_PRIORITY (INTERRUPT_BASE + 0x0060)
+#define INTCPS_FIQ_PRIORITY (INTERRUPT_BASE + 0x0064)
+#define INTCPS_THRESHOLD (INTERRUPT_BASE + 0x0068)
+#define INTCPS_ITR(n) (INTERRUPT_BASE + 0x0080 + (0x20 * (n)))
+#define INTCPS_MIR(n) (INTERRUPT_BASE + 0x0084 + (0x20 * (n)))
+#define INTCPS_MIR_CLEAR(n) (INTERRUPT_BASE + 0x0088 + (0x20 * (n)))
+#define INTCPS_MIR_SET(n) (INTERRUPT_BASE + 0x008C + (0x20 * (n)))
+#define INTCPS_ISR_SET(n) (INTERRUPT_BASE + 0x0090 + (0x20 * (n)))
+#define INTCPS_ISR_CLEAR(n) (INTERRUPT_BASE + 0x0094 + (0x20 * (n)))
+#define INTCPS_PENDING_IRQ(n) (INTERRUPT_BASE + 0x0098 + (0x20 * (n)))
+#define INTCPS_PENDING_FIQ(n) (INTERRUPT_BASE + 0x009C + (0x20 * (n)))
+#define INTCPS_ILR(m) (INTERRUPT_BASE + 0x0100 + (0x04 * (m)))
+
+#define INTCPS_ILR_FIQ BIT0
+#define INTCPS_SIR_IRQ_MASK (0x7F)
+#define INTCPS_CONTROL_NEWIRQAGR BIT0
+#define INTCPS_CONTROL_NEWFIQAGR BIT1
+
+#endif // __OMAP3530INTERRUPT_H__
+
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