diff options
| author | Ronald Cron <ronald.cron@arm.com> | 2014-08-19 13:29:52 +0000 |
|---|---|---|
| committer | oliviermartin <oliviermartin@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-19 13:29:52 +0000 |
| commit | 3402aac7d985bf8a9f9d3c639f3fe93609380513 (patch) | |
| tree | 67b11334dc45181581aaaac236243fe72c7f614c /Omap35xxPkg | |
| parent | 62d441fb17d59958bf00c4a1f3b52bf6a0b40b24 (diff) | |
| download | edk2-platforms-3402aac7d985bf8a9f9d3c639f3fe93609380513.tar.xz | |
ARM Packages: Removed trailing spaces
Trailing spaces create issue/warning when generating/applying patches.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ronald Cron <ronald.cron@arm.com>
Reviewed-By: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15833 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'Omap35xxPkg')
52 files changed, 454 insertions, 457 deletions
diff --git a/Omap35xxPkg/Flash/Flash.c b/Omap35xxPkg/Flash/Flash.c index b33c9badf7..b8de109d87 100644 --- a/Omap35xxPkg/Flash/Flash.c +++ b/Omap35xxPkg/Flash/Flash.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -227,7 +227,7 @@ NandConfigureEcc ( MmioWrite32 (GPMC_ECC_SIZE_CONFIG, (ECCSIZE0_512BYTES | ECCSIZE1_512BYTES));
}
-VOID
+VOID
NandEnableEcc (
VOID
)
@@ -268,7 +268,7 @@ NandCalculateEcc ( EccResult = MmioRead32 (EccResultRegister);
//Calculate ECC code from 32-bit ECC result value.
- //NOTE: Following calculation is not part of TRM. We got this information
+ //NOTE: Following calculation is not part of TRM. We got this information
//from Beagleboard mailing list.
gEccCode[Index * 3] = EccResult & 0xFF;
gEccCode[(Index * 3) + 1] = (EccResult >> 16) & 0xFF;
@@ -380,7 +380,7 @@ NandWritePage ( MmioWrite16(GPMC_NAND_DATA_0, *MainAreaWordBuffer++);
//After each write access, device has to wait to accept data.
- //Currently we may not be programming proper timing parameters to
+ //Currently we may not be programming proper timing parameters to
//the GPMC_CONFIGi_0 registers and we would need to figure that out.
//Without following delay, page programming fails.
gBS->Stall(1);
@@ -544,7 +544,7 @@ NandFlashReset ( //Send RESET command to device.
NandSendCommand(RESET_CMD);
-
+
//Wait for 1ms before we check status register.
gBS->Stall(1000);
@@ -562,7 +562,7 @@ NandFlashReset ( ResetBusyTimeout--;
}
}
-
+
return EFI_SUCCESS;
}
@@ -585,12 +585,12 @@ NandFlashReadBlocks ( Status = EFI_INVALID_PARAMETER;
goto exit;
}
-
+
if (Lba > LAST_BLOCK) {
Status = EFI_INVALID_PARAMETER;
goto exit;
}
-
+
if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
Status = EFI_BAD_BUFFER_SIZE;
goto exit;
@@ -640,12 +640,12 @@ NandFlashWriteBlocks ( Status = EFI_INVALID_PARAMETER;
goto exit;
}
-
+
if (Lba > LAST_BLOCK) {
Status = EFI_INVALID_PARAMETER;
goto exit;
}
-
+
if ((BufferSize % gNandFlashInfo->BlockSize) != 0) {
Status = EFI_BAD_BUFFER_SIZE;
goto exit;
@@ -668,7 +668,7 @@ NandFlashWriteBlocks ( goto exit;
}
}
-
+
// Program data
Status = NandWriteBlock((UINTN)Lba, EndBlockIndex, Buffer, SpareBuffer);
if (EFI_ERROR(Status)) {
@@ -708,7 +708,7 @@ EFI_BLOCK_IO_MEDIA gNandFlashMedia = { 0 // LastBlock
};
-EFI_BLOCK_IO_PROTOCOL BlockIo =
+EFI_BLOCK_IO_PROTOCOL BlockIo =
{
EFI_BLOCK_IO_INTERFACE_REVISION, // Revision
&gNandFlashMedia, // *Media
@@ -725,7 +725,7 @@ NandFlashInitialize ( )
{
EFI_STATUS Status;
-
+
gNandFlashInfo = (NAND_FLASH_INFO *)AllocateZeroPool (sizeof(NAND_FLASH_INFO));
//Initialize GPMC module.
@@ -764,9 +764,9 @@ NandFlashInitialize ( //Publish BlockIO.
Status = gBS->InstallMultipleProtocolInterfaces (
- &ImageHandle,
+ &ImageHandle,
&gEfiBlockIoProtocolGuid, &BlockIo,
- &gEfiDevicePathProtocolGuid, &gDevicePath,
+ &gEfiDevicePathProtocolGuid, &gDevicePath,
NULL
);
return Status;
diff --git a/Omap35xxPkg/Flash/Flash.inf b/Omap35xxPkg/Flash/Flash.inf index 4f12a27485..36e6fe45eb 100644 --- a/Omap35xxPkg/Flash/Flash.inf +++ b/Omap35xxPkg/Flash/Flash.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -36,7 +36,7 @@ IoLib
[Guids]
-
+
[Protocols]
gEfiBlockIoProtocolGuid
gEfiCpuArchProtocolGuid
@@ -45,4 +45,4 @@ gOmap35xxTokenSpaceGuid.PcdOmap35xxGpmcOffset
[depex]
- TRUE
\ No newline at end of file + TRUE
diff --git a/Omap35xxPkg/Gpio/Gpio.c b/Omap35xxPkg/Gpio/Gpio.c index c64e6be7bb..4d713f7bf5 100644 --- a/Omap35xxPkg/Gpio/Gpio.c +++ b/Omap35xxPkg/Gpio/Gpio.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -129,7 +129,7 @@ GpioInitialize ( )
{
EFI_STATUS Status;
-
+
Status = gBS->InstallMultipleProtocolInterfaces(&ImageHandle, &gEmbeddedGpioProtocolGuid, &Gpio, NULL);
return Status;
}
diff --git a/Omap35xxPkg/Gpio/Gpio.inf b/Omap35xxPkg/Gpio/Gpio.inf index 2069d2d734..a8ffb2e966 100644 --- a/Omap35xxPkg/Gpio/Gpio.inf +++ b/Omap35xxPkg/Gpio/Gpio.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -35,11 +35,11 @@ OmapLib
[Guids]
-
+
[Protocols]
gEmbeddedGpioProtocolGuid
[Pcd]
[depex]
- TRUE
\ No newline at end of file + TRUE
diff --git a/Omap35xxPkg/Include/Library/OmapDmaLib.h b/Omap35xxPkg/Include/Library/OmapDmaLib.h index f13b733796..dfac36f07e 100755 --- a/Omap35xxPkg/Include/Library/OmapDmaLib.h +++ b/Omap35xxPkg/Include/Library/OmapDmaLib.h @@ -1,7 +1,7 @@ /** @file
- Abstractions for simple OMAP DMA.
- OMAP_DMA4 structure elements are described in the OMAP35xx TRM.
+ Abstractions for simple OMAP DMA.
+ OMAP_DMA4 structure elements are described in the OMAP35xx TRM.
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
@@ -46,16 +46,16 @@ typedef struct { } OMAP_DMA4;
-/**
+/**
Configure OMAP DMA Channel
-
+
@param Channel DMA Channel to configure
- @param Dma4 Pointer to structure used to initialize DMA registers for the Channel
-
+ @param Dma4 Pointer to structure used to initialize DMA registers for the Channel
+
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
-
+
**/
EFI_STATUS
EFIAPI
@@ -64,17 +64,17 @@ EnableDmaChannel ( IN OMAP_DMA4 *Dma4
);
-/**
+/**
Turn of DMA channel configured by EnableDma().
-
+
@param Channel DMA Channel to configure
@param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS
@param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR
-
+
@retval EFI_SUCCESS DMA hardware disabled
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
-
+
**/
EFI_STATUS
EFIAPI
@@ -86,5 +86,5 @@ DisableDmaChannel ( -#endif
+#endif
diff --git a/Omap35xxPkg/Include/Library/OmapLib.h b/Omap35xxPkg/Include/Library/OmapLib.h index 80e5e0d2cb..ec14603ccd 100644 --- a/Omap35xxPkg/Include/Library/OmapLib.h +++ b/Omap35xxPkg/Include/Library/OmapLib.h @@ -15,13 +15,13 @@ #ifndef __OMAPLIB_H__
#define __OMAPLIB_H__
-UINT32
+UINT32
EFIAPI
GpioBase (
IN UINTN Port
);
-UINT32
+UINT32
EFIAPI
TimerBase (
IN UINTN Timer
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h index 5db9a07972..a6e070dda3 100755 --- a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h @@ -56,9 +56,9 @@ #define DMA4_CSDP_BURST_EN32 (0x2 << 14)
#define DMA4_CSDP_BURST_EN64 (0x3 << 14)
-#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
+#define DMA4_CSDP_WRITE_MODE_NONE_POSTED (0x0 << 16)
#define DMA4_CSDP_WRITE_MODE_POSTED (0x1 << 16)
-#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
+#define DMA4_CSDP_WRITE_MODE_LAST_NON_POSTED (0x2 << 16)
#define DMA4_CSDP_DST_ENDIAN_LOCK_LOCK BIT18
#define DMA4_CSDP_DST_ENDIAN_LOCK_ADAPT 0
@@ -72,7 +72,7 @@ #define DMA4_CSDP_SRC_ENDIAN_BIG BIT21
#define DMA4_CSDP_SRC_ENDIAN_LITTLE 0
-// Channel Control
+// Channel Control
#define DMA4_CCR_SYNCHRO_CONTROL_MASK 0x1f
#define DMA4_CCR_FS_ELEMENT (0 | 0)
@@ -104,7 +104,7 @@ #define DMA4_CCR_CONST_FILL_ENABLE BIT16
#define DMA4_CCR_TRANSPARENT_COPY_ENABLE BIT17
-
+
#define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24
#define DMA4_CSR_DROP BIT1
@@ -126,5 +126,5 @@ #define DMA4_CICR_ENABLE_ALL 0x1FBE
-#endif
+#endif
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530MMCHS.h b/Omap35xxPkg/Include/Omap3530/Omap3530MMCHS.h index 5bebe6c509..88b43de480 100644 --- a/Omap35xxPkg/Include/Omap3530/Omap3530MMCHS.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530MMCHS.h @@ -66,7 +66,7 @@ #define RSP_TYPE_48BITS (0x2UL << 16)
#define CCCE_ENABLE BIT19
#define CICE_ENABLE BIT20
-#define DP_ENABLE BIT21
+#define DP_ENABLE BIT21
#define INDX(CMD_INDX) ((CMD_INDX & 0x3F) << 24)
#define MMCHS_RSP10 (MMCHS1BASE + 0x110)
diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Prcm.h b/Omap35xxPkg/Include/Omap3530/Omap3530Prcm.h index 3a297d0a98..1871dbb122 100644 --- a/Omap35xxPkg/Include/Omap3530/Omap3530Prcm.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530Prcm.h @@ -69,7 +69,7 @@ #define CM_CLKSEL_PLL_MULT(x) (((x) & 0x07FF) << 8)
#define CM_CLKSEL_PLL_DIV(x) ((((x) - 1) & 0x7F) << 0)
-
+
#define CM_CLKSEL_DIV_120M(x) (((x) & 0x1F) << 0)
#define CM_FCLKEN_USBHOST_EN_USBHOST2_MASK BIT1
diff --git a/Omap35xxPkg/Include/TPS65950.h b/Omap35xxPkg/Include/TPS65950.h index 20df2319e1..1db8b6db46 100644 --- a/Omap35xxPkg/Include/TPS65950.h +++ b/Omap35xxPkg/Include/TPS65950.h @@ -30,7 +30,7 @@ #define VMMC1_DEV_GRP 0x82
#define DEV_GRP_P1 BIT5
-#define VMMC1_DEDICATED_REG 0x85
+#define VMMC1_DEDICATED_REG 0x85
#define VSEL_1_85V 0x0
#define VSEL_2_85V 0x1
#define VSEL_3_00V 0x2
diff --git a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c index 5040c4b152..e9d84aeabb 100644 --- a/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c +++ b/Omap35xxPkg/InterruptDxe/HardwareInterrupt.c @@ -1,8 +1,8 @@ /** @file
- Handle OMAP35xx interrupt controller
+ Handle OMAP35xx interrupt controller
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -38,7 +38,7 @@ HARDWARE_INTERRUPT_HANDLER gRegisteredInterruptHandlers[INT_NROF_VECTORS]; /**
Shutdown our hardware
-
+
DXE Core will disable interrupts and turn off the timer and disable interrupts
after all the event handlers have run.
@@ -83,16 +83,16 @@ RegisterInterruptSource ( if (Source > MAX_VECTOR) {
ASSERT(FALSE);
return EFI_UNSUPPORTED;
- }
-
+ }
+
if ((MmioRead32 (INTCPS_ILR(Source)) & INTCPS_ILR_FIQ) == INTCPS_ILR_FIQ) {
// This vector has been programmed as FIQ so we can't use it for IRQ
- // EFI does not use FIQ, but the debugger can use it to check for
+ // EFI does not use FIQ, but the debugger can use it to check for
// ctrl-c. So this ASSERT means you have a conflict with the debug agent
ASSERT (FALSE);
return EFI_UNSUPPORTED;
}
-
+
if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {
return EFI_INVALID_PARAMETER;
}
@@ -125,17 +125,17 @@ EnableInterruptSource ( {
UINTN Bank;
UINTN Bit;
-
+
if (Source > MAX_VECTOR) {
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
-
+
Bank = Source / 32;
Bit = 1UL << (Source % 32);
-
+
MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);
-
+
return EFI_SUCCESS;
}
@@ -159,17 +159,17 @@ DisableInterruptSource ( {
UINTN Bank;
UINTN Bit;
-
+
if (Source > MAX_VECTOR) {
ASSERT(FALSE);
return EFI_UNSUPPORTED;
}
-
+
Bank = Source / 32;
Bit = 1UL << (Source % 32);
-
+
MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);
-
+
return EFI_SUCCESS;
}
@@ -196,11 +196,11 @@ GetInterruptSourceState ( {
UINTN Bank;
UINTN Bit;
-
+
if (InterruptState == NULL) {
return EFI_INVALID_PARAMETER;
}
-
+
if (Source > MAX_VECTOR) {
ASSERT(FALSE);
return EFI_UNSUPPORTED;
@@ -208,18 +208,18 @@ GetInterruptSourceState ( Bank = Source / 32;
Bit = 1UL << (Source % 32);
-
+
if ((MmioRead32(INTCPS_MIR(Bank)) & Bit) == Bit) {
*InterruptState = FALSE;
} else {
*InterruptState = TRUE;
}
-
+
return EFI_SUCCESS;
}
/**
- Signal to the hardware that the End Of Intrrupt state
+ Signal to the hardware that the End Of Intrrupt state
has been reached.
@param This Instance pointer for this protocol
@@ -262,19 +262,19 @@ IrqInterruptHandler ( {
UINT32 Vector;
HARDWARE_INTERRUPT_HANDLER InterruptHandler;
-
+
Vector = MmioRead32 (INTCPS_SIR_IRQ) & INTCPS_SIR_IRQ_MASK;
// Needed to prevent infinite nesting when Time Driver lowers TPL
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
ArmDataSyncronizationBarrier ();
-
+
InterruptHandler = gRegisteredInterruptHandlers[Vector];
if (InterruptHandler != NULL) {
// Call the registered interrupt handler.
InterruptHandler (Vector, SystemContext);
}
-
+
// Needed to clear after running the handler
MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
ArmDataSyncronizationBarrier ();
@@ -324,12 +324,12 @@ InterruptDxeInitialize ( MmioWrite32 (INTCPS_MIR(1), 0xFFFFFFFF);
MmioWrite32 (INTCPS_MIR(2), 0xFFFFFFFF);
MmioOr32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWIRQAGR);
-
+
Status = gBS->InstallMultipleProtocolInterfaces(&gHardwareInterruptHandle,
&gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol,
NULL);
ASSERT_EFI_ERROR(Status);
-
+
//
// Get the CPU protocol that this driver requires.
//
diff --git a/Omap35xxPkg/InterruptDxe/InterruptDxe.inf b/Omap35xxPkg/InterruptDxe/InterruptDxe.inf index 7ecb32e654..6deb8c3f67 100644 --- a/Omap35xxPkg/InterruptDxe/InterruptDxe.inf +++ b/Omap35xxPkg/InterruptDxe/InterruptDxe.inf @@ -1,16 +1,16 @@ #/** @file
-#
+#
# Interrupt DXE driver
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -46,7 +46,7 @@ [Protocols]
gHardwareInterruptProtocolGuid
gEfiCpuArchProtocolGuid
-
+
[FixedPcd.common]
gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress
diff --git a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c index 9541e7e902..4e2e4de7db 100644 --- a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c +++ b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputBlt.c @@ -334,7 +334,7 @@ BltBufferToVideo ( );
}
}
-
+
return Status;
}
@@ -416,7 +416,7 @@ LcdGraphicsBlt ( if (!mDisplayInitialized) {
InitializeDisplay (Instance);
}
-
+
switch (BltOperation) {
case EfiBltVideoFill:
Status = BltVideoFill (This, BltBuffer, SourceX, SourceY, DestinationX, DestinationY, Width, Height, Delta);
diff --git a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c index f7d247865d..bfd9f3be43 100644 --- a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c +++ b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.c @@ -142,14 +142,14 @@ DssSetMode ( )
{
// Make sure the interface clock is running
- MmioWrite32 (CM_ICLKEN_DSS, EN_DSS);
+ MmioWrite32 (CM_ICLKEN_DSS, EN_DSS);
// Stop the functional clocks
MmioAnd32 (CM_FCLKEN_DSS, ~(EN_DSS1 | EN_DSS2 | EN_TV));
// Program the DSS clock divisor
MmioWrite32 (CM_CLKSEL_DSS, 0x1000 | (LcdModes[ModeNumber].DssDivisor));
-
+
// Start the functional clocks
MmioOr32 (CM_FCLKEN_DSS, (EN_DSS1 | EN_DSS2 | EN_TV));
@@ -159,10 +159,10 @@ DssSetMode ( // Reset the subsystem
MmioWrite32(DSS_SYSCONFIG, DSS_SOFTRESET);
while (!(MmioRead32 (DSS_SYSSTATUS) & DSS_RESETDONE));
-
+
// Configure LCD parameters
MmioWrite32 (DISPC_SIZE_LCD,
- ((LcdModes[ModeNumber].HorizontalResolution - 1)
+ ((LcdModes[ModeNumber].HorizontalResolution - 1)
| ((LcdModes[ModeNumber].VerticalResolution - 1) << 16))
);
MmioWrite32 (DISPC_TIMING_H,
@@ -187,7 +187,7 @@ DssSetMode ( MmioWrite32 (DISPC_GFX_PRELD, 0x2D8);
MmioWrite32 (DISPC_GFX_BA0, VramBaseAddress);
MmioWrite32 (DISPC_GFX_SIZE,
- ((LcdModes[ModeNumber].HorizontalResolution - 1)
+ ((LcdModes[ModeNumber].HorizontalResolution - 1)
| ((LcdModes[ModeNumber].VerticalResolution - 1) << 16))
);
@@ -213,7 +213,7 @@ HwInitializeDisplay ( // Enable power lines used by TFP410
Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
- ASSERT_EFI_ERROR (Status);
+ ASSERT_EFI_ERROR (Status);
OldTpl = gBS->RaiseTPL(TPL_NOTIFY);
Data = VAUX_DEV_GRP_P1;
@@ -222,7 +222,7 @@ HwInitializeDisplay ( Data = VAUX_DEDICATED_18V;
Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VPLL2_DEDICATED), 1, &Data);
- ASSERT_EFI_ERROR (Status);
+ ASSERT_EFI_ERROR (Status);
// Power up TFP410 (set GPIO2 on TPS - for BeagleBoard-xM)
Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATADIR1), 1, &Data);
@@ -239,7 +239,7 @@ HwInitializeDisplay ( // Power up TFP410 (set GPIO 170 - for older BeagleBoards)
MmioAnd32 (GPIO6_BASE + GPIO_OE, ~BIT10);
- MmioOr32 (GPIO6_BASE + GPIO_SETDATAOUT, BIT10);
+ MmioOr32 (GPIO6_BASE + GPIO_SETDATAOUT, BIT10);
return EFI_SUCCESS;
}
@@ -249,7 +249,7 @@ InitializeDisplay ( IN LCD_INSTANCE* Instance
)
{
- EFI_STATUS Status;
+ EFI_STATUS Status;
UINTN VramSize;
EFI_PHYSICAL_ADDRESS VramBaseAddress;
diff --git a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h index 520e28e670..8b27f3d558 100644 --- a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h +++ b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.h @@ -144,7 +144,7 @@ LcdGraphicsBlt ( #define LCDENABLE BIT0
#define ACTIVEMATRIX BIT3
#define GOLCD BIT5
-#define DATALINES24 (BIT8 | BIT9)
+#define DATALINES24 (BIT8 | BIT9)
#define LCDENABLESIGNAL BIT28
#define GFXENABLE BIT0
diff --git a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf index ac026f4356..86fbef42c0 100644 --- a/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf +++ b/Omap35xxPkg/LcdGraphicsOutputDxe/LcdGraphicsOutputDxe.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2011, ARM Ltd. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
diff --git a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c index b3da7366a9..de849d4fd6 100755 --- a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c +++ b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.c @@ -2,7 +2,7 @@ Debug Agent timer lib for OMAP 35xx.
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -44,7 +44,7 @@ EnableInterruptSource ( Bank = gVector / 32;
Bit = 1UL << (gVector % 32);
-
+
MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);
}
@@ -55,9 +55,9 @@ DisableInterruptSource ( {
UINTN Bank;
UINTN Bit;
-
+
Bank = gVector / 32;
- Bit = 1UL << (gVector % 32);
+ Bit = 1UL << (gVector % 32);
MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);
}
@@ -96,17 +96,17 @@ DebugAgentTimerIntialize ( CpuDeadLoop ();
}
// Set source clock for GPT2 - GPT9 to SYS_CLK
- MmioOr32 (CM_CLKSEL_PER, 1 << (TimerNumber - 2));
+ MmioOr32 (CM_CLKSEL_PER, 1 << (TimerNumber - 2));
}
-
-
+
+
/**
Set the period for the debug agent timer. Zero means disable the timer.
@param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.
-**/
+**/
VOID
EFIAPI
DebugAgentTimerSetPeriod (
@@ -115,13 +115,13 @@ DebugAgentTimerSetPeriod ( {
UINT64 TimerCount;
INT32 LoadValue;
-
+
if (TimerPeriodMilliseconds == 0) {
// Turn off GPTIMER3
MmioWrite32 (gTCLR, TCLR_ST_OFF);
-
+
DisableInterruptSource ();
- } else {
+ } else {
// Calculate required timer count
TimerCount = DivU64x32(TimerPeriodMilliseconds * 1000000, PcdGet32(PcdDebugAgentTimerFreqNanoSeconds));
@@ -139,13 +139,13 @@ DebugAgentTimerSetPeriod ( EnableInterruptSource ();
}
}
-
+
/**
- Perform End Of Interrupt for the debug agent timer. This is called in the
- interrupt handler after the interrupt has been processed.
+ Perform End Of Interrupt for the debug agent timer. This is called in the
+ interrupt handler after the interrupt has been processed.
-**/
+**/
VOID
EFIAPI
DebugAgentTimerEndOfInterrupt (
@@ -153,7 +153,7 @@ DebugAgentTimerEndOfInterrupt ( )
{
// Clear all timer interrupts
- MmioWrite32 (gTISR, TISR_CLEAR_ALL);
+ MmioWrite32 (gTISR, TISR_CLEAR_ALL);
// Poll interrupt status bits to ensure clearing
while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);
@@ -163,4 +163,3 @@ DebugAgentTimerEndOfInterrupt ( }
-
\ No newline at end of file diff --git a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf index 551aee5385..07810d9afd 100755 --- a/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf +++ b/Omap35xxPkg/Library/DebugAgentTimerLib/DebugAgentTimerLib.inf @@ -33,7 +33,7 @@ EmbeddedPkg/EmbeddedPkg.dec
Omap35xxPkg/Omap35xxPkg.dec
ArmPkg/ArmPkg.dec
-
+
[LibraryClasses]
BaseLib
@@ -44,4 +44,3 @@ [Pcd]
gOmap35xxTokenSpaceGuid.PcdOmap35xxDebugAgentTimer
gOmap35xxTokenSpaceGuid.PcdDebugAgentTimerFreqNanoSeconds
-
\ No newline at end of file diff --git a/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.c b/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.c index c59f75b5be..47161755de 100644 --- a/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.c +++ b/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.c @@ -2,7 +2,7 @@ Add custom commands for BeagleBoard development.
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -35,7 +35,7 @@ Argv[0] - "%CommandName%"
@param Argc Number of command arguments in Argv
- @param Argv Array of strings that represent the parsed command line.
+ @param Argv Array of strings that represent the parsed command line.
Argv[0] is the command name
@return EFI_SUCCESS
diff --git a/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.inf b/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.inf index 396444719f..dd7a13cf66 100644 --- a/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.inf +++ b/Omap35xxPkg/Library/EblCmdLib/EblCmdLib.inf @@ -20,7 +20,7 @@ FILE_GUID = ea62bdc3-1063-425f-8851-98cb47f213a8
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
- LIBRARY_CLASS = EblCmdLib|DXE_DRIVER UEFI_APPLICATION UEFI_DRIVER
+ LIBRARY_CLASS = EblCmdLib|DXE_DRIVER UEFI_APPLICATION UEFI_DRIVER
#
@@ -40,9 +40,9 @@ [LibraryClasses]
BaseLib
DebugLib
-
+
[Protocols]
-
+
[Guids]
-
+
[Pcd]
diff --git a/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.c b/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.c index 54247e42e6..dcc518244a 100644 --- a/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.c +++ b/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.c @@ -2,7 +2,7 @@ Basic serial IO abstaction for GDB
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -33,10 +33,10 @@ GdbSerialLibConstructor ( RETURN_STATUS
EFIAPI
GdbSerialInit (
- IN UINT64 BaudRate,
- IN UINT8 Parity,
- IN UINT8 DataBits,
- IN UINT8 StopBits
+ IN UINT64 BaudRate,
+ IN UINT8 Parity,
+ IN UINT8 DataBits,
+ IN UINT8 StopBits
)
{
return RETURN_SUCCESS;
@@ -46,7 +46,7 @@ BOOLEAN EFIAPI
GdbIsCharAvailable (
VOID
- )
+ )
{
UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
@@ -66,7 +66,7 @@ GdbGetChar ( UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
UINT32 RBR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_RBR_REG;
CHAR8 Char;
-
+
while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
Char = MmioRead8(RBR);
@@ -81,7 +81,7 @@ GdbPutChar ( {
UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
UINT32 THR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_THR_REG;
-
+
while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
MmioWrite8(THR, Char);
}
diff --git a/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.inf b/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.inf index 3ab26bb90d..e7aa6c0af0 100644 --- a/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.inf +++ b/Omap35xxPkg/Library/GdbSerialLib/GdbSerialLib.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -34,7 +34,7 @@ [LibraryClasses]
DebugLib
IoLib
- OmapLib
+ OmapLib
[FixedPcd]
gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart
diff --git a/Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf b/Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf index 3afeeae53c..35086b1045 100644 --- a/Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf +++ b/Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf @@ -23,7 +23,7 @@ FILE_GUID = fe1d7183-9abb-42ce-9a3b-36d7c6a8959f
MODULE_TYPE = BASE
VERSION_STRING = 1.0
- LIBRARY_CLASS = TimerLib
+ LIBRARY_CLASS = TimerLib
[Sources.common]
TimerLib.c
diff --git a/Omap35xxPkg/Library/Omap35xxTimerLib/TimerLib.c b/Omap35xxPkg/Library/Omap35xxTimerLib/TimerLib.c index 0b61020805..652c47b6f6 100644 --- a/Omap35xxPkg/Library/Omap35xxTimerLib/TimerLib.c +++ b/Omap35xxPkg/Library/Omap35xxTimerLib/TimerLib.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -61,10 +61,10 @@ MicroSecondDelay ( )
{
UINT64 NanoSeconds;
-
+
NanoSeconds = MultU64x32(MicroSeconds, 1000);
- while (NanoSeconds > (UINTN)-1) {
+ while (NanoSeconds > (UINTN)-1) {
NanoSecondDelay((UINTN)-1);
NanoSeconds -= (UINTN)-1;
}
@@ -87,12 +87,12 @@ NanoSecondDelay ( UINT32 TimerCountRegister;
Delay = (NanoSeconds / PcdGet32(PcdEmbeddedPerformanceCounterPeriodInNanoseconds)) + 1;
-
+
TimerCountRegister = TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR;
StartTime = MmioRead32 (TimerCountRegister);
- do
+ do
{
CurrentTime = MmioRead32 (TimerCountRegister);
ElapsedTime = CurrentTime - StartTime;
@@ -108,7 +108,7 @@ EFIAPI GetPerformanceCounter (
VOID
)
-{
+{
return (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TCRR);
}
@@ -123,11 +123,11 @@ GetPerformanceCounterProperties ( // Timer starts with the reload value
*StartValue = (UINT64)MmioRead32 (TimerBase(PcdGet32(PcdOmap35xxFreeTimer)) + GPTIMER_TLDR);
}
-
+
if (EndValue != NULL) {
// Timer counts up to 0xFFFFFFFF
*EndValue = 0xFFFFFFFF;
}
-
+
return PcdGet64(PcdEmbeddedPerformanceCounterFrequencyInHz);
}
diff --git a/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c b/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c index d1183129a6..41cfefbebc 100755 --- a/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c +++ b/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.c @@ -1,9 +1,9 @@ /** @file
Abstractions for simple OMAP DMA channel.
-
+
Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -22,16 +22,16 @@ #include <Omap3530/Omap3530.h>
-/**
+/**
Configure OMAP DMA Channel
-
+
@param Channel DMA Channel to configure
- @param Dma4 Pointer to structure used to initialize DMA registers for the Channel
-
+ @param Dma4 Pointer to structure used to initialize DMA registers for the Channel
+
@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
-
+
**/
EFI_STATUS
EFIAPI
@@ -50,13 +50,13 @@ EnableDmaChannel ( /* 1) Configure the transfer parameters in the logical DMA registers */
/*-------------------------------------------------------------------*/
- /* a) Set the data type CSDP[1:0], the Read/Write Port access type
- CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19],
+ /* a) Set the data type CSDP[1:0], the Read/Write Port access type
+ CSDP[8:7]/[15:14], the Source/dest endianism CSDP[21]/CSDP[19],
write mode CSDP[17:16], source/dest packed or nonpacked CSDP[6]/CSDP[13] */
-
+
// Read CSDP
RegVal = MmioRead32 (DMA4_CSDP (Channel));
-
+
// Build reg
RegVal = ((RegVal & ~ 0x3) | DMA4->DataType );
RegVal = ((RegVal & ~(0x3 << 7)) | (DMA4->ReadPortAccessType << 7));
@@ -68,23 +68,23 @@ EnableDmaChannel ( RegVal = ((RegVal & ~(0x1 << 13)) | (DMA4->DestinationPacked << 13));
// Write CSDP
MmioWrite32 (DMA4_CSDP (Channel), RegVal);
-
+
/* b) Set the number of element per frame CEN[23:0]*/
MmioWrite32 (DMA4_CEN (Channel), DMA4->NumberOfElementPerFrame);
-
+
/* c) Set the number of frame per block CFN[15:0]*/
MmioWrite32 (DMA4_CFN (Channel), DMA4->NumberOfFramePerTransferBlock);
-
+
/* d) Set the Source/dest start address index CSSA[31:0]/CDSA[31:0]*/
MmioWrite32 (DMA4_CSSA (Channel), DMA4->SourceStartAddress);
MmioWrite32 (DMA4_CDSA (Channel), DMA4->DestinationStartAddress);
-
+
/* e) Set the Read Port addressing mode CCR[13:12], the Write Port addressing mode CCR[15:14],
read/write priority CCR[6]/CCR[26]
- I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to
+ I changed LCH CCR[20:19]=00 and CCR[4:0]=00000 to
LCH CCR[20:19]= DMA4->WriteRequestNumber and CCR[4:0]=DMA4->ReadRequestNumber
*/
-
+
// Read CCR
RegVal = MmioRead32 (DMA4_CCR (Channel));
@@ -95,13 +95,13 @@ EnableDmaChannel ( RegVal = ((RegVal & ~(0x3 << 14)) | (DMA4->WritePortAccessMode << 14));
RegVal = ((RegVal & ~(0x1 << 6)) | (DMA4->ReadPriority << 6));
RegVal = ((RegVal & ~(0x1 << 26)) | (DMA4->WritePriority << 26));
-
+
// Write CCR
MmioWrite32 (DMA4_CCR (Channel), RegVal);
-
+
/* f)- Set the source element index CSEI[15:0]*/
MmioWrite32 (DMA4_CSEI (Channel), DMA4->SourceElementIndex);
-
+
/* - Set the source frame index CSFI[15:0]*/
MmioWrite32 (DMA4_CSFI (Channel), DMA4->SourceFrameIndex);
@@ -111,7 +111,7 @@ EnableDmaChannel ( /* - Set the destination frame index CDFI[31:0]*/
MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
-
+
MmioWrite32 (DMA4_CDFI (Channel), DMA4->DestinationFrameIndex);
// Enable all the status bits since we are polling
@@ -126,17 +126,17 @@ EnableDmaChannel ( return EFI_SUCCESS;
}
-/**
+/**
Turn of DMA channel configured by EnableDma().
-
+
@param Channel DMA Channel to configure
@param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS
@param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR
-
+
@retval EFI_SUCCESS DMA hardware disabled
@retval EFI_INVALID_PARAMETER Channel is not valid
@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.
-
+
**/
EFI_STATUS
EFIAPI
@@ -168,7 +168,7 @@ DisableDmaChannel ( MmioWrite32 (DMA4_CICR (Channel), 0);
MmioWrite32 (DMA4_CSR (Channel), DMA4_CSR_RESET);
- MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
+ MmioAnd32 (DMA4_CCR(0), ~(DMA4_CCR_ENABLE | DMA4_CCR_RD_ACTIVE | DMA4_CCR_WR_ACTIVE));
return Status;
}
diff --git a/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf b/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf index d94ddf9867..b569cfbdef 100755 --- a/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf +++ b/Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -17,7 +17,7 @@ FILE_GUID = 09B17D99-BB07-49a8-B0D2-06D6AFCBE3AB
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
- LIBRARY_CLASS = OmapDmaLib
+ LIBRARY_CLASS = OmapDmaLib
[Sources.common]
@@ -37,14 +37,14 @@ IoLib
BaseMemoryLib
ArmLib
-
-
+
+
[Protocols]
gEfiCpuArchProtocolGuid
-
+
[Guids]
-
+
[Pcd]
[Depex]
- gEfiCpuArchProtocolGuid
\ No newline at end of file + gEfiCpuArchProtocolGuid
diff --git a/Omap35xxPkg/Library/OmapLib/OmapLib.c b/Omap35xxPkg/Library/OmapLib/OmapLib.c index 4a6bc65d16..29645ee55a 100644 --- a/Omap35xxPkg/Library/OmapLib/OmapLib.c +++ b/Omap35xxPkg/Library/OmapLib/OmapLib.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -17,7 +17,7 @@ #include <Library/OmapLib.h>
#include <Omap3530/Omap3530.h>
-UINT32
+UINT32
GpioBase (
IN UINTN Port
)
diff --git a/Omap35xxPkg/Library/OmapLib/OmapLib.inf b/Omap35xxPkg/Library/OmapLib/OmapLib.inf index 6de796910e..96eee09ab4 100644 --- a/Omap35xxPkg/Library/OmapLib/OmapLib.inf +++ b/Omap35xxPkg/Library/OmapLib/OmapLib.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -17,7 +17,7 @@ FILE_GUID = d035f5c2-1b92-4746-9f6c-5ff6202970df
MODULE_TYPE = UEFI_DRIVER
VERSION_STRING = 1.0
- LIBRARY_CLASS = OmapLib
+ LIBRARY_CLASS = OmapLib
[Sources.common]
OmapLib.c
@@ -29,9 +29,9 @@ [LibraryClasses]
DebugLib
-
+
[Protocols]
-
+
[Guids]
-
+
[Pcd]
diff --git a/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.c b/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.c index 0b9c70bc57..0ae452ebd7 100755 --- a/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.c +++ b/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.c @@ -1,14 +1,14 @@ /** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
diff --git a/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.inf b/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.inf index 7c4911c385..8b49638c23 100755 --- a/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.inf +++ b/Omap35xxPkg/Library/RealTimeClockLib/RealTimeClockLib.inf @@ -1,17 +1,17 @@ # Copyright (c) 2011, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
[Defines]
INF_VERSION = 0x00010005
- BASE_NAME = RealTimeClockLib
+ BASE_NAME = RealTimeClockLib
FILE_GUID = EC1713DB-7DB5-4c99-8FE2-6F52F95A1132
MODULE_TYPE = BASE
VERSION_STRING = 1.0
@@ -24,7 +24,7 @@ MdePkg/MdePkg.dec
EmbeddedPkg/EmbeddedPkg.dec
Omap35xxPkg/Omap35xxPkg.dec
-
+
[LibraryClasses]
IoLib
UefiLib
diff --git a/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.c b/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.c index 42a73f2b18..82f04eaad1 100644 --- a/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.c +++ b/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.c @@ -1,11 +1,11 @@ /** @file
Template library implementation to support ResetSystem Runtime call.
-
+
Fill in the templates with what ever makes you system reset.
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -66,7 +66,7 @@ LibResetSystem ( ASSERT (FALSE);
return EFI_DEVICE_ERROR;
}
-
+
/**
@@ -74,7 +74,7 @@ LibResetSystem ( @param ImageHandle The firmware allocated handle for the EFI image.
@param SystemTable A pointer to the EFI System Table.
-
+
@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
**/
diff --git a/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.inf b/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.inf index 8f1c79f17d..3ca5c51820 100644 --- a/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.inf +++ b/Omap35xxPkg/Library/ResetSystemLib/ResetSystemLib.inf @@ -34,7 +34,7 @@ [Pcd.common]
gArmTokenSpaceGuid.PcdCpuResetAddress
gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
-
+
[LibraryClasses]
DebugLib
BeagleBoardSystemLib
diff --git a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c index 2f93140e4c..58f70d5512 100644 --- a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c +++ b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.c @@ -3,7 +3,7 @@ Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -59,7 +59,7 @@ SerialPortWrite ( UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
UINT32 THR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_THR_REG;
UINTN Count;
-
+
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
MmioWrite8(THR, *Buffer);
@@ -89,7 +89,7 @@ SerialPortRead ( UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
UINT32 RBR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_RBR_REG;
UINTN Count;
-
+
for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {
while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
*Buffer = MmioRead8(RBR);
diff --git a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf index 340f4a6a4d..45402e4006 100644 --- a/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf +++ b/Omap35xxPkg/Library/SerialPortLib/SerialPortLib.inf @@ -38,7 +38,7 @@ EmbeddedPkg/EmbeddedPkg.dec
MdePkg/MdePkg.dec
Omap35xxPkg/Omap35xxPkg.dec
-
+
[FixedPcd]
gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart
diff --git a/Omap35xxPkg/MMCHSDxe/MMCHS.c b/Omap35xxPkg/MMCHSDxe/MMCHS.c index 3d0a7c6067..9f0ebe0f65 100644 --- a/Omap35xxPkg/MMCHSDxe/MMCHS.c +++ b/Omap35xxPkg/MMCHSDxe/MMCHS.c @@ -2,15 +2,15 @@ MMC/SD Card driver for OMAP 35xx (SDIO not supported)
This driver always produces a BlockIo protocol but it starts off with no Media
- present. A TimerCallBack detects when media is inserted or removed and after
- a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the
+ present. A TimerCallBack detects when media is inserted or removed and after
+ a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the
media to be detected (or removed) and the BlockIo Media structure will get
updated. No MMC/SD Card harward registers are updated until the first BlockIo
- ReadBlocks/WriteBlocks after media has been insterted (booting with a card
- plugged in counts as an insertion event).
+ ReadBlocks/WriteBlocks after media has been insterted (booting with a card
+ plugged in counts as an insertion event).
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -47,7 +47,7 @@ MMCHS_DEVICE_PATH gMmcHsDevicePath = { HW_VENDOR_DP,
(UINT8)(sizeof(VENDOR_DEVICE_PATH)),
(UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),
- 0xb615f1f5, 0x5088, 0x43cd, 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00
+ 0xb615f1f5, 0x5088, 0x43cd, 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00
},
{
END_DEVICE_PATH_TYPE,
@@ -68,8 +68,8 @@ BOOLEAN gMediaChange = FALSE; VOID
ParseCardCIDData (
- UINT32 Response0,
- UINT32 Response1,
+ UINT32 Response0,
+ UINT32 Response1,
UINT32 Response2,
UINT32 Response3
)
@@ -96,7 +96,7 @@ UpdateMMCHSClkFrequency ( MmioAnd32 (MMCHS_SYSCTL, ~CEN);
//Set new clock frequency.
- MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
+ MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
//Poll till Internal Clock Stable
while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
@@ -359,7 +359,7 @@ InitializeMMCHS ( Data = VSEL_3_00V;
Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);
ASSERT_EFI_ERROR(Status);
-
+
//After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
@@ -424,13 +424,13 @@ PerformCardIdenfication ( DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 (MMCHS_RSP10)));
- //Send CMD5 command.
+ //Send CMD5 command.
Status = SendCmd (CMD5, CMD5_INT_EN, CmdArgument);
if (Status == EFI_SUCCESS) {
DEBUG ((EFI_D_ERROR, "CMD5 Success. SDIO card. Follow SDIO card specification.\n"));
DEBUG ((EFI_D_INFO, "CMD5 response: %x\n", MmioRead32 (MMCHS_RSP10)));
//NOTE: Returning unsupported error for now. Need to implement SDIO specification.
- return EFI_UNSUPPORTED;
+ return EFI_UNSUPPORTED;
} else {
DEBUG ((EFI_D_INFO, "CMD5 fails. Not an SDIO card.\n"));
}
@@ -462,7 +462,7 @@ PerformCardIdenfication ( //Poll till card is busy
while (RetryCount < MAX_RETRY_COUNT) {
- //Send CMD55 command.
+ //Send CMD55 command.
CmdArgument = 0;
Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);
if (Status == EFI_SUCCESS) {
@@ -616,7 +616,7 @@ PerformCardConfiguration ( if ((gCardInfo.CardType != UNKNOWN_CARD) && (gCardInfo.CardType != MMC_CARD)) {
// We could read SCR register, but SD Card Phys spec stats any SD Card shall
// set SCR.SD_BUS_WIDTHS to support 4-bit mode, so why bother?
-
+
// Send ACMD6 (application specific commands must be prefixed with CMD55)
Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);
if (!EFI_ERROR (Status)) {
@@ -759,11 +759,11 @@ CpuDeadLoop (); }
ZeroMem (&DmaOperation, sizeof (DMA_MAP_OPERATION));
-
+
Dma4.DataType = 2; // DMA4_CSDPi[1:0] 32-bit elements from MMCHS_DATA
- Dma4.SourceEndiansim = 0; // DMA4_CSDPi[21]
+ Dma4.SourceEndiansim = 0; // DMA4_CSDPi[21]
Dma4.DestinationEndianism = 0; // DMA4_CSDPi[19]
@@ -771,11 +771,11 @@ CpuDeadLoop (); Dma4.DestinationPacked = 0; // DMA4_CSDPi[13]
- Dma4.NumberOfElementPerFrame = This->Media->BlockSize/4; // DMA4_CENi (TRM 4K is optimum value)
+ Dma4.NumberOfElementPerFrame = This->Media->BlockSize/4; // DMA4_CENi (TRM 4K is optimum value)
- Dma4.NumberOfFramePerTransferBlock = BlockCount; // DMA4_CFNi
+ Dma4.NumberOfFramePerTransferBlock = BlockCount; // DMA4_CFNi
- Dma4.ReadPriority = 0; // DMA4_CCRi[6] Low priority read
+ Dma4.ReadPriority = 0; // DMA4_CCRi[6] Low priority read
Dma4.WritePriority = 0; // DMA4_CCRi[23] Prefetech disabled
@@ -792,7 +792,7 @@ CpuDeadLoop (); Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted
-
+
Dma4.SourceStartAddress = MMCHS_DATA; // DMA4_CSSAi
@@ -812,11 +812,11 @@ CpuDeadLoop (); Dma4.WritePortAccessMode = 1; // DMA4_CCRi[15:14] Post increment memory address
- Dma4.ReadRequestNumber = 0x1e; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_RX (61)
+ Dma4.ReadRequestNumber = 0x1e; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_RX (61)
Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3e == 62 (one based)
- } else if (OperationType == WRITE) {
+ } else if (OperationType == WRITE) {
Cmd = CMD25; //Multiple block write
CmdInterruptEnable = CMD25_INT_EN;
DmaOperation = MapOperationBusMasterRead;
@@ -827,7 +827,7 @@ CpuDeadLoop (); Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted ???
-
+
Dma4.SourceStartAddress = (UINT32)BufferAddress; // DMA4_CSSAi
@@ -847,7 +847,7 @@ CpuDeadLoop (); Dma4.WritePortAccessMode = 0; // DMA4_CCRi[15:14] Always write MMCHS_DATA
- Dma4.ReadRequestNumber = 0x1d; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_TX (60)
+ Dma4.ReadRequestNumber = 0x1d; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_TX (60)
Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3d == 61 (one based)
@@ -857,7 +857,7 @@ CpuDeadLoop (); EnableDmaChannel (2, &Dma4);
-
+
//Set command argument based on the card access mode (Byte mode or Block mode)
if (gCardInfo.OCRData.AccessMode & BIT1) {
@@ -899,7 +899,7 @@ CpuDeadLoop (); }
}
RetryCount++;
- }
+ }
DisableDmaChannel (2, DMA4_CSR_BLOCK, DMA4_CSR_ERR);
Status = DmaUnmap (BufferMap);
@@ -933,7 +933,7 @@ TransferBlock ( if (OperationType == READ) {
Cmd = CMD17; //Single block read
CmdInterruptEnable = CMD18_INT_EN;
- } else if (OperationType == WRITE) {
+ } else if (OperationType == WRITE) {
Cmd = CMD24; //Single block write
CmdInterruptEnable = CMD24_INT_EN;
}
@@ -991,7 +991,7 @@ TransferBlock ( }
}
RetryCount++;
- }
+ }
if (RetryCount == MAX_RETRY_COUNT) {
DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n"));
@@ -1083,13 +1083,13 @@ DetectCard ( DEBUG ((EFI_D_ERROR, "No MMC/SD card detected.\n"));
return Status;
}
-
+
//Get CSD (Card specific data) for the detected card.
Status = GetCardSpecificData();
if (EFI_ERROR(Status)) {
return Status;
}
-
+
//Configure the card in data transfer mode.
Status = PerformCardConfiguration();
if (EFI_ERROR(Status)) {
@@ -1100,8 +1100,8 @@ DetectCard ( gMMCHSMedia.LastBlock = (gCardInfo.NumBlocks - 1);
gMMCHSMedia.BlockSize = gCardInfo.BlockSize;
gMMCHSMedia.ReadOnly = (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
- gMMCHSMedia.MediaPresent = TRUE;
- gMMCHSMedia.MediaId++;
+ gMMCHSMedia.MediaPresent = TRUE;
+ gMMCHSMedia.MediaId++;
DEBUG ((EFI_D_INFO, "SD Card Media Change on Handle 0x%08x\n", gImageHandle));
@@ -1113,8 +1113,8 @@ DetectCard ( EFI_STATUS
SdReadWrite (
IN EFI_BLOCK_IO_PROTOCOL *This,
- IN UINTN Lba,
- OUT VOID *Buffer,
+ IN UINTN Lba,
+ OUT VOID *Buffer,
IN UINTN BufferSize,
IN OPERATION_TYPE OperationType
)
@@ -1129,7 +1129,7 @@ SdReadWrite ( BOOLEAN Update;
-
+
Update = FALSE;
if (gMediaChange) {
@@ -1140,7 +1140,7 @@ SdReadWrite ( gMMCHSMedia.MediaPresent = FALSE;
gMMCHSMedia.LastBlock = 0;
gMMCHSMedia.BlockSize = 512; // Should be zero but there is a bug in DiskIo
- gMMCHSMedia.ReadOnly = FALSE;
+ gMMCHSMedia.ReadOnly = FALSE;
}
gMediaChange = FALSE;
} else if (!gMMCHSMedia.MediaPresent) {
@@ -1172,7 +1172,7 @@ SdReadWrite ( Status = EFI_INVALID_PARAMETER;
goto Done;
}
-
+
if ((BufferSize % This->Media->BlockSize) != 0) {
Status = EFI_BAD_BUFFER_SIZE;
goto Done;
@@ -1258,7 +1258,7 @@ MMCHSReset ( IN BOOLEAN ExtendedVerification
)
{
- return EFI_SUCCESS;
+ return EFI_SUCCESS;
}
@@ -1292,7 +1292,7 @@ MMCHSReset ( @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
- @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
+ @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,
or the buffer is not on proper alignment.
@@ -1351,7 +1351,7 @@ MMCHSReadBlocks ( @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.
- @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid,
+ @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid,
or the buffer is not on proper alignment.
@@ -1422,7 +1422,7 @@ EFI_BLOCK_IO_PROTOCOL gBlockIo = { Timer callback to convert card present hardware into a boolean that indicates
- a media change event has happened. If you just check the GPIO you could see
+ a media change event has happened. If you just check the GPIO you could see
card 1 and then check again after card 1 was removed and card 2 was inserted
@@ -1457,7 +1457,7 @@ TimerCallback ( }
} else {
if (Present && !gMediaChange) {
- gMediaChange = TRUE;
+ gMediaChange = TRUE;
}
}
}
@@ -1479,14 +1479,14 @@ MMCHSInitialize ( Status = gBS->CreateEvent (EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, TimerCallback, NULL, &gTimerEvent);
ASSERT_EFI_ERROR (Status);
-
- Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, FixedPcdGet32 (PcdMmchsTimerFreq100NanoSeconds));
+
+ Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, FixedPcdGet32 (PcdMmchsTimerFreq100NanoSeconds));
ASSERT_EFI_ERROR (Status);
//Publish BlockIO.
Status = gBS->InstallMultipleProtocolInterfaces (
- &ImageHandle,
- &gEfiBlockIoProtocolGuid, &gBlockIo,
+ &ImageHandle,
+ &gEfiBlockIoProtocolGuid, &gBlockIo,
&gEfiDevicePathProtocolGuid, &gMmcHsDevicePath,
NULL
);
diff --git a/Omap35xxPkg/MMCHSDxe/MMCHS.h b/Omap35xxPkg/MMCHSDxe/MMCHS.h index e19607bae0..06960a3bd6 100644 --- a/Omap35xxPkg/MMCHSDxe/MMCHS.h +++ b/Omap35xxPkg/MMCHSDxe/MMCHS.h @@ -40,12 +40,12 @@ #define HCS BIT30 //Host capacity support/1 = Supporting high capacity
#define CCS BIT30 //Card capacity status/1 = High capacity card
typedef struct {
- UINT32 Reserved0: 7; // 0
+ UINT32 Reserved0: 7; // 0
UINT32 V170_V195: 1; // 1.70V - 1.95V
UINT32 V200_V260: 7; // 2.00V - 2.60V
UINT32 V270_V360: 9; // 2.70V - 3.60V
UINT32 RESERVED_1: 5; // Reserved
- UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode)
+ UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode)
UINT32 Busy: 1; // This bit is set to LOW if the card has not finished the power up routine
}OCR;
@@ -71,14 +71,14 @@ typedef struct { UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]
UINT8 COPY: 1; // Copy flag (OTP) [14:14]
UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]
-
+
UINT16 RESERVED_2: 5; // Reserved [20:16]
UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]
UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]
UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]
UINT16 RESERVED_3: 2; // Reserved [30:29]
UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]
-
+
UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32]
UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39]
UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46]
@@ -88,7 +88,7 @@ typedef struct { UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56]
UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59]
UINT32 C_SIZELow2: 2; // Device size [63:62]
-
+
UINT32 C_SIZEHigh10: 10;// Device size [73:64]
UINT32 RESERVED_4: 2; // Reserved [75:74]
UINT32 DSR_IMP: 1; // DSR implemented [76:76]
@@ -101,7 +101,7 @@ typedef struct { UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]
UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]
UINT8 TAAC ; // Data read access-time 1 [119:112]
-
+
UINT8 RESERVED_5: 6; // Reserved [125:120]
UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]
}CSD;
diff --git a/Omap35xxPkg/MMCHSDxe/MMCHS.inf b/Omap35xxPkg/MMCHSDxe/MMCHS.inf index cc753c2a21..02f5e8844f 100644 --- a/Omap35xxPkg/MMCHSDxe/MMCHS.inf +++ b/Omap35xxPkg/MMCHSDxe/MMCHS.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -39,7 +39,7 @@ DmaLib
[Guids]
-
+
[Protocols]
gEfiBlockIoProtocolGuid
gEfiCpuArchProtocolGuid
diff --git a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.c b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.c index dab932999f..ad922a18e3 100755 --- a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.c +++ b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.c @@ -236,7 +236,7 @@ UpdateMMCHSClkFrequency ( MmioAnd32 (MMCHS_SYSCTL, ~CEN);
// Set new clock frequency.
- MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
+ MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);
// Poll till Internal Clock Stable
while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);
@@ -264,7 +264,7 @@ InitializeMMCHS ( Data = VSEL_3_00V;
Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);
ASSERT_EFI_ERROR(Status);
-
+
// After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.
MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));
@@ -303,10 +303,10 @@ MMCIsReadOnly ( )
{
/* Note:
- * On our BeagleBoard the SD card WP pin is always read as TRUE.
+ * On our BeagleBoard the SD card WP pin is always read as TRUE.
* Probably something wrong with GPIO configuration.
* BeagleBoard-xM uses microSD cards so there is no write protect at all.
- * Hence commenting out SD card WP pin read status.
+ * Hence commenting out SD card WP pin read status.
*/
//return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;
return 0;
@@ -667,7 +667,7 @@ MMCInitialize ( ASSERT_EFI_ERROR(Status);
Status = gBS->InstallMultipleProtocolInterfaces (
- &Handle,
+ &Handle,
&gEfiMmcHostProtocolGuid, &gMMCHost,
NULL
);
diff --git a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.h b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.h index ec55234db2..0748ddfa47 100755 --- a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.h +++ b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.h @@ -1,14 +1,14 @@ /** @file
*
* Copyright (c) 2011, ARM Limited. All rights reserved.
-*
-* This program and the accompanying materials
-* are licensed and made available under the terms and conditions of the BSD License
-* which accompanies this distribution. The full text of the license may be found at
-* http://opensource.org/licenses/bsd-license.php
*
-* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+* This program and the accompanying materials
+* are licensed and made available under the terms and conditions of the BSD License
+* which accompanies this distribution. The full text of the license may be found at
+* http://opensource.org/licenses/bsd-license.php
+*
+* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
diff --git a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.inf b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.inf index 8c95c0f2d9..7d406ecd82 100755 --- a/Omap35xxPkg/MmcHostDxe/MmcHostDxe.inf +++ b/Omap35xxPkg/MmcHostDxe/MmcHostDxe.inf @@ -1,12 +1,12 @@ # Copyright (c) 2011, ARM Limited. All rights reserved.
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
[Defines]
@@ -37,7 +37,7 @@ DmaLib
[Guids]
-
+
[Protocols]
gEfiBlockIoProtocolGuid
gEfiCpuArchProtocolGuid
diff --git a/Omap35xxPkg/Omap35xxPkg.dec b/Omap35xxPkg/Omap35xxPkg.dec index 3503517978..8924e2ac47 100644 --- a/Omap35xxPkg/Omap35xxPkg.dec +++ b/Omap35xxPkg/Omap35xxPkg.dec @@ -35,14 +35,14 @@ ## @libraryclass Abstract location of basic OMAP components
##
OmapLib|Include/Library/OmapLib.h
-
+
## @libraryclass Abstract OMAP and ARM DMA, modeled after PCI IO protocol
##
OmapDmaLib|Include/Library/OmapDmaLib.h
[Guids.common]
- gOmap35xxTokenSpaceGuid = { 0x24b09abe, 0x4e47, 0x481c, { 0xa9, 0xad, 0xce, 0xf1, 0x2c, 0x39, 0x23, 0x27} }
+ gOmap35xxTokenSpaceGuid = { 0x24b09abe, 0x4e47, 0x481c, { 0xa9, 0xad, 0xce, 0xf1, 0x2c, 0x39, 0x23, 0x27} }
[PcdsFeatureFlag.common]
@@ -55,4 +55,4 @@ gOmap35xxTokenSpaceGuid.PcdOmap35xxDebugAgentTimer|5|UINT32|0x00000207
gOmap35xxTokenSpaceGuid.PcdDebugAgentTimerFreqNanoSeconds|77|UINT32|0x00000208
gOmap35xxTokenSpaceGuid.PcdMmchsTimerFreq100NanoSeconds|1000000|UINT32|0x00000209
-
+
diff --git a/Omap35xxPkg/Omap35xxPkg.dsc b/Omap35xxPkg/Omap35xxPkg.dsc index 075dd6ae99..8d8f52104b 100644 --- a/Omap35xxPkg/Omap35xxPkg.dsc +++ b/Omap35xxPkg/Omap35xxPkg.dsc @@ -35,23 +35,23 @@ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
-
+
BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
-
+
CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
-
+
RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
OmapLib|Omap35xxPkg/Library/OmapLib/OmapLib.inf
OmapDmaLib|Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf
-
+
MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
@@ -69,7 +69,7 @@ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
-
+
# UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
@@ -82,7 +82,7 @@ [LibraryClasses.ARM]
#
- # Note: This NULL library feature is not yet in the edk2/BaseTools, but it is checked in to
+ # Note: This NULL library feature is not yet in the edk2/BaseTools, but it is checked in to
# the BaseTools project. So you need to build with the BaseTools project util this feature gets synced.
#
NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
@@ -98,7 +98,7 @@ RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu 7-A
RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu 7-A
-
+
################################################################################
#
@@ -106,7 +106,7 @@ #
################################################################################
-
+
[PcdsFixedAtBuild.common]
# DEBUG_ASSERT_ENABLED 0x01
@@ -136,7 +136,7 @@ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000004
gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
-
+
gEmbeddedTokenSpaceGuid.PcdPrePiTempMemorySize|0
gEmbeddedTokenSpaceGuid.PcdPrePiBfvBaseAddress|0
gEmbeddedTokenSpaceGuid.PcdPrePiBfvSize|0
@@ -147,20 +147,20 @@ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack
gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80000000
gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000
-
+
gOmap35xxTokenSpaceGuid.PcdOmap35xxGpmcOffset|0x6E000000
gOmap35xxTokenSpaceGuid.PcdOmap35xxMMCHS1Base|0x4809C000
- # Console
+ # Console
gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart|3
-
+
# Timers
gOmap35xxTokenSpaceGuid.PcdOmap35xxArchTimer|3
gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer|4
gEmbeddedTokenSpaceGuid.PcdTimerPeriod|100000
gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterPeriodInNanoseconds|77
gEmbeddedTokenSpaceGuid.PcdEmbeddedPerformanceCounterFrequencyInHz|13000000
-
+
#
# ARM Pcds
#
@@ -172,17 +172,17 @@ #
################################################################################
[Components.common]
- Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf
+ Omap35xxPkg/Library/Omap35xxTimerLib/Omap35xxTimerLib.inf
Omap35xxPkg/Library/OmapLib/OmapLib.inf
Omap35xxPkg/Library/OmapDmaLib/OmapDmaLib.inf
-
+
Omap35xxPkg/Flash/Flash.inf
Omap35xxPkg/MMCHSDxe/MMCHS.inf
Omap35xxPkg/SmbusDxe/Smbus.inf
Omap35xxPkg/Gpio/Gpio.inf
Omap35xxPkg/InterruptDxe/InterruptDxe.inf
- Omap35xxPkg/TimerDxe/TimerDxe.inf
+ Omap35xxPkg/TimerDxe/TimerDxe.inf
Omap35xxPkg/TPS65950Dxe/TPS65950.inf
-
-
+
+
diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.c b/Omap35xxPkg/PciEmulation/PciEmulation.c index afa64193a2..5af8849c4a 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.c +++ b/Omap35xxPkg/PciEmulation/PciEmulation.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -36,7 +36,7 @@ typedef struct { #define EFI_PCI_IO_PRIVATE_DATA_SIGNATURE SIGNATURE_32('p', 'c', 'i', 'o')
#define EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(a) CR(a, EFI_PCI_IO_PRIVATE_DATA, PciIoProtocol, EFI_PCI_IO_PRIVATE_DATA_SIGNATURE)
-EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =
+EFI_PCI_IO_DEVICE_PATH PciIoDevicePathTemplate =
{
{
{ ACPI_DEVICE_PATH, ACPI_DP, { sizeof (ACPI_HID_DEVICE_PATH), 0 } },
@@ -82,7 +82,7 @@ ConfigureUSBHost ( // Get the Power IC protocol
Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);
- ASSERT_EFI_ERROR (Status);
+ ASSERT_EFI_ERROR (Status);
// Power the USB PHY
Data = VAUX_DEV_GRP_P1;
@@ -91,7 +91,7 @@ ConfigureUSBHost ( Data = VAUX_DEDICATED_18V;
Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VAUX2_DEDICATED), 1, &Data);
- ASSERT_EFI_ERROR (Status);
+ ASSERT_EFI_ERROR (Status);
// Enable power to the USB hub
Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID3, LEDEN), 1, &Data);
@@ -150,7 +150,7 @@ PciIoMemRead ( {
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);
- return PciRootBridgeIoMemRead (&Private->RootBridge.Io,
+ return PciRootBridgeIoMemRead (&Private->RootBridge.Io,
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
Private->ConfigSpace->Device.Bar[BarIndex] + Offset,
Count,
@@ -170,7 +170,7 @@ PciIoMemWrite ( {
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);
- return PciRootBridgeIoMemWrite (&Private->RootBridge.Io,
+ return PciRootBridgeIoMemWrite (&Private->RootBridge.Io,
(EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
Private->ConfigSpace->Device.Bar[BarIndex] + Offset,
Count,
@@ -217,11 +217,11 @@ PciIoPciRead ( {
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);
- return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
- Count,
- TRUE,
- (PTR)(UINTN)Buffer,
- TRUE,
+ return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH)Width,
+ Count,
+ TRUE,
+ (PTR)(UINTN)Buffer,
+ TRUE,
(PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset)
);
}
@@ -237,11 +237,11 @@ PciIoPciWrite ( {
EFI_PCI_IO_PRIVATE_DATA *Private = EFI_PCI_IO_PRIVATE_DATA_FROM_THIS(This);
- return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
- Count,
- TRUE,
- (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset),
- TRUE,
+ return PciRootBridgeIoMemRW ((EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width,
+ Count,
+ TRUE,
+ (PTR)(UINTN)(((UINT8 *)Private->ConfigSpace) + Offset),
+ TRUE,
(PTR)(UINTN)Buffer
);
}
@@ -385,7 +385,7 @@ PciIoAttributes ( case EfiPciIoAttributeOperationDisable:
// Since we are not a real PCI device no enable/set or disable operations exist.
return EFI_SUCCESS;
-
+
default:
ASSERT (FALSE);
return EFI_INVALID_PARAMETER;
@@ -418,7 +418,7 @@ PciIoSetBarAttributes ( return EFI_UNSUPPORTED;
}
-EFI_PCI_IO_PROTOCOL PciIoTemplate =
+EFI_PCI_IO_PROTOCOL PciIoTemplate =
{
PciIoPollMem,
PciIoPollIo,
@@ -463,7 +463,7 @@ PciEmulationEntryPoint ( Status = EFI_OUT_OF_RESOURCES;
return Status;
}
-
+
Private->Signature = EFI_PCI_IO_PRIVATE_DATA_SIGNATURE; // Fill in signature
Private->RootBridge.Signature = PCI_ROOT_BRIDGE_SIGNATURE; // Fake Root Bridge structure needs a signature too
Private->RootBridge.MemoryStart = USB_EHCI_HCCAPBASE; // Get the USB capability register base
@@ -504,7 +504,7 @@ PciEmulationEntryPoint ( // Unique device path.
CopyMem(&Private->DevicePath, &PciIoDevicePathTemplate, sizeof(PciIoDevicePathTemplate));
Private->DevicePath.AcpiDevicePath.UID = 0;
-
+
// Copy protocol structure
CopyMem(&Private->PciIoProtocol, &PciIoTemplate, sizeof(PciIoTemplate));
diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.h b/Omap35xxPkg/PciEmulation/PciEmulation.h index 2a381f2f99..d5ee043189 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.h +++ b/Omap35xxPkg/PciEmulation/PciEmulation.h @@ -72,7 +72,7 @@ typedef struct { EFI_HANDLE Handle;
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;
-
+
UINT8 StartBus;
UINT8 EndBus;
UINT16 Type;
@@ -81,7 +81,7 @@ typedef struct { UINTN IoOffset;
UINT32 IoStart;
UINT32 IoSize;
- UINT64 PciAttributes;
+ UINT64 PciAttributes;
ACPI_CONFIG_INFO *Config;
@@ -104,7 +104,7 @@ typedef union { EFI_STATUS
EFIAPI
-PciRootBridgeIoPollMem (
+PciRootBridgeIoPollMem (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
@@ -113,10 +113,10 @@ PciRootBridgeIoPollMem ( IN UINT64 Delay,
OUT UINT64 *Result
);
-
+
EFI_STATUS
EFIAPI
-PciRootBridgeIoPollIo (
+PciRootBridgeIoPollIo (
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,
IN UINT64 Address,
@@ -125,7 +125,7 @@ PciRootBridgeIoPollIo ( IN UINT64 Delay,
OUT UINT64 *Result
);
-
+
EFI_STATUS
EFIAPI
PciRootBridgeIoMemRead (
@@ -253,8 +253,8 @@ PciRootBridgeIoSetAttributes ( IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,
IN UINT64 Attributes,
IN OUT UINT64 *ResourceBase,
- IN OUT UINT64 *ResourceLength
- );
+ IN OUT UINT64 *ResourceLength
+ );
EFI_STATUS
EFIAPI
diff --git a/Omap35xxPkg/PciEmulation/PciEmulation.inf b/Omap35xxPkg/PciEmulation/PciEmulation.inf index ab37541795..2180bb4989 100644 --- a/Omap35xxPkg/PciEmulation/PciEmulation.inf +++ b/Omap35xxPkg/PciEmulation/PciEmulation.inf @@ -1,5 +1,5 @@ /** @file
-
+
Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
This program and the accompanying materials
@@ -52,6 +52,5 @@ gEmbeddedExternalDeviceProtocolGuid
[Depex]
- gEfiMetronomeArchProtocolGuid AND
+ gEfiMetronomeArchProtocolGuid AND
gEmbeddedExternalDeviceProtocolGuid
-
\ No newline at end of file diff --git a/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c b/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c index 33d70341cc..e8635ed88d 100644 --- a/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c +++ b/Omap35xxPkg/PciEmulation/PciRootBridgeIo.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -87,20 +87,20 @@ PciRootBridgeIoPciRW ( return EFI_SUCCESS;
}
-/**
+/**
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
+
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
+ @param Address The base address of the memory operations.
@param Count The number of memory operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
+
**/
EFI_STATUS
EFIAPI
@@ -120,7 +120,7 @@ PciRootBridgeIoMemRead ( if ( Buffer == NULL ) {
return EFI_INVALID_PARAMETER;
}
-
+
Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
if (!PciRootBridgeMemAddressValid (Private, Address)) {
@@ -153,30 +153,30 @@ PciRootBridgeIoMemRead ( case EfiPciWidthFillUint32:
case EfiPciWidthFillUint64:
return PciRootBridgeIoMemRW (Width, Count, FALSE, In, TRUE, Out);
-
+
default:
break;
}
-
+
return EFI_INVALID_PARAMETER;
}
-/**
+/**
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
+
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
+ @param Address The base address of the memory operations.
@param Count The number of memory operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
+
**/
EFI_STATUS
EFIAPI
@@ -196,7 +196,7 @@ PciRootBridgeIoMemWrite ( if ( Buffer == NULL ) {
return EFI_INVALID_PARAMETER;
}
-
+
Private = INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS (This);
if (!PciRootBridgeMemAddressValid (Private, Address)) {
@@ -217,7 +217,7 @@ PciRootBridgeIoMemWrite ( case EfiPciWidthUint32:
case EfiPciWidthUint64:
return PciRootBridgeIoMemRW (Width, Count, TRUE, In, TRUE, Out);
-
+
case EfiPciWidthFifoUint8:
case EfiPciWidthFifoUint16:
case EfiPciWidthFifoUint32:
@@ -229,7 +229,7 @@ PciRootBridgeIoMemWrite ( case EfiPciWidthFillUint32:
case EfiPciWidthFillUint64:
return PciRootBridgeIoMemRW (Width, Count, TRUE, In, FALSE, Out);
-
+
default:
break;
}
@@ -237,20 +237,20 @@ PciRootBridgeIoMemWrite ( return EFI_INVALID_PARAMETER;
}
-/**
+/**
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
+
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
+ @param Address The base address of the memory operations.
@param Count The number of memory operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
+
**/
EFI_STATUS
EFIAPI
@@ -271,20 +271,20 @@ PciRootBridgeIoPciRead ( -/**
+/**
Enables a PCI driver to access PCI controller registers in the PCI root bridge memory space.
-
+
@param This A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
@param Width Signifies the width of the memory operations.
- @param Address The base address of the memory operations.
+ @param Address The base address of the memory operations.
@param Count The number of memory operations to perform.
@param Buffer For read operations, the destination buffer to store the results. For write
- operations, the source buffer to write data from.
-
- @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
+ operations, the source buffer to write data from.
+
+ @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
@retval EFI_INVALID_PARAMETER One or more parameters are invalid.
-
+
**/
EFI_STATUS
EFIAPI
@@ -299,7 +299,7 @@ PciRootBridgeIoPciWrite ( if (Buffer == NULL) {
return EFI_INVALID_PARAMETER;
}
-
+
return PciRootBridgeIoPciRW (This, TRUE, Width, Address, Count, Buffer);
}
diff --git a/Omap35xxPkg/SmbusDxe/Smbus.c b/Omap35xxPkg/SmbusDxe/Smbus.c index 3b88974ae1..f2f43e252f 100644 --- a/Omap35xxPkg/SmbusDxe/Smbus.c +++ b/Omap35xxPkg/SmbusDxe/Smbus.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -76,8 +76,8 @@ ConfigureI2c ( //Program prescaler to obtain 12-MHz clock
MmioWrite16(I2C_PSC, 0x0000);
- //Program SCLL and SCLH
- //NOTE: Following values are the register dump after U-Boot code executed.
+ //Program SCLL and SCLH
+ //NOTE: Following values are the register dump after U-Boot code executed.
//We need to figure out how its calculated based on the I2C functional clock and I2C_PSC.
MmioWrite16(I2C_SCLL, 0x0035);
MmioWrite16(I2C_SCLH, 0x0035);
@@ -124,7 +124,7 @@ I2CReadOneByte ( STATIC
EFI_STATUS
I2CWriteOneByte (
- UINT8 Data
+ UINT8 Data
)
{
EFI_STATUS Status;
@@ -319,7 +319,7 @@ InitializeSmbus ( // Install the SMBUS interface
Status = gBS->InstallMultipleProtocolInterfaces(&Handle, &gEfiSmbusHcProtocolGuid, &SmbusProtocol, NULL);
ASSERT_EFI_ERROR(Status);
-
+
return Status;
}
diff --git a/Omap35xxPkg/SmbusDxe/Smbus.inf b/Omap35xxPkg/SmbusDxe/Smbus.inf index 5a4e43ea24..009927d73a 100644 --- a/Omap35xxPkg/SmbusDxe/Smbus.inf +++ b/Omap35xxPkg/SmbusDxe/Smbus.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -35,11 +35,11 @@ IoLib
[Guids]
-
+
[Protocols]
gEfiSmbusHcProtocolGuid
[Pcd]
[depex]
- TRUE
\ No newline at end of file + TRUE
diff --git a/Omap35xxPkg/TPS65950Dxe/TPS65950.c b/Omap35xxPkg/TPS65950Dxe/TPS65950.c index ed19389d43..66f9d853ff 100644 --- a/Omap35xxPkg/TPS65950Dxe/TPS65950.c +++ b/Omap35xxPkg/TPS65950Dxe/TPS65950.c @@ -1,7 +1,7 @@ /** @file
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
+
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
which accompanies this distribution. The full text of the license may be found at
@@ -35,7 +35,7 @@ Read ( )
{
EFI_STATUS Status;
- EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
+ EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
UINT8 DeviceRegister;
UINTN DeviceRegisterLength = 1;
@@ -62,7 +62,7 @@ Write ( )
{
EFI_STATUS Status;
- EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
+ EFI_SMBUS_DEVICE_ADDRESS SlaveAddress;
UINT8 DeviceRegister;
UINTN DeviceBufferLength = Length + 1;
UINT8 *DeviceBuffer;
@@ -107,10 +107,10 @@ TPS65950Initialize ( )
{
EFI_STATUS Status;
-
+
Status = gBS->LocateProtocol(&gEfiSmbusHcProtocolGuid, NULL, (VOID **)&Smbus);
ASSERT_EFI_ERROR(Status);
-
+
Status = gBS->InstallMultipleProtocolInterfaces(&ImageHandle, &gEmbeddedExternalDeviceProtocolGuid, &ExternalDevice, NULL);
return Status;
}
diff --git a/Omap35xxPkg/TPS65950Dxe/TPS65950.inf b/Omap35xxPkg/TPS65950Dxe/TPS65950.inf index 5fca7a356f..6144a33c55 100644 --- a/Omap35xxPkg/TPS65950Dxe/TPS65950.inf +++ b/Omap35xxPkg/TPS65950Dxe/TPS65950.inf @@ -1,14 +1,14 @@ #/** @file
-#
+#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -37,7 +37,7 @@ MemoryAllocationLib
[Guids]
-
+
[Protocols]
gEfiSmbusHcProtocolGuid
gEmbeddedExternalDeviceProtocolGuid
diff --git a/Omap35xxPkg/TimerDxe/Timer.c b/Omap35xxPkg/TimerDxe/Timer.c index bc3d9b0aba..8b56d457e4 100644 --- a/Omap35xxPkg/TimerDxe/Timer.c +++ b/Omap35xxPkg/TimerDxe/Timer.c @@ -2,14 +2,14 @@ Template for Timer Architecture Protocol driver of the ARM flavor
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
@@ -61,7 +61,7 @@ volatile UINTN gVector; what source means.
@param SystemContext Pointer to system register context. Mostly used by debuggers and will
- update the system context after the return from the interrupt if
+ update the system context after the return from the interrupt if
modified. Don't change these values unless you know what you are doing
**/
@@ -69,7 +69,7 @@ VOID EFIAPI
TimerInterruptHandler (
IN HARDWARE_INTERRUPT_SOURCE Source,
- IN EFI_SYSTEM_CONTEXT SystemContext
+ IN EFI_SYSTEM_CONTEXT SystemContext
)
{
EFI_TPL OriginalTPL;
@@ -77,9 +77,9 @@ TimerInterruptHandler ( //
- // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
+ // DXE core uses this callback for the EFI timer tick. The DXE core uses locks
// that raise to TPL_HIGH and then restore back to current level. Thus we need
- // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
+ // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick.
//
OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL);
@@ -88,7 +88,7 @@ TimerInterruptHandler ( }
// Clear all timer interrupts
- MmioWrite32 (TISR, TISR_CLEAR_ALL);
+ MmioWrite32 (TISR, TISR_CLEAR_ALL);
// Poll interrupt status bits to ensure clearing
while ((MmioRead32 (TISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);
@@ -97,16 +97,16 @@ TimerInterruptHandler ( }
/**
- This function registers the handler NotifyFunction so it is called every time
- the timer interrupt fires. It also passes the amount of time since the last
- handler call to the NotifyFunction. If NotifyFunction is NULL, then the
- handler is unregistered. If the handler is registered, then EFI_SUCCESS is
- returned. If the CPU does not support registering a timer interrupt handler,
- then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
- when a handler is already registered, then EFI_ALREADY_STARTED is returned.
- If an attempt is made to unregister a handler when a handler is not registered,
- then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
- register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
+ This function registers the handler NotifyFunction so it is called every time
+ the timer interrupt fires. It also passes the amount of time since the last
+ handler call to the NotifyFunction. If NotifyFunction is NULL, then the
+ handler is unregistered. If the handler is registered, then EFI_SUCCESS is
+ returned. If the CPU does not support registering a timer interrupt handler,
+ then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler
+ when a handler is already registered, then EFI_ALREADY_STARTED is returned.
+ If an attempt is made to unregister a handler when a handler is not registered,
+ then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to
+ register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR
is returned.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@@ -146,17 +146,17 @@ TimerDriverRegisterHandler ( /**
- This function adjusts the period of timer interrupts to the value specified
- by TimerPeriod. If the timer period is updated, then the selected timer
- period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
- the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
- If an error occurs while attempting to update the timer period, then the
- timer hardware will be put back in its state prior to this call, and
- EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
- is disabled. This is not the same as disabling the CPU's interrupts.
- Instead, it must either turn off the timer hardware, or it must adjust the
- interrupt controller so that a CPU interrupt is not generated when the timer
- interrupt fires.
+ This function adjusts the period of timer interrupts to the value specified
+ by TimerPeriod. If the timer period is updated, then the selected timer
+ period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If
+ the timer hardware is not programmable, then EFI_UNSUPPORTED is returned.
+ If an error occurs while attempting to update the timer period, then the
+ timer hardware will be put back in its state prior to this call, and
+ EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt
+ is disabled. This is not the same as disabling the CPU's interrupts.
+ Instead, it must either turn off the timer hardware, or it must adjust the
+ interrupt controller so that a CPU interrupt is not generated when the timer
+ interrupt fires.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@param TimerPeriod The rate to program the timer interrupt in 100 nS units. If
@@ -182,13 +182,13 @@ TimerDriverSetTimerPeriod ( EFI_STATUS Status;
UINT64 TimerCount;
INT32 LoadValue;
-
+
if (TimerPeriod == 0) {
// Turn off GPTIMER3
MmioWrite32 (TCLR, TCLR_ST_OFF);
-
- Status = gInterrupt->DisableInterruptSource(gInterrupt, gVector);
- } else {
+
+ Status = gInterrupt->DisableInterruptSource(gInterrupt, gVector);
+ } else {
// Calculate required timer count
TimerCount = DivU64x32(TimerPeriod * 100, PcdGet32(PcdEmbeddedPerformanceCounterPeriodInNanoseconds));
@@ -203,7 +203,7 @@ TimerDriverSetTimerPeriod ( // Turn on GPTIMER3, it will reload at overflow
MmioWrite32 (TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
- Status = gInterrupt->EnableInterruptSource(gInterrupt, gVector);
+ Status = gInterrupt->EnableInterruptSource(gInterrupt, gVector);
}
//
@@ -215,9 +215,9 @@ TimerDriverSetTimerPeriod ( /**
- This function retrieves the period of timer interrupts in 100 ns units,
- returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
- is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
+ This function retrieves the period of timer interrupts in 100 ns units,
+ returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod
+ is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is
returned, then the timer is currently disabled.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@@ -245,12 +245,12 @@ TimerDriverGetTimerPeriod ( }
/**
- This function generates a soft timer interrupt. If the platform does not support soft
- timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
- If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
- service, then a soft timer interrupt will be generated. If the timer interrupt is
- enabled when this service is called, then the registered handler will be invoked. The
- registered handler should not be able to distinguish a hardware-generated timer
+ This function generates a soft timer interrupt. If the platform does not support soft
+ timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned.
+ If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler()
+ service, then a soft timer interrupt will be generated. If the timer interrupt is
+ enabled when this service is called, then the registered handler will be invoked. The
+ registered handler should not be able to distinguish a hardware-generated timer
interrupt from a software-generated timer interrupt.
@param This The EFI_TIMER_ARCH_PROTOCOL instance.
@@ -273,24 +273,24 @@ TimerDriverGenerateSoftInterrupt ( Interface stucture for the Timer Architectural Protocol.
@par Protocol Description:
- This protocol provides the services to initialize a periodic timer
+ This protocol provides the services to initialize a periodic timer
interrupt, and to register a handler that is called each time the timer
interrupt fires. It may also provide a service to adjust the rate of the
- periodic timer interrupt. When a timer interrupt occurs, the handler is
- passed the amount of time that has passed since the previous timer
+ periodic timer interrupt. When a timer interrupt occurs, the handler is
+ passed the amount of time that has passed since the previous timer
interrupt.
@param RegisterHandler
- Registers a handler that will be called each time the
- timer interrupt fires. TimerPeriod defines the minimum
- time between timer interrupts, so TimerPeriod will also
- be the minimum time between calls to the registered
+ Registers a handler that will be called each time the
+ timer interrupt fires. TimerPeriod defines the minimum
+ time between timer interrupts, so TimerPeriod will also
+ be the minimum time between calls to the registered
handler.
@param SetTimerPeriod
- Sets the period of the timer interrupt in 100 nS units.
- This function is optional, and may return EFI_UNSUPPORTED.
- If this function is supported, then the timer period will
+ Sets the period of the timer interrupt in 100 nS units.
+ This function is optional, and may return EFI_UNSUPPORTED.
+ If this function is supported, then the timer period will
be rounded up to the nearest supported timer period.
@@ -298,8 +298,8 @@ TimerDriverGenerateSoftInterrupt ( Retrieves the period of the timer interrupt in 100 nS units.
@param GenerateSoftInterrupt
- Generates a soft timer interrupt that simulates the firing of
- the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
+ Generates a soft timer interrupt that simulates the firing of
+ the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
a period of time.
**/
diff --git a/Omap35xxPkg/TimerDxe/TimerDxe.inf b/Omap35xxPkg/TimerDxe/TimerDxe.inf index 2c5a2f7a4a..b77b0a154a 100644 --- a/Omap35xxPkg/TimerDxe/TimerDxe.inf +++ b/Omap35xxPkg/TimerDxe/TimerDxe.inf @@ -1,16 +1,16 @@ #/** @file
-#
+#
# Component description file for Timer module
-#
+#
# Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
# which accompanies this distribution. The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
-#
+#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
+#
#**/
[Defines]
@@ -45,7 +45,7 @@ [Guids]
[Protocols]
- gEfiTimerArchProtocolGuid
+ gEfiTimerArchProtocolGuid
gHardwareInterruptProtocolGuid
[Pcd.common]
@@ -54,4 +54,4 @@ gOmap35xxTokenSpaceGuid.PcdOmap35xxArchTimer
[Depex]
- gHardwareInterruptProtocolGuid
\ No newline at end of file + gHardwareInterruptProtocolGuid
|