diff options
author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-03-04 17:38:05 +0000 |
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committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2013-03-04 17:38:05 +0000 |
commit | 1bccb20cf0d9ca41b2ee912f79e55520682815dd (patch) | |
tree | 06a133644f0aac584c8043535103ec8a8e1f77a8 /OvmfPkg/AcpiTables | |
parent | 304606c0b67a282b3a772467ca075c550617a23e (diff) | |
download | edk2-platforms-1bccb20cf0d9ca41b2ee912f79e55520682815dd.tar.xz |
OvmfPkg: report support for the PIIX3 reset register in the FADT
The value to be written corresponds to hard reset, which is what the ACPI
spec prescribes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14156 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/AcpiTables')
-rw-r--r-- | OvmfPkg/AcpiTables/Facp.aslc | 4 | ||||
-rw-r--r-- | OvmfPkg/AcpiTables/Platform.h | 5 |
2 files changed, 6 insertions, 3 deletions
diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc index 9a17905c44..df35285c9c 100644 --- a/OvmfPkg/AcpiTables/Facp.aslc +++ b/OvmfPkg/AcpiTables/Facp.aslc @@ -65,8 +65,8 @@ EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { 0x0000, // Boot architecture flag (16-bit)
RESERVED, // reserved
FLAG, // Fixed feature flags
- { 0 }, // Address of the Reset Register
- 0, // Value for the Reset Register to reset the system
+ GAS2_IO(RESET_REG, 1), // Extended address of the Reset Register
+ RESET_VALUE, // Value for the Reset Register to reset the system
{ RESERVED }, // reserved[3]
0, // 64-bit physical addesss of FACS, set at installation
0, // 64-bit physical addesss of DSDT, set at installation
diff --git a/OvmfPkg/AcpiTables/Platform.h b/OvmfPkg/AcpiTables/Platform.h index c95cbb20d5..d96b847239 100644 --- a/OvmfPkg/AcpiTables/Platform.h +++ b/OvmfPkg/AcpiTables/Platform.h @@ -54,7 +54,10 @@ #define FLAG (EFI_ACPI_2_0_WBINVD | \
EFI_ACPI_2_0_PROC_C1 | \
EFI_ACPI_2_0_SLP_BUTTON | \
- EFI_ACPI_2_0_RTC_S4)
+ EFI_ACPI_2_0_RTC_S4 | \
+ EFI_ACPI_2_0_RESET_REG_SUP)
+#define RESET_REG 0xCF9
+#define RESET_VALUE (BIT2 | BIT1) // PIIX3 Reset CPU + System Reset
//
// Byte-aligned IO port register block initializer for
|