OvmfPkg: Remove unused Package

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>

2 files changed, 0 insertions, 1276 deletions

diff --git a/OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf b/OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
deleted file mode 100644
index 2bd10cc232..0000000000
--- a/OvmfPkg/Library/DxePciLibI440FxQ35/DxePciLibI440FxQ35.inf
+++ /dev/null
@@ -1,47 +0,0 @@
-## @file

-#  An instance of the PCI Library that is based on both the PCI CF8 Library and

-#  the PCI Express Library.

-#

-#  This PciLib instance caches the OVMF platform type (I440FX vs. Q35) in

-#  its entry point function, then delegates function calls to one of the

-#  PciCf8Lib or PciExpressLib "backends" as appropriate.

-#

-#  Copyright (C) 2016, Red Hat, Inc.

-#

-#  Copyright (c) 2007 - 2014, Intel Corporation. All rights reserved.<BR>

-#

-#  This program and the accompanying materials are licensed and made available

-#  under the terms and conditions of the BSD License which accompanies this

-#  distribution. The full text of the license may be found at

-#  http://opensource.org/licenses/bsd-license.php.

-#

-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR

-#  IMPLIED.

-##

-

-[Defines]

-  INF_VERSION                    = 0x00010005

-  BASE_NAME                      = DxePciLibI440FxQ35

-  FILE_GUID                      = 5360bff6-3911-4495-ae3c-b02ff004b585

-  MODULE_TYPE                    = BASE

-  VERSION_STRING                 = 1.0

-  LIBRARY_CLASS                  = PciLib|DXE_DRIVER DXE_RUNTIME_DRIVER SMM_CORE DXE_SMM_DRIVER UEFI_DRIVER UEFI_APPLICATION

-  CONSTRUCTOR                    = InitializeConfigAccessMethod

-

-#  VALID_ARCHITECTURES           = IA32 X64

-

-[Sources]

-  PciLib.c

-

-[Packages]

-  MdePkg/MdePkg.dec

-  OvmfPkg/OvmfPkg.dec

-

-[LibraryClasses]

-  PcdLib

-  PciCf8Lib

-  PciExpressLib

-

-[Pcd]

-  gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId

diff --git a/OvmfPkg/Library/DxePciLibI440FxQ35/PciLib.c b/OvmfPkg/Library/DxePciLibI440FxQ35/PciLib.c
deleted file mode 100644
index 6c1a272973..0000000000
--- a/OvmfPkg/Library/DxePciLibI440FxQ35/PciLib.c
+++ /dev/null
@@ -1,1229 +0,0 @@
-/** @file

-  PCI Library functions that use

-  (a) I/O ports 0xCF8 and 0xCFC to perform PCI Configuration cycles, layering

-      on top of one PCI CF8 Library instance; or

-  (b) PCI Library functions that use the 256 MB PCI Express MMIO window to

-      perform PCI Configuration cycles, layering on PCI Express Library.

-

-  The decision is made in the entry point function, based on the OVMF platform

-  type, and then adhered to during the lifetime of the client module.

-

-  Copyright (C) 2016, Red Hat, Inc.

-

-  Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>

-  This program and the accompanying materials

-  are licensed and made available under the terms and conditions of the BSD License

-  which accompanies this distribution.  The full text of the license may be found at

-  http://opensource.org/licenses/bsd-license.php.

-

-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

-

-**/

-

-

-#include <Base.h>

-

-#include <IndustryStandard/Q35MchIch9.h>

-

-#include <Library/PciLib.h>

-#include <Library/PciCf8Lib.h>

-#include <Library/PciExpressLib.h>

-#include <Library/PcdLib.h>

-

-STATIC BOOLEAN mRunningOnQ35;

-

-RETURN_STATUS

-EFIAPI

-InitializeConfigAccessMethod (

-  VOID

-  )

-{

-  mRunningOnQ35 = (PcdGet16 (PcdOvmfHostBridgePciDevId) ==

-                   INTEL_Q35_MCH_DEVICE_ID);

-  return RETURN_SUCCESS;

-}

-

-/**

-  Registers a PCI device so PCI configuration registers may be accessed after 

-  SetVirtualAddressMap().

-  

-  Registers the PCI device specified by Address so all the PCI configuration registers 

-  associated with that PCI device may be accessed after SetVirtualAddressMap() is called.

-  

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  

-  @retval RETURN_SUCCESS           The PCI device was registered for runtime access.

-  @retval RETURN_UNSUPPORTED       An attempt was made to call this function 

-                                   after ExitBootServices().

-  @retval RETURN_UNSUPPORTED       The resources required to access the PCI device

-                                   at runtime could not be mapped.

-  @retval RETURN_OUT_OF_RESOURCES  There are not enough resources available to

-                                   complete the registration.

-

-**/

-RETURN_STATUS

-EFIAPI

-PciRegisterForRuntimeAccess (

-  IN UINTN  Address

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressRegisterForRuntimeAccess (Address) :

-         PciCf8RegisterForRuntimeAccess (Address);

-}

-

-/**

-  Reads an 8-bit PCI configuration register.

-

-  Reads and returns the 8-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciRead8 (

-  IN      UINTN                     Address

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressRead8 (Address) :

-         PciCf8Read8 (Address);

-}

-

-/**

-  Writes an 8-bit PCI configuration register.

-

-  Writes the 8-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciWrite8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressWrite8 (Address, Value) :

-         PciCf8Write8 (Address, Value);

-}

-

-/**

-  Performs a bitwise OR of an 8-bit PCI configuration register with

-  an 8-bit value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 8-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciOr8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressOr8 (Address, OrData) :

-         PciCf8Or8 (Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit

-  value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 8-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciAnd8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAnd8 (Address, AndData) :

-         PciCf8And8 (Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of an 8-bit PCI configuration register with an 8-bit

-  value, followed a  bitwise OR with another 8-bit value.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 8-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciAndThenOr8 (

-  IN      UINTN                     Address,

-  IN      UINT8                     AndData,

-  IN      UINT8                     OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAndThenOr8 (Address, AndData, OrData) :

-         PciCf8AndThenOr8 (Address, AndData, OrData);

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in an 8-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciBitFieldRead8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldRead8 (Address, StartBit, EndBit) :

-         PciCf8BitFieldRead8 (Address, StartBit, EndBit);

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  8-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  Value     The new value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciBitFieldWrite8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldWrite8 (Address, StartBit, EndBit, Value) :

-         PciCf8BitFieldWrite8 (Address, StartBit, EndBit, Value);

-}

-

-/**

-  Reads a bit field in an 8-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 8-bit port.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 8-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciBitFieldOr8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldOr8 (Address, StartBit, EndBit, OrData) :

-         PciCf8BitFieldOr8 (Address, StartBit, EndBit, OrData);

-}

-

-/**

-  Reads a bit field in an 8-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 8-bit register.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 8-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciBitFieldAnd8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAnd8 (Address, StartBit, EndBit, AndData) :

-         PciCf8BitFieldAnd8 (Address, StartBit, EndBit, AndData);

-}

-

-/**

-  Reads a bit field in an 8-bit port, performs a bitwise AND followed by a

-  bitwise OR, and writes the result back to the bit field in the

-  8-bit port.

-

-  Reads the 8-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise OR between the read result and

-  the value specified by AndData, and writes the result to the 8-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If StartBit is greater than 7, then ASSERT().

-  If EndBit is greater than 7, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..7.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..7.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT8

-EFIAPI

-PciBitFieldAndThenOr8 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT8                     AndData,

-  IN      UINT8                     OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData) :

-         PciCf8BitFieldAndThenOr8 (Address, StartBit, EndBit, AndData, OrData);

-}

-

-/**

-  Reads a 16-bit PCI configuration register.

-

-  Reads and returns the 16-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciRead16 (

-  IN      UINTN                     Address

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressRead16 (Address) :

-         PciCf8Read16 (Address);

-}

-

-/**

-  Writes a 16-bit PCI configuration register.

-

-  Writes the 16-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciWrite16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressWrite16 (Address, Value) :

-         PciCf8Write16 (Address, Value);

-}

-

-/**

-  Performs a bitwise OR of a 16-bit PCI configuration register with

-  a 16-bit value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 16-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciOr16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressOr16 (Address, OrData) :

-         PciCf8Or16 (Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit

-  value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 16-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciAnd16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAnd16 (Address, AndData) :

-         PciCf8And16 (Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of a 16-bit PCI configuration register with a 16-bit

-  value, followed a  bitwise OR with another 16-bit value.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 16-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciAndThenOr16 (

-  IN      UINTN                     Address,

-  IN      UINT16                    AndData,

-  IN      UINT16                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAndThenOr16 (Address, AndData, OrData) :

-         PciCf8AndThenOr16 (Address, AndData, OrData);

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in a 16-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciBitFieldRead16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldRead16 (Address, StartBit, EndBit) :

-         PciCf8BitFieldRead16 (Address, StartBit, EndBit);

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  16-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  Value     The new value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciBitFieldWrite16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldWrite16 (Address, StartBit, EndBit, Value) :

-         PciCf8BitFieldWrite16 (Address, StartBit, EndBit, Value);

-}

-

-/**

-  Reads a bit field in a 16-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 16-bit port.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 16-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciBitFieldOr16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldOr16 (Address, StartBit, EndBit, OrData) :

-         PciCf8BitFieldOr16 (Address, StartBit, EndBit, OrData);

-}

-

-/**

-  Reads a bit field in a 16-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 16-bit register.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 16-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciBitFieldAnd16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAnd16 (Address, StartBit, EndBit, AndData) :

-         PciCf8BitFieldAnd16 (Address, StartBit, EndBit, AndData);

-}

-

-/**

-  Reads a bit field in a 16-bit port, performs a bitwise AND followed by a

-  bitwise OR, and writes the result back to the bit field in the

-  16-bit port.

-

-  Reads the 16-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise OR between the read result and

-  the value specified by AndData, and writes the result to the 16-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 16-bit boundary, then ASSERT().

-  If StartBit is greater than 15, then ASSERT().

-  If EndBit is greater than 15, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..15.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..15.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT16

-EFIAPI

-PciBitFieldAndThenOr16 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT16                    AndData,

-  IN      UINT16                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData) :

-         PciCf8BitFieldAndThenOr16 (Address, StartBit, EndBit, AndData, OrData);

-}

-

-/**

-  Reads a 32-bit PCI configuration register.

-

-  Reads and returns the 32-bit PCI configuration register specified by Address.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-

-  @return The read value from the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciRead32 (

-  IN      UINTN                     Address

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressRead32 (Address) :

-         PciCf8Read32 (Address);

-}

-

-/**

-  Writes a 32-bit PCI configuration register.

-

-  Writes the 32-bit PCI configuration register specified by Address with the

-  value specified by Value. Value is returned. This function must guarantee

-  that all PCI read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  Value   The value to write.

-

-  @return The value written to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciWrite32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressWrite32 (Address, Value) :

-         PciCf8Write32 (Address, Value);

-}

-

-/**

-  Performs a bitwise OR of a 32-bit PCI configuration register with

-  a 32-bit value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 32-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  OrData  The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciOr32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressOr32 (Address, OrData) :

-         PciCf8Or32 (Address, OrData);

-}

-

-/**

-  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit

-  value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 32-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciAnd32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAnd32 (Address, AndData) :

-         PciCf8And32 (Address, AndData);

-}

-

-/**

-  Performs a bitwise AND of a 32-bit PCI configuration register with a 32-bit

-  value, followed a  bitwise OR with another 32-bit value.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData,

-  performs a bitwise OR between the result of the AND operation and

-  the value specified by OrData, and writes the result to the 32-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-

-  @param  Address The address that encodes the PCI Bus, Device, Function and

-                  Register.

-  @param  AndData The value to AND with the PCI configuration register.

-  @param  OrData  The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciAndThenOr32 (

-  IN      UINTN                     Address,

-  IN      UINT32                    AndData,

-  IN      UINT32                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressAndThenOr32 (Address, AndData, OrData) :

-         PciCf8AndThenOr32 (Address, AndData, OrData);

-}

-

-/**

-  Reads a bit field of a PCI configuration register.

-

-  Reads the bit field in a 32-bit PCI configuration register. The bit field is

-  specified by the StartBit and the EndBit. The value of the bit field is

-  returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to read.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-

-  @return The value of the bit field read from the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciBitFieldRead32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldRead32 (Address, StartBit, EndBit) :

-         PciCf8BitFieldRead32 (Address, StartBit, EndBit);

-}

-

-/**

-  Writes a bit field to a PCI configuration register.

-

-  Writes Value to the bit field of the PCI configuration register. The bit

-  field is specified by the StartBit and the EndBit. All other bits in the

-  destination PCI configuration register are preserved. The new value of the

-  32-bit register is returned.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  Value     The new value of the bit field.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciBitFieldWrite32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    Value

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldWrite32 (Address, StartBit, EndBit, Value) :

-         PciCf8BitFieldWrite32 (Address, StartBit, EndBit, Value);

-}

-

-/**

-  Reads a bit field in a 32-bit PCI configuration, performs a bitwise OR, and

-  writes the result back to the bit field in the 32-bit port.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise OR between the read result and the value specified by

-  OrData, and writes the result to the 32-bit PCI configuration register

-  specified by Address. The value written to the PCI configuration register is

-  returned. This function must guarantee that all PCI read and write operations

-  are serialized. Extra left bits in OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  OrData    The value to OR with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciBitFieldOr32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldOr32 (Address, StartBit, EndBit, OrData) :

-         PciCf8BitFieldOr32 (Address, StartBit, EndBit, OrData);

-}

-

-/**

-  Reads a bit field in a 32-bit PCI configuration register, performs a bitwise

-  AND, and writes the result back to the bit field in the 32-bit register.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND between the read result and the value specified by AndData, and

-  writes the result to the 32-bit PCI configuration register specified by

-  Address. The value written to the PCI configuration register is returned.

-  This function must guarantee that all PCI read and write operations are

-  serialized. Extra left bits in AndData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  AndData   The value to AND with the PCI configuration register.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciBitFieldAnd32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    AndData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAnd32 (Address, StartBit, EndBit, AndData) :

-         PciCf8BitFieldAnd32 (Address, StartBit, EndBit, AndData);

-}

-

-/**

-  Reads a bit field in a 32-bit port, performs a bitwise AND followed by a

-  bitwise OR, and writes the result back to the bit field in the

-  32-bit port.

-

-  Reads the 32-bit PCI configuration register specified by Address, performs a

-  bitwise AND followed by a bitwise OR between the read result and

-  the value specified by AndData, and writes the result to the 32-bit PCI

-  configuration register specified by Address. The value written to the PCI

-  configuration register is returned. This function must guarantee that all PCI

-  read and write operations are serialized. Extra left bits in both AndData and

-  OrData are stripped.

-

-  If Address > 0x0FFFFFFF, then ASSERT().

-  If Address is not aligned on a 32-bit boundary, then ASSERT().

-  If StartBit is greater than 31, then ASSERT().

-  If EndBit is greater than 31, then ASSERT().

-  If EndBit is less than StartBit, then ASSERT().

-  If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-  If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().

-

-  @param  Address   The PCI configuration register to write.

-  @param  StartBit  The ordinal of the least significant bit in the bit field.

-                    Range 0..31.

-  @param  EndBit    The ordinal of the most significant bit in the bit field.

-                    Range 0..31.

-  @param  AndData   The value to AND with the PCI configuration register.

-  @param  OrData    The value to OR with the result of the AND operation.

-

-  @return The value written back to the PCI configuration register.

-

-**/

-UINT32

-EFIAPI

-PciBitFieldAndThenOr32 (

-  IN      UINTN                     Address,

-  IN      UINTN                     StartBit,

-  IN      UINTN                     EndBit,

-  IN      UINT32                    AndData,

-  IN      UINT32                    OrData

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressBitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData) :

-         PciCf8BitFieldAndThenOr32 (Address, StartBit, EndBit, AndData, OrData);

-}

-

-/**

-  Reads a range of PCI configuration registers into a caller supplied buffer.

-

-  Reads the range of PCI configuration registers specified by StartAddress and

-  Size into the buffer specified by Buffer. This function only allows the PCI

-  configuration registers from a single PCI function to be read. Size is

-  returned. When possible 32-bit PCI configuration read cycles are used to read

-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit

-  and 16-bit PCI configuration read cycles may be used at the beginning and the

-  end of the range.

-

-  If StartAddress > 0x0FFFFFFF, then ASSERT().

-  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

-  If Size > 0 and Buffer is NULL, then ASSERT().

-

-  @param  StartAddress  The starting address that encodes the PCI Bus, Device,

-                        Function and Register.

-  @param  Size          The size in bytes of the transfer.

-  @param  Buffer        The pointer to a buffer receiving the data read.

-

-  @return Size

-

-**/

-UINTN

-EFIAPI

-PciReadBuffer (

-  IN      UINTN                     StartAddress,

-  IN      UINTN                     Size,

-  OUT     VOID                      *Buffer

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressReadBuffer (StartAddress, Size, Buffer) :

-         PciCf8ReadBuffer (StartAddress, Size, Buffer);

-}

-

-/**

-  Copies the data in a caller supplied buffer to a specified range of PCI

-  configuration space.

-

-  Writes the range of PCI configuration registers specified by StartAddress and

-  Size from the buffer specified by Buffer. This function only allows the PCI

-  configuration registers from a single PCI function to be written. Size is

-  returned. When possible 32-bit PCI configuration write cycles are used to

-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,

-  8-bit and 16-bit PCI configuration write cycles may be used at the beginning

-  and the end of the range.

-

-  If StartAddress > 0x0FFFFFFF, then ASSERT().

-  If ((StartAddress & 0xFFF) + Size) > 0x1000, then ASSERT().

-  If Size > 0 and Buffer is NULL, then ASSERT().

-

-  @param  StartAddress  The starting address that encodes the PCI Bus, Device,

-                        Function and Register.

-  @param  Size          The size in bytes of the transfer.

-  @param  Buffer        The pointer to a buffer containing the data to write.

-

-  @return Size written to StartAddress.

-

-**/

-UINTN

-EFIAPI

-PciWriteBuffer (

-  IN      UINTN                     StartAddress,

-  IN      UINTN                     Size,

-  IN      VOID                      *Buffer

-  )

-{

-  return mRunningOnQ35 ?

-         PciExpressWriteBuffer (StartAddress, Size, Buffer) :

-         PciCf8WriteBuffer (StartAddress, Size, Buffer);

-}