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authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-31 18:17:37 +0000
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>2012-07-31 18:17:37 +0000
commitcb678aa85e6199ff28c7ce5d8a9d9eb96a42c851 (patch)
treecd670f34c19f0f8060219e34168be8c0a5d840c3 /OvmfPkg/PlatformPei
parent53de44aadea62587682964e358ca0b2274e39079 (diff)
downloadedk2-platforms-cb678aa85e6199ff28c7ce5d8a9d9eb96a42c851.tar.xz
OvmfPkg: clean up memory map
Fix IO-APIC range size. Add HPET. Take LAPIC base from PCD and fix range size. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13572 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/PlatformPei')
-rw-r--r--OvmfPkg/PlatformPei/Platform.c32
-rw-r--r--OvmfPkg/PlatformPei/PlatformPei.inf2
2 files changed, 16 insertions, 18 deletions
diff --git a/OvmfPkg/PlatformPei/Platform.c b/OvmfPkg/PlatformPei/Platform.c
index d395bc191a..6ea9ae3199 100644
--- a/OvmfPkg/PlatformPei/Platform.c
+++ b/OvmfPkg/PlatformPei/Platform.c
@@ -189,28 +189,24 @@ MemMapInitialization (
);
//
- // Add PCI MMIO space available to PCI resource allocations
- //
- if (TopOfMemory < BASE_2GB) {
- AddIoMemoryBaseSizeHob (BASE_2GB, 0xFC000000 - BASE_2GB);
- } else {
- AddIoMemoryBaseSizeHob (TopOfMemory, 0xFC000000 - TopOfMemory);
- }
-
- //
- // Local APIC range
- //
- AddIoMemoryBaseSizeHob (0xFEC80000, SIZE_512KB);
-
- //
- // I/O APIC range
+ // Video memory + Legacy BIOS region
//
- AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_512KB);
+ AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
//
- // Video memory + Legacy BIOS region
+ // address purpose size
+ // ------------ -------- -------------------------
+ // max(top, 2g) PCI MMIO 0xFEC00000 - max(top, 2g)
+ // 0xFEC00000 IO-APIC 4 KB
+ // 0xFEC01000 gap 1020 KB
+ // 0xFED00000 HPET 1 KB
+ // 0xFED00400 gap 1023 KB
+ // 0xFEE00000 LAPIC 1 MB
//
- AddIoMemoryRangeHob (0x0A0000, BASE_1MB);
+ AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFEC00000);
+ AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);
+ AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);
+ AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);
}
diff --git a/OvmfPkg/PlatformPei/PlatformPei.inf b/OvmfPkg/PlatformPei/PlatformPei.inf
index db5ed31a6d..8742008c0d 100644
--- a/OvmfPkg/PlatformPei/PlatformPei.inf
+++ b/OvmfPkg/PlatformPei/PlatformPei.inf
@@ -55,6 +55,7 @@
PeiServicesTablePointerLib
PeimEntryPoint
MtrrLib
+ PcdLib
[Pcd]
gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase
@@ -63,6 +64,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
+ gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
[Ppis]
gEfiPeiMasterBootModePpiGuid