diff options
author | Jordan Justen <jordan.l.justen@intel.com> | 2014-10-31 20:55:16 +0000 |
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committer | jljusten <jljusten@Edk2> | 2014-10-31 20:55:16 +0000 |
commit | d8cfdb5fb1638173f98084cf48860036f7b86b22 (patch) | |
tree | 09165fa19bb0aa7f5c651e555b3b27a2021a274d /OvmfPkg/Sec/X64/SecEntry.nasm | |
parent | ba29ed0963627618efb8e80acc36c7a24894ed00 (diff) | |
download | edk2-platforms-d8cfdb5fb1638173f98084cf48860036f7b86b22.tar.xz |
OvmfPkg Sec: Convert X64/SecEntry.asm to NASM
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert
X64/SecEntry.asm to X64/SecEntry.nasm
Note: Manually collapsed .inf sources
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16292 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'OvmfPkg/Sec/X64/SecEntry.nasm')
-rw-r--r-- | OvmfPkg/Sec/X64/SecEntry.nasm | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/OvmfPkg/Sec/X64/SecEntry.nasm b/OvmfPkg/Sec/X64/SecEntry.nasm new file mode 100644 index 0000000000..f40427aa8e --- /dev/null +++ b/OvmfPkg/Sec/X64/SecEntry.nasm @@ -0,0 +1,56 @@ +;------------------------------------------------------------------------------
+;*
+;* Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
+;* This program and the accompanying materials
+;* are licensed and made available under the terms and conditions of the BSD License
+;* which accompanies this distribution. The full text of the license may be found at
+;* http://opensource.org/licenses/bsd-license.php
+;*
+;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;*
+;* CpuAsm.asm
+;*
+;* Abstract:
+;*
+;------------------------------------------------------------------------------
+
+#include <Base.h>
+
+DEFAULT REL
+SECTION .text
+
+extern ASM_PFX(SecCoreStartupWithStack)
+
+;
+; SecCore Entry Point
+;
+; Processor is in flat protected mode
+;
+; @param[in] RAX Initial value of the EAX register (BIST: Built-in Self Test)
+; @param[in] DI 'BP': boot-strap processor, or 'AP': application processor
+; @param[in] RBP Pointer to the start of the Boot Firmware Volume
+;
+; @return None This routine does not return
+;
+global ASM_PFX(_ModuleEntryPoint)
+ASM_PFX(_ModuleEntryPoint):
+
+ ;
+ ; Load temporary RAM stack based on PCDs
+ ;
+ %define SEC_TOP_OF_STACK (FixedPcdGet32 (PcdOvmfSecPeiTempRamBase) + \
+ FixedPcdGet32 (PcdOvmfSecPeiTempRamSize))
+ mov rsp, SEC_TOP_OF_STACK
+ nop
+
+ ;
+ ; Setup parameters and call SecCoreStartupWithStack
+ ; rcx: BootFirmwareVolumePtr
+ ; rdx: TopOfCurrentStack
+ ;
+ mov rcx, rbp
+ mov rdx, rsp
+ sub rsp, 0x20
+ call ASM_PFX(SecCoreStartupWithStack)
+
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