diff options
| author | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-06-01 17:07:00 +0000 |
|---|---|---|
| committer | jljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524> | 2012-06-01 17:07:00 +0000 |
| commit | 1fd376d979221e9765dbec215916f5a6ab92879f (patch) | |
| tree | c38b5e6bd6c3ac431a86c88c25e595c0fe8c2f76 /PcAtChipsetPkg/PciHostBridgeDxe/X64 | |
| parent | 2ea3b92055d0793a573b836a28c7044722951f5a (diff) | |
| download | edk2-platforms-1fd376d979221e9765dbec215916f5a6ab92879f.tar.xz | |
PcAtChipsetPkg/PciHostBridgeDxe: Improve KVM FIFO I/O read/write performance
KVM can substantially boost the speed of the rep insb/insw/insl
and rep outsb/outsw/outsl instructions by transferring up to
a page of data per VM trap.
This change adds assembly handling of the PCI Host Bridge
I/O FIFO Reads and Writes.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13424 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'PcAtChipsetPkg/PciHostBridgeDxe/X64')
| -rw-r--r-- | PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S | 121 | ||||
| -rw-r--r-- | PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm | 125 |
2 files changed, 246 insertions, 0 deletions
diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S b/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S new file mode 100644 index 0000000000..ca484f5610 --- /dev/null +++ b/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.S @@ -0,0 +1,121 @@ +#------------------------------------------------------------------------------
+#
+# Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#------------------------------------------------------------------------------
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo8 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo8)
+ASM_PFX(IoReadFifo8):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insb
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo16 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo16)
+ASM_PFX(IoReadFifo16):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insw
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoReadFifo32 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoReadFifo32)
+ASM_PFX(IoReadFifo32):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rdi # rdi: buffer address; r8: save register
+rep insl
+ mov %r8, %rdi # restore rdi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo8 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo8)
+ASM_PFX(IoWriteFifo8):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsb
+ mov %r8, %rsi # restore rsi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo16 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo16)
+ASM_PFX(IoWriteFifo16):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsw
+ mov %r8, %rsi # restore rsi
+ ret
+
+#------------------------------------------------------------------------------
+# VOID
+# EFIAPI
+# IoWriteFifo32 (
+# IN UINTN Port, // rcx
+# IN UINTN Count, // rdx
+# IN VOID *Buffer // r8
+# );
+#------------------------------------------------------------------------------
+ASM_GLOBAL ASM_PFX(IoWriteFifo32)
+ASM_PFX(IoWriteFifo32):
+ cld
+ xchg %rcx, %rdx
+ xchg %r8, %rsi # rsi: buffer address; r8: save register
+rep outsl
+ mov %r8, %rsi # restore rsi
+ ret
+
diff --git a/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm b/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm new file mode 100644 index 0000000000..d16f0249d7 --- /dev/null +++ b/PcAtChipsetPkg/PciHostBridgeDxe/X64/IoFifo.asm @@ -0,0 +1,125 @@ +;------------------------------------------------------------------------------
+;
+; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution. The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+;------------------------------------------------------------------------------
+
+ .code
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insb
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insw
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoReadFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoReadFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rdi, r8 ; rdi: buffer address; r8: save rdi
+rep insd
+ mov rdi, r8 ; restore rdi
+ ret
+IoReadFifo32 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo8 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo8 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsb
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo8 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo16 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo16 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsw
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo16 ENDP
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; IoWriteFifo32 (
+; IN UINTN Port, // rcx
+; IN UINTN Size, // rdx
+; IN VOID *Buffer // r8
+; );
+;------------------------------------------------------------------------------
+IoWriteFifo32 PROC
+ cld
+ xchg rcx, rdx
+ xchg rsi, r8 ; rsi: buffer address; r8: save rsi
+rep outsd
+ mov rsi, r8 ; restore rsi
+ ret
+IoWriteFifo32 ENDP
+
+ END
+
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