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author | Qiu, Shumin <shumin.qiu@intel.com> | 2014-08-28 05:19:04 +0000 |
---|---|---|
committer | lgao4 <lgao4@6f19259b-4bc3-4df7-8a09-765794883524> | 2014-08-28 05:19:04 +0000 |
commit | b414ac4ddda571df1bda112a888135021d9c87b9 (patch) | |
tree | 7d41fcbfdc9ec5dce60b1a6b230a8697be9e0de1 /PcAtChipsetPkg | |
parent | 968ac38f12476d41c0a1e147005ad82b0563d86a (diff) | |
download | edk2-platforms-b414ac4ddda571df1bda112a888135021d9c87b9.tar.xz |
PcAtChipsetPkg: INF/DEC file updates to EDK II packages
4. PCD information in DEC file comment blocks are either incomplete or incorrect.
This includes detailed description, @Prompt, @ValidRange, @ValidList, @Expression, and [Error.<TokenSpaceGuid>] validation error messages.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Qiu, Shumin <shumin.qiu@intel.com>
Reviewed-by: Gao, Liming <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15944 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'PcAtChipsetPkg')
-rw-r--r-- | PcAtChipsetPkg/PcAtChipsetPkg.dec | 68 |
1 files changed, 49 insertions, 19 deletions
diff --git a/PcAtChipsetPkg/PcAtChipsetPkg.dec b/PcAtChipsetPkg/PcAtChipsetPkg.dec index 6f0fcddf24..ac09bec6f5 100644 --- a/PcAtChipsetPkg/PcAtChipsetPkg.dec +++ b/PcAtChipsetPkg/PcAtChipsetPkg.dec @@ -19,6 +19,7 @@ [Defines]
DEC_SPECIFICATION = 0x00010005
PACKAGE_NAME = PcAtChipsetPkg
+ PACKAGE_UNI_FILE = PcAtChipsetPkg.uni
PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
PACKAGE_VERSION = 0.3
@@ -34,60 +35,86 @@ gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
[PcdsFeatureFlag]
- ## If TRUE, then the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them.
- # If FALSE, then the HPET Timer will be configued to use I/O APIC interrupts.
+ ## Indicates the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them, or use I/O APIC interrupts.<BR><BR>
+ # TRUE - Configures the HPET Timer to use MSI interrupts if the HPET Timer supports them.<BR>
+ # FALSE - Configures the HPET Timer to use I/O APIC interrupts.<BR>
+ # @Prompt Configure HPET to use MSI.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
-
+
[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
- ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined
+ ## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined<BR><BR>
# 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;
- # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.
- # 2) If platform install CSM and use thunk module:
+ # Because only clock interrupt is allowed in legacy mode in pure UEFI platform.<BR>
+ # 2) If platform install CSM and use thunk module:<BR>
# a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
- # should be opened as 0.
- # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 2, then
- # the value should be set to 0xFFFC
+ # should be opened as 0.<BR>
+ # For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 1, then
+ # the value should be set to 0xFFFC.<BR>
# b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set
- # to 0xFFFF or 0xFFFE.
+ # to 0xFFFF or 0xFFFE.<BR>
#
# The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely
# need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
- # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.
- #
+ # mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.<BR>
+ # @Prompt 8259 Legacy Mode mask.
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001
## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.
+ # For the corresponding bits, 0 = Edge triggered and 1 = Level triggered.
+ # @Prompt 8259 Legacy Mode edge level.
gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002
- ## This PCD specifies whether we need enable IsaAcpiCom1 device.
+ ## Indicates if we need enable IsaAcpiCom1 device.<BR><BR>
+ # TRUE - Enables IsaAcpiCom1 device.<BR>
+ # FALSE - Doesn't enable IsaAcpiCom1 device.<BR>
+ # @Prompt Enable IsaAcpiCom1 device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003
- ## This PCD specifies whether we need enable IsaAcpiCom2 device.
+ ## Indicates if we need enable IsaAcpiCom2 device.<BR><BR>
+ # TRUE - Enables IsaAcpiCom2 device.<BR>
+ # FALSE - Doesn't enable IsaAcpiCom2 device.<BR>
+ # @Prompt Enable IsaAcpiCom12 device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004
- ## This PCD specifies whether we need enable IsaAcpiPs2Keyboard device.
+ ## Indicates if we need enable IsaAcpiPs2Keyboard device.<BR><BR>
+ # TRUE - Enables IsaAcpiPs2Keyboard device.<BR>
+ # FALSE - Doesn't enable IsaAcpiPs2Keyboard device.<BR>
+ # @Prompt Enable IsaAcpiPs2Keyboard device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005
- ## This PCD specifies whether we need enable IsaAcpiPs2Mouse device.
+ ## Indicates if we need enable IsaAcpiPs2Mouse device.<BR><BR>
+ # TRUE - Enables IsaAcpiPs2Mouse device.<BR>
+ # FALSE - Doesn't enable IsaAcpiPs2Mouse device.<BR>
+ # @Prompt Enable IsaAcpiPs2Mouse device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006
- ## This PCD specifies whether we need enable IsaAcpiFloppyA device.
+ ## Indicates if we need enable IsaAcpiFloppyA device.<BR><BR>
+ # TRUE - Enables IsaAcpiFloppyA device.<BR>
+ # FALSE - Doesn't enable IsaAcpiFloppyA device.<BR>
+ # @Prompt Enable IsaAcpiFloppyA device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007
- ## This PCD specifies whether we need enable IsaAcpiFloppyB device.
+ ## Indicates if we need enable IsaAcpiFloppyB device.<BR><BR>
+ # TRUE - Enables IsaAcpiFloppyB device.<BR>
+ # FALSE - Doesn't enable IsaAcpiFloppyB device.<BR>
+ # @Prompt Enable IsaAcpiFloppyB device.
gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008
## This PCD specifies the base address of the HPET timer.
+ # @Prompt HPET base address.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
+ # @Prompt HPET local APIC vector.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
# The default value of 100000 100 ns units is the same as 10 ms.
+ # @Prompt Default period of HPET timer.
gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
- ## This PCD specifies the base address of the HPET timer.
+ ## This PCD specifies the base address of the IO APIC.
+ # @Prompt IO APIC base address.
gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
[PcdsFixedAtBuild, PcdsPatchableInModule]
@@ -127,3 +154,6 @@ ## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
# @Prompt Offset to 32-bit Timer register in ACPI BAR
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
+
+[UserExtensions.TianoCore."ExtraFiles"]
+ PcAtChipsetPkgExtra.uni
\ No newline at end of file |