diff options
| author | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-11-25 01:59:50 +0000 |
|---|---|---|
| committer | rsun3 <rsun3@6f19259b-4bc3-4df7-8a09-765794883524> | 2011-11-25 01:59:50 +0000 |
| commit | 9ff904b04652a3a0b0a64847f22ff3b9ee1317f5 (patch) | |
| tree | bdbfe1290c6618ff0e662f8bbaff0683cd073188 /PcAtChipsetPkg | |
| parent | 795bb9b6c4ee03833496a263fbe60c1fe7b215ad (diff) | |
| download | edk2-platforms-9ff904b04652a3a0b0a64847f22ff3b9ee1317f5.tar.xz | |
PcAtChipsetPkg HPET Timer DXE Driver: Update CPU Arch Protocol.SetTimerPeriod() to program HPET/IOAPIC register with APIC ID of current BSP in case the BSP has been switched.
Signed-off-by: rsun3
Reviewed-by: li-elvin
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12778 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'PcAtChipsetPkg')
| -rw-r--r-- | PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c index 4f165bdc52..b9bf080c74 100644 --- a/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c +++ b/PcAtChipsetPkg/HpetTimerDxe/HpetTimer.c @@ -492,9 +492,10 @@ TimerDriverSetTimerPeriod ( IN UINT64 TimerPeriod
)
{
- UINT64 MainCounter;
- UINT64 Delta;
- UINT64 CurrentComparator;
+ UINT64 MainCounter;
+ UINT64 Delta;
+ UINT64 CurrentComparator;
+ HPET_TIMER_MSI_ROUTE_REGISTER HpetTimerMsiRoute;
//
// Disable HPET timer when adjusting the timer period
@@ -577,14 +578,22 @@ TimerDriverSetTimerPeriod ( //
if (mTimerConfiguration.Bits.MsiInterruptCapablity != 0 && FeaturePcdGet (PcdHpetMsiEnable)) {
//
+ // Program MSI Address and MSI Data values in the selected HPET Timer
+ // Program HPET register with APIC ID of current BSP in case BSP has been switched
+ //
+ HpetTimerMsiRoute.Bits.Address = GetApicMsiAddress ();
+ HpetTimerMsiRoute.Bits.Value = (UINT32)GetApicMsiValue (PcdGet8 (PcdHpetLocalApicVector), LOCAL_APIC_DELIVERY_MODE_LOWEST_PRIORITY, FALSE, FALSE);
+ HpetWrite (HPET_TIMER_MSI_ROUTE_OFFSET + mTimerIndex * HPET_TIMER_STRIDE, HpetTimerMsiRoute.Uint64);
+ //
// Enable HPET MSI Interrupt
//
mTimerConfiguration.Bits.MsiInterruptEnable = 1;
} else {
//
// Enable timer interrupt through I/O APIC
+ // Program IOAPIC register with APIC ID of current BSP in case BSP has been switched
//
- IoApicEnableInterrupt (mTimerIrq, TRUE);
+ IoApicConfigureInterrupt (mTimerIrq, PcdGet8 (PcdHpetLocalApicVector), IO_APIC_DELIVERY_MODE_LOWEST_PRIORITY, TRUE, FALSE);
}
//
|