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authorli-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524>2012-10-31 08:58:27 +0000
committerli-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524>2012-10-31 08:58:27 +0000
commit4fde0f15aae4489bd3973fb4698e6333c98c2b06 (patch)
tree8601099761929306cb72e611f9e6f2c902ca288c /PcAtChipsetPkg
parent25bc83266653189715ad789eaad0d6264e5c3481 (diff)
downloadedk2-platforms-4fde0f15aae4489bd3973fb4698e6333c98c2b06.tar.xz
Raise TPL to high to disable CPU interrupt before 8259 legacy base vector is changed, then restore TPL level at last when 8259 initialization is done.
Signed-off-by: Li Elvin <elvin.li@intel.com> Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13901 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'PcAtChipsetPkg')
-rw-r--r--PcAtChipsetPkg/8259InterruptControllerDxe/8259.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c b/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
index 447106afe9..e73a1007a2 100644
--- a/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
+++ b/PcAtChipsetPkg/8259InterruptControllerDxe/8259.c
@@ -123,8 +123,10 @@ Interrupt8259SetVectorBase (
IN UINT8 SlaveBase
)
{
- UINT8 Mask;
+ UINT8 Mask;
+ EFI_TPL OriginalTpl;
+ OriginalTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);
//
// Set vector base for slave PIC
//
@@ -211,6 +213,8 @@ Interrupt8259SetVectorBase (
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_SLAVE, LEGACY_8259_EOI);
IoWrite8 (LEGACY_8259_CONTROL_REGISTER_MASTER, LEGACY_8259_EOI);
+
+ gBS->RestoreTPL (OriginalTpl);
return EFI_SUCCESS;
}