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authorSami Mujawar <sami.mujawar@arm.com>2017-06-29 16:23:26 +0100
committerLeif Lindholm <leif.lindholm@linaro.org>2018-03-21 03:02:53 +0000
commit131f56566deab2290daf47ea7afc2573a3e12952 (patch)
tree4bd74fb163ce71eb85900f5ea67620b759136730 /Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
parent345b8b2992568a73793354a577d15adad1ebc773 (diff)
downloadedk2-platforms-131f56566deab2290daf47ea7afc2573a3e12952.tar.xz
Platform/ARM: Dynamic Tables support for Juno
The dynamic tables framework utilizes the configuration manager protocol to get the platform specific information required for building the firmware tables. The configuration manager is a platform specific component that collates the platform hardware information and builds an abstract platform configuration repository. The configuration manager also implements the configuration manager protocol which returns the hardware information requested by the table generators. This patch implements the configuration manager support for the Juno platform. The dynamic tables framework support is configurable and can be enabled using the DYNAMIC_TABLES_FRAMEWORK build option. When DYNAMIC_TABLES_FRAMEWORK is defined, ACPI tables are generated and installed by the dynamic table framework. Therefore installation of ACPI tables from the Firmware Volume (FV) is disabled by this option. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Sami Mujawar <sami.mujawar@arm.com> Reviewed-by: Evan Lloyd <evan.lloyd@arm.com>
Diffstat (limited to 'Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h')
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diff --git a/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h b/Platform/ARM/JunoPkg/ConfigurationManager/ConfigurationManagerDxe/ConfigurationManager.h
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+/** @file
+
+ Copyright (c) 2017 - 2018, ARM Limited. All rights reserved.
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+ @par Glossary:
+ - Cm or CM - Configuration Manager
+ - Obj or OBJ - Object
+**/
+
+#ifndef CONFIGURATION_MANAGER_H__
+#define CONFIGURATION_MANAGER_H__
+
+/** The configuration manager version
+*/
+#define CONFIGURATION_MANAGER_REVISION CREATE_REVISION (1, 0)
+
+/** The OEM ID
+*/
+#define CFG_MGR_OEM_ID { 'A', 'R', 'M', 'L', 'T', 'D' }
+
+/** A helper macro for populating the GIC CPU information
+*/
+#define GICC_ENTRY( \
+ CPUInterfaceNumber, \
+ Mpidr, \
+ PmuIrq, \
+ VGicIrq, \
+ EnergyEfficiency \
+ ) { \
+ CPUInterfaceNumber, /* UINT32 CPUInterfaceNumber */ \
+ CPUInterfaceNumber, /* UINT32 AcpiProcessorUid */ \
+ EFI_ACPI_6_2_GIC_ENABLED, /* UINT32 Flags */ \
+ 0, /* UINT32 ParkingProtocolVersion */ \
+ PmuIrq, /* UINT32 PerformanceInterruptGsiv */ \
+ 0, /* UINT64 ParkedAddress */ \
+ FixedPcdGet64 ( \
+ PcdGicInterruptInterfaceBase \
+ ), /* UINT64 PhysicalBaseAddress */ \
+ 0, /* UINT64 GICV */ \
+ 0, /* UINT64 GICH */ \
+ VGicIrq, /* UINT32 VGICMaintenanceInterrupt */ \
+ 0, /* UINT64 GICRBaseAddress */ \
+ Mpidr, /* UINT64 MPIDR */ \
+ EnergyEfficiency /* UINT8 ProcessorPowerEfficiencyClass*/ \
+ }
+
+/** A helper macro for returning configuration manager objects
+*/
+#define HANDLE_CM_OBJECT(CmObjectId, Object) \
+ case CmObjectId: { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ break; \
+ }
+
+/** A helper macro for returning configuration manager objects
+ referenced by token
+*/
+#define HANDLE_CM_OBJECT_REF_BY_TOKEN( \
+ CmObjectId, \
+ Object, \
+ Token, \
+ HandlerProc \
+ ) \
+ case CmObjectId: { \
+ if (Token == CM_NULL_TOKEN) { \
+ CmObject->Size = sizeof (Object); \
+ CmObject->Data = (VOID*)&Object; \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Ptr = 0x%p, Size = %d\n", \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } else { \
+ Status = HandlerProc (This, CmObjectId, Token, CmObject); \
+ DEBUG (( \
+ DEBUG_INFO, \
+ #CmObjectId ": Token = 0x%p, Ptr = 0x%p, Size = %d\n", \
+ (VOID*)Token, \
+ CmObject->Data, \
+ CmObject->Size \
+ )); \
+ } \
+ break; \
+ }
+
+/** The number of CPUs
+*/
+#define PLAT_CPU_COUNT 6
+
+/** The number of ACPI tables to install
+*/
+#define PLAT_ACPI_TABLE_COUNT 10
+
+/** A structure describing the platform configuration
+ manager repository information
+*/
+typedef struct PlatformRepositoryInfo {
+ /// Configuration Manager Information
+ CM_STD_OBJ_CONFIGURATION_MANAGER_INFO CmInfo;
+
+ /// List of ACPI tables
+ CM_STD_OBJ_ACPI_TABLE_INFO CmAcpiTableList[PLAT_ACPI_TABLE_COUNT];
+
+ /// Boot architecture information
+ CM_ARM_BOOT_ARCH_INFO BootArchInfo;
+
+ /// Power management profile information
+ CM_ARM_POWER_MANAGEMENT_PROFILE_INFO PmProfileInfo;
+
+ /// GIC CPU interface information
+ CM_ARM_GICC_INFO GicCInfo[PLAT_CPU_COUNT];
+
+ /// GIC distributor information
+ CM_ARM_GICD_INFO GicDInfo;
+
+ /// Generic timer information
+ CM_ARM_GENERIC_TIMER_INFO GenericTimerInfo;
+
+ /// Watchdog information
+ CM_ARM_GENERIC_WATCHDOG_INFO Watchdog;
+
+ /** Serial port information for the
+ serial port console redirection port
+ */
+ CM_ARM_SERIAL_PORT_INFO SpcrSerialPort;
+
+ /// Serial port information for the DBG2 UART port
+ CM_ARM_SERIAL_PORT_INFO DbgSerialPort;
+
+ /// PCI configuration space information
+ CM_ARM_PCI_CONFIG_SPACE_INFO PciConfigInfo;
+
+ /// GIC MSI Frame information
+ CM_ARM_GIC_MSI_FRAME_INFO GicMsiFrameInfo;
+
+ /// Juno Board Revision
+ UINT32 JunoRevision;
+} EFI_PLATFORM_REPOSITORY_INFO;
+
+#endif // CONFIGURATION_MANAGER_H__