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author | Guo Mang <mang.guo@intel.com> | 2017-10-13 15:11:12 +0800 |
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committer | Guo Mang <mang.guo@intel.com> | 2017-10-13 15:48:01 +0800 |
commit | 3c55b98e6332700d38702021c24c5b9172f67005 (patch) | |
tree | c428390e3ba2498d7d7356a564aa5ab0de2d2b6c /Platform/BroxtonPlatformPkg/BuildBios.sh | |
parent | 20bb447348b96797d90e7206635db91c9ba72d1e (diff) | |
download | edk2-platforms-3c55b98e6332700d38702021c24c5b9172f67005.tar.xz |
Change FSP file name
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/BuildBios.sh')
-rw-r--r-- | Platform/BroxtonPlatformPkg/BuildBios.sh | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Platform/BroxtonPlatformPkg/BuildBios.sh b/Platform/BroxtonPlatformPkg/BuildBios.sh index 91f84a1e36..5d9a023321 100644 --- a/Platform/BroxtonPlatformPkg/BuildBios.sh +++ b/Platform/BroxtonPlatformPkg/BuildBios.sh @@ -255,8 +255,8 @@ build $Build_Flags # # 0xFEF7A000 = gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase = $(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE) pushd $WORKSPACE/Silicon/BroxtonSoC/BroxtonFspPkg/ApolloLakeFspBinPkg/FspBin -python $WORKSPACE/Core/IntelFsp2Pkg/Tools/SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF7A000 -o ./ -n FSP.fd -python $WORKSPACE/Core/IntelFsp2Pkg/Tools/SplitFspBin.py split -f FSP.fd -o ./ -n FSP.Fv +python $WORKSPACE/Core/IntelFsp2Pkg/Tools/SplitFspBin.py rebase -f Fsp.fd -c m -b 0xFEF7A000 -o ./ -n ApolloLakeFsp.fd +python $WORKSPACE/Core/IntelFsp2Pkg/Tools/SplitFspBin.py split -f ApolloLakeFsp.fd -o ./ -n FSP.Fv popd cp -f $WORKSPACE/Silicon/BroxtonSoC/BroxtonFspPkg/ApolloLakeFspBinPkg/FspBin/FSP_T.Fv $WORKSPACE/Platform/BroxtonPlatformPkg/Common/Tools/Stitch cp -f $WORKSPACE/Silicon/BroxtonSoC/BroxtonFspPkg/ApolloLakeFspBinPkg/FspBin/FSP_M.Fv $WORKSPACE/Platform/BroxtonPlatformPkg/Common/Tools/Stitch |