diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-23 13:59:16 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-05-09 13:03:01 +0800 |
| commit | a5e6159b1a517189a090bb26dcbed48d6ca2a518 (patch) | |
| tree | 7f9dd246df5a6fa22b4cae728ba4ba51b5facdb7 /Platform/BroxtonPlatformPkg/Common/Console | |
| parent | 3ba6a2d18142f80963c1ab9ec27617ba04b04b3f (diff) | |
| download | edk2-platforms-a5e6159b1a517189a090bb26dcbed48d6ca2a518.tar.xz | |
BroxtonPlatformPkg: Add MonoStatusCode
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Common/Console')
8 files changed, 1431 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/EfiStatusCode.h b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/EfiStatusCode.h new file mode 100644 index 0000000000..9dbb0f2064 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/EfiStatusCode.h @@ -0,0 +1,167 @@ +/** @file
+ Status Code Definitions, according to Intel Platform Innovation Framework
+ for EFI Status Codes Specification
+ Revision 0.92
+
+ The file is divided into sections for ease of use.
+
+ Section: Contents:
+ 1 General Status Code Definitions
+ 2 Class definitions
+ 3 Computing Unit Subclasses, Progress and Error Codes
+ 4 Peripheral Subclasses, Progress and Error Codes.
+ 5 IO Bus Subclasses, Progress and Error Codes.
+ 6 Software Subclasses, Progress and Error Codes.
+ 7 Debug Codes
+
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _EFI_STATUS_CODE_H_
+#define _EFI_STATUS_CODE_H_
+
+#define EFI_SW_PEIM_EC_NO_RECOVERY_CAPSULE (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_EC_INVALID_CAPSULE_DESCRIPTOR (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+
+#define EFI_SW_PEIM_PC_RECOVERY_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_SW_PEIM_PC_CAPSULE_LOAD (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_SW_PEIM_PC_CAPSULE_START (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_SW_PEIM_PC_RECOVERY_USER (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_SW_PEIM_PC_RECOVERY_AUTO (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+
+#define EFI_CU_MEMORY_PC_SPD_READ (EFI_SUBCLASS_SPECIFIC | 0x00000000)
+#define EFI_CU_MEMORY_PC_PRESENCE_DETECT (EFI_SUBCLASS_SPECIFIC | 0x00000001)
+#define EFI_CU_MEMORY_PC_TIMING (EFI_SUBCLASS_SPECIFIC | 0x00000002)
+#define EFI_CU_MEMORY_PC_CONFIGURING (EFI_SUBCLASS_SPECIFIC | 0x00000003)
+#define EFI_CU_MEMORY_PC_OPTIMIZING (EFI_SUBCLASS_SPECIFIC | 0x00000004)
+#define EFI_CU_MEMORY_PC_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000005)
+#define EFI_CU_MEMORY_PC_TEST (EFI_SUBCLASS_SPECIFIC | 0x00000006)
+#define EFI_CU_MEMORY_PC_COMPLETE (EFI_SUBCLASS_SPECIFIC | 0x00000007)
+#define EFI_CU_MEMORY_PC_INIT_BEGIN (EFI_SUBCLASS_SPECIFIC | 0x00000008)
+
+#define EFI_DC_UNSPECIFIED 0x0
+
+//
+// CPU PEI
+//
+#define EFI_CU_HP_PC_PEI_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000010)
+#define EFI_CU_HP_PC_PEI_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000011)
+#define EFI_CU_HP_PC_PEI_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000012)
+#define EFI_CU_HP_PC_PEI_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000013)
+#define EFI_CU_HP_PC_PEI_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000014)
+#define EFI_CU_HP_PC_PEI_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000015)
+#define EFI_CU_HP_PC_PEI_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000016)
+#define EFI_CU_HP_PC_PEI_STEP7 (EFI_SUBCLASS_SPECIFIC | 0x00000017)
+#define EFI_CU_HP_PC_PEI_STEP8 (EFI_SUBCLASS_SPECIFIC | 0x00000018)
+#define EFI_CU_HP_PC_PEI_STEP9 (EFI_SUBCLASS_SPECIFIC | 0x00000019)
+#define EFI_CU_HP_PC_PEI_STEP10 (EFI_SUBCLASS_SPECIFIC | 0x0000001A)
+#define EFI_CU_HP_PC_PEI_STEP11 (EFI_SUBCLASS_SPECIFIC | 0x0000001B)
+#define EFI_CU_HP_PC_PEI_STEP12 (EFI_SUBCLASS_SPECIFIC | 0x0000001C)
+#define EFI_CU_HP_PC_PEI_STEP13 (EFI_SUBCLASS_SPECIFIC | 0x0000001D)
+#define EFI_CU_HP_PC_PEI_STEP14 (EFI_SUBCLASS_SPECIFIC | 0x0000001E)
+#define EFI_CU_HP_PC_PEI_END (EFI_SUBCLASS_SPECIFIC | 0x0000001F)
+
+//
+// CPU DXE
+//
+#define EFI_CU_HP_PC_DXE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000020)
+#define EFI_CU_HP_PC_DXE_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000021)
+#define EFI_CU_HP_PC_DXE_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000022)
+#define EFI_CU_HP_PC_DXE_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000023)
+#define EFI_CU_HP_PC_DXE_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000024)
+#define EFI_CU_HP_PC_DXE_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000025)
+#define EFI_CU_HP_PC_DXE_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000026)
+#define EFI_CU_HP_PC_DXE_STEP7 (EFI_SUBCLASS_SPECIFIC | 0x00000027)
+#define EFI_CU_HP_PC_DXE_STEP8 (EFI_SUBCLASS_SPECIFIC | 0x00000028)
+#define EFI_CU_HP_PC_DXE_STEP9 (EFI_SUBCLASS_SPECIFIC | 0x00000029)
+#define EFI_CU_HP_PC_DXE_STEP10 (EFI_SUBCLASS_SPECIFIC | 0x0000002A)
+#define EFI_CU_HP_PC_DXE_STEP11 (EFI_SUBCLASS_SPECIFIC | 0x0000002B)
+#define EFI_CU_HP_PC_DXE_STEP12 (EFI_SUBCLASS_SPECIFIC | 0x0000002C)
+#define EFI_CU_HP_PC_DXE_STEP13 (EFI_SUBCLASS_SPECIFIC | 0x0000002D)
+#define EFI_CU_HP_PC_DXE_STEP14 (EFI_SUBCLASS_SPECIFIC | 0x0000002E)
+#define EFI_CU_HP_PC_DXE_END (EFI_SUBCLASS_SPECIFIC | 0x0000002F)
+
+//
+// CPU SMM PEI
+//
+#define EFI_CU_HP_PC_SMM_PEI_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000030)
+#define EFI_CU_HP_PC_SMM_PEI_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000031)
+#define EFI_CU_HP_PC_SMM_PEI_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000032)
+#define EFI_CU_HP_PC_SMM_PEI_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000033)
+#define EFI_CU_HP_PC_SMM_PEI_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000034)
+#define EFI_CU_HP_PC_SMM_PEI_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000035)
+#define EFI_CU_HP_PC_SMM_PEI_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000036)
+#define EFI_CU_HP_PC_SMM_PEI_END (EFI_SUBCLASS_SPECIFIC | 0x0000003F)
+
+//
+// CPU SMM DXE
+//
+#define EFI_CU_HP_PC_SMM_DXE_INIT (EFI_SUBCLASS_SPECIFIC | 0x00000040)
+#define EFI_CU_HP_PC_SMM_DXE_STEP1 (EFI_SUBCLASS_SPECIFIC | 0x00000041)
+#define EFI_CU_HP_PC_SMM_DXE_STEP2 (EFI_SUBCLASS_SPECIFIC | 0x00000042)
+#define EFI_CU_HP_PC_SMM_DXE_STEP3 (EFI_SUBCLASS_SPECIFIC | 0x00000043)
+#define EFI_CU_HP_PC_SMM_DXE_STEP4 (EFI_SUBCLASS_SPECIFIC | 0x00000044)
+#define EFI_CU_HP_PC_SMM_DXE_STEP5 (EFI_SUBCLASS_SPECIFIC | 0x00000045)
+#define EFI_CU_HP_PC_SMM_DXE_STEP6 (EFI_SUBCLASS_SPECIFIC | 0x00000046)
+#define EFI_CU_HP_PC_SMM_DXE_END (EFI_SUBCLASS_SPECIFIC | 0x0000004F)
+
+//
+// PEI before memory initialization
+//
+#define EFI_CU_PLATFORM_PEI_INIT (EFI_OEM_SPECIFIC | 0x00000001)
+#define EFI_CU_PLATFORM_PEI_STEP1 (EFI_OEM_SPECIFIC | 0x00000002)
+#define EFI_CU_PLATFORM_PEI_STEP2 (EFI_OEM_SPECIFIC | 0x00000003)
+#define EFI_CU_PLATFORM_PEI_STEP3 (EFI_OEM_SPECIFIC | 0x00000004)
+#define EFI_CU_PLATFORM_PEI_STEP4 (EFI_OEM_SPECIFIC | 0x00000005)
+#define EFI_CU_SMBUS_PEI_INIT (EFI_OEM_SPECIFIC | 0x00000006)
+#define EFI_CU_SMBUS_PEI_EXEC_ENTRY (EFI_OEM_SPECIFIC | 0x00000007)
+#define EFI_CU_SMBUS_PEI_EXEC_EXIT (EFI_OEM_SPECIFIC | 0x00000008)
+#define EFI_CU_CLOCK_PEI_INIT_ENTRY (EFI_OEM_SPECIFIC | 0x00000009)
+#define EFI_CU_CLOCK_PEI_INIT_EXIT (EFI_OEM_SPECIFIC | 0x0000000A)
+#define EFI_CU_MEMORY_PC_PROG_MTRR (EFI_OEM_SPECIFIC | 0x0000000B)
+#define EFI_CU_MEMORY_PC_PROG_MTRR_END (EFI_OEM_SPECIFIC | 0x0000000C)
+#define EFI_CU_PLATFORM_PEI_STEP12 (EFI_OEM_SPECIFIC | 0x0000000D)
+#define EFI_CU_PLATFORM_PEI_STEP13 (EFI_OEM_SPECIFIC | 0x0000000E)
+#define EFI_CU_PLATFORM_PEI_END (EFI_OEM_SPECIFIC | 0x0000000F)
+
+#define EFI_CU_PLATFORM_DXE_INIT (EFI_OEM_SPECIFIC | 0x00000011)
+#define EFI_CU_PLATFORM_DXE_STEP1 (EFI_OEM_SPECIFIC | 0x00000012)
+#define EFI_CU_PLATFORM_DXE_STEP2 (EFI_OEM_SPECIFIC | 0x00000013)
+#define EFI_CU_PLATFORM_DXE_STEP3 (EFI_OEM_SPECIFIC | 0x00000014)
+#define EFI_CU_PLATFORM_DXE_STEP4 (EFI_OEM_SPECIFIC | 0x00000015)
+#define EFI_CU_PLATFORM_DXE_INIT_DONE (EFI_OEM_SPECIFIC | 0x00000016)
+
+#define EFI_CU_OVERCLOCK_PEI_INIT_ENTRY (EFI_OEM_SPECIFIC | 0x00000017)
+#define EFI_CU_OVERCLOCK_PEI_INIT_EXIT (EFI_OEM_SPECIFIC | 0x00000018)
+
+//
+// BDS
+//
+#define EFI_CU_BDS_INIT (EFI_OEM_SPECIFIC | 0x00000060)
+#define EFI_CU_BDS_STEP1 (EFI_OEM_SPECIFIC | 0x00000061)
+#define EFI_CU_BDS_STEP2 (EFI_OEM_SPECIFIC | 0x00000062)
+#define EFI_CU_BDS_STEP3 (EFI_OEM_SPECIFIC | 0x00000063)
+#define EFI_CU_BDS_STEP4 (EFI_OEM_SPECIFIC | 0x00000064)
+#define EFI_CU_BDS_STEP5 (EFI_OEM_SPECIFIC | 0x00000065)
+#define EFI_CU_BDS_STEP6 (EFI_OEM_SPECIFIC | 0x00000066)
+#define EFI_CU_BDS_STEP7 (EFI_OEM_SPECIFIC | 0x00000067)
+#define EFI_CU_BDS_STEP8 (EFI_OEM_SPECIFIC | 0x00000068)
+#define EFI_CU_BDS_STEP9 (EFI_OEM_SPECIFIC | 0x00000069)
+#define EFI_CU_BDS_STEP10 (EFI_OEM_SPECIFIC | 0x0000006A)
+#define EFI_CU_BDS_STEP11 (EFI_OEM_SPECIFIC | 0x0000006B)
+#define EFI_CU_BDS_STEP12 (EFI_OEM_SPECIFIC | 0x0000006C)
+#define EFI_CU_BDS_STEP13 (EFI_OEM_SPECIFIC | 0x0000006D)
+#define EFI_CU_BDS_STEP14 (EFI_OEM_SPECIFIC | 0x0000006E)
+#define EFI_CU_BDS_END (EFI_OEM_SPECIFIC | 0x0000006F)
+
+#endif
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.c b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.c new file mode 100644 index 0000000000..5e8e705044 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.c @@ -0,0 +1,124 @@ +/** @file
+ PEIM to provide the status code functionality, to aid in system debug.
+ It includes output to 0x80 port and/or to serial port.
+ This PEIM is monolithic. Different platform should provide different library.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "MonoStatusCode.h"
+#include "PlatformStatusCode.h"
+
+//
+// Module globals
+//
+EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi = { PlatformReportStatusCode };
+
+EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode = {
+ (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
+ &gEfiPeiStatusCodePpiGuid,
+ &mStatusCodePpi
+};
+
+//
+// Function implementations
+//
+/**
+ Translate from a DXE status code interface into a PEI-callable
+ interface, making the PEI the least common denominator.
+
+**/
+EFI_STATUS
+EFIAPI
+TranslateDxeStatusCodeToPeiStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID *CallerId,
+ IN EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ return PlatformReportStatusCode (NULL, CodeType, Value, Instance, CallerId, Data);
+}
+
+
+/**
+ Build a HOB describing the status code listener that has been installed.
+ This will be used by DXE code until a runtime status code listener is
+ installed.
+
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS If the interface could be successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+InitializeDxeReportStatusCode (
+ IN const EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status = EFI_UNSUPPORTED;
+ VOID *Instance;
+ VOID *Result;
+
+ Instance = (VOID *) (UINTN) TranslateDxeStatusCodeToPeiStatusCode;
+
+ Result = BuildGuidDataHob (
+ &gEfiStatusCodeRuntimeProtocolGuid,
+ &Instance,
+ sizeof (VOID *)
+ );
+ if (Result != NULL) {
+ Status = EFI_SUCCESS;
+ }
+
+ return Status;
+}
+
+
+/**
+ Initialize the platform status codes and publish the platform status code
+ PPI.
+
+ @param[in] FfsHeader FV this PEIM was loaded from.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS
+
+**/
+VOID
+EFIAPI
+InitializeMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+
+ //
+ // Initialize status code listeners.
+ //
+ PlatformInitializeStatusCode (FfsHeader, PeiServices);
+
+ //
+ // Publish the status code capability to other modules
+ //
+ Status = (*PeiServices)->InstallPpi (PeiServices, &mPpiListStatusCode);
+
+ ASSERT_EFI_ERROR (Status);
+
+ DEBUG ((DEBUG_INFO, "\nMono Status Code PEIM Loaded\n"));
+
+ return ;
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.h b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.h new file mode 100644 index 0000000000..6dde9f06ed --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.h @@ -0,0 +1,95 @@ +/** @file
+ Monolithic single PEIM to provide the status code functionality.
+ The PEIM is a blend of libraries that correspond to the different status code
+ listeners that a platform installs.
+
+ Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _MONO_STATUS_CODE_H_
+#define _MONO_STATUS_CODE_H_
+
+//
+// Statements that include other files.
+//
+#include "PiPei.h"
+#include "Pi/PiBootMode.h"
+#include "Ppi/StatusCode.h"
+#include "Ppi/MemoryDiscovered.h"
+#include "Ppi/FvLoadFile.h"
+#include "Library/HobLib.h"
+#include "Library/DebugLib.h"
+#include "Library/IoLib.h"
+#include "Library/SerialPortLib.h"
+#include "Protocol/StatusCode.h"
+
+#ifndef _STATUS_CODE_ENABLER_H_
+#define _STATUS_CODE_ENABLER_H_
+
+#ifdef EFI_DEBUG
+
+#define EFI_STATUS_CODE_ENABLER_HOB_GUID \
+ { \
+ 0x5ffc6cf3, 0x71ad, 0x46f5, 0xbd, 0x8b, 0x7e, 0x8f, 0xfe, 0x19, 0x7, 0xd7 \
+ }
+
+extern EFI_GUID gEfiSerialStatusCodeEnablerHobGuid;
+
+typedef struct _EFI_STATUS_CODE_INFO {
+ BOOLEAN StatusCodeDisable;
+} EFI_STATUS_CODE_INFO;
+
+#endif
+#endif
+
+VOID
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ );
+
+EFI_STATUS
+EFIAPI
+PlatformReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+VOID
+EFIAPI
+InitializeMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN const EFI_PEI_SERVICES **PeiServices
+ );
+
+EFI_STATUS
+EFIAPI
+TranslateDxeStatusCodeToPeiStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN EFI_GUID * CallerId,
+ IN EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+EFI_STATUS
+EFIAPI
+InitializeDxeReportStatusCode (
+ IN const EFI_PEI_SERVICES **PeiServices
+ );
+
+#endif
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.inf b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.inf new file mode 100644 index 0000000000..47a7cb37a5 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/MonoStatusCode.inf @@ -0,0 +1,63 @@ +## @file
+# Component description file for Status Code PEI module.
+#
+# Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+[defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = MonoStatusCode
+ FILE_GUID = 4BB346D2-8076-4671-8BC9-7B95CBB9A6DF
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = MonoStatusCodeLib
+
+[sources.common]
+ MonoStatusCode.c
+ MonoStatusCode.h
+ PlatformStatusCode.c
+ PlatformStatusCode.h
+ PeiPostCode.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ BroxtonPlatformPkg/PlatformPkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+
+[LibraryClasses]
+ PeimEntryPoint
+ HobLib
+ DebugLib
+ SerialPortLib
+ ReportStatusCodeLib
+ PrintLib
+ BaseMemoryLib
+
+[Ppis]
+ gEfiPeiMemoryDiscoveredPpiGuid
+ gEfiPeiStatusCodePpiGuid
+ gEfiPeiFvFileLoaderPpiGuid
+ gEfiPeiReadOnlyVariable2PpiGuid
+ gEfiPeiReadOnlyVariablePpiGuid
+
+[Protocols]
+ gEfiStatusCodeRuntimeProtocolGuid
+
+[Guids]
+ gEfiPlatformCpuInfoGuid
+ gEfiHtBistHobGuid
+ gEfiStatusCodeDataTypeStringGuid ## CONSUMES
+
+[Depex]
+ TRUE
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PeiPostCode.c b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PeiPostCode.c new file mode 100644 index 0000000000..72c9de0f66 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PeiPostCode.c @@ -0,0 +1,177 @@ +/** @file
+ Worker functions for Pei PostCode.
+
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PlatformStatusCodesInternal.h"
+
+STATUS_CODE_TO_DATA_MAP mPostCodeProgressMap[] = {
+ //
+ // PEI
+ //
+ //Regular boot
+ //
+ { PEI_CORE_STARTED, 0x10 },
+ { PEI_CAR_CPU_INIT, 0x11 },
+ //
+ // reserved for CPU 0x12 - 0x14
+ //
+ { PEI_CAR_NB_INIT, 0x15 },
+ //
+ // reserved for NB 0x16 - 0x18
+ //
+ { PEI_CAR_SB_INIT, 0x19 },
+ //
+ // reserved for SB 0x1A - 0x1C
+ //
+ { PEI_MEMORY_SPD_READ, 0x1D },
+ { PEI_MEMORY_PRESENCE_DETECT, 0x1E },
+ { PEI_MEMORY_TIMING, 0x1F},
+ { PEI_MEMORY_CONFIGURING, 0x20 },
+ { PEI_MEMORY_INIT, 0x21 },
+ //
+ // reserved for OEM use: 0x22 - 0x2F
+ // reserved for AML use: 0x30
+ //
+ { PEI_MEMORY_INSTALLED, 0x31 },
+ { PEI_CPU_INIT, 0x32 },
+ { PEI_CPU_CACHE_INIT, 0x33 },
+ { PEI_CPU_BSP_SELECT, 0x34 },
+ { PEI_CPU_AP_INIT, 0x35 },
+ { PEI_CPU_SMM_INIT, 0x36 },
+ { PEI_MEM_NB_INIT, 0x37 },
+ //
+ // reserved for NB 0x38 - 0x3A
+ //
+ { PEI_MEM_SB_INIT, 0x3B },
+ //
+ // reserved for SB 0x3C - 0x3E
+ // reserved for OEM use: 0x3F - 0x4E
+ //
+ { PEI_DXE_IPL_STARTED, 0x4F },
+ //
+ //Recovery
+ //
+ { PEI_RECOVERY_AUTO, 0xF0 },
+ { PEI_RECOVERY_USER, 0xF1 },
+ { PEI_RECOVERY_STARTED, 0xF2 },
+ { PEI_RECOVERY_CAPSULE_FOUND, 0xF3 },
+ { PEI_RECOVERY_CAPSULE_LOADED, 0xF4 },
+ //
+ //S3
+ //
+ { PEI_S3_BOOT_SCRIPT, 0xE1 },
+ { PEI_S3_OS_WAKE, 0xE3 },
+
+ {0,0}
+};
+
+STATUS_CODE_TO_DATA_MAP mPostCodeErrorMap[] = {
+ //
+ // PEI
+ //
+ //Regular boot
+ //
+ { PEI_MEMORY_INVALID_TYPE, 0x50 },
+ { PEI_MEMORY_INVALID_SPEED, 0x50 },
+ { PEI_MEMORY_SPD_FAIL, 0x51 },
+ { PEI_MEMORY_INVALID_SIZE, 0x52 },
+ { PEI_MEMORY_MISMATCH, 0x52 },
+ { PEI_MEMORY_NOT_DETECTED, 0x53 },
+ { PEI_MEMORY_NONE_USEFUL, 0x53 },
+ { PEI_MEMORY_ERROR, 0x54 },
+ { PEI_MEMORY_NOT_INSTALLED, 0x55 },
+ { PEI_CPU_INVALID_TYPE, 0x56 },
+ { PEI_CPU_INVALID_SPEED, 0x56 },
+ { PEI_CPU_MISMATCH, 0x57 },
+ { PEI_CPU_SELF_TEST_FAILED, 0x58 },
+ { PEI_CPU_CACHE_ERROR, 0x58 },
+ { PEI_CPU_MICROCODE_UPDATE_FAILED, 0x59 },
+ { PEI_CPU_NO_MICROCODE, 0x59 },
+ { PEI_CPU_INTERNAL_ERROR, 0x5A },
+ { PEI_CPU_ERROR, 0x5A },
+ { PEI_RESET_NOT_AVAILABLE,0x5B },
+ //
+ //reserved for IBV use: 0x5C - 0x5F
+ //Recovery
+ //
+ { PEI_RECOVERY_PPI_NOT_FOUND, 0xF8 },
+ { PEI_RECOVERY_NO_CAPSULE, 0xF9 },
+ { PEI_RECOVERY_INVALID_CAPSULE, 0xFA },
+ //
+ //reserved for IBV use: 0xFB - 0xFF
+ //S3 Resume
+ //
+ { PEI_MEMORY_S3_RESUME_FAILED, 0xE8 },
+ { PEI_S3_RESUME_PPI_NOT_FOUND, 0xE9 },
+ { PEI_S3_BOOT_SCRIPT_ERROR, 0xEA },
+ { PEI_S3_OS_WAKE_ERROR, 0xEB },
+ //
+ //reserved for IBV use: 0xEC - 0xEF
+ //
+
+ {0,0}
+};
+
+STATUS_CODE_TO_DATA_MAP *mPostCodeStatusCodesMap[] = {
+ mPostCodeProgressMap,
+ mPostCodeErrorMap
+};
+
+UINT32
+FindPostCodeData (
+ IN STATUS_CODE_TO_DATA_MAP *Map,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ while (Map->Value != 0) {
+ if (Map->Value == Value) {
+ return Map->Data;
+ }
+ Map++;
+ }
+ return 0;
+}
+
+
+/**
+ Get PostCode from status code type and value.
+
+ @param[in] CodeType Indicates the type of status code being reported.
+ @param[in] Value Describes the current status of a hardware or
+ software entity. This includes information about the class and
+ subclass that is used to classify the entity as well as an operation.
+ For progress codes, the operation is the current activity.
+ For error codes, it is the exception.For debug codes,it is not defined at this time.
+
+ @return PostCode
+
+**/
+UINT32
+EFIAPI
+GetPostCodeFromStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value
+ )
+{
+ UINT32 CodeTypeIndex;
+
+ CodeTypeIndex = STATUS_CODE_TYPE (CodeType) - 1;
+
+ if (CodeTypeIndex >= sizeof (mPostCodeStatusCodesMap) / sizeof (mPostCodeStatusCodesMap[0])) {
+ return 0;
+ }
+
+ return FindPostCodeData (mPostCodeStatusCodesMap[CodeTypeIndex], Value);
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.c b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.c new file mode 100644 index 0000000000..277a884d78 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.c @@ -0,0 +1,340 @@ +/** @file
+ Contains Platform specific implementations required to use status codes.
+
+ Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PlatformStatusCode.h"
+#include <Library/PeiServicesLib.h>
+#include <Library/TimerLib.h>
+#include <Library/TraceHubDebugLib.h>
+
+typedef struct {
+ EFI_STATUS_CODE_DATA DataHeader;
+ EFI_HANDLE Handle;
+} PEIM_FILE_HANDLE_EXTENDED_DATA;
+
+extern BOOLEAN ImageInMemory;
+
+
+#define MmPciAddress( Segment, Bus, Device, Function, Register ) \
+ ( (UINTN)PCIEX_BASE_ADDRESS + \
+ (UINTN)(Bus << 20) + \
+ (UINTN)(Device << 15) + \
+ (UINTN)(Function << 12) + \
+ (UINTN)(Register) \
+ )
+
+/**
+ Get PostCode from status code type and value.
+
+ @param[in] CodeType Indicates the type of status code being reported.
+ @param[in] Value Describes the current status of a hardware or
+ software entity. This includes information about the class and
+ subclass that is used to classify the entity as well as an operation.
+ For progress codes, the operation is the current activity.
+ For error codes, it is the exception.For debug codes,it is not defined at this time.
+
+ @return PostCode
+
+**/
+UINT32
+EFIAPI
+GetPostCodeFromStatusCode (
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value
+ );
+
+EFI_STATUS
+EFIAPI
+Port80ReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ EFI_STATUS Status;
+ EFI_FV_FILE_INFO FvFileInfo;
+ UINT16 Port80Code = 0;
+
+ //
+ // Progress or error code, Output Port 80h card
+ //
+ Port80Code = (UINT16) GetPostCodeFromStatusCode (CodeType, Value);
+ if (Port80Code == 0) {
+ if ((Data != NULL) && (Value ==(EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN))) {
+ Status = PeiServicesFfsGetFileInfo (
+ ((PEIM_FILE_HANDLE_EXTENDED_DATA *) (Data + 1))->Handle,
+ &FvFileInfo
+ );
+ if (!EFI_ERROR (Status)) {
+ Port80Code = (FvFileInfo.FileName.Data4[6]<<8) + (FvFileInfo.FileName.Data4[7]);
+ }
+ }
+ }
+ if (Port80Code != 0){
+ IoWrite16 (0x80, (UINT16) Port80Code);
+ DEBUG ((EFI_D_INFO, "POSTCODE=<%04x>\n", Port80Code));
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+EFI_STATUS
+EFIAPI
+SerialReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ CHAR8 *Filename;
+ CHAR8 *Description;
+ CHAR8 *Format;
+ CHAR8 Buffer[EFI_STATUS_CODE_DATA_MAX_SIZE];
+ UINT32 ErrorLevel;
+ UINT32 LineNumber;
+ UINTN CharCount;
+ BASE_LIST Marker;
+
+ Buffer[0] = '\0';
+
+ if (Data != NULL &&
+ ReportStatusCodeExtractAssertInfo (CodeType, Value, Data, &Filename, &Description, &LineNumber)) {
+ //
+ // Print ASSERT() information into output buffer.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "\n\rPEI_ASSERT!: %a (%d): %a\n\r",
+ Filename,
+ LineNumber,
+ Description
+ );
+ } else if (Data != NULL &&
+ ReportStatusCodeExtractDebugInfo (Data, &ErrorLevel, &Marker, &Format)) {
+ //
+ // Print DEBUG() information into output buffer.
+ //
+ CharCount = AsciiBSPrint (
+ Buffer,
+ sizeof (Buffer),
+ Format,
+ Marker
+ );
+ } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_ERROR_CODE) {
+ //
+ // Print ERROR information into output buffer.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "ERROR: C%x:V%x I%x",
+ CodeType,
+ Value,
+ Instance
+ );
+
+ ASSERT(CharCount > 0);
+
+ if (CallerId != NULL) {
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ " %g",
+ CallerId
+ );
+ }
+
+ if (Data != NULL) {
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ " %x",
+ Data
+ );
+ }
+
+ CharCount += AsciiSPrint (
+ &Buffer[CharCount],
+ (sizeof (Buffer) - (sizeof (Buffer[0]) * CharCount)),
+ "\n\r"
+ );
+ } else if ((CodeType & EFI_STATUS_CODE_TYPE_MASK) == EFI_PROGRESS_CODE) {
+
+ //
+ // remove "PROGRESS CODE" outputs and always returns EFI_SUCCESS.
+ // This was done as hundreds of outputs were occuring but
+ // there was confusion over the meaning/value of them.
+ //
+ return EFI_SUCCESS;
+
+ } else if (Data != NULL &&
+ CompareGuid (&Data->Type, &gEfiStatusCodeDataTypeStringGuid) &&
+ ((EFI_STATUS_CODE_STRING_DATA *) Data)->StringType == EfiStringAscii) {
+ //
+ // EFI_STATUS_CODE_STRING_DATA
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "%a\n\r",
+ ((EFI_STATUS_CODE_STRING_DATA *) Data)->String.Ascii
+ );
+ } else {
+ //
+ // Code type is not defined.
+ //
+ CharCount = AsciiSPrint (
+ Buffer,
+ sizeof (Buffer),
+ "Undefined: C%x:V%x I%x\n\r",
+ CodeType,
+ Value,
+ Instance
+ );
+ }
+
+ //
+ // Call SerialPort Lib function to do print.
+ //
+ SerialPortWrite ((UINT8 *) Buffer, CharCount);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Call all status code listeners in the MonoStatusCode.
+
+ @param[in] PeiServices The PEI core services table.
+ @param[in] CodeType Type of Status Code.
+ @param[in] Value Value to output for Status Code.
+ @param[in] Instance Instance Number of this status code.
+ @param[in] CallerId ID of the caller of this status code.
+ @param[in] Data Optional data associated with this status code.
+
+ @retval EFI_SUCCESS If status code is successfully reported.
+ @retval EFI_NOT_AVAILABLE_YET If StatusCodePpi has not been installed.
+
+**/
+EFI_STATUS
+EFIAPI
+PlatformReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ )
+{
+ //
+ // If we are in debug mode, we will allow serial status codes
+ //
+ SerialReportStatusCode (PeiServices, CodeType, Value, Instance, CallerId, Data);
+
+ Port80ReportStatusCode (PeiServices, CodeType, Value, Instance, CallerId, Data);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Install the PEIM. Initialize listeners, publish the PPI and HOB for PEI and
+ DXE use respectively.
+
+ @param[in] FfsHeader FV this PEIM was loaded from.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval EFI_SUCCESS The function always returns success.
+
+**/
+EFI_STATUS
+EFIAPI
+InstallMonoStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_PEI_PPI_DESCRIPTOR *PeiPpiDescriptor;
+ EFI_STATUS Status = EFI_SUCCESS;
+
+ if (!ImageInMemory) {
+
+ //
+ // Initialize all listeners
+ //
+ InitializeMonoStatusCode (FfsHeader, PeiServices);
+
+ } else {
+
+ //
+ // locate the SEC platform information PPI
+ //
+ Status = (*PeiServices)->LocatePpi (
+ PeiServices,
+ &gEfiPeiStatusCodePpiGuid, // GUID
+ 0, // INSTANCE
+ &PeiPpiDescriptor, // EFI_PEI_PPI_DESCRIPTOR
+ NULL // PPI
+ );
+ if (Status == EFI_SUCCESS) {
+ //
+ // Reinstall the StatusCode PPI
+ //
+ Status = (**PeiServices).ReInstallPpi (
+ PeiServices,
+ PeiPpiDescriptor,
+ &mPpiListStatusCode
+ );
+ }
+ //
+ // Publish the listener in a HOB for DXE use.
+ //
+ InitializeDxeReportStatusCode (PeiServices);
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Initialize the Serial Port.
+
+ @param[in] FfsHeader FV this PEIM was loaded from.
+ @param[in] PeiServices General purpose services available to every PEIM.
+
+ @retval None
+
+**/
+VOID
+EFIAPI
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ )
+{
+ //
+ // Initialize additional debug status code listeners.
+ //
+ SerialPortInitialize ();
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.h b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.h new file mode 100644 index 0000000000..91936a1fe0 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCode.h @@ -0,0 +1,115 @@ +/** @file
+ Contains Platform specific implementations required to use status codes.
+
+ Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _PLATFORM_STATUS_CODE_H_
+#define _PLATFORM_STATUS_CODE_H_
+
+#define CONFIG_PORT0 0x4E
+#define INDEX_PORT0 0x4E
+#define DATA_PORT0 0x4F
+#define PCI_IDX 0xCF8
+#define PCI_DAT 0xCFC
+
+#include "MonoStatusCode.h"
+#include "PlatformBaseAddresses.h"
+
+#ifndef _PEI_PORT_80_STATUS_CODE_H_
+#define _PEI_PORT_80_STATUS_CODE_H_
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+Port80ReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+#endif
+
+#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_
+#define _PEI_SERIAL_STATUS_CODE_LIB_H_
+
+#include <Guid/StatusCodeDataTypeId.h>
+#include <Guid/StatusCodeDataTypeDebug.h>
+#include <Library/ReportStatusCodeLib.h>
+#include <Library/PrintLib.h>
+#include <Library/BaseMemoryLib.h>
+
+//
+// Initialization function
+//
+VOID
+SerialInitializeStatusCode (
+ VOID
+ );
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+SerialReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID *CallerId,
+ IN CONST EFI_STATUS_CODE_DATA *Data OPTIONAL
+ );
+
+#endif
+
+extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi;
+extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode;
+
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c')
+
+typedef struct {
+ UINT32 Signature;
+ EFI_FFS_FILE_HEADER *FfsHeader;
+ EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify;
+} STATUSCODE_CALLBACK_STATE_INFORMATION;
+
+#pragma pack(1)
+
+typedef struct {
+ UINT16 Limit;
+ UINT32 Base;
+} GDT_DSCRIPTOR;
+
+#pragma pack()
+
+#define STATUSCODE_PEIM_FROM_THIS(a) \
+ BASE_CR ( \
+ a, \
+ STATUSCODE_CALLBACK_STATE_INFORMATION, \
+ StatusCodeNotify \
+ )
+
+VOID
+EFIAPI
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ );
+
+#endif
+
diff --git a/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCodesInternal.h b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCodesInternal.h new file mode 100644 index 0000000000..86ab2c46ca --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Console/MonoStatusCode/PlatformStatusCodesInternal.h @@ -0,0 +1,350 @@ +/** @file
+ PostCode status code definition.
+
+ Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PLATFORM_STATUS_CODES_INTERNAL_H__
+#define __PLATFORM_STATUS_CODES_INTERNAL_H__
+
+#include <Pi/PiStatusCode.h>
+
+typedef struct{
+ EFI_STATUS_CODE_VALUE Value;
+ UINT32 Data;
+} STATUS_CODE_TO_DATA_MAP;
+
+//
+// Enable PEI/DXE status code
+//
+#define PEI_STATUS_CODE 1
+#define DXE_STATUS_CODE 1
+
+#define STATUS_CODE_TYPE(Type) ((Type)&EFI_STATUS_CODE_TYPE_MASK)
+#define STATUS_CODE_CLASS(Value) ((Value)&EFI_STATUS_CODE_CLASS_MASK)
+
+//
+//Progress/Error codes
+//
+#define PEI_CORE_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_PC_ENTRY_POINT)
+#define PEI_RESET_NOT_AVAILABLE (EFI_SOFTWARE_PEI_CORE | EFI_SW_PS_EC_RESET_NOT_AVAILABLE)
+#define PEI_DXEIPL_NOT_FOUND (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_EC_DXEIPL_NOT_FOUND)
+#define PEI_DXE_CORE_NOT_FOUND (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_EC_DXE_CORRUPT)
+#define PEI_S3_RESUME_ERROR (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
+#define PEI_RECOVERY_FAILED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_EC_RECOVERY_FAILED)
+#define DXE_CORE_STARTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_ENTRY_POINT)
+#define DXE_EXIT_BOOT_SERVICES_END (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
+
+//
+// Reported by CPU PEIM
+//
+#define PEI_CAR_CPU_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_POWER_ON_INIT)
+
+//
+// Reported by NB PEIM
+//
+#define PEI_CAR_NB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_CAR_NB_INIT)
+
+//
+// Reported by SB PEIM
+//
+#define PEI_CAR_SB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_CAR_SB_INIT)
+
+//
+//Reported by Memory Detection PEIM
+//
+#define PEI_MEMORY_SPD_READ (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_SPD_READ)
+#define PEI_MEMORY_PRESENCE_DETECT (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_PRESENCE_DETECT)
+#define PEI_MEMORY_TIMING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TIMING)
+#define PEI_MEMORY_CONFIGURING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_CONFIGURING)
+#define PEI_MEMORY_OPTIMIZING (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_OPTIMIZING)
+#define PEI_MEMORY_INIT (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_INIT)
+#define PEI_MEMORY_TEST (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_PC_TEST)
+#define PEI_MEMORY_INVALID_TYPE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_TYPE)
+#define PEI_MEMORY_INVALID_SPEED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SPEED)
+#define PEI_MEMORY_SPD_FAIL (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_SPD_FAIL)
+#define PEI_MEMORY_INVALID_SIZE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_INVALID_SIZE)
+#define PEI_MEMORY_MISMATCH (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_MISMATCH)
+#define PEI_MEMORY_S3_RESUME_FAILED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_S3_RESUME_FAIL)
+#define PEI_MEMORY_NOT_DETECTED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_DETECTED)
+#define PEI_MEMORY_NONE_USEFUL (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_NONE_USEFUL)
+#define PEI_MEMORY_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_EC_NON_SPECIFIC)
+#define PEI_MEMORY_INSTALLED (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_PC_INSTALL_PEI_MEMORY)
+#define PEI_MEMORY_NOT_INSTALLED (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PEI_CORE_EC_MEMORY_NOT_INSTALLED)
+#define PEI_MEMORY_INSTALLED_TWICE (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_EC_MEMORY_INSTALLED_TWICE)
+
+//
+//Reported by CPU PEIM
+//
+#define PEI_CPU_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_PC_INIT_BEGIN)
+#define PEI_CPU_CACHE_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_CACHE_INIT)
+#define PEI_CPU_BSP_SELECT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_BSP_SELECT)
+#define PEI_CPU_AP_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_AP_INIT)
+#define PEI_CPU_SMM_INIT (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_PC_SMM_INIT)
+#define PEI_CPU_INVALID_TYPE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_TYPE)
+#define PEI_CPU_INVALID_SPEED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INVALID_SPEED)
+#define PEI_CPU_MISMATCH (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MISMATCH)
+#define PEI_CPU_SELF_TEST_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+#define PEI_CPU_CACHE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CACHE)
+#define PEI_CPU_MICROCODE_UPDATE_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_MICROCODE_UPDATE)
+#define PEI_CPU_NO_MICROCODE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_NO_MICROCODE_UPDATE)
+
+//
+//If non of the errors above apply use this one
+//
+#define PEI_CPU_INTERNAL_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_INTERNAL)
+//
+//Generic CPU error. It should only be used if non of the errors above apply
+//
+#define PEI_CPU_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_EC_NON_SPECIFIC)
+
+//
+// Reported by NB PEIM
+//
+#define PEI_MEM_NB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_MEM_NB_INIT)
+
+//
+// Reported by SB PEIM
+//
+#define PEI_MEM_SB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_PEI_MEM_SB_INIT)
+
+//
+//Reported by PEIM which detected forced or auto recovery condition
+//
+#define PEI_RECOVERY_AUTO (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_AUTO)
+#define PEI_RECOVERY_USER (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_USER)
+
+//
+//Reported by DXE IPL
+//
+#define PEI_RECOVERY_PPI_NOT_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_RECOVERY_PPI_NOT_FOUND)
+#define PEI_S3_RESUME_PPI_NOT_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_PPI_NOT_FOUND)
+#define PEI_S3_RESUME_FAILED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_RESUME_FAILED)
+
+//
+//Reported by Recovery PEIM
+//
+#define PEI_RECOVERY_STARTED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_RECOVERY_BEGIN)
+#define PEI_RECOVERY_CAPSULE_FOUND (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_CAPSULE_LOAD)
+#define PEI_RECOVERY_NO_CAPSULE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_NO_RECOVERY_CAPSULE)
+#define PEI_RECOVERY_CAPSULE_LOADED (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_CAPSULE_START)
+#define PEI_RECOVERY_INVALID_CAPSULE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_INVALID_CAPSULE_DESCRIPTOR)
+
+//
+//Reported by S3 Resume PEIM
+//
+#define PEI_S3_BOOT_SCRIPT (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_S3_BOOT_SCRIPT)
+#define PEI_S3_OS_WAKE (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_PC_OS_WAKE)
+#define PEI_S3_BOOT_SCRIPT_ERROR (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_BOOT_SCRIPT_ERROR)
+#define PEI_S3_OS_WAKE_ERROR (EFI_SOFTWARE_PEI_MODULE | EFI_SW_PEI_EC_S3_OS_WAKE_ERROR)
+
+#define PEI_PEIM_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_BEGIN)
+#define PEI_PEIM_ENDED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PC_INIT_END)
+
+//
+//Reported by DXE IPL
+//
+#define PEI_DXE_IPL_STARTED (EFI_SOFTWARE_PEI_CORE | EFI_SW_PEI_CORE_PC_HANDOFF_TO_NEXT)
+
+//
+//Reported by PEIM which installs Reset PPI
+//
+#define PEI_RESET_SYSTEM (EFI_SOFTWARE_PEI_SERVICE | EFI_SW_PS_PC_RESET_SYSTEM)
+
+//
+//Reported by the PEIM or DXE driver which detected the error
+//
+#define GENERIC_MEMORY_CORRECTABLE_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_CORRECTABLE)
+#define GENERIC_MEMORY_UNCORRECTABLE_ERROR (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UNCORRECTABLE)
+
+//
+//Reported by Flash Update DXE driver
+//
+#define DXE_FLASH_UPDATE_FAILED (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_UPDATE_FAIL)
+
+//
+//Reported by the PEIM or DXE driver which detected the error
+//
+#define GENERIC_CPU_THERMAL_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_THERMAL)
+#define GENERIC_CPU_LOW_VOLTAGE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_LOW_VOLTAGE)
+#define GENERIC_CPU_HIGH_VOLTAGE (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_HIGH_VOLTAGE)
+#define GENERIC_CPU_CORRECTABLE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_CORRECTABLE)
+#define GENERIC_CPU_UNCORRECTABLE_ERROR (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_UNCORRECTABLE)
+#define GENERIC_BAD_DATE_TIME_ERROR (EFI_SOFTWARE_UNSPECIFIED | EFI_SW_EC_BAD_DATE_TIME)
+#define GENERIC_MEMORY_SIZE_DECREASE (EFI_COMPUTING_UNIT_MEMORY | EFI_CU_MEMORY_EC_MISMATCH)
+
+//
+//Reported by DXE Core
+//
+#define DXE_DRIVER_STARTED (EFI_SOFTWARE_EFI_DXE_SERVICE | EFI_SW_PC_INIT_BEGIN)
+#define DXE_DRIVER_ENED (EFI_SOFTWARE_DXE_CORE | EFI_SW_PC_INIT_END)
+#define DXE_ARCH_PROTOCOLS_AVAILABLE (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_ARCH_READY)
+#define DXE_DRIVER_CONNECTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_START_DRIVER)
+#define DXE_ARCH_PROTOCOL_NOT_AVAILABLE (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_EC_NO_ARCH)
+
+//
+//Reported by DXE CPU driver
+//
+#define DXE_CPU_SELF_TEST_FAILED (EFI_COMPUTING_UNIT_HOST_PROCESSOR | EFI_CU_HP_EC_SELF_TEST)
+
+//
+//Reported by PCI Host Bridge driver
+//
+#define DXE_NB_HB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_HB_INIT )
+
+//
+// Reported by NB Driver
+//
+#define DXE_NB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_NB_INIT )
+#define DXE_NB_SMM_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_NB_SMM_INIT )
+#define DXE_NB_ERROR (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_DXE_NB_ERROR )
+
+//
+// Reported by SB Driver(s)
+//
+#define DXE_SBRUN_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_RT_INIT )
+#define DXE_SB_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_INIT )
+#define DXE_SB_SMM_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_SMM_INIT )
+#define DXE_SB_DEVICES_INIT (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_PC_DXE_SB_DEVICES_INIT )
+#define DXE_SB_BAD_BATTERY (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_BAD_BATTERY)
+#define DXE_SB_ERROR (EFI_COMPUTING_UNIT_CHIPSET | EFI_CHIPSET_EC_DXE_SB_ERROR )
+
+//
+//Reported by DXE Core
+//
+#define DXE_BDS_STARTED (EFI_SOFTWARE_DXE_CORE | EFI_SW_DXE_CORE_PC_HANDOFF_TO_NEXT)
+
+//
+//Reported by BDS
+//
+//Reported by Boot Manager
+//
+#define DXE_READY_TO_BOOT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_READY_TO_BOOT_EVENT)
+
+//
+//Reported by DXE Core
+//
+#define DXE_EXIT_BOOT_SERVICES (EFI_SOFTWARE_EFI_BOOT_SERVICE | EFI_SW_BS_PC_EXIT_BOOT_SERVICES)
+#define DXE_EXIT_BOOT_SERVICES_EVENT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_EXIT_BOOT_SERVICES_EVENT)
+
+//
+//Reported by driver that installs Runtime AP
+//
+#define RT_SET_VIRTUAL_ADDRESS_MAP_BEGIN (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_SET_VIRTUAL_ADDRESS_MAP)
+#define RT_SET_VIRTUAL_ADDRESS_MAP_END (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_VIRTUAL_ADDRESS_CHANGE_EVENT)
+
+//
+//Reported by CSM
+//
+#define DXE_LEGACY_OPROM_INIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_OPROM_INIT)
+#define DXE_LEGACY_BOOT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_PC_LEGACY_BOOT_EVENT)
+#define DXE_LEGACY_OPROM_NO_SPACE (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_LEGACY_OPROM_NO_SPACE)
+
+//
+//Reported by SETUP
+//
+#define DXE_SETUP_START (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_USER_SETUP)
+#define DXE_SETUP_INPUT_WAIT (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_PC_INPUT_WAIT)
+#define DXE_INVALID_PASSWORD (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_INVALID_PASSWORD)
+#define DXE_INVALID_IDE_PASSWORD (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_INVALID_IDE_PASSWORD)
+#define DXE_BOOT_OPTION_LOAD_ERROR (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_BOOT_OPTION_LOAD_ERROR)
+#define DXE_BOOT_OPTION_FAILED (EFI_SOFTWARE_DXE_BS_DRIVER | EFI_SW_DXE_BS_EC_BOOT_OPTION_FAILED)
+
+//
+//Reported by a Driver that installs Reset AP
+//
+#define DXE_RESET_SYSTEM (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_RS_PC_RESET_SYSTEM)
+#define DXE_RESET_NOT_AVAILABLE (EFI_SOFTWARE_EFI_RUNTIME_SERVICE | EFI_SW_PS_EC_RESET_NOT_AVAILABLE)
+
+//
+// Reported by PCI bus driver
+//
+#define DXE_PCI_BUS_BEGIN (EFI_IO_BUS_PCI | EFI_IOB_PC_INIT)
+#define DXE_PCI_BUS_ENUM (EFI_IO_BUS_PCI | EFI_IOB_PCI_BUS_ENUM)
+#define DXE_PCI_BUS_HPC_INIT (EFI_IO_BUS_PCI | EFI_IOB_PCI_HPC_INIT)
+#define DXE_PCI_BUS_REQUEST_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_PCI_RES_ALLOC)
+#define DXE_PCI_BUS_ASSIGN_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_PC_ENABLE)
+#define DXE_PCI_BUS_HOTPLUG (EFI_IO_BUS_PCI | EFI_IOB_PC_HOTPLUG)
+#define DXE_PCI_BUS_OUT_OF_RESOURCES (EFI_IO_BUS_PCI | EFI_IOB_EC_RESOURCE_CONFLICT)
+
+//
+// Reported by USB bus driver
+//
+#define DXE_USB_BEGIN (EFI_IO_BUS_USB | EFI_IOB_PC_INIT)
+#define DXE_USB_RESET (EFI_IO_BUS_USB | EFI_IOB_PC_RESET)
+#define DXE_USB_DETECT (EFI_IO_BUS_USB | EFI_IOB_PC_DETECT)
+#define DXE_USB_ENABLE (EFI_IO_BUS_USB | EFI_IOB_PC_ENABLE)
+#define DXE_USB_HOTPLUG (EFI_IO_BUS_USB | EFI_IOB_PC_HOTPLUG)
+
+//
+//Reported by IDE bus driver
+//
+#define DXE_IDE_BEGIN (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_INIT)
+#define DXE_IDE_RESET (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_RESET)
+#define DXE_IDE_DETECT (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_DETECT)
+#define DXE_IDE_ENABLE (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_PC_ENABLE)
+#define DXE_IDE_SMART_ERROR (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
+#define DXE_IDE_CONTROLLER_ERROR (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_CONTROLLER_ERROR)
+#define DXE_IDE_DEVICE_FAILURE (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_EC_INTERFACE_ERROR)
+
+//
+// Reported by SCSI bus driver
+//
+#define DXE_SCSI_BEGIN (EFI_IO_BUS_SCSI | EFI_IOB_PC_INIT)
+#define DXE_SCSI_RESET (EFI_IO_BUS_SCSI | EFI_IOB_PC_RESET)
+#define DXE_SCSI_DETECT (EFI_IO_BUS_SCSI | EFI_IOB_PC_DETECT)
+#define DXE_SCSI_ENABLE (EFI_IO_BUS_SCSI | EFI_IOB_PC_ENABLE)
+
+//
+// Reported by Keyboard driver
+//
+#define DXE_KEYBOARD_INIT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_INIT)
+#define DXE_KEYBOARD_RESET (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_RESET)
+#define DXE_KEYBOARD_DISABLE (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_DISABLE)
+#define DXE_KEYBOARD_DETECT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_KEYBOARD_ENABLE (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_ENABLE)
+#define DXE_KEYBOARD_CLEAR_BUFFER (EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_CLEAR_BUFFER)
+#define DXE_KEYBOARD_SELF_TEST (EFI_PERIPHERAL_KEYBOARD | EFI_P_KEYBOARD_PC_SELF_TEST)
+
+//
+// Reported by Mouse driver
+//
+#define DXE_MOUSE_INIT (EFI_PERIPHERAL_MOUSE | EFI_P_PC_INIT)
+#define DXE_MOUSE_RESET (EFI_PERIPHERAL_MOUSE | EFI_P_PC_RESET)
+#define DXE_MOUSE_DISABLE (EFI_PERIPHERAL_MOUSE | EFI_P_PC_DISABLE)
+#define DXE_MOUSE_DETECT (EFI_PERIPHERAL_MOUSE | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_MOUSE_ENABLE (EFI_PERIPHERAL_MOUSE | EFI_P_PC_ENABLE)
+
+//
+// Reported by Mass Storage drivers
+//
+#define DXE_FIXED_MEDIA_INIT (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_INIT)
+#define DXE_FIXED_MEDIA_RESET (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_RESET)
+#define DXE_FIXED_MEDIA_DISABLE (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_DISABLE)
+#define DXE_FIXED_MEDIA_DETECT (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_FIXED_MEDIA_ENABLE (EFI_PERIPHERAL_FIXED_MEDIA | EFI_P_PC_ENABLE)
+#define DXE_REMOVABLE_MEDIA_INIT (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_INIT)
+#define DXE_REMOVABLE_MEDIA_RESET (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_RESET)
+#define DXE_REMOVABLE_MEDIA_DISABLE (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_DISABLE)
+#define DXE_REMOVABLE_MEDIA_DETECT (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_PRESENCE_DETECT)
+#define DXE_REMOVABLE_MEDIA_ENABLE (EFI_PERIPHERAL_REMOVABLE_MEDIA | EFI_P_PC_ENABLE)
+
+//
+// Reported by BDS
+//
+#define DXE_CON_OUT_CONNECT (EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_PC_INIT)
+#define DXE_CON_IN_CONNECT (EFI_PERIPHERAL_KEYBOARD | EFI_P_PC_INIT)
+#define DXE_NO_CON_OUT (EFI_PERIPHERAL_LOCAL_CONSOLE | EFI_P_EC_NOT_DETECTED)
+#define DXE_NO_CON_IN (EFI_PERIPHERAL_KEYBOARD | EFI_P_EC_NOT_DETECTED)
+
+#endif
+
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