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author | zwei4 <david.wei@intel.com> | 2017-05-26 11:13:42 +0800 |
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committer | zwei4 <david.wei@intel.com> | 2017-05-26 11:13:42 +0800 |
commit | 673afaa1174832eeab98ccfd89e7d1504aecc1f5 (patch) | |
tree | 2bdb88319c033b7427600d5336fa11fc9504dd9e /Platform/BroxtonPlatformPkg/Common/Library | |
parent | 22c9d0932dca0d0d959faf8399c8f220ba5ff7d2 (diff) | |
download | edk2-platforms-673afaa1174832eeab98ccfd89e7d1504aecc1f5.tar.xz |
GCC build support.
Change code which is not compatible with GCC.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Common/Library')
-rw-r--r-- | Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S index 03467674ba..8b0036751f 100644 --- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S +++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S @@ -207,6 +207,7 @@ ASM_PFX (PlatformInitialization): #
movl $0x121, %ecx
movl $(BIT16 + ACPI_BASE_ADDRESS + R_ACPI_PM1_TMR), %eax # Bit 16 is enable and 15:0 address
+ movl $0x2FBA2E25, %edx
wrmsr
#
|