Fix some GCC build errors.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>

10 files changed, 106 insertions, 89 deletions

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPolicyUpdate.c b/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPolicyUpdate.c
index 4fa42747ea..2b24a9a3b0 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPolicyUpdate.c
+++ b/Platform/BroxtonPlatformPkg/Common/Library/DxePolicyUpdateLib/DxeSaPolicyUpdate.c
@@ -1,7 +1,7 @@
 /** @file

   This file is the library for SA DXE Policy initialzation.

 

-  Copyright (c) 2004 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>

 

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -60,7 +60,7 @@ UpdateDxeSaPolicy (
   Status = gBS->LocateProtocol (

                   &gPlatformGOPPolicyGuid,

                   NULL,

-                  &GopPolicy

+                  (VOID **)&GopPolicy

                   );

 

   if (EFI_ERROR (Status) || (GopPolicy == NULL)) {

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c
index dbb2bc53d5..27c4dfc710 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PeiPolicyUpdateLib/PeiCpuPolicyUpdate.c
@@ -1,7 +1,7 @@
 /** @file

   This file is SampleCode of the library for Intel CPU PEI Policy Update initialization.

 

-  Copyright (c) 2009 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>

 

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -43,7 +43,6 @@ UpdatePeiCpuPolicy (
   CPU_CONFIG                  *CpuConfig;

   POWER_MGMT_CONFIG           *PowerMgmtConfig;

   EFI_PEI_HOB_POINTERS        Hob;

-  EFI_PLATFORM_INFO_HOB       *PlatformInfo;

 

   Status = GetConfigBlock ((CONFIG_BLOCK_TABLE_HEADER *) SiCpuPolicyPpi, &gCpuConfigGuid, (VOID *) &CpuConfig);

   ASSERT_EFI_ERROR (Status);

@@ -55,7 +54,6 @@ UpdatePeiCpuPolicy (
 

   Hob.Raw = GetFirstGuidHob (&gEfiPlatformInfoGuid);

   ASSERT (Hob.Raw != NULL);

-  PlatformInfo = GET_GUID_HOB_DATA (Hob.Raw);

 

   CpuConfig->ActiveProcessorCores        = SystemConfiguration->ActiveProcessorCores;

   CpuConfig->DisableCore1                = SystemConfiguration->Core1;

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.c b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.c
index 53a5ee7e2f..fa0f0212bc 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.c
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.c
@@ -1,7 +1,7 @@
 /** @file

   This file include all platform action which can be customized by IBV/OEM.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>

 

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -34,7 +34,7 @@
 

 extern EFI_GUID gUndiDriverImageGuid;

 

-EFI_GUID gUefiShellFileGuid = { 0x7C04A583, 0x9E3E, 0x4f1c, 0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 };

+EFI_GUID gUefiShellFileGuid = { 0x7C04A583, 0x9E3E, 0x4f1c, {0xAD, 0x65, 0xE0, 0x52, 0x68, 0xD0, 0xB4, 0xD1 }};

 

 EFI_USER_PROFILE_HANDLE                           mCurrentUser = NULL;

 EFI_EVENT                                         mHotKeyTimerEvent = NULL;

@@ -443,7 +443,7 @@ FastBootUpdateConInVarByConInBehavior (
   EfiCreateProtocolNotifyEvent (

     &gSetupEnterGuid,

     TPL_CALLBACK,

-    ConnectAllConsolesForSetupMenu,

+    (EFI_EVENT_NOTIFY)ConnectAllConsolesForSetupMenu,

     NULL,

     &SetupRegistration

     );

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.h b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.h
index 18c5f88779..55f237c6b4 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.h
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/BdsPlatform.h
@@ -1,7 +1,7 @@
 /** @file

   Header file for BDS Platform specific code.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>

 

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -71,16 +71,25 @@ extern EFI_DEVICE_PATH_PROTOCOL  *gSerialIoConnect[];
 #define SUBCLASS_BOOT       1

 #define PROTOCOL_KEYBOARD   1

 

+//

+// the short form device path for Usb keyboard

+//

+#define CLASS_HID           3

+#define SUBCLASS_BOOT       1

+#define PROTOCOL_KEYBOARD   1

+

 #define PCI_DEVICE_PATH_NODE(Func, Dev) \

   { \

-    HARDWARE_DEVICE_PATH, \

-    HW_PCI_DP, \

     { \

-      (UINT8) (sizeof (PCI_DEVICE_PATH)), \

-      (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \

-    }, \

-    (Func), \

-    (Dev) \

+      HARDWARE_DEVICE_PATH, \

+      HW_PCI_DP, \

+      { \

+        (UINT8) (sizeof (PCI_DEVICE_PATH)), \

+        (UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \

+      } \

+     }, \

+     (Func), \

+     (Dev) \

   }

 

 #define PNPID_DEVICE_PATH_NODE(PnpId) \

@@ -132,8 +141,10 @@ extern EFI_DEVICE_PATH_PROTOCOL  *gSerialIoConnect[];
     { \

       MESSAGING_DEVICE_PATH, \

       MSG_USB_CLASS_DP, \

-      (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)), \

-      (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8) \

+      {\

+        (UINT8) (sizeof (USB_CLASS_DEVICE_PATH)), \

+        (UINT8) ((sizeof (USB_CLASS_DEVICE_PATH)) >> 8) \

+      }\

     }, \

     0xffff, \

     0xffff, \

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformData.c b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformData.c
index 8f619da558..dd9808c0b6 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformData.c
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformBdsLib/PlatformData.c
@@ -2,7 +2,7 @@
   Defined the platform specific device path which will be used by

   platform Bbd to perform the platform policy connect.

 

-  Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>

+  Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>

 

   This program and the accompanying materials

   are licensed and made available under the terms and conditions of the BSD License

@@ -117,13 +117,17 @@ EFI_DEVICE_PATH_PROTOCOL* gPlatformAllPossiblePciVgaConsole [] = {
 //

 LEGACY_HD_DEVICE_PATH gLegacyHd = {

   {

-    BBS_DEVICE_PATH,

-    BBS_BBS_DP,

-    (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)),

-    (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8),

+    {

+      BBS_DEVICE_PATH,

+      BBS_BBS_DP,

+      {

+        (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)),

+        (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8)

+      }

+    },

     BBS_TYPE_HARDDRIVE,

     0,

-    0

+    {0}

   },

   gEndEntire

 };

@@ -133,13 +137,17 @@ LEGACY_HD_DEVICE_PATH gLegacyHd = {
 //

 LEGACY_HD_DEVICE_PATH gLegacyCdrom = {

   {

-    BBS_DEVICE_PATH,

-    BBS_BBS_DP,

-    (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)),

-    (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8),

+    {

+      BBS_DEVICE_PATH,

+      BBS_BBS_DP,

+      {

+        (UINT8) (sizeof (BBS_BBS_DEVICE_PATH)),

+        (UINT8) ((sizeof (BBS_BBS_DEVICE_PATH)) >> 8),

+       } 

+    },

     BBS_TYPE_CDROM,

     0,

-    0

+    {0}

   },

   gEndEntire

 };

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipset_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipset_S.inc
index 067ddf6c55..3d735fd812 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipset_S.inc
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Chipset_S.inc
@@ -1,17 +1,17 @@
-;; @file

-;  Chipset constants and macros.

-;

-;  Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.<BR>

-;

-;  This program and the accompanying materials

-;  are licensed and made available under the terms and conditions of the BSD License

-;  which accompanies this distribution.  The full text of the license may be found at

-;  http://opensource.org/licenses/bsd-license.php.

-;

-;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

-;

-;;

+# @file

+#  Chipset constants and macros.

+#

+#  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

+#

+#

 

 #

 # APIC register

@@ -92,6 +92,7 @@
 

 .equ R_PMC_MMIO_BAR0,               ((0x0D * 8 + 0x01) * 0x1000 + 0x0010 + CPU_HEC_BASE)  #BAR0 IO config register. B0:D13:F1 0x10

 .equ R_PMC_MMIO_BAR1,               ((0x0D * 8 + 0x01) * 0x1000 + 0x0018 + CPU_HEC_BASE)  #BAR1 IO config register. B0:D13:F1 0x18

+.equ R_PMC_MMIO_BAR1_OFFSET_4,      0x04 

 .equ SYRE_CPURST,                   14

 

 #

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S.inc
index 3279f074af..cad7daea9f 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S.inc
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Ia32_S.inc
@@ -1,17 +1,16 @@
-;; @file

-;  IA32 architecture MSRs.

-;

-;  Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>

-;

-;  This program and the accompanying materials

-;  are licensed and made available under the terms and conditions of the BSD License

-;  which accompanies this distribution.  The full text of the license may be found at

-;  http://opensource.org/licenses/bsd-license.php.

-;

-;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

-;

-;;

+# @file

+#  IA32 architecture MSRs.

+#

+#  Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

+#

 

 .equ IA32_MTRR_CAP,                 0xFE

 .equ MTRR_PHYS_BASE_0,              0x200

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platform_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platform_S.inc
index a50fc4aac8..4bba49b6bc 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platform_S.inc
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/Platform_S.inc
@@ -1,17 +1,17 @@
-;; @file

-;  Platform Specific Definitions.

-;

-;  Copyright (c) 2008 - 2016, Intel Corporation. All rights reserved.<BR>

-;

-;  This program and the accompanying materials

-;  are licensed and made available under the terms and conditions of the BSD License

-;  which accompanies this distribution.  The full text of the license may be found at

-;  http://opensource.org/licenses/bsd-license.php.

-;

-;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

-;

-;;

+# @file

+#  Platform Specific Definitions.

+#

+#  Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

+#

+#

 

 #INCLUDE FlashMap.inc #ECP porting

 

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCore_S.inc b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCore_S.inc
index 3a9126fcb8..def9014c21 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCore_S.inc
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecCore_S.inc
@@ -1,17 +1,17 @@
-;; @file

-;  SecCore constants and macros.

-;

-;  Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>

-;

-;  This program and the accompanying materials

-;  are licensed and made available under the terms and conditions of the BSD License

-;  which accompanies this distribution.  The full text of the license may be found at

-;  http://opensource.org/licenses/bsd-license.php.

-;

-;  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

-;  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

-;

-;;

+# @file

+#  SecCore constants and macros.

+#

+#  Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>

+#

+#  This program and the accompanying materials

+#  are licensed and made available under the terms and conditions of the BSD License

+#  which accompanies this distribution.  The full text of the license may be found at

+#  http://opensource.org/licenses/bsd-license.php.

+#

+#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,

+#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED

+#

+#

 

 #

 # Set to 1 to enable debug

diff --git a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S
index 534c62c730..03467674ba 100644
--- a/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S
+++ b/Platform/BroxtonPlatformPkg/Common/Library/PlatformSecLib/Ia32/SecEntry.S
@@ -2,7 +2,7 @@
 #  This is the code that goes from real-mode to protected mode.

 #  It consumes the reset vector.

 #

-#  Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>

+#  Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>

 #

 #  This program and the accompanying materials

 #  are licensed and made available under the terms and conditions of the BSD License

@@ -187,13 +187,13 @@ ASM_PFX (PlatformInitialization):
   movl    $R_PMC_MMIO_BAR0, %edi

   movl    $IPC1_BASE_ADDRESS, (%edi)

 

-  movl    $(R_PMC_MMIO_BAR0 + $4), %edi

+  movl    $(R_PMC_MMIO_BAR0 + R_PMC_MMIO_BAR1_OFFSET_4), %edi

   movl    $0x00, (%edi)

 

   movl    $R_PMC_MMIO_BAR1, %edi

   movl    $SSRAM_BASE_ADDRESS, (%edi)

 

-  movl    $( R_PMC_MMIO_BAR1 + $4), %edi

+  movl    $( R_PMC_MMIO_BAR1 + R_PMC_MMIO_BAR1_OFFSET_4), %edi

   movl    $0x00, (%edi)

   

   #

@@ -333,7 +333,7 @@ no_RTC_pwr_failure:
   outw    %ax, %dx

 

 .if 1

-  ; Do nothing

+  # Do nothing

 .else

   #

   # Clear the Second Timeout Status bit by writing 1