summaryrefslogtreecommitdiff
path: root/Platform/BroxtonPlatformPkg/Common/SampleCode
diff options
context:
space:
mode:
authorGuo Mang <mang.guo@intel.com>2018-04-27 15:46:50 +0800
committerGuo Mang <mang.guo@intel.com>2018-04-28 10:44:17 +0800
commit2e497f750976dbe1f40ef7b354eef1ef82c359cc (patch)
treecf7373ba44aa6101f38d7f4ac5e4375d429c2cc6 /Platform/BroxtonPlatformPkg/Common/SampleCode
parent19ab545ff075b0b949a2f5c19c79a3995ac31a2f (diff)
downloadedk2-platforms-2e497f750976dbe1f40ef7b354eef1ef82c359cc.tar.xz
Upgrading core: Fix GCC build failure
Upgrate core to UDK2018: Fix GCC build failure. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/Common/SampleCode')
-rw-r--r--Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.c6
-rw-r--r--Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.h4
-rw-r--r--Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S8
-rw-r--r--Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm8
4 files changed, 13 insertions, 13 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.c b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.c
index 05816c5a65..06fab9e3a8 100644
--- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.c
+++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.c
@@ -1,7 +1,7 @@
/** @file
C functions in SEC.
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -30,7 +30,7 @@ EFI_PEI_PPI_DESCRIPTOR mPeiSecMainPpi[] = {
};
FSP_SILICON_INIT_DONE_PPI gFspSiliconInitDonePpi = {
- FspSiliconInitDoneGetFspHobList
+ SecMainFspSiliconInitDoneGetFspHobList
};
//
@@ -285,7 +285,7 @@ SecStartupPhase2(
**/
EFI_STATUS
EFIAPI
-FspSiliconInitDoneGetFspHobList (
+SecMainFspSiliconInitDoneGetFspHobList (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN FSP_SILICON_INIT_DONE_PPI *This,
OUT VOID **FspHobList
diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.h b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.h
index 68688c5cbd..b6e59e260e 100644
--- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.h
+++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/FspInitPei/SecMain.h
@@ -1,7 +1,7 @@
/** @file
Master header file for SecCore.
- Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -106,7 +106,7 @@ ProcessLibraryConstructorList (
**/
EFI_STATUS
EFIAPI
-FspSiliconInitDoneGetFspHobList (
+SecMainFspSiliconInitDoneGetFspHobList (
IN CONST EFI_PEI_SERVICES **PeiServices,
IN FSP_SILICON_INIT_DONE_PPI *This,
OUT VOID **FspHobList
diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
index c7870fe42e..03d0126e60 100644
--- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
+++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.S
@@ -2,7 +2,7 @@
# This is the code that goes from real-mode to protected mode.
# It consumes the reset vector, calls TempRamInit API from FSP binary.
#
-# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -23,7 +23,7 @@ ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
ASM_PFX(_TEXT_REALMODE):
#----------------------------------------------------------------------------
#
-# Procedure: _ModuleEntryPoint
+# Procedure: _SecEntryModuleEntryPoint
#
# Input: None
#
@@ -51,8 +51,8 @@ ASM_PFX(_TEXT_REALMODE):
#----------------------------------------------------------------------------
.align 4
-ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
-ASM_PFX(_ModuleEntryPoint):
+ASM_GLOBAL ASM_PFX(_SecEntryModuleEntryPoint)
+ASM_PFX(_SecEntryModuleEntryPoint):
fninit # clear any pending Floating point exceptions
#
# Store the BIST value in mm0
diff --git a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
index b7958ddf66..40b42f47d9 100644
--- a/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
+++ b/Platform/BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/Ia32/SecEntry.asm
@@ -2,7 +2,7 @@
; This is the code that goes from real-mode to protected mode.
; It consumes the reset vector, calls TempRamInit API from FSP binary.
;
-; Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+; Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
@@ -32,7 +32,7 @@ _TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
;----------------------------------------------------------------------------
;
-; Procedure: _ModuleEntryPoint
+; Procedure: _SecEntryModuleEntryPoint
;
; Input: None
;
@@ -60,7 +60,7 @@ _TEXT_REALMODE SEGMENT PARA PUBLIC USE16 'CODE'
;----------------------------------------------------------------------------
align 4
-_ModuleEntryPoint PROC NEAR C PUBLIC
+_SecEntryModuleEntryPoint PROC NEAR C PUBLIC
fninit ; clear any pending Floating point exceptions
;
; Store the BIST value in mm0
@@ -111,7 +111,7 @@ _ModuleEntryPoint PROC NEAR C PUBLIC
mov esi, offset ProtectedModeEntryLinearAddress
jmp fword ptr cs:[si]
-_ModuleEntryPoint ENDP
+_SecEntryModuleEntryPoint ENDP
_TEXT_REALMODE ENDS
_TEXT_PROTECTED_MODE SEGMENT PARA PUBLIC USE32 'CODE'