diff options
| author | zwei4 <david.wei@intel.com> | 2017-09-02 17:18:26 +0800 |
|---|---|---|
| committer | zwei4 <david.wei@intel.com> | 2017-09-02 17:18:26 +0800 |
| commit | c7fd86be57d7746457e7a2faf4dd0199a9a07342 (patch) | |
| tree | 9fd2335c42d01e788a94da2939e61aef2c893ecd /Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc | |
| parent | dbb279c54dbed80ec700cfbd61632a64c2c08b51 (diff) | |
| download | edk2-platforms-c7fd86be57d7746457e7a2faf4dd0199a9a07342.tar.xz | |
Enable GT RC6.
Remove code that disables GT RC6. This could allow GT to enter deep sleep when it is idle, so that more power could be saved for core to use. This temp solution allows core frequency maximally rise to 1100MHz.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc')
| -rw-r--r-- | Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc | 14 |
1 files changed, 3 insertions, 11 deletions
diff --git a/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc index e5ee4c1b4c..0e29ef3be4 100644 --- a/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc +++ b/Platform/BroxtonPlatformPkg/DefineAtBuildMacros.dsc @@ -1,11 +1,3 @@ -DEFINE ENBDT_PF_BUILD = TRUE -DEFINE TABLET_PF_BUILD = FALSE -DEFINE BYTI_PF_BUILD = FALSE -DEFINE CSLE_ENABLE = FALSE -DEFINE VP_BIOS_ENABLE = FALSE -DEFINE SV_BIOS_ENABLE = FALSE -DEFINE PPV_BIOS_ENABLE = FALSE -DEFINE RVVP_BIOS_ENABLE = FALSE -DEFINE RVV_BIOS_ENABLE = FALSE -DEFINE SOURCE_DEBUG_ENABLE = FALSE -DEFINE X64_CONFIG = TRUE +DEFINE ENBDT_PF_BUILD = TRUE
+DEFINE APLK_SETUP_ENABLE_BUILD = TRUE
+DEFINE X64_CONFIG = TRUE
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