diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-23 13:23:23 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-05-09 13:02:57 +0800 |
| commit | 92622ca06c41eed87c44746f398e7b94547daf09 (patch) | |
| tree | ed2bf38bc57a3b8be1669de165d46dc3bb80b97e /Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc | |
| parent | 64540be64d757e4ada46f79e6a5d0617470d26f9 (diff) | |
| download | edk2-platforms-92622ca06c41eed87c44746f398e7b94547daf09.tar.xz | |
BroxtonPlatformPkg: Add PlatformDsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc')
| -rw-r--r-- | Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc | 82 |
1 files changed, 82 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc new file mode 100644 index 0000000000..de883285d1 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc @@ -0,0 +1,82 @@ +## @file
+# Platform Fixed At Build Pcd Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ # PcdTemporaryRamBase + PcdTemporaryRamSize should equal top of CAR
+ # Top of CAR (CarBase + CarSize) = 0xFF000000 on BXT
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamBase|0xFEFC0000
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+ !else
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamBase|0xFEFD5100
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamSize|0x0002AF00
+ !endif
+
+ gPlatformModuleTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x2000
+
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize|0x1000
+ !endif
+
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
+ !endif
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize|0x1800000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|50
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported|128
+
+ !if $(S4_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+ !endif
+ !if $(TARGET) == RELEASE
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
+ !else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+ !endif
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|120
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|60
+ !endif
+ !endif
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x10000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x$(PLATFORM_PCIEXPRESS_BASE)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
+ gClientCommonModuleTokenSpaceGuid.PcdMaxConsoleDeviceNum|0x05
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE
+
+ #Overrides the CMOS Flag to disable ISA serial debug
+ gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex|0x5C
+ gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress|0xFE043000
+
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