diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-23 13:23:23 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-05-09 13:02:57 +0800 |
| commit | 92622ca06c41eed87c44746f398e7b94547daf09 (patch) | |
| tree | ed2bf38bc57a3b8be1669de165d46dc3bb80b97e /Platform/BroxtonPlatformPkg/PlatformDsc | |
| parent | 64540be64d757e4ada46f79e6a5d0617470d26f9 (diff) | |
| download | edk2-platforms-92622ca06c41eed87c44746f398e7b94547daf09.tar.xz | |
BroxtonPlatformPkg: Add PlatformDsc
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg/PlatformDsc')
14 files changed, 1656 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/BuildOptions.EDKII.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/BuildOptions.EDKII.dsc new file mode 100644 index 0000000000..976d6ea700 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/BuildOptions.EDKII.dsc @@ -0,0 +1,107 @@ +## @file
+# Define build options tokens.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+##
+## Many of these should be converted to FixedAtBuild (or at minimum FeatureFlag) PCDs !
+########################################################################################
+
+#
+# Define Platform specific pre-processor tokens
+#
+!if $(APLK_SETUP_ENABLE_BUILD) == TRUE
+ DEFINE APLK_SETUP_ENABLE = -DAPLK_SETUP_ENABLE=1
+!else
+ DEFINE APLK_SETUP_ENABLE = -DAPLK_SETUP_ENABLE=0
+!endif
+
+!if $(ENBDT_PF_BUILD) == TRUE
+ DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=1
+!else
+ DEFINE ENBDT_PF_ENABLE = -DENBDT_PF_ENABLE=0
+!endif
+
+#
+# Define common pre-processor tokens.
+#
+!if $(PERFORMANCE_ENABLE) == TRUE
+ DEFINE PERFORMANCE_ENABLE_BUILD_OPTION = -D_PERFORMANCE_ENABLE_=1
+!endif
+
+!if $(X64_CONFIG) == TRUE
+ DEFINE X64_BUILD_ENABLE = -DX64_BUILD_ENABLE=1
+!endif
+
+!if $(PCIESC_ENABLE) == TRUE
+ DEFINE PCIESC_SUPPORT_BUILD_OPTION = -DPCIESC_SUPPORT=1
+!endif
+
+!if $(SATA_ENABLE) == TRUE
+ DEFINE SATA_SUPPORT_BUILD_OPTION = -DSATA_SUPPORT=1
+!endif
+
+!if $(PRAM_ENABLE) == TRUE
+ DEFINE PRAM_SUPPORT_BUILD_OPTION = -DPRAM_SUPPORT=1
+!endif
+
+ DEFINE BDAT_SUPPORT_BUILD_OPTION = -DBDAT_SUPPORT=0
+
+!if $(NVM_VARIABLE_ENABLE) == TRUE
+ DEFINE NVM_VARIABLE_BUILD_OPTION = -DNVM_VARIABLE_ENABLE=1
+!endif
+
+!if $(FTPM_ENABLE) == TRUE
+ DEFINE FTPM_SUPPORT_BUILD_OPTIONS = -DFTPM_SUPPORT=1
+!endif
+
+!if $(SMM_VARIABLE_ENABLE) == TRUE
+ DEFINE SMM_VARIABLE_ENABLE_BUILD_OPTIONS = -DSMM_VARIABLE_ENABLE=1
+!else
+ DEFINE SMM_VARIABLE_ENABLE_BUILD_OPTIONS =
+!endif
+
+ DEFINE MEMORY_BUILD_OPTIONS = -DEFI_MEMORY_INIT=1
+
+DEFINE EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS = $(PERFORMANCE_ENABLE_BUILD_OPTION) $(ENBDT_PF_ENABLE) $(X64_BUILD_ENABLE) $(NVM_VARIABLE_BUILD_OPTION) $(FTPM_SUPPORT_BUILD_OPTIONS) $(PCIESC_SUPPORT_BUILD_OPTION) $(SATA_SUPPORT_BUILD_OPTION) $(PRAM_SUPPORT_BUILD_OPTION) $(HDAUDIO_SUPPORT_BUILD_OPTION) $(APLK_SETUP_ENABLE) $(MEMORY_BUILD_OPTIONS) $(BDAT_SUPPORT_BUILD_OPTION) $(SMM_VARIABLE_ENABLE_BUILD_OPTIONS)
+
+!if gPlatformModuleTokenSpaceGuid.PcdDeprecatedFunctionRemove == TRUE
+ DEFINE DISABLE_NEW_DEPRECATED_INTERFACES_BUILD_OPTION = -DDISABLE_NEW_DEPRECATED_INTERFACES=1
+!else
+ DEFINE DISABLE_NEW_DEPRECATED_INTERFACES_BUILD_OPTION =
+!endif
+
+DEFINE EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) $(DISABLE_NEW_DEPRECATED_INTERFACES_BUILD_OPTION)
+
+#
+# Compiler flags
+#
+#format: <BuildType>_<CompilerVer>_<TargetArch>_<FlagType>
+
+ *_*_IA32_ASM_FLAGS = $(VP_BUILD_OPTIONS) -DEDKII_GLUE_PciExpressBaseAddress=$(PLATFORM_PCIEXPRESS_BASE)h
+
+ *_*_IA32_CC_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) /Gs81920
+ *_*_IA32_VFRPP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_IA32_APP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_IA32_PP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_IA32_ASLPP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+
+ *_*_X64_CC_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_X64_VFRPP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_X64_APP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_X64_PP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_X64_ASLPP_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS)
+ *_*_*_ASL_FLAGS = $(EDK_EDKII_DSC_FEATURE_BUILD_OPTIONS) -we
+
+ RELEASE_*_*_CC_FLAGS = /Zi
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc new file mode 100644 index 0000000000..819f025a6a --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.IA32.dsc @@ -0,0 +1,196 @@ +## @file
+# Platform Components for IA32 Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ $(PLATFORM_SI_PACKAGE)/Cpu/SecCore/Vtf0SecCore.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ PlatformSecLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformSecLib/Vtf0PlatformSecLib.inf
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x00
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x0
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/Console/PlatformDebugPei/PlatformDebugPei.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Core/Pei/PeiMain.inf {
+ !if $(TOOL_CHAIN_TAG) == GCC47
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <BuildOptions>
+ GCC:*_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ !else
+ !if $(TARGET) == DEBUG
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+ !endif
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ !endif
+ }
+
+!if $(PERFORMANCE_ENABLE) == TRUE
+ MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf
+!endif
+
+ $(PLATFORM_SI_PACKAGE)/VariableStorage/Pei/CseVariableStoragePei/CseVariableStoragePei.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ }
+
+ $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/Pei/VariablePei.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ }
+ $(PLATFORM_PACKAGE_COMMON)/Console/MonoStatusCode/MonoStatusCode.inf {
+ !if $(TARGET) == DEBUG
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+ !endif
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformPreMemPei/PlatformPreMemPei.inf {
+ <LibraryClasses>
+ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPreMem/BoardInitPreMem.inf
+ NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPreMem/BoardInitPreMem.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+ CpuPolicyLib|$(PLATFORM_SI_PACKAGE)/Cpu/Library/PeiCpuPolicyLibPreMem/PeiCpuPolicyLibPreMem.inf
+ <BuildOptions>
+ !if $(TOOL_CHAIN_TAG) == GCC47
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <BuildOptions>
+ GCC:*_*_*_CC_FLAGS = -DMDEPKG_NDEBUG
+ !else
+ !if $(TARGET) == DEBUG
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2E
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBMBase|0xFEF30000
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+
+ !endif
+ !endif
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformPostMemPei/PlatformPostMemPei.inf {
+ <LibraryClasses>
+ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf
+ NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x803805c6
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf{
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+ # this is just the FSP-M s base, need cleanup soon
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|$(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE)
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase|$(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE)
+
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspSize|$(FSP_IBBM_SIZE)
+ gIntelFsp2WrapperTokenSpaceGuid.PcdTemporaryRamBase|$(CAR_BASE_ADDRESS)
+
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackBase|$(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE)
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackSize|$(FSP_RAM_DATA_SIZE)
+ gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf{
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+ # this is just the FSP-M s base, need cleanup soon
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase|$(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE)
+
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspSize|$(FSP_IBBM_SIZE)
+
+ gIntelFsp2WrapperTokenSpaceGuid.PcdTemporaryRamBase|$(CAR_BASE_ADDRESS)
+ gIntelFspPkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
+ }
+
+ #No use of SPI PPI for now
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/SmmControl/Pei/SmmControl.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/PCD/Pei/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+ !if $(TARGET) == DEBUG
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x26
+ !endif
+ }
+
+ UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/Compatibility/AcpiVariableHobOnSmramReserveHobThunk/AcpiVariableHobOnSmramReserveHobThunk.inf
+ UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf
+
+ MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {
+ <LibraryClasses>
+!if $(LZMA_ENABLE) == TRUE
+ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+!endif
+ }
+
+!if $(FTPM_ENABLE) == TRUE
+ SecurityPkg/Tcg/Tcg2Pei/Tcg2Pei.inf {
+ <LibraryClasses>
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterPei.inf
+ NULL|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2InstanceLibDTpm.inf
+ NULL|$(PLATFORM_PACKAGE_COMMON)/Library/Tpm2DeviceLibPtp/Tpm2InstanceLibPtt.inf
+ HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterPei.inf
+ NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf
+ NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+ }
+!endif
+
+!if $(TPM12_ENABLE) == TRUE
+ SecurityPkg/Tcg/TcgPei/TcgPei.inf
+!endif
+
+!if $(ACPI50_ENABLE) == TRUE
+ MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTablePei/FirmwarePerformancePei.inf {
+ <LibraryClasses>
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/PeiTscTimerLib.inf
+ }
+!endif
+
+!if $(INTEL_FPDT_ENABLE) == TRUE
+ $(PLATFORM_PACKAGE_COMMON)/FpdtPei/FpdtPei.inf
+!endif
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc new file mode 100644 index 0000000000..0d2d0db683 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Components.dsc @@ -0,0 +1,462 @@ +## @file
+# Platform Components Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ #
+ # EDK II Related Platform codes
+ #
+ MdeModulePkg/Core/Dxe/DxeMain.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046
+ <LibraryClasses>
+ !if $(DXE_CRC32_SECTION_ENABLE) == TRUE
+ NULL|MdeModulePkg/Library/DxeCrc32GuidedSectionExtractLib/DxeCrc32GuidedSectionExtractLib.inf
+ !endif
+ !if $(LZMA_ENABLE) == TRUE
+ NULL|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ !endif
+ }
+ MdeModulePkg/Universal/PCD/Dxe/Pcd.inf {
+ <LibraryClasses>
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ }
+ UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf
+ MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformStatusCodeHandlerRuntimeDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Console/PlatformStatusCodeHandler/RuntimeDxe/PlatformPort80HandlerRuntimeDxe.inf
+
+ MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf
+ MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf # Use BaseDebugLibNull for resolve size issue
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ NULL|SecurityPkg/Library/DxeImageVerificationLib/DxeImageVerificationLib.inf
+ !endif
+ !if $(USER_IDENTIFICATION_ENABLE) == TRUE
+ NULL|SecurityPkg/Library/DxeDeferImageLoadLib/DxeDeferImageLoadLib.inf
+ !endif
+ !if $(TPM12_ENABLE) == TRUE
+ NULL|SecurityPkg/Library/DxeTpmMeasureBootLib/DxeTpmMeasureBootLib.inf
+ !endif
+ !if $(FTPM_ENABLE) == TRUE
+ NULL|SecurityPkg/Library/DxeTpm2MeasureBootLib/DxeTpm2MeasureBootLib.inf
+ !endif
+ }
+
+ !if $(SMM_VARIABLE_ENABLE)
+ $(PLATFORM_SI_PACKAGE)/VariableStorage/Dxe/CseVariableStorageSmmRuntimeDxe/CseVariableStorageSmmRuntimeDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ }
+ !else
+ $(PLATFORM_SI_PACKAGE)/VariableStorage/Dxe/CseVariableStorageSmmRuntimeDxe/CseVariableStorageRuntimeDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ }
+ !endif
+
+
+
+ $(PLATFORM_SI_PACKAGE)/SiInit/Dxe/SiInitDxe.inf
+ MdeModulePkg/Universal/Metronome/Metronome.inf
+
+ IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0xF0000043
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+ <LibraryClasses>
+!if $(TARGET) != RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+ <BuildOptions>
+ ICC:*_*_*_CC_FLAGS = /D MDEPKG_NDEBUG
+ GCC:*_*_*_CC_FLAGS = -D MDEPKG_NDEBUG
+ }
+
+ IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf {
+ <LibraryClasses>
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf
+ NULL|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2InstanceLibDTpm.inf
+ NULL|$(PLATFORM_PACKAGE_COMMON)/Library/Tpm2DeviceLibPtp/Tpm2InstanceLibPtt.inf
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/FspNotifyDxe/FspNotifyDxe.inf
+
+ MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf
+
+ MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
+
+!if $(SMM_VARIABLE_ENABLE)
+ $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ <LibraryClasses>
+!if $(SECURE_BOOT_ENABLE) == FALSE
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+!endif
+ }
+ $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ <LibraryClasses>
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ NULL|MdeModulePkg/Library/VarCheckHiiLib/VarCheckHiiLib.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
+ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
+!else
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+!endif
+ }
+!else
+ $(PLATFORM_SI_PACKAGE)/SampleCode/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000103
+ <LibraryClasses>
+ VarCheckLib|MdeModulePkg/Library/VarCheckLib/VarCheckLib.inf
+ NULL|MdeModulePkg/Library/VarCheckUefiLib/VarCheckUefiLib.inf
+ NULL|MdeModulePkg/Library/VarCheckHiiLib/VarCheckHiiLib.inf
+!if $(SECURE_BOOT_ENABLE) == TRUE
+ PlatformSecureLib|SecurityPkg/Library/PlatformSecureLibNull/PlatformSecureLibNull.inf
+ AuthVariableLib|SecurityPkg/Library/AuthVariableLib/AuthVariableLib.inf
+!else
+ AuthVariableLib|MdeModulePkg/Library/AuthVariableLibNull/AuthVariableLibNull.inf
+ TpmMeasurementLib|MdeModulePkg/Library/TpmMeasurementLibNull/TpmMeasurementLibNull.inf
+!endif
+ }
+!endif #SMM_VARIABLE_ENABLE
+
+ MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
+ MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
+ PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf
+ MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformSetupDxe/PlatformSetupDxe.inf {
+ <LibraryClasses>
+ NULL|$(PLATFORM_NAME)/Board/MinnowBoard3/BoardInitDxe/BoardInitDxe.inf
+ NULL|$(PLATFORM_NAME)/Board/LeafHill/BoardInitDxe/BoardInitDxe.inf
+ }
+
+!if $(DATAHUB_ENABLE) == TRUE
+ IntelFrameworkModulePkg/Universal/DataHubDxe/DataHubDxe.inf {
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0
+ }
+!endif
+
+ IntelFrameworkModulePkg/Universal/StatusCode/DatahubStatusCodeHandlerDxe/DatahubStatusCodeHandlerDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf
+
+ PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf
+
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/SmmControl/RuntimeDxe/SmmControl.inf
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/Reset/RuntimeDxe/ScReset.inf
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/ScSmiDispatcher/Smm/ScSmiDispatcher.inf
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/ScInit/Smm/ScInitSmm.inf
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/SampleCode/BiosWriteProtect/Smm/ScBiosWriteProtect.inf
+
+ $(PLATFORM_SI_PACKAGE)/NorthCluster/PciHostBridge/Dxe/PciHostBridge.inf
+ $(PLATFORM_SI_PACKAGE)/NorthCluster/SaInit/Dxe/SaInit.inf
+ $(PLATFORM_SI_PACKAGE)/NorthCluster/AcpiTables/SaAcpiTables.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/DptfDxe/DptfDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/PnpDxe/PnpDxe.inf
+
+!if $(SEC_ENABLE) == TRUE
+ $(PLATFORM_PACKAGE_COMMON)/SeCPolicyInitDxe/SeCPolicyInitDxe.inf
+!endif
+
+!if $(FTPM_ENABLE) == TRUE
+ SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf
+
+ SecurityPkg/Tcg/Tcg2Dxe/Tcg2Dxe.inf {
+ <LibraryClasses>
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf
+ NULL|SecurityPkg/Library/Tpm2DeviceLibDTpm/Tpm2InstanceLibDTpm.inf
+ NULL|$(PLATFORM_PACKAGE_COMMON)/Library/Tpm2DeviceLibPtp/Tpm2InstanceLibPtt.inf
+ HashLib|SecurityPkg/Library/HashLibBaseCryptoRouter/HashLibBaseCryptoRouterDxe.inf
+ NULL|SecurityPkg/Library/HashInstanceLibSha1/HashInstanceLibSha1.inf
+ NULL|SecurityPkg/Library/HashInstanceLibSha256/HashInstanceLibSha256.inf
+ }
+
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/SecurityPkg/Tcg/Tcg2Smm/Tcg2Smm.inf
+!endif
+
+!if $(TPM12_ENABLE) == TRUE
+ SecurityPkg/Tcg/TcgDxe/TcgDxe.inf
+ SecurityPkg/Tcg/TcgSmm/TcgSmm.inf
+!endif
+
+ #
+ # EDK II Related Platform codes
+ #
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSmm/PlatformSmm.inf
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformInfoDxe/PlatformInfoDxe.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/PlatformSettings/PlatformDxe/PlatformDxe.inf
+
+ $(PLATFORM_PACKAGE_COMMON)/SaveMemoryConfigDxe/SaveMemoryConfigDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Features/S3/SmramSaveInfoHandlerSmm/SmramSaveInfoHandlerSmm.inf
+
+!if $(GOP_DRIVER_ENABLE) == TRUE
+ $(PLATFORM_PACKAGE_COMMON)/Console/PlatformGopPolicyDxe/PlatformGopPolicyDxe.inf
+!endif
+
+ #
+ # SMM
+ #
+ MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf
+ MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf
+
+ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf
+ UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf
+ MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf
+ UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf
+ $(PLATFORM_PACKAGE_COMMON)/Compatibility/SmmSwDispatch2OnSmmSwDispatchThunk/SmmSwDispatch2OnSmmSwDispatchThunk.inf
+ $(PLATFORM_PACKAGE_COMMON)/Compatibility/SmmSxDispatch2OnSmmSxDispatchThunk/SmmSxDispatch2OnSmmSxDispatchThunk.inf
+
+!if $(NVM_VARIABLE_ENABLE) == TRUE
+ $(PLATFORM_SI_PACKAGE)/Txe/Heci/Smm/HeciSmm.inf
+ $(PLATFORM_SI_PACKAGE)/Txe/Heci/Smm/HeciSmmRuntimeDxe.inf
+!endif
+
+ #
+ # ACPI
+ #
+ MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Features/S3/BootScriptSaveDxe/BootScriptSaveDxe.inf
+ IntelFrameworkModulePkg/Universal/Acpi/AcpiSupportDxe/AcpiSupportDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.inf
+
+!if $(DTS_ENABLE) == TRUE
+
+!endif
+
+ $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiTablesPCAT/AcpiTables.inf
+ $(PLATFORM_PACKAGE_COMMON)/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf
+
+ #
+ # PCI
+ #
+ MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf
+
+ #
+ # LAN/Network
+ #
+!if $(NETWORK_ENABLE) == TRUE
+ MdeModulePkg/Universal/Network/SnpDxe/SnpDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/DpcDxe/DpcDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/MnpDxe/MnpDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/ArpDxe/ArpDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/Dhcp4Dxe/Dhcp4Dxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/Ip4Dxe/Ip4Dxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/Mtftp4Dxe/Mtftp4Dxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/Tcp4Dxe/Tcp4Dxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ MdeModulePkg/Universal/Network/Udp4Dxe/Udp4Dxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+
+ !if $(NETWORK_IP6_ENABLE) == TRUE
+ NetworkPkg/Ip6Dxe/Ip6Dxe.inf
+ NetworkPkg/Dhcp6Dxe/Dhcp6Dxe.inf
+ NetworkPkg/IpSecDxe/IpSecDxe.inf
+ NetworkPkg/TcpDxe/TcpDxe.inf
+ NetworkPkg/Udp6Dxe/Udp6Dxe.inf
+ NetworkPkg/Mtftp6Dxe/Mtftp6Dxe.inf
+ !endif
+ !if $(NETWORK_IP6_ENABLE) == TRUE
+ NetworkPkg/UefiPxeBcDxe/UefiPxeBcDxe.inf
+ !else
+ MdeModulePkg/Universal/Network/UefiPxeBcDxe/UefiPxeBcDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000000
+ }
+ !endif
+!endif
+ #
+ # ISA
+ #
+ $(PLATFORM_PACKAGE_COMMON)/Console/Wpce791/SiO791.inf
+ IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf
+ IntelFrameworkModulePkg/Bus/Isa/IsaIoDxe/IsaIoDxe.inf
+
+ #
+ # LPSS UART Serial
+ #
+ $(PLATFORM_PACKAGE_COMMON)/Console/LpssUartSerialDxe/LpssUartSerialDxe.inf
+
+ #
+ # SDIO
+ #
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/Sdio/Dxe/MMC/MmcHostDxe/MmcHostDxe.inf
+
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/Sdio/Dxe/MMC/MmcMediaDeviceDxe/MmcMediaDeviceDxe.inf
+
+ !if $(ACPI50_ENABLE) == TRUE
+ MdeModulePkg/Universal/SmmCommunicationBufferDxe/SmmCommunicationBufferDxe.inf
+ MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableDxe/FirmwarePerformanceDxe.inf {
+ <LibraryClasses>
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ }
+ MdeModulePkg/Universal/Acpi/FirmwarePerformanceDataTableSmm/FirmwarePerformanceSmm.inf {
+ <LibraryClasses>
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ }
+ !endif
+
+ #
+ # IDE/SCSI/AHCI/NVMe
+ #
+ IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf
+ MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
+ MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
+ MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
+ $(PLATFORM_SI_PACKAGE)/SouthCluster/SataController/Dxe/SataController.inf
+ MdeModulePkg/Bus/Ata/AtaBusDxe/AtaBusDxe.inf
+ MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AtaAtapiPassThru.inf
+
+ # This is used for the ScsiPassThru driver (repurposed for UFS in BXT)
+ !if $(SCSI_ENABLE) == TRUE
+ MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 #0
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+ }
+ MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf {
+ <PcdsPatchableInModule>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000046 #0x80000007
+ <PcdsFixedAtBuild>
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x27
+ }
+ !endif
+ MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressDxe.inf
+
+ #
+ # Console
+ #
+ MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
+ MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
+ MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
+ IntelFrameworkModulePkg/Universal/Console/VgaClassDxe/VgaClassDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/SampleCode/MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
+ MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
+
+ MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf {
+ <LibraryClasses>
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf #Use BaseDebugLibNull for resolve size issue
+ }
+
+ MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Console/GraphicsOutputDxe/GraphicsOutputDxe.inf
+
+ #
+ # USB
+ #
+!if $(USB_ENABLE) == TRUE && $(USB_NATIVE_ENABLE) == TRUE
+# MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+# MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+# MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf
+# MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+# MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+# MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
+# MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+
+ MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf
+ MdeModulePkg/Bus/Pci/UhciDxe/UhciDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf
+ MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf
+ MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf
+ MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf
+ MdeModulePkg/Bus/Pci/XhciDxe/XhciDxe.inf {
+ <BuildOptions>
+ !if $(SIMICS_ENABLE) == TRUE
+ MSFT:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) /GL- /D SIMICS_ENABLE
+ INTEL:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) /GL- /D SIMICS_ENABLE
+ GCC:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) -O0 -DSIMICS_ENABLE
+ !else
+ MSFT:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) /GL-
+ INTEL:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) /GL-
+ GCC:*_*_*_CC_FLAGS = $(C_PROJ_FLAGS) -O0
+ !endif
+ }
+!endif
+
+ #
+ # SMBIOS
+ #
+ MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf
+ $(PLATFORM_PACKAGE_COMMON)/Features/Smbios/SmBiosMiscDxe/SmBiosMiscDxe.inf
+
+ #
+ # Legacy Modules
+ #
+ PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf
+
+ #
+ # USB TypeC
+ #
+ $(PLATFORM_PACKAGE_COMMON)/Acpi/UsbTypeCDxe/UsbTypeCDxe.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc new file mode 100644 index 0000000000..173484db78 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc @@ -0,0 +1,164 @@ +## @file
+# Platform Macro Define Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+#
+# TRUE is ENABLE.
+# FALSE is DISABLE.
+#
+
+ DEFINE PROJECT_PCH_ROOT = $(PLATFORM_SI_PACKAGE)/SouthCluster
+ DEFINE FSP_PACKAGE = BroxtonFspPkg
+
+ FLASH_DEFINITION = $(PLATFORM_NAME)/PlatformPkg.fdf
+
+###############################################
+## All Fixed Defines should be here
+###############################################
+
+ DEFINE USER_IDENTIFICATION_ENABLE = FALSE
+ DEFINE VARIABLE_INFO_ENABLE = FALSE
+ DEFINE S3_ENABLE = TRUE
+ DEFINE ACPI_ENABLE = TRUE
+ DEFINE ACPI_DEBUG_ENABLE = TRUE
+ DEFINE CAPSULE_ENABLE = TRUE
+ DEFINE CAPSULE_RESET_ENABLE = TRUE
+ DEFINE SMBIOS_ENABLE = TRUE
+ DEFINE GRAPHICS_CONSOLE_ENABLE = TRUE
+ DEFINE GOP_DRIVER_ENABLE = TRUE
+ DEFINE PEI_DISPLAY_ENABLE = TRUE
+ DEFINE SIMPLE_BOOT_FLAG_ENABLE = TRUE
+ DEFINE FIXED_PCI_BUS_ENABLE = FALSE
+ DEFINE DATAHUB_ENABLE = TRUE
+ DEFINE DATAHUB_STATUS_CODE_ENABLE = TRUE
+ DEFINE MOUSE_ENABLE = FALSE
+ DEFINE USB_ENABLE = TRUE
+ DEFINE USB_NATIVE_ENABLE = TRUE
+ DEFINE ATA_ENABLE = TRUE
+ DEFINE INTEL_RAID_ENABLE = TRUE
+ DEFINE HDD_PASSWORD_ENABLE = TRUE
+ DEFINE IGD_ENABLE = TRUE
+ DEFINE IGD_INT_HOOK_ENABLE = TRUE
+ DEFINE D042_MC_UPDATE_ENABLE = TRUE
+ DEFINE USB3_SERIAL_STATUS_CODE_ENABLE = FALSE
+ DEFINE HECETA_ENABLE = TRUE
+ DEFINE PCI_HOTPLUG_ENABLE = TRUE
+ DEFINE SAVE_MEMORY_CONFIG_ENABLE = TRUE
+ DEFINE OVERCLOCK_ENABLE = TRUE
+ DEFINE SMI_VARIABLE_ENABLE = TRUE
+ DEFINE SMM_VARIABLE_ENABLE = TRUE
+ DEFINE SMM_THUNK_ENABLE = TRUE
+ DEFINE MPTABLE_ENABLE = TRUE
+ DEFINE BOOT_TIME_ENABLE = TRUE
+ DEFINE SETUP_ENABLE = TRUE
+ DEFINE UNICODE_COLLECTION_ENABLE = TRUE
+ DEFINE CON_SPLITTER_ENABLE = TRUE
+ DEFINE SHELL_ENABLE = TRUE
+ DEFINE ME_ENABLE = TRUE
+ DEFINE DTS_ENABLE = FALSE
+ DEFINE PPM_ENABLE = FALSE
+ DEFINE SPI_SERIAL_OUT = FALSE # MAX3110 SPI UART for EFI debug message out.Verified on pure VP 2.1.2.
+ DEFINE SPI_POST_CODE = FALSE # Max6950 SPI UART for POST code.Verified on pure VP 2.1.2.
+ DEFINE CHARGING_ENABLE = TRUE
+ DEFINE LZMA_ENABLE = TRUE
+ DEFINE S4_ENABLE = TRUE
+ DEFINE NETWORK_ENABLE = TRUE
+ DEFINE NETWORK_IP6_ENABLE = TRUE
+ DEFINE NETWORK_ISCSI_ENABLE = FALSE
+ DEFINE NETWORK_VLAN_ENABLE = FALSE
+ DEFINE INTEL_FASTBOOT_ENABLE = FALSE
+
+ DEFINE MINI_BIOS_ENABLE = FALSE
+ DEFINE AT_ENABLE = TRUE
+ DEFINE GET_STAGE2_FROM_EMMC = FALSE
+ DEFINE DDR_DUAL_CHANNEL_ENABLE = TRUE # Dual Channel; FALSE Single Channel
+ DEFINE SEC_ENABLE = TRUE
+ DEFINE SCSI_ENABLE = TRUE # Currently used for UFS support on BXT
+ DEFINE LFMA_ENABLE = FALSE # Load module at fixed address feature
+ DEFINE DXE_COMPRESS_ENABLE = TRUE
+ DEFINE DXE_CRC32_SECTION_ENABLE = TRUE
+ DEFINE SSE2_ENABLE = FALSE
+ DEFINE PERFORMANCE_ENABLE = FALSE
+ DEFINE RECOVERY_ENABLE = TRUE
+ DEFINE RECOVERY_CDROM_ENABLE = FALSE
+ DEFINE PRAM_ENABLE = TRUE
+ DEFINE MRCDEBUG_ENABLE = FALSE # May not have any effect on Release builds
+ DEFINE NVM_VARIABLE_ENABLE = TRUE
+ DEFINE USB_DNX_ENABLE = FALSE
+ DEFINE SECURE_BOOT_ENABLE = TRUE
+ #
+ # Do not use 0x prefix, pass prefix 0x or postfix h through macro for C or ASM
+ #
+ DEFINE PLATFORM_PCIEXPRESS_BASE = 0E0000000
+ DEFINE PLATFORM_PCIEXPRESS_LEN = 10000000
+
+ #
+ # LFMA Enable
+ #
+ !if $(LFMA_ENABLE) == TRUE
+ FIX_LOAD_TOP_MEMORY_ADDRESS = 0xFFFFFFFFFFFFFFFF
+ DEFINE TOP_MEMORY_ADDRESS = 0xFFFFFFFFFFFFFFFF
+ !else
+ FIX_LOAD_TOP_MEMORY_ADDRESS = 0x0
+ DEFINE TOP_MEMORY_ADDRESS = 0x0
+ !endif
+
+
+################################################
+## All Dependent (if) Defines should be here
+################################################
+ !if $(ENBDT_PF_BUILD) == TRUE
+ DEFINE INTEL_FPDT_ENABLE = TRUE
+ DEFINE ACPI50_ENABLE = TRUE
+ DEFINE EMMC_DRIVER_ENABLE = TRUE
+ DEFINE SATA_ENABLE = TRUE
+ DEFINE PCIESC_ENABLE = TRUE
+ DEFINE HG_ENABLE = FALSE
+ !endif
+
+ DEFINE HG_ENABLE = FALSE
+ !if $(X64_CONFIG) == FALSE
+ DEFINE S4_ENABLE = FALSE
+ !endif
+
+ #
+ # These are mostly used in PlatformPkg.FDF
+ #
+ !if $(X64_CONFIG) == TRUE
+ DEFINE IA32_X64 = X64
+ DEFINE IA32_X64_LC = X64
+ !else
+ DEFINE IA32_X64 = IA32
+ DEFINE IA32_X64_LC = Ia32
+ !endif
+
+ # SC_PO - BXTP A0 PO - Temporarily Enable RAM Debug and Disable Console Serial Output
+ DEFINE ISA_SERIAL_STATUS_CODE_ENABLE = TRUE
+ DEFINE RAM_SERIAL_STATUS_CODE_ENABLE = FALSE
+ DEFINE FTPM_ENABLE = TRUE
+ DEFINE TPM12_ENABLE = TRUE
+
+ DEFINE FSP_IBBL_SIZE = 0x2000
+ DEFINE BLD_IBBL_SIZE = 0x6000
+ DEFINE FSP_IBBM_SIZE = 0x56000
+ DEFINE BLD_IBBM_SIZE = 0x20000
+
+ DEFINE CAR_BASE_ADDRESS = 0xFEF00000 # @PcdTemporaryRamBase
+ DEFINE BLD_RAM_DATA_SIZE = 0x16000 # BOOTLOADER temp memory size
+ DEFINE FSP_RAM_DATA_SIZE = 0x2A000 # FSP temp memory size
+ DEFINE FSP_EMP_DATA_SIZE = 0x05000 # Free space
+ DEFINE BLD_RAM_CODE_SIZE = $(BLD_IBBM_SIZE)
+ DEFINE FSP_RAM_CODE_SIZE = $(FSP_IBBM_SIZE)
+ DEFINE CAR_REGION_SIZE = 0x100000
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeCore.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeCore.dsc new file mode 100644 index 0000000000..5ae62d3dca --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeCore.dsc @@ -0,0 +1,33 @@ +## @file
+# Dxe Core Library Classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ HobLib|MdePkg/Library/DxeCoreHobLib/DxeCoreHobLib.inf
+ MemoryAllocationLib|MdeModulePkg/Library/DxeCoreMemoryAllocationLib/DxeCoreMemoryAllocationLib.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/DxeCoreFpdtPerformanceLib/DxeCoreFpdtPerformanceLib.inf # RPPO-APL-0002
+ !else
+ PerformanceLib|MdeModulePkg/Library/DxeCorePerformanceLib/DxeCorePerformanceLib.inf
+ !endif
+
+ !if $(SOURCE_DEBUG_ENABLE) == TRUE
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Override/IA32FamilyCpuPkg/Library/CpuLocalApicTimerLib/CpuLocalApicTimerLib.inf
+ !else
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+ !endif
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeRuntimeDriver.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeRuntimeDriver.dsc new file mode 100644 index 0000000000..75c07b1513 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeRuntimeDriver.dsc @@ -0,0 +1,21 @@ +## @file
+# Dxe Runtime Driver Library Classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ ReportStatusCodeLib|MdeModulePkg/Library/RuntimeDxeReportStatusCodeLib/RuntimeDxeReportStatusCodeLib.inf
+
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/RuntimeCryptLib.inf
+ !endif
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeSmmDriver.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeSmmDriver.dsc new file mode 100644 index 0000000000..8d3a5544b7 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.DxeSmmDriver.dsc @@ -0,0 +1,42 @@ +## @file
+# Dxe Smm Driver Library Classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ SmmServicesTableLib|MdePkg/Library/SmmServicesTableLib/SmmServicesTableLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
+ MemoryAllocationLib|MdePkg/Library/SmmMemoryAllocationLib/SmmMemoryAllocationLib.inf
+ LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxSmmLib.inf
+ Heci2PowerManagementLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/SmmHeci2PowerManagementLib/SmmHeci2PowerManagementLib.inf
+ SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+ Tcg2PhysicalPresenceLib|SecurityPkg/Library/SmmTcg2PhysicalPresenceLib/SmmTcg2PhysicalPresenceLib.inf
+
+ !if $(SOURCE_DEBUG_ENABLE) == TRUE
+ DebugAgentLib|SourceLevelDebugPkg/Library/DebugAgent/SmmDebugAgentLib.inf
+ !endif
+
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/SmmCryptLib.inf
+ !endif
+
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|MdeModulePkg/Library/SmmPerformanceLib/SmmPerformanceLib.inf
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+ !else
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ !endif
+
+ SmmCpuFeaturesLib|UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc new file mode 100644 index 0000000000..03df740090 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.IA32.PEI.dsc @@ -0,0 +1,65 @@ +## @file
+# IA32 PEI Library Classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ #
+ # UEFI & PI
+ #
+ S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
+
+ #
+ # Common
+ #
+ PeiSiPolicyInit|$(PLATFORM_SI_PACKAGE)/Library/PeiSiPolicyLib/PeiSiPolicyLib.inf
+ PeiPlatformConfigUpdateLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiPlatformConfigUpdateLib/PeiPlatformConfigUpdateLib.inf
+ SiPolicyLib|$(PLATFORM_SI_PACKAGE)/Library/PeiSiPolicyLib/PeiSiPolicyLib.inf
+
+
+ #
+ # PEI phase common
+ #
+ PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf
+ HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf
+ MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf
+ LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxPeiLib.inf
+ PeiVariableCacheLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiVariableCacheLib/PeiVariableCacheLib.inf
+ SeCUmaLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/Private/PeiSeCUma/SeCUma.inf
+ Heci2PowerManagementLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/BaseHeci2PowerManagementNullLib/BaseHeci2PowerManagementNullLib.inf
+
+!if $(FTPM_ENABLE) == TRUE
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterPei.inf
+!endif
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/PeiCryptLib.inf
+ SerialPortLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseSerialPortLib/BaseSerialPortLib.inf
+!if $(SOURCE_DEBUG_ENABLE) == TRUE
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+!endif
+
+ DebugLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiDebugLib/PeiDebugLib.inf
+
+ FspCommonLib|IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf
+ FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf
+# FSP platform sample
+ FspWrapperPlatformLib|$(PLATFORM_PACKAGE_COMMON)/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf
+ FspPlatformSecLib|$(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/Library/SecPeiFspPlatformSecLibSample/SecPeiFspPlatformSecLibSample.inf
+ FspWrapperHobProcessLib|$(PLATFORM_PACKAGE_COMMON)/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.inf
+ FspPolicyInitLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiFspPolicyInitLib/PeiFspPolicyInitLib.inf
+ FspWrapperPlatformResetLib|$(PLATFORM_PACKAGE_COMMON)/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.inf
+
+ BasePlatformCmosLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformCmosLib/PlatformCmosLib.inf
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+ Tcg2PhysicalPresenceLib|SecurityPkg/Library/PeiTcg2PhysicalPresenceLib/PeiTcg2PhysicalPresenceLib.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.SmmCore.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.SmmCore.dsc new file mode 100644 index 0000000000..f04345efdc --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.SmmCore.dsc @@ -0,0 +1,29 @@ +## @file
+# Smm Core Library Classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ MemoryAllocationLib|MdeModulePkg/Library/PiSmmCoreMemoryAllocationLib/PiSmmCoreMemoryAllocationLib.inf
+ SmmServicesTableLib|MdeModulePkg/Library/PiSmmCoreSmmServicesTableLib/PiSmmCoreSmmServicesTableLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/SmmReportStatusCodeLib/SmmReportStatusCodeLib.inf
+ SmmCorePlatformHookLib|MdeModulePkg/Library/SmmCorePlatformHookLibNull/SmmCorePlatformHookLibNull.inf
+
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ PerformanceLib|$(PLATFORM_PACKAGE_COMMON)/Library/SmmCoreFpdtPerformanceLib/SmmCoreFpdtPerformanceLib.inf
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformTscTimerLib/DxeTscTimerLib.inf
+ !endif
+ !else
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ !endif
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc new file mode 100644 index 0000000000..c7e8d76d49 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/LibraryClasses.dsc @@ -0,0 +1,283 @@ +## @file
+# Library classes Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ #
+ # Entry point
+ #
+ PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf
+ PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf
+ DxeCoreEntryPoint|MdePkg/Library/DxeCoreEntryPoint/DxeCoreEntryPoint.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+ DxeSmmDriverEntryPoint|IntelFrameworkPkg/Library/DxeSmmDriverEntryPoint/DxeSmmDriverEntryPoint.inf
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+ !if $(SOURCE_DEBUG_ENABLE) == TRUE
+ PeCoffExtraActionLib|SourceLevelDebugPkg/Library/PeCoffExtraActionLibDebug/PeCoffExtraActionLibDebug.inf
+ DebugCommunicationLib|SourceLevelDebugPkg/Library/DebugCommunicationLibSerialPort/DebugCommunicationLibSerialPort.inf
+ PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf
+ !else
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+ !endif
+
+ #
+ # Common
+ #
+ SteppingLib|$(PLATFORM_SI_PACKAGE)/Library/SteppingLib/SteppingLib.inf
+ SideBandLib|$(PLATFORM_SI_PACKAGE)/Library/SideBandLib/SideBandLib.inf
+ GpioLib|$(PLATFORM_SI_PACKAGE)/Library/GpioLib/GpioLib.inf
+
+
+ #
+ # Basic
+ #
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf
+ PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
+ PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+ CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+ !if $(SSE2_ENABLE) == TRUE
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf
+ !else
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf
+ !endif
+
+ SmmMemLib|MdePkg/Library/SmmMemLib/SmmMemLib.inf
+ Tcg2PpVendorLib|SecurityPkg/Library/Tcg2PpVendorLibNull/Tcg2PpVendorLibNull.inf
+
+ #
+ # UEFI & PI
+ #
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf
+ UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ !if ($(LZMA_ENABLE) == FALSE)
+ UefiDecompressLib|IntelFrameworkModulePkg/Library/BaseUefiTianoCustomDecompressLib/BaseUefiTianoCustomDecompressLib.inf
+ !else
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ !endif
+ PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf
+ PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf
+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+ GenericBdsLib|IntelFrameworkModulePkg/Library/GenericBdsLib/GenericBdsLib.inf
+ PlatformBdsLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformBdsLib/PlatformBdsLib.inf
+ NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+ DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+
+ #
+ # Framework
+ #
+ S3IoLib|MdePkg/Library/BaseS3IoLib/BaseS3IoLib.inf
+ S3PciLib|MdePkg/Library/BaseS3PciLib/BaseS3PciLib.inf
+ !if $(S3_ENABLE) == TRUE
+ S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf
+ !else
+ S3BootScriptLib|MdePkg/Library/BaseS3BootScriptLibNull/BaseS3BootScriptLibNull.inf
+ !endif
+
+ #
+ # Generic Modules
+ #
+ CustomizedDisplayLib|MdeModulePkg/Library/CustomizedDisplayLib/CustomizedDisplayLib.inf
+ OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf
+ LogoLib|$(PLATFORM_PACKAGE_COMMON)/Library/DxeLogoLib/DxeLogoLib.inf
+ UefiBootManagerLib|MdeModulePkg/Library/UefiBootManagerLib/UefiBootManagerLib.inf
+ LegacyBootManagerLib|IntelFrameworkModulePkg/Library/LegacyBootManagerLib/LegacyBootManagerLib.inf
+ SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+ SecurityManagementLib|MdeModulePkg/Library/DxeSecurityManagementLib/DxeSecurityManagementLib.inf
+ IoApicLib|PcAtChipsetPkg/Library/BaseIoApicLib/BaseIoApicLib.inf
+ CmosAccessLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseCmosAccessLib/BaseCmosAccessLib.inf
+ BaseCmosAccessLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseCmosAccessLib/BaseCmosAccessLib.inf
+ PostCodeLib|$(PLATFORM_PACKAGE_COMMON)/Library/BasePostCodeLibPort80Ex/BasePostCodeLibPort80Ex.inf
+ DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf
+ !if $(USB_ENABLE) == TRUE
+ !if $(USB_NATIVE_ENABLE) == TRUE
+ UefiUsbLib|MdePkg/Library/UefiUsbLib/UefiUsbLib.inf
+ !endif
+ !endif
+ !if $(SCSI_ENABLE) == TRUE
+ UefiScsiLib|MdePkg/Library/UefiScsiLib/UefiScsiLib.inf
+ !endif
+ !if $(NETWORK_ENABLE) == TRUE
+ NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf
+ IpIoLib|MdeModulePkg/Library/DxeIpIoLib/DxeIpIoLib.inf
+ UdpIoLib|MdeModulePkg/Library/DxeUdpIoLib/DxeUdpIoLib.inf
+ TcpIoLib|MdeModulePkg/Library/DxeTcpIoLib/DxeTcpIoLib.inf
+ DpcLib|MdeModulePkg/Library/DxeDpcLib/DxeDpcLib.inf
+ !endif
+ !if $(S3_ENABLE) == TRUE
+ S3Lib|IntelFrameworkModulePkg/Library/PeiS3Lib/PeiS3Lib.inf
+ !endif
+ !if $(RECOVERY_ENABLE) == TRUE
+ RecoveryLib|IntelFrameworkModulePkg/Library/PeiRecoveryLib/PeiRecoveryLib.inf
+ !endif
+ !if $(CAPSULE_ENABLE) == TRUE
+ CapsuleLib|IntelFrameworkModulePkg/Library/DxeCapsuleLib/DxeCapsuleLib.inf
+ !else
+ CapsuleLib|MdeModulePkg/Library/DxeCapsuleLibNull/DxeCapsuleLibNull.inf
+ !endif
+
+ #
+ # ICH
+ #
+ SmbusLib|$(PLATFORM_PACKAGE_COMMON)/Library/SmbusLib/SmbusLib.inf
+ ScAslUpdateLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/SampleCode/Library/AslUpdate/Dxe/ScAslUpdateLib.inf
+
+ #
+ # Platform
+ #
+ ResetSystemLib|$(PLATFORM_PACKAGE_COMMON)/Library/ResetSystemLib/ResetSystemLib.inf
+ PlatformCmosLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformCmosLib/PlatformCmosLib.inf
+ PlatformPostCodeMapLib|$(PLATFORM_PACKAGE_COMMON)/Library/BasePlatformPostCodeMapLib/BasePlatformPostCodeMapLib.inf
+ TimerLib|$(PLATFORM_PACKAGE_COMMON)/Library/IntelScAcpiTimerLib/IntelScAcpiTimerLib.inf
+
+ BaseIpcLib|$(PLATFORM_SI_PACKAGE)/Library/PmcIpcLib/BaseIpcLib.inf
+
+ PeiPolicyInitLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiPolicyInitLib/PeiPolicyInitLib.inf
+ PeiPolicyUpdateLib|$(PLATFORM_PACKAGE_COMMON)/Library/PeiPolicyUpdateLib/PeiPolicyUpdateLib.inf
+ DxePolicyUpdateLib|$(PLATFORM_PACKAGE_COMMON)/Library/DxePolicyUpdateLib/DxePolicyUpdateLib.inf
+ DxeSmbiosProcessorLib|$(PLATFORM_PACKAGE_COMMON)/Library/DxeSmbiosProcessorLib/DxeSmbiosProcessorLib.inf
+
+ #
+ # Misc
+ #
+ CpuExceptionHandlerLib|MdeModulePkg/Library/CpuExceptionHandlerLibNull/CpuExceptionHandlerLibNull.inf
+ MonoStatusCodeLib|$(PLATFORM_PACKAGE_COMMON)/Console/MonoStatusCode/MonoStatusCode.inf
+ PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf
+
+ !if $(TARGET) == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+ SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf
+ !else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+ !endif
+
+ !if $(SPI_SERIAL_OUT) == TRUE
+ SerialPortLib|$(PLATFORM_PACKAGE_COMMON)/Library/Emu/SerialPortLib/SerialPortLib.inf
+ !else
+ SerialPortLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseSerialPortLib/BaseSerialPortLibNoInit.inf
+ !endif
+
+ DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf
+
+ PchSerialIoUartLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/PeiDxeSmmPchSerialIoUartLib/PeiDxeSmmPchSerialIoUartLib.inf
+ PchSerialIoLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/PeiDxeSmmPchSerialIoLib/PeiDxeSmmPchSerialIoLib.inf
+ SerialPortParameterLib|$(PLATFORM_PACKAGE_COMMON)/Library/BaseSerialPortParameterLibCmos/BaseSerialPortParameterLibCmos.inf
+
+ BiosIdLib|$(PLATFORM_PACKAGE_COMMON)/Library/BiosIdLib/BiosIdLib.inf
+ CpuIA32Lib|$(PLATFORM_PACKAGE_COMMON)/Library/CpuIA32Lib/CpuIA32Lib.inf
+ StallSmmLib|$(PLATFORM_PACKAGE_COMMON)/Library/StallSmmLib/StallSmmLib.inf
+ ShellCEntryLib|ShellPkg/Library/UefiShellCEntryLib/UefiShellCEntryLib.inf
+ ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf
+ FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf
+ SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf
+
+ !if $(TPM12_ENABLE) == TRUE
+ TpmCommLib|SecurityPkg/Library/TpmCommLib/TpmCommLib.inf
+ Tpm12DeviceLib|SecurityPkg/Library/Tpm12DeviceLibDTpm/Tpm12DeviceLibDTpm.inf
+ Tpm12CommandLib|SecurityPkg/Library/Tpm12CommandLib/Tpm12CommandLib.inf
+ !endif
+ TcgPpVendorLib|SecurityPkg/Library/TcgPpVendorLibNull/TcgPpVendorLibNull.inf
+
+ !if ($(FTPM_ENABLE) == TRUE)
+ Tpm2CommandLib|SecurityPkg/Library/Tpm2CommandLib/Tpm2CommandLib.inf
+ Tpm2DeviceLib|SecurityPkg/Library/Tpm2DeviceLibRouter/Tpm2DeviceLibRouterDxe.inf
+ PttPtpLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/PeiDxePttPtpLib/PeiDxePttPtpLib.inf
+ Tcg2PhysicalPresenceLib|SecurityPkg/Library/DxeTcg2PhysicalPresenceLib/DxeTcg2PhysicalPresenceLib.inf
+ !endif
+ TpmMeasurementLib|SecurityPkg/Library/DxeTpmMeasurementLib/DxeTpmMeasurementLib.inf
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ OpensslLib|CryptoPkg/Library/OpensslLib/OpensslLib.inf
+ IntrinsicLib|CryptoPkg/Library/IntrinsicLib/IntrinsicLib.inf
+
+ #
+ # DXE phase common
+ #
+ HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf
+ PcdLib|MdePkg/Library/DxePcdLib/DxePcdLib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ ReportStatusCodeLib|MdeModulePkg/Library/DxeReportStatusCodeLib/DxeReportStatusCodeLib.inf
+ ExtractGuidedSectionLib|MdePkg/Library/DxeExtractGuidedSectionLib/DxeExtractGuidedSectionLib.inf
+ ScDxeRuntimePciLibPciExpress|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/DxeRuntimePciLibPciExpress/DxeRuntimePciLibPciExpress.inf
+ TcgPhysicalPresenceLib|SecurityPkg/Library/DxeTcgPhysicalPresenceLib/DxeTcgPhysicalPresenceLib.inf
+
+ !if $(SOURCE_DEBUG_ENABLE) == TRUE
+ SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf
+ !endif
+
+ LockBoxLib|MdeModulePkg/Library/SmmLockBoxLib/SmmLockBoxDxeLib.inf
+ EfiRegTableLib|$(PLATFORM_PACKAGE_COMMON)/Library/EfiRegTableLib/EfiRegTableLib.inf
+
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ BaseCryptLib|CryptoPkg/Library/BaseCryptLib/BaseCryptLib.inf
+ !endif
+
+ PlatformSecureDefaultsLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformSecureDefaultsLib/PlatformSecureDefaultsLib.inf
+ SmmCpuPlatformHookLib|UefiCpuPkg/Library/SmmCpuPlatformHookLibNull/SmmCpuPlatformHookLibNull.inf
+
+ BasePlatformCmosLib|$(PLATFORM_PACKAGE_COMMON)/Library/PlatformCmosLib/PlatformCmosLib.inf
+
+ #
+ # Reference code Libraries
+ #
+
+ #
+ # Common
+ #
+ MmPciLib|$(PLATFORM_SI_PACKAGE)/Library/PeiDxeSmmMmPciLib/PeiDxeSmmMmPciLib.inf
+
+ #
+ # South Cluster
+ #
+ ScAslUpdateLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/SampleCode/Library/AslUpdate/Dxe/ScAslUpdateLib.inf
+ ScPlatformLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/ScPlatformLib/ScPlatformLib.inf
+ ScDxeRuntimePciLibPciExpress|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/DxeRuntimePciLibPciExpress/DxeRuntimePciLibPciExpress.inf
+ ScHdaLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/Private/DxeScHdaLib/DxeScHdaLib.inf
+ DxeVtdLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/DxeVtdLib/DxeVtdLib.inf
+ PeiDxeSmmScPciExpressHelpersLib|$(PLATFORM_SI_PACKAGE)/SouthCluster/Library/Private/PeiDxeSmmScPciExpressHelpersLib/PeiDxeSmmScPciExpressHelpersLib.inf
+
+ #
+ # North Cluster
+ #
+ SmbiosMemoryLib|$(PLATFORM_SI_PACKAGE)/NorthCluster/Library/DxeSmbiosMemoryLib/DxeSmbiosMemoryLib.inf
+
+ #
+ # Txe
+ #
+ Heci2PowerManagementLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/BaseHeci2PowerManagementNullLib/BaseHeci2PowerManagementNullLib.inf
+ !if $(SEC_ENABLE) == TRUE
+ PeiSeCLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/PeiSecLib/PeiSeCLib.inf
+ SeCLib|$(PLATFORM_SI_PACKAGE)/Txe/Library/SeCLib/SeCLib.inf
+ !endif
+
+ FspWrapperApiLib|$(PLATFORM_PACKAGE_COMMON)/SampleCode/IntelFsp2WrapperPkg/Library/BaseFspWrapperApiLib/BaseFspWrapperApiLib.inf
+ FspWrapperApiTestLib|IntelFsp2WrapperPkg/Library/BaseFspWrapperApiTestLibNull/BaseFspWrapperApiTestLibNull.inf
+ FspWrapperPlatformResetLib|$(PLATFORM_PACKAGE_COMMON)/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.inf
+
+ BltLib|$(PLATFORM_PACKAGE_COMMON)/Library/FrameBufferBltLib/FrameBufferBltLib.inf
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc new file mode 100644 index 0000000000..e2a84b617e --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicDefault.Default.dsc @@ -0,0 +1,57 @@ +## @file
+# Platform Dynamic Pcd Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdS3BootScriptTablePrivateDataPtr|0x0
+
+ !if $(FTPM_ENABLE) == TRUE
+ gEfiSecurityPkgTokenSpaceGuid.PcdTpmInstanceGuid|{0x7b, 0x3a, 0xcd, 0x72, 0xA5, 0xFE, 0x5e, 0x4f, 0x91, 0x65, 0x4d, 0xd1, 0x21, 0x87, 0xbb, 0x13}
+ !endif
+
+ # This PCD should be set to TRUE to keep PlatformAuth Enabled during runtime
+ gClientCommonModuleTokenSpaceGuid.PcdTpm2HierarchyControlPlatform|1
+
+ ## This PCD defines the video horizontal resolution.
+ # This PCD could be set to 0 then video resolution could be at highest resolution.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|800
+ ## This PCD defines the video vertical resolution.
+ # This PCD could be set to 0 then video resolution could be at highest resolution.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|600
+ ## This PCD defines the Console output column and the default value is 25 according to UEFI spec.
+ # This PCD could be set to 0 then console output could be at max column and max row.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|31
+ ## This PCD defines the Console output row and the default value is 80 according to UEFI spec.
+ # This PCD could be set to 0 then console output could be at max column and max row.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|100
+
+ ## The PCD is used to specify the video horizontal resolution of text setup.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|800
+ ## The PCD is used to specify the video vertical resolution of text setup.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|600
+ ## The PCD is used to specify the console output column of text setup.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|100
+ ## The PCD is used to specify the console output column of text setup.
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|31
+
+ ## The PCD is used to Enable/Disable Chunk Logic for Scsi device
+ gPlatformModuleTokenSpaceGuid.PcdScsiChunk|0
+ ## The PCD is used to access Ufs device Bar address
+ gPlatformModuleTokenSpaceGuid.PcdUfsHcBar|0
+
+ gPlatformModuleTokenSpaceGuid.PcdUfsInitStall|0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|0xfff60000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|0xfff9e000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|0xfffa0000
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdFastPS2Detection|FALSE
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicHii.Default.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicHii.Default.dsc new file mode 100644 index 0000000000..3242aa3ee7 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsDynamicHii.Default.dsc @@ -0,0 +1,22 @@ +## @file
+# Platform Dynamic Hii Pcd Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
+ gClientCommonModuleTokenSpaceGuid.PcdPlatformMemoryCheck|L"MemoryCheck"|gClientCommonModuleTokenSpaceGuid|0x0|0
+ gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootState|L"BootState"|gEfiBootStateGuid|0x0|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|L"ConOutConfig"|gClientCommonModuleTokenSpaceGuid|0x0|100
+ gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|L"ConOutConfig"|gClientCommonModuleTokenSpaceGuid|0x4|31
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFeatureFlag.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFeatureFlag.dsc new file mode 100644 index 0000000000..6762a416f1 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFeatureFlag.dsc @@ -0,0 +1,93 @@ +## @file
+# Platform Feature Pcd Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ #
+ # If PcdDxeIplSwitchToLongMode is TRUE, DxeIpl will load a 64-bit DxeCore and switch to long mode to hand over to DxeCore.
+ #
+ !if $(X64_CONFIG) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode|FALSE
+ !endif
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserGrayOutTextStatement|TRUE
+
+ !if $(CAPSULE_RESET_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSupportUpdateCapsuleReset|FALSE
+ !endif
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdFrameworkCompatibilitySupport|TRUE
+
+ !if $(DATAHUB_STATUS_CODE_ENABLE) == TRUE
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseDataHub|TRUE
+ !else
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdStatusCodeUseDataHub|FALSE
+ !endif
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreImageLoaderSearchTeSectionFirst|FALSE
+
+ !if $(TARGET) == RELEASE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseSerial|FALSE
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUseSerialPortPlatform|FALSE
+ !endif
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdStatusCodeUseMemory|FALSE
+
+ !if $(ISA_SERIAL_STATUS_CODE_ENABLE) == TRUE
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|TRUE
+ !else
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseIsaSerial|FALSE
+ !endif
+
+ !if $(USB3_SERIAL_STATUS_CODE_ENABLE) == TRUE
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseUsbSerial|TRUE
+ !else
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseUsbSerial|FALSE
+ !endif
+
+ !if $(RAM_SERIAL_STATUS_CODE_ENABLE) == TRUE
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam|TRUE
+ !else
+ gEfiSerialPortTokenSpaceGuid.PcdStatusCodeUseRam|FALSE
+ !endif
+
+ !if $(BXTI_PF_BUILD) == TRUE
+ gPlatformModuleTokenSpaceGuid.PcdStatusCodeUseBeep|FALSE
+ !endif
+
+ !if $(VARIABLE_INFO_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdVariableCollectStatistics|FALSE
+ !endif
+
+ !if $(LZMA_ENABLE) == FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSupportUefiDecompress|FALSE
+ !endif
+
+ # Optimize Driver init time in FastBoot Mode
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPs2KbdExtendedVerification|FALSE
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPs2MouseExtendedVerification|FALSE
+
+ # Disable Deprecated Function
+ # bugbug benben: set this to FALSE to allow PcdSetXXX() to work in SecurityPkg. Check
+ # new core to see if we can re-enable this
+ gPlatformModuleTokenSpaceGuid.PcdDeprecatedFunctionRemove|FALSE
+
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc new file mode 100644 index 0000000000..de883285d1 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/PlatformDsc/PcdsFixedAtBuild.dsc @@ -0,0 +1,82 @@ +## @file
+# Platform Fixed At Build Pcd Description.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+ # PcdTemporaryRamBase + PcdTemporaryRamSize should equal top of CAR
+ # Top of CAR (CarBase + CarSize) = 0xFF000000 on BXT
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamBase|0xFEFC0000
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamSize|0x00040000
+ !else
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamBase|0xFEFD5100
+ gPlatformModuleTokenSpaceGuid.PcdTemporaryRamSize|0x0002AF00
+ !endif
+
+ gPlatformModuleTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0x2000
+
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdExtFpdtBootRecordPadSize|0x1000
+ !endif
+
+ !if $(SECURE_BOOT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x10000
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxVariableSize|0x5000
+ !endif
+
+ gEfiMdeModulePkgTokenSpaceGuid.PcdHwErrStorageSize|0x00000800
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxHardwareErrorVariableSize|0x400
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdS3AcpiReservedMemorySize|0x1800000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot|TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPeimPerFv|50
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSrIovSupport|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdAriSupport|FALSE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdPeiCoreMaxPpiSupported|128
+
+ !if $(S4_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|TRUE
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdResetOnMemoryTypeInformationChange|FALSE
+ !endif
+ !if $(TARGET) == RELEASE
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x0
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x3
+ !else
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2F
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+ !endif
+ !if $(PERFORMANCE_ENABLE) == TRUE
+ gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
+ !if $(INTEL_FPDT_ENABLE) == TRUE
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|120
+ !else
+ gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|60
+ !endif
+ !endif
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x10000
+ gEfiMdeModulePkgTokenSpaceGuid.PcdLoadModuleAtFixAddressEnable|$(TOP_MEMORY_ADDRESS)
+ gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0x$(PLATFORM_PCIEXPRESS_BASE)
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserSubtitleTextColor|0x0
+ gEfiMdeModulePkgTokenSpaceGuid.PcdBrowserFieldTextColor|0x01
+ gClientCommonModuleTokenSpaceGuid.PcdMaxConsoleDeviceNum|0x05
+
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBiosVideoCheckVbeEnable|TRUE
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBiosVideoCheckVgaEnable|TRUE
+
+ #Overrides the CMOS Flag to disable ISA serial debug
+ gClientCommonModuleTokenSpaceGuid.PcdStatusCodeFlagsCmosIndex|0x5C
+ gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress|0xFE043000
+
|