diff options
author | zwei4 <david.wei@intel.com> | 2017-06-14 14:04:06 +0800 |
---|---|---|
committer | zwei4 <david.wei@intel.com> | 2017-06-14 14:04:06 +0800 |
commit | 99538c727b0208c8e1a8c52ed07df55b203c4b1c (patch) | |
tree | 32e6ceacecb5e1afd7e25b4e14728795e1c723bc /Platform/BroxtonPlatformPkg | |
parent | bbf0718661e4aea7fccd55c97c20375552eb1e31 (diff) | |
download | edk2-platforms-99538c727b0208c8e1a8c52ed07df55b203c4b1c.tar.xz |
Add code for WIFI/BT
Add code for LBEE5KL1DX WIFI & Blue Tooth on FAB B.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform/BroxtonPlatformPkg')
5 files changed, 106 insertions, 8 deletions
diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardGpios.h index 692fbf7009..10ca9325b5 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardGpios.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/BoardGpios.h @@ -72,8 +72,8 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] = BXT_GPIO_PAD_CONF(L"GPIO_6", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, HizRx0I, SAME, GPIO_PADBAR+0x0030, NORTH),//Mux with DISP1_RST_N based on the SW3 switch
BXT_GPIO_PAD_CONF(L"GPIO_7", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, HizRx0I, SAME, GPIO_PADBAR+0x0038, NORTH),//Mux with DISP1_TOUCH_INT_N based on the SW3 switch
BXT_GPIO_PAD_CONF(L"GPIO_8", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, HizRx0I, SAME, GPIO_PADBAR+0x0040, NORTH),//Mux with DISP1_TOUCH_RST_N based on the SW3 switch
- BXT_GPIO_PAD_CONF(L"GPIO_9", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0048, NORTH),//Feature: LB
- BXT_GPIO_PAD_CONF(L"GPIO_10", M0 , GPI , NA , NA , Level , Wake_Enabled , P_20K_L, Inverted,IOAPIC, TxDRxE , NA, GPIO_PADBAR+0x0050, NORTH),//Feature: LB
+ BXT_GPIO_PAD_CONF(L"GPIO_9", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0048, NORTH),//Feature: LB
+ BXT_GPIO_PAD_CONF(L"GPIO_10", M0 , GPO , GPIO_D , HI , Level , Wake_Enabled , P_20K_L, NA, NA, TxDRxE , NA, GPIO_PADBAR+0x0050, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_11", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0058, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_12", M1 , NA , NA , NA , NA , Wake_Enabled , P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0060, NORTH),//Feature: LB
BXT_GPIO_PAD_CONF(L"GPIO_13", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA ,NA , NA, GPIO_PADBAR+0x0068, NORTH),//Feature: LB
@@ -95,7 +95,7 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_N[] = BXT_GPIO_PAD_CONF(L"GPIO_30", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA,IOS_Masked, SAME, GPIO_PADBAR+0x00F0, NORTH),// Net in Sch: ISH_GPIO12
BXT_GPIO_PAD_CONF(L"GPIO_31", M5 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA,IOS_Masked, SAME, GPIO_PADBAR+0x00F8, NORTH),//Feature: SUSCLK1
BXT_GPIO_PAD_CONF(L"GPIO_32", M5 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA,IOS_Masked, SAME, GPIO_PADBAR+0x0100, NORTH),// Net in Sch: SUSCLK2
- BXT_GPIO_PAD_CONF(L"GPIO_33", M5 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA,IOS_Masked, SAME, GPIO_PADBAR+0x0108, NORTH),//Feature: SUSCLK3
+ BXT_GPIO_PAD_CONF(L"GPIO_33", M0 , GPIO , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA,IOS_Masked, SAME, GPIO_PADBAR+0x0108, NORTH),//Feature: SUSCLK3
BXT_GPIO_PAD_CONF(L"GPIO_34 PWM0", M0 , GPIO , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x0110, NORTH),
BXT_GPIO_PAD_CONF(L"GPIO_35 PWM1", M0 , GPIO , NA , NA , NA , Wake_Disabled, P_5K_H , NA , NA, NA , NA, GPIO_PADBAR+0x0118, NORTH),
BXT_GPIO_PAD_CONF(L"GPIO_36 PWM2", M1 , NA , NA , NA , NA , Wake_Disabled, P_20K_L, NA , NA, NA , NA, GPIO_PADBAR+0x0120, NORTH),//Feature: PWM
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl index 3a4cdd144a..5c3b726ce9 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl @@ -541,7 +541,7 @@ Scope(\_SB) OperationRegion(GPOP, SystemMemory, GP0A, GP0L)
Field(\_SB.GPO0.GPOP, ByteAcc, NoLock, Preserve) {
- Offset(0x578), //PIN 15:15 * 8 + 0x500 // WiFi Reset
+ Offset(0x550), //PIN 10:10 * 8 + 0x500 // WiFi Reset
CWLE, 1,
Offset(0x5B0), //PIN 22:22 * 8 + 0x500 // SATA_ODD_PWRGT_R
ODPW, 1
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/LBEE5KL1DX.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/LBEE5KL1DX.asl new file mode 100644 index 0000000000..0421cf61c0 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Bluetooth/LBEE5KL1DX.asl @@ -0,0 +1,41 @@ +/** @file + Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +Scope(\_SB.PCI0.URT1) +{ + Device(BTH0) { + Method(_HID) { + Return("BCM2EA8") + } + + Method(_INI) { + } + + Method(_CRS, 0x0, Serialized) { + Name(SBFG, ResourceTemplate (){ + UARTSerialBus(115200,,,0xc0,,,FlowControlHardware,32,32,"\\_SB.PCI0.URT1" ) + GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO0", ) {33} // North-west(27):GPIO_214 NGFF_BT_DEV_WAKE_N + GpioIo(Exclusive, PullDown, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {24} // West(24):GPIO_154, BT_DISABLE2_1P8_N + }) + + Return (SBFG) + } + + Method (_STA, 0x0, NotSerialized) { + Return (0xF) + } + + Name (_S0W, 2) // required to put the device to D2 during S0 idle + } // Device BTH0 + +} // end Scope(\_SB.PCI0.URT1)
\ No newline at end of file diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl index fd7feddf75..0455c4bbd0 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/PlatformSsdt.asl @@ -57,10 +57,8 @@ DefinitionBlock ( include ("PSS/MonzaX2K_IMPJ0003.asl")
- include ("Bluetooth/Bluetooth_BCM2E40.asl")
-
- include ("Wifi/WIFI_Broadcom1.asl")
- include ("Wifi/WIFI_Broadcom2.asl")
+ include ("Bluetooth/LBEE5KL1DX.asl")
+ include ("Wifi/LBEE5KL1DX.asl")
include ("Gps/Gps.asl")
diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/LBEE5KL1DX.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/LBEE5KL1DX.asl new file mode 100644 index 0000000000..ed4b285acc --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/PlatformSsdt/Wifi/LBEE5KL1DX.asl @@ -0,0 +1,59 @@ +/** @file + Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR> + + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +/* + GPIO_10 for Wi-Fi direct IRQ 0x6D. + GPIO_15 for Wi-Fi reset + PMIC_STDBY for Wi-Fi disable, NW index 30 +*/ + + +Scope(\_SB.PCI0.SDIO) +{ + Device (BRCM) + { + Name (_ADR, One) // _ADR: Address + Name (_DEP, Package() {\_SB.GPO0}) + Name (_S4W, 2) + Name (_S0W, 2) + + Method (_STA, 0, NotSerialized) + { + Return (0xF) + } + + Method (_RMV, 0, NotSerialized) + { + Return (Zero) + } + + Name (_PRW, Package (0x02) + { + Zero, + Zero + }) + + Method (_PS3, 0, NotSerialized) + { + Store( 0x00, \_SB.GPO0.CWLE ) // Put WiFi chip in Reset + Sleep(150) + } + + Method (_PS0, 0, NotSerialized) + { + Store( 0x01, \_SB.GPO0.CWLE ) // Take WiFi chip out in Reset + Sleep(150) + } + } +} + |