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authorJiewen Yao <jiewen.yao@intel.com>2018-03-26 20:50:41 +0800
committerJiewen Yao <jiewen.yao@intel.com>2018-03-26 20:52:27 +0800
commit62f1e1e58965702030f722dcdf6de58998cf08a1 (patch)
treec9381f7c793a1cb61912e89e0ddfd561d883bf41 /Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
parent062cc36cc27bb55c35e0bdd196e9806bc9d79a3e (diff)
downloadedk2-platforms-62f1e1e58965702030f722dcdf6de58998cf08a1.tar.xz
KabylakeOpenBoardPkg: Add TBT support.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Vishal P Adodariya <vishal.p.adodariya@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl')
-rw-r--r--Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl13
1 files changed, 12 insertions, 1 deletions
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
index a365882f6d..8433c1fcab 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
+++ b/Platform/Intel/KabylakeOpenBoardPkg/Acpi/BoardAcpiDxe/Dsdt/Gpe.asl
@@ -25,6 +25,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
External(\_SB.PCI0.PEG1.HPME, MethodObj)
External(\_SB.PCI0.PEG2.HPME, MethodObj)
External(\_GPE.AL6F, MethodObj)
+ External(\_SB.THDR, MethodObj)
External(\_GPE.P0L6, MethodObj)
External(\_GPE.P1L6, MethodObj)
External(\_GPE.P2L6, MethodObj)
@@ -34,6 +35,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
External(P0WK)
External(P1WK)
External(P2WK)
+ External(\CPG0)
+ External(\RPS0)
+ External(\RPT0)
External(\_PR.HWPI, IntObj)
External(\_PR.DTSI, IntObj)
@@ -841,5 +845,12 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
\_SB.PCI0.GFX0.GSCI() // Handle the SWSCI
}
}
-
+ //
+ // BIOS Needs to implement appropriate handler based on CIO_PLUG_EVENT GPIO
+ // This is generic 2-tier GPIO handler
+ //
+ Method(_L6F)
+ {
+ \_SB.THDR(\CPG0,\RPS0,\RPT0) // Check for TBT Hotplug Handler event (2-tier GPI GPE event architecture)
+ }
}