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authorJiewen Yao <jiewen.yao@intel.com>2017-09-28 11:26:47 +0800
committerJiewen Yao <jiewen.yao@intel.com>2017-09-28 11:26:47 +0800
commit6bd758d49363906e0145576cea0bbbcaae0742e6 (patch)
tree89a1762ac1c236fb19f9643d52589f8d5a75f607 /Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
parented9817c2c2d1f1f0fb6aecb38e4c70607b82ee57 (diff)
downloadedk2-platforms-6bd758d49363906e0145576cea0bbbcaae0742e6.tar.xz
Rename gPlatformModuleTokenSpaceGuid to gMinPlatformModuleTokenSpaceGuid.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc')
-rw-r--r--Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc18
1 files changed, 9 insertions, 9 deletions
diff --git a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
index 3921ff76c3..a96500ed0a 100644
--- a/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
+++ b/Platform/Intel/KabylakeOpenBoardPkg/KabylakeRvp3/OpenBoardPkgPcd.dsc
@@ -34,7 +34,7 @@
gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
[PcdsFixedAtBuild.common]
-!if gPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE
+!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPerformanceLibraryPropertyMask|0x1
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries|140
!endif
@@ -104,17 +104,17 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddressMask|0xFFFC
!if $(TARGET) == RELEASE
- gPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
+ gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402
!else
- gPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
+ gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x188B
!endif
- gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
+ gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b
!if $(TARGET) == RELEASE
- gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25
+ gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25
!else
- gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x80
+ gMinPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x80
!endif
gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0xFFE5F000
@@ -150,7 +150,7 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
# BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
# BIT3-31: Reserved
#
- gPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
+ gMinPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0x07
#
# See HstiFeatureBit.h for the definition
@@ -161,7 +161,7 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
[PcdsFixedAtBuild.IA32]
gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress|0x0
gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress|0xFED00148
- gPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
+ gMinPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0xA0000
gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x3800000
[PcdsFixedAtBuild.X64]
@@ -185,7 +185,7 @@ gSiPkgTokenSpaceGuid.PcdTsegSize|0x800000
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|5 # Variable: L"Timeout"
gEfiMdePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|L"HwErrRecSupport"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"HwErrRecSupport"
-!if gPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE
+!if gMinPlatformModuleTokenSpaceGuid.PcdPerformanceEnable == TRUE
gEfiMdePkgTokenSpaceGuid.PcdPlatformBootTimeOut|L"Timeout"|gEfiGlobalVariableGuid|0x0|1 # Variable: L"Timeout"
!endif