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authorJiewen Yao <jiewen.yao@intel.com>2018-02-14 21:24:02 +0800
committerJiewen Yao <jiewen.yao@intel.com>2018-03-02 08:36:11 +0800
commit78b62d1a0c3fc425107b85d8c97404a80609f752 (patch)
tree722b35a6ab0927e21db963c9bbc63aeb568b2b73 /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h
parentfb3107567492443967d7d03eb50f78ff94cc7600 (diff)
downloadedk2-platforms-78b62d1a0c3fc425107b85d8c97404a80609f752.tar.xz
Enable MinPlatformPkg to boot with EDK2 platform. Validated on an open server platform.
1) MinPlatform.dec a) Add PcdFspWrapperBootMode to control different behavior in FSP wrapper mode and EDKII mode (by PlatformInitPei) b) Add gPeiBaseMemoryTestPpiGuid and gPeiPlatformMemorySizePpiGuid – they are used for EDKII boot mode. c) Rename MADT related PCD for server (PcdLocalApicAddress/PcdLocalApicMmioSize/PcdIoApicAddress/PcdIoApicMmioSize/PcdIoApicId) d) Add MADT related PCD for multi IO APIC for server (PcdPcIoApicCount/PcdPcIoApicIdBase/PcdPcIoApicAddressBase/PcdPcIoApicInterruptBase) e) Add HPET related PCD (PcdHpetTimerBlockId) f) Add FADT related PCD (PcdFadtPreferredPmProfile/PcdFadtIaPcBootArch/PcdFadtFlags) g) Add PCD for DXE Silicon module flash address (PcdFlashFvFspUBase/PcdFlashFvFspUSize/PcdFlashFvFspUOffset) h) Make Flash Address PCD to be patchable, so that it can be updated in binary FV. 2) Include a) DSC/FDF: Do not always include the module, which might be from silicon code, such as SEC/CpuDxe/SmmCpu/PciHostBridge. b) DSC/FDF: UiApp.inf – fix a bug that UIAPP does not have boot manager. c) DSC/FDF: DP.inf – sync to latest performance dump tool in ShellPkg. 3) Update AcpiPlatform for server platform a) Construct MADT from scratch. b) Construct MCFG from scratch. 4) CompressLib a) Add CompressLib class and instance so that MRC data can be compressed. 5) PlatformInitPei a) Produce BaseMemoryTestPpi and PlatformMemorySizePpi in EDKII boot mode. b) Install FV in FSPM/FSPS/FSPU in EDKII boot mode. c) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei. d) Remove BuildFvHob for flash region – it is a bug. e) Mark above 4GiB MMIO to be uncatchable. 6) PciSegmentInfoLib a) Handle the case that the lib is linked by a DXE module only. 7) PlatformSecLib a) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei. 8) SpiFvbService a) Do not use fixed PCD, so that the address can be patchable. 9) TestPoint a) Enhance the logic to check if a memory is in save state area or not. (Support PcdCpuHotPlugSupport) 10) Add python tool a) AmlGenOffset.py – generate ACPI patch table. b) ParseVar.py – parse the VarBin generated by FCE tool and output PCD value. c) PatchFv/PatchBfv.py – patch the BFV address in ResetVector.bin d) PatchFv/PatchBinFv.py – patch patchable PCD in a given FV according to build report. e) PatchFv/RebaseBinFv.py – rebase a given FV to a new address. f) PatchFv/SyncBinFvInf.py – generate INF for a binary FV. Cc: Michael A Kubacki <michael.a.kubacki@intel.com> Cc: Amy Chan <amy.chan@intel.com> Cc: Chasel Chiu <chasel.chiu@intel.com> Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com> Cc: Isaac W Oram <isaac.w.oram@intel.com> Cc: Brett Wang <brett.wang@intel.com> Cc: Daocheng Bu <daocheng.bu@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h')
-rw-r--r--Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h189
1 files changed, 0 insertions, 189 deletions
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h
deleted file mode 100644
index fb4c191b59..0000000000
--- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Fadt/Fadt.h
+++ /dev/null
@@ -1,189 +0,0 @@
-/** @file
- This file describes the contents of the ACPI Fixed ACPI Description Table
- (FADT). All changes to the FADT contents should be done in this file.
-
-Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
-This program and the accompanying materials are licensed and made available under
-the terms and conditions of the BSD License that accompanies this distribution.
-The full text of the license may be found at
-http://opensource.org/licenses/bsd-license.php.
-
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef _FADT_H_
-#define _FADT_H_
-
-//
-// Statements that include other files
-//
-
-#include <IndustryStandard/Acpi50.h>
-
-//
-// FADT Definitions
-//
-#ifndef EFI_ACPI_OEM_FADT_REVISION
-#define EFI_ACPI_OEM_FADT_REVISION 0x00000000
-#endif
-
-//
-// For ACPI 1.0 support
-//
-#define EFI_ACPI_INT_MODEL 0x00
-/*
-1 Desktop
-2 Mobile
-3 Workstation
-4 Enterprise Server
-5 SOHO Server
-6 Appliance PC
-7 Performance Server
-*/
-#define EFI_ACPI_PREFERRED_PM_PROFILE 0x02
-#define EFI_ACPI_SCI_INT 0x0009
-#define EFI_ACPI_SMI_CMD 0x000000B2
-#define EFI_ACPI_S4_BIOS_REQ 0xF2
-#define EFI_ACPI_PSTATE_CNT 0x00
-#define EFI_ACPI_GPE1_BASE 0x10
-#define EFI_ACPI_CST_CNT 0x0
-#define EFI_ACPI_P_LVL2_LAT 101
-#define EFI_ACPI_P_LVL3_LAT 1001
-#define EFI_ACPI_FLUSH_SIZE 0x0000
-#define EFI_ACPI_FLUSH_STRIDE 0x0000
-#define EFI_ACPI_DUTY_OFFSET 0x01
-#define EFI_ACPI_DUTY_WIDTH 0x03
-#define EFI_ACPI_DAY_ALRM 0x0D
-#define EFI_ACPI_MON_ALRM 0x00
-#define EFI_ACPI_CENTURY 0x32
-
-//
-// IA-PC Boot Architecture Flags, see ACPI 5.0 table specification and Acpi50.h
-// We should not use EFI_ACPI_5_0_8042 for legacy free platform, or XP reset fail. No impact to mobile.
-//
-#define EFI_ACPI_IAPC_BOOT_ARCH (EFI_ACPI_5_0_LEGACY_DEVICES)
-
-//
-// Fixed Feature Flags, see ACPI 2.0 table specification and Acpi2_0.h
-//
-#define EFI_ACPI_FIXED_FEATURE_FLAGS (\
- EFI_ACPI_5_0_USE_PLATFORM_CLOCK | \
- EFI_ACPI_5_0_WBINVD | \
- EFI_ACPI_5_0_DCK_CAP | \
- EFI_ACPI_5_0_RTC_S4 | \
- EFI_ACPI_5_0_SLP_BUTTON | \
- EFI_ACPI_5_0_PROC_C1 | \
- EFI_ACPI_5_0_RESET_REG_SUP \
- )
-
-//
-// PM1A Event Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH 0x20
-#define EFI_ACPI_PM1A_EVT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1A_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1AEventBlockAddress)
-
-//
-// PM1B Event Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_PM1B_EVT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1B_EVT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1BEventBlockAddress)
-
-//
-// PM1A Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH 0x10
-#define EFI_ACPI_PM1A_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1A_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1AControlBlockAddress)
-
-//
-// PM1B Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_PM1B_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM1B_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm1BControlBlockAddress)
-
-//
-// PM2 Control Register Block Generic Address Information
-//
-#define EFI_ACPI_PM2_CNT_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH 0x08
-#define EFI_ACPI_PM2_CNT_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM2_CNT_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPm2ControlBlockAddress)
-
-//
-// Power Management Timer Control Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_PM_TMR_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_PM_TMR_BLK_BIT_WIDTH 0x20
-#define EFI_ACPI_PM_TMR_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_PM_TMR_BLK_ADDRESS FixedPcdGet16 (PcdAcpiPmTimerBlockAddress)
-
-//
-// General Purpose Event 0 Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_GPE0_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_GPE0_BLK_BIT_WIDTH 0x100
-#define EFI_ACPI_GPE0_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_GPE0_BLK_ADDRESS FixedPcdGet16 (PcdAcpiGpe0BlockAddress)
-
-//
-// General Purpose Event 1 Register Block Generic Address
-// Information
-//
-#define EFI_ACPI_GPE1_BLK_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_GPE1_BLK_BIT_WIDTH 0x00
-#define EFI_ACPI_GPE1_BLK_BIT_OFFSET 0x00
-#define EFI_ACPI_GPE1_BLK_ADDRESS FixedPcdGet16 (PcdAcpiGpe1BlockAddress)
-
-//
-// Reset Register Generic Address Information
-//
-#define EFI_ACPI_RESET_REG_ADDRESS_SPACE_ID EFI_ACPI_5_0_SYSTEM_IO
-#define EFI_ACPI_RESET_REG_BIT_WIDTH 0x08
-#define EFI_ACPI_RESET_REG_BIT_OFFSET 0x00
-#define EFI_ACPI_RESET_REG_ADDRESS 0x0000000000000CF9
-#define EFI_ACPI_RESET_VALUE 0x06
-
-//
-// Number of bytes decoded by PM1 event blocks (a and b)
-//
-#define EFI_ACPI_PM1_EVT_LEN ((EFI_ACPI_PM1A_EVT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_EVT_BLK_BIT_WIDTH) / 8)
-
-//
-// Number of bytes decoded by PM1 control blocks (a and b)
-//
-#define EFI_ACPI_PM1_CNT_LEN ((EFI_ACPI_PM1A_CNT_BLK_BIT_WIDTH + EFI_ACPI_PM1B_CNT_BLK_BIT_WIDTH) / 8)
-
-//
-// Number of bytes decoded by PM2 control block
-//
-#define EFI_ACPI_PM2_CNT_LEN (EFI_ACPI_PM2_CNT_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by PM timer block
-//
-#define EFI_ACPI_PM_TMR_LEN (EFI_ACPI_PM_TMR_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by GPE0 block
-//
-#define EFI_ACPI_GPE0_BLK_LEN (EFI_ACPI_GPE0_BLK_BIT_WIDTH / 8)
-
-//
-// Number of bytes decoded by GPE1 block
-//
-#define EFI_ACPI_GPE1_BLK_LEN (EFI_ACPI_GPE1_BLK_BIT_WIDTH / 8)
-
-extern EFI_ACPI_5_0_FIXED_ACPI_DESCRIPTION_TABLE Fadt;
-
-#endif