diff options
| author | Jiewen Yao <jiewen.yao@intel.com> | 2018-02-14 21:24:02 +0800 |
|---|---|---|
| committer | Jiewen Yao <jiewen.yao@intel.com> | 2018-03-02 08:36:11 +0800 |
| commit | 78b62d1a0c3fc425107b85d8c97404a80609f752 (patch) | |
| tree | 722b35a6ab0927e21db963c9bbc63aeb568b2b73 /Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c | |
| parent | fb3107567492443967d7d03eb50f78ff94cc7600 (diff) | |
| download | edk2-platforms-78b62d1a0c3fc425107b85d8c97404a80609f752.tar.xz | |
Enable MinPlatformPkg to boot with EDK2 platform. Validated on an open server platform.
1) MinPlatform.dec
a) Add PcdFspWrapperBootMode to control different behavior in FSP wrapper mode and EDKII mode (by PlatformInitPei)
b) Add gPeiBaseMemoryTestPpiGuid and gPeiPlatformMemorySizePpiGuid – they are used for EDKII boot mode.
c) Rename MADT related PCD for server (PcdLocalApicAddress/PcdLocalApicMmioSize/PcdIoApicAddress/PcdIoApicMmioSize/PcdIoApicId)
d) Add MADT related PCD for multi IO APIC for server (PcdPcIoApicCount/PcdPcIoApicIdBase/PcdPcIoApicAddressBase/PcdPcIoApicInterruptBase)
e) Add HPET related PCD (PcdHpetTimerBlockId)
f) Add FADT related PCD (PcdFadtPreferredPmProfile/PcdFadtIaPcBootArch/PcdFadtFlags)
g) Add PCD for DXE Silicon module flash address (PcdFlashFvFspUBase/PcdFlashFvFspUSize/PcdFlashFvFspUOffset)
h) Make Flash Address PCD to be patchable, so that it can be updated in binary FV.
2) Include
a) DSC/FDF: Do not always include the module, which might be from silicon code, such as SEC/CpuDxe/SmmCpu/PciHostBridge.
b) DSC/FDF: UiApp.inf – fix a bug that UIAPP does not have boot manager.
c) DSC/FDF: DP.inf – sync to latest performance dump tool in ShellPkg.
3) Update AcpiPlatform for server platform
a) Construct MADT from scratch.
b) Construct MCFG from scratch.
4) CompressLib
a) Add CompressLib class and instance so that MRC data can be compressed.
5) PlatformInitPei
a) Produce BaseMemoryTestPpi and PlatformMemorySizePpi in EDKII boot mode.
b) Install FV in FSPM/FSPS/FSPU in EDKII boot mode.
c) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
d) Remove BuildFvHob for flash region – it is a bug.
e) Mark above 4GiB MMIO to be uncatchable.
6) PciSegmentInfoLib
a) Handle the case that the lib is linked by a DXE module only.
7) PlatformSecLib
a) Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
8) SpiFvbService
a) Do not use fixed PCD, so that the address can be patchable.
9) TestPoint
a) Enhance the logic to check if a memory is in save state area or not. (Support PcdCpuHotPlugSupport)
10) Add python tool
a) AmlGenOffset.py – generate ACPI patch table.
b) ParseVar.py – parse the VarBin generated by FCE tool and output PCD value.
c) PatchFv/PatchBfv.py – patch the BFV address in ResetVector.bin
d) PatchFv/PatchBinFv.py – patch patchable PCD in a given FV according to build report.
e) PatchFv/RebaseBinFv.py – rebase a given FV to a new address.
f) PatchFv/SyncBinFvInf.py – generate INF for a binary FV.
Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac W Oram <isaac.w.oram@intel.com>
Cc: Brett Wang <brett.wang@intel.com>
Cc: Daocheng Bu <daocheng.bu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>
Diffstat (limited to 'Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c')
| -rw-r--r-- | Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c index ea8fcba5ad..2512793158 100644 --- a/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c +++ b/Platform/Intel/MinPlatformPkg/Acpi/AcpiTables/Hpet/Hpet.c @@ -18,7 +18,30 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // Statements that include other files
//
-#include "Hpet.h"
+#include <IndustryStandard/Acpi.h>
+#include <IndustryStandard/HighPrecisionEventTimerTable.h>
+
+//
+// HPET Definitions
+//
+#define EFI_ACPI_OEM_HPET_REVISION 0x00000001
+
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ID 0x0 // To be filled
+
+//
+// Event Timer Block Base Address Information
+//
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS_SPACE_ID EFI_ACPI_3_0_SYSTEM_MEMORY
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_WIDTH 0x40
+#define EFI_ACPI_EVENT_TIMER_BLOCK_BIT_OFFSET 0x00
+#define EFI_ACPI_EVENT_TIMER_ACCESS_SIZE 0x00
+#define EFI_ACPI_EVENT_TIMER_BLOCK_ADDRESS 0x0 // To be filled
+
+#define EFI_ACPI_HPET_NUMBER 0x00
+
+#define EFI_ACPI_MIN_CLOCK_TICK 0x0080
+
+#define EFI_ACPI_HPET_ATTRIBUTES 0x00
//
// High Precision Event Timer Table
|