Enable MinPlatformPkg to boot with EDK2 platform. Validated on an open server platform.

1)	MinPlatform.dec
a)	Add PcdFspWrapperBootMode to control different behavior in FSP wrapper mode and EDKII mode (by PlatformInitPei)
b)	Add gPeiBaseMemoryTestPpiGuid and gPeiPlatformMemorySizePpiGuid – they are used for EDKII boot mode.
c)	Rename MADT related PCD for server (PcdLocalApicAddress/PcdLocalApicMmioSize/PcdIoApicAddress/PcdIoApicMmioSize/PcdIoApicId)
d)	Add MADT related PCD for multi IO APIC for server (PcdPcIoApicCount/PcdPcIoApicIdBase/PcdPcIoApicAddressBase/PcdPcIoApicInterruptBase)
e)	Add HPET related PCD (PcdHpetTimerBlockId)
f)	Add FADT related PCD (PcdFadtPreferredPmProfile/PcdFadtIaPcBootArch/PcdFadtFlags)
g)	Add PCD for DXE Silicon module flash address (PcdFlashFvFspUBase/PcdFlashFvFspUSize/PcdFlashFvFspUOffset)
h)	Make Flash Address PCD to be patchable, so that it can be updated in binary FV.
2)	Include
a)	DSC/FDF: Do not always include the module, which might be from silicon code, such as SEC/CpuDxe/SmmCpu/PciHostBridge.
b)	DSC/FDF: UiApp.inf – fix a bug that UIAPP does not have boot manager.
c)	DSC/FDF: DP.inf – sync to latest performance dump tool in ShellPkg.
3)	Update AcpiPlatform for server platform
a)	Construct MADT from scratch.
b)	Construct MCFG from scratch.
4)	CompressLib
a)	Add CompressLib class and instance so that MRC data can be compressed.
5)	PlatformInitPei
a)	Produce BaseMemoryTestPpi and PlatformMemorySizePpi in EDKII boot mode.
b)	Install FV in FSPM/FSPS/FSPU in EDKII boot mode.
c)	Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
d)	Remove BuildFvHob for flash region – it is a bug.
e)	Mark above 4GiB MMIO to be uncatchable.
6)	PciSegmentInfoLib
a)	Handle the case that the lib is linked by a DXE module only.
7)	PlatformSecLib
a)	Move SecurityFv/AdvancedFv installation from SEC to PlatformInitPei.
8)	SpiFvbService
a)	Do not use fixed PCD, so that the address can be patchable.
9)	TestPoint
a)	Enhance the logic to check if a memory is in save state area or not. (Support PcdCpuHotPlugSupport)
10)	Add python tool
a)	AmlGenOffset.py – generate ACPI patch table.
b)	ParseVar.py – parse the VarBin generated by FCE tool and output PCD value.
c)	PatchFv/PatchBfv.py – patch the BFV address in ResetVector.bin
d)	PatchFv/PatchBinFv.py – patch patchable PCD in a given FV according to build report.
e)	PatchFv/RebaseBinFv.py – rebase a given FV to a new address.
f)	PatchFv/SyncBinFvInf.py – generate INF for a binary FV.

Cc: Michael A Kubacki <michael.a.kubacki@intel.com>
Cc: Amy Chan <amy.chan@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac W Oram <isaac.w.oram@intel.com>
Cc: Brett Wang <brett.wang@intel.com>
Cc: Daocheng Bu <daocheng.bu@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jiewen Yao <jiewen.yao@intel.com>

1 files changed, 82 insertions, 64 deletions

diff --git a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
index 94232c29b8..de7f8ae8c4 100644
--- a/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
+++ b/Platform/Intel/MinPlatformPkg/MinPlatformPkg.dec
@@ -1,5 +1,6 @@
 ## @file

-# Module describe the entire platform configuration.

+# This package provides the modules that build for a minimal platform.

+# This MinPlatformPkg should only depend on EDKII Core packages.

 #

 # The DEC files are used by the utilities that parse DSC and

 # INF files to generate AutoGen.c and AutoGen.h files

@@ -31,6 +32,9 @@ Include
 [Ppis]

 gEdkiiSiliconInitializedPpiGuid = {0x82a72dc8, 0x61ec, 0x403e, {0xb1, 0x5a, 0x8d, 0x7a, 0x3a, 0x71, 0x84, 0x98}}

 

+gPeiBaseMemoryTestPpiGuid       = { 0xb6ec423c, 0x21d2, 0x490d, { 0x85, 0xc6, 0xdd, 0x58, 0x64, 0xea, 0xa6, 0x74 } }

+gPeiPlatformMemorySizePpiGuid   = { 0x9a7ef41e, 0xc140, 0x4bd1, { 0xb8, 0x84, 0x1e, 0x11, 0x24, 0x0b, 0x4c, 0xe6 } }

+

 [Guids]

 gMinPlatformPkgTokenSpaceGuid         =  {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}

 

@@ -72,69 +76,38 @@ SecBoardInitLib|Include/Library/SecBoardInitLib.h
 TestPointLib|Include/Library/TestPointLib.h

 TestPointCheckLib|Include/Library/TestPointCheckLib.h

 

-[PcdsFixedAtBuild]

-

-##

-## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.

-## Set all of them to 0 here to prevent from confusion.

-##

-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001

-gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002

-

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006

-

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015

-

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A

-gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B

+[PcdsFixedAtBuild, PcdsPatchableInModule]

 

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028

-gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029

+gMinPlatformPkgTokenSpaceGuid.PcdFspWrapperBootMode|FALSE|BOOLEAN|0x80000008

 

 gMinPlatformPkgTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000

 gMinPlatformPkgTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001

 gMinPlatformPkgTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002

 

-gMinPlatformPkgTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B

-gMinPlatformPkgTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C

+gMinPlatformPkgTokenSpaceGuid.PcdLocalApicAddress|0xFEE00000|UINT32|0x9000000B

+gMinPlatformPkgTokenSpaceGuid.PcdLocalApicMmioSize|0x1000|UINT32|0x9000000C

 

-gMinPlatformPkgTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D

-gMinPlatformPkgTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E

+gMinPlatformPkgTokenSpaceGuid.PcdIoApicAddress|0xFEC00000|UINT32|0x9000000D

+gMinPlatformPkgTokenSpaceGuid.PcdIoApicMmioSize|0x1000|UINT32|0x9000000E

+gMinPlatformPkgTokenSpaceGuid.PcdIoApicId|0x02|UINT8|0x90000014

 

 gMinPlatformPkgTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012

 gMinPlatformPkgTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013

 

-gMinPlatformPkgTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E

+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicCount|0|UINT8|0x90000015

+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicIdBase|0x09|UINT8|0x90000016

+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicAddressBase|0xFEC01000|UINT32|0x90000017

+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicInterruptBase|24|UINT32|0x90000018

+

+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuThreadCount|2|UINT32|0x90000021

+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuCoreCount|8|UINT32|0x90000022

+gMinPlatformPkgTokenSpaceGuid.PcdMaxCpuSocketCount|4|UINT32|0x90000023

+

+gMinPlatformPkgTokenSpaceGuid.PcdHpetTimerBlockId|0x8086A201|UINT32|0x90000024

+

+gMinPlatformPkgTokenSpaceGuid.PcdFadtPreferredPmProfile|0x02|UINT8|0x90000025

+gMinPlatformPkgTokenSpaceGuid.PcdFadtIaPcBootArch|0x0001|UINT16|0x90000026

+gMinPlatformPkgTokenSpaceGuid.PcdFadtFlags|0x000086A5|UINT32|0x90000027

 

 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500

 gMinPlatformPkgTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501

@@ -155,8 +128,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003
 #

 gMinPlatformPkgTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006

 

-gMinPlatformPkgTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205

-

 gMinPlatformPkgTokenSpaceGuid.PcdSecSerialPortDebugEnable|TRUE|BOOLEAN|0x00100206

 

 #

@@ -179,11 +150,63 @@ gMinPlatformPkgTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*
 #   Stage memory:                                               {0x03, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

 #   Stage UEFI boot:                                            {0x03, 0x07, 0x03, 0x05, 0x0F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

 #   Stage OS boot:                                              {0x03, 0x07, 0x03, 0x05, 0x3F, 0x00, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

-#   Stage Secure boot:                                          {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

-#   Stage Advanced:                                             {0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

-gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07, 0x1F, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302

+#   Stage Secure boot:                                          {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

+#   Stage Advanced:                                             {0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}

+gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x03, 0x1D, 0x3F, 0x0F, 0x0F, 0x07, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}|VOID*|0x00100302

 

-[PcdsDynamic]

+[PcdsPatchableInModule]

+##

+## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.

+## Set all of them to 0 here to prevent from confusion.

+##

+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001

+gMinPlatformPkgTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002

+

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006

+

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015

+

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A

+gMinPlatformPkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B

+

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTBase|0x00000000|UINT32|0x20000021

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTSize|0x00000000|UINT32|0x20000022

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspTOffset|0x00000000|UINT32|0x20000023

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMBase|0x00000000|UINT32|0x20000024

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMSize|0x00000000|UINT32|0x20000025

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspMOffset|0x00000000|UINT32|0x20000026

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000027

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000028

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000029

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUBase|0x00000000|UINT32|0x2000002A

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUSize|0x00000000|UINT32|0x2000002B

+gMinPlatformPkgTokenSpaceGuid.PcdFlashFvFspUOffset|0x00000000|UINT32|0x2000002C

+

+[PcdsDynamic, PcdsDynamicEx]

+gMinPlatformPkgTokenSpaceGuid.PcdPcIoApicEnable|0x0|UINT32|0x90000019

 

 [PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]

 

@@ -205,11 +228,6 @@ gMinPlatformPkgTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x03, 0x0F, 0x07,
   gMinPlatformPkgTokenSpaceGuid.PcdPciNoExtendedConfigSpace    |FALSE|BOOLEAN|0x4001004C

   gMinPlatformPkgTokenSpaceGuid.PcdPciResourceAssigned         |FALSE|BOOLEAN|0x4001004D

 

-  gMinPlatformPkgTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006

-  gMinPlatformPkgTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008

-  gMinPlatformPkgTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004

-  gMinPlatformPkgTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005

-

   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035

   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036

   gMinPlatformPkgTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037