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author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-04-27 11:54:44 +0100 |
---|---|---|
committer | Leif Lindholm <leif.lindholm@linaro.org> | 2017-10-25 16:53:38 +0100 |
commit | a9b954f90fd7a3ca07d5d105d43570ffaf06b850 (patch) | |
tree | 62cc41ef9756642ca41054951fd6be431493fd95 /Platform/Marvell/Armada/Armada.dsc.inc | |
parent | 5e5c71a5e4ac3f4a5096b4a16942c409704c455e (diff) | |
download | edk2-platforms-a9b954f90fd7a3ca07d5d105d43570ffaf06b850.tar.xz |
Marvell/Armada: Add MemoryInitPeiLib that reserves secure region
The default MemoryInitPeiLib implementation insists on reserving the
region occupied by our own FV, while this is not necessary at all (the
compressed payload is uncompressed elsewhere, so the moment we enter
DXE core, we don't care about the FV contents in memory)
So clone MemoryInitPeiLib and modify it to suit our needs.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Platform/Marvell/Armada/Armada.dsc.inc')
-rw-r--r-- | Platform/Marvell/Armada/Armada.dsc.inc | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/Platform/Marvell/Armada/Armada.dsc.inc b/Platform/Marvell/Armada/Armada.dsc.inc index 56d8941518..b0a8240207 100644 --- a/Platform/Marvell/Armada/Armada.dsc.inc +++ b/Platform/Marvell/Armada/Armada.dsc.inc @@ -153,7 +153,7 @@ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
[LibraryClasses.common.SEC, LibraryClasses.common.PEIM]
- MemoryInitPeiLib|ArmPlatformPkg/MemoryInitPei/MemoryInitPeiLib.inf
+ MemoryInitPeiLib|Platform/Marvell/Armada/Library/Armada70x0MemoryInitPeiLib/Armada70x0MemoryInitPeiLib.inf
BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
[LibraryClasses.common.DXE_CORE]
@@ -364,6 +364,10 @@ gArmTokenSpaceGuid.PcdSystemMemorySize|0x40000000
gArmTokenSpaceGuid.PcdArmScr|0x531
+ # Secure region reservation
+ gMarvellTokenSpaceGuid.PcdSecureRegionBase|0x4000000
+ gMarvellTokenSpaceGuid.PcdSecureRegionSize|0x0200000
+
# TRNG
gMarvellTokenSpaceGuid.PcdEip76TrngBaseAddress|0xF2760000
|