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authorArd Biesheuvel <ard.biesheuvel@linaro.org>2018-01-30 11:24:17 +0000
committerArd Biesheuvel <ard.biesheuvel@linaro.org>2018-03-15 16:04:30 +0000
commit9dd8190e49956e02dbeeda7c5d8e08e854283f9e (patch)
tree8f01101506ff5c64a3483af591e661f223814018 /Platform/Socionext/SynQuacerEvalBoard/SynQuacerEvalBoard.fdf
parentf5951dd21469610de4f2308596404a8689f38e08 (diff)
downloadedk2-platforms-9dd8190e49956e02dbeeda7c5d8e08e854283f9e.tar.xz
Silicon/SynQuacer: tweak PCI I/O windows for ACPI/Linux support
The ACPI/Linux code does not cope very well with I/O BAR windows that involve type translation and address translation. In particular, the secondary I/O window we implement on SynQuacer: I/O 0x10000 ... 0x1ffff -> 0x77f00000 is misinterpreted by Linux, and results in the MMIO range starting at 0x77f10000 to be mapped for I/O port access to this range. This can be mitigated by using the same bus range for I/O port access on both RCs., i.e., [0x0 ... 0xffff]. This configuration can be represented using both DT and ACPI, and will work as expected in Linux. Now that the generic PCI host bridge driver has gained support for address translation, we can actually support this configuration seamlessly in UEFI as well, by applying an offset to the second I/O window to make it appear adjacent to the first one in the CPU view of the I/O space. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
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