diff options
| author | Guo Mang <mang.guo@intel.com> | 2017-08-22 14:35:29 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2017-08-24 18:52:33 +0800 |
| commit | 4773b1c76d67f7ea3d92c958a790c1cffb1407b9 (patch) | |
| tree | cd85681a95f85686a85bb0dbaea72c66f6b42284 /Platform | |
| parent | 165660b6a223d1a5d9bbc9dea3afcd7bfc66566f (diff) | |
| download | edk2-platforms-4773b1c76d67f7ea3d92c958a790c1cffb1407b9.tar.xz | |
BroxtonPlatformPkg: Fix MRC param issue
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform')
| -rw-r--r-- | Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/BoardInitMiscs.c | 21 |
1 files changed, 8 insertions, 13 deletions
diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/BoardInitMiscs.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/BoardInitMiscs.c index d0987bbbf4..0b602bd96e 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/BoardInitMiscs.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPreMem/BoardInitMiscs.c @@ -40,8 +40,8 @@ BgUpdateFspmUpd ( EFI_PLATFORM_INFO_HOB *PlatformInfo = NULL;
DRAM_POLICY_PPI *DramPolicy;
EFI_STATUS Status;
- MRC_PARAMS_SAVE_RESTORE *MrcNvData;
- BOOT_VARIABLE_NV_DATA *BootVariableNvData;
+ MRC_NV_DATA_FRAME *MrcNvData;
+
MRC_PARAMS_SAVE_RESTORE *MrcParamsHob;
BOOT_VARIABLE_NV_DATA *BootVariableNvDataHob;
@@ -84,18 +84,13 @@ BgUpdateFspmUpd ( CopyMem (&(FspUpdRgn->FspmConfig.Ch0_Bit_swizzling), &DramPolicy->ChSwizzle, sizeof (DramPolicy->ChSwizzle));
if (((VOID *)(UINT32)DramPolicy->MrcTrainingDataPtr != 0) &&
- ((VOID *)(UINT32)DramPolicy->MrcBootDataPtr != 0)) {
- DEBUG ((DEBUG_INFO, "UpdateFspmUpd - NvsBufferPtr\n"));
- MrcNvData = (MRC_PARAMS_SAVE_RESTORE *) AllocateZeroPool (sizeof (MRC_PARAMS_SAVE_RESTORE));
- BootVariableNvData = (BOOT_VARIABLE_NV_DATA *) AllocateZeroPool (sizeof (BOOT_VARIABLE_NV_DATA));
-
- MrcParamsHob = (MRC_PARAMS_SAVE_RESTORE*)((UINT32)DramPolicy->MrcTrainingDataPtr);
+ ((VOID *)(UINT32)DramPolicy->MrcBootDataPtr != 0)) {
+ MrcNvData = (MRC_NV_DATA_FRAME *) AllocateZeroPool (sizeof (MRC_NV_DATA_FRAME));
+ MrcParamsHob = (MRC_PARAMS_SAVE_RESTORE*)((UINT32)DramPolicy->MrcTrainingDataPtr);
BootVariableNvDataHob = (BOOT_VARIABLE_NV_DATA*)((UINT32)DramPolicy->MrcBootDataPtr);
-
- CopyMem(MrcNvData, MrcParamsHob, sizeof (MRC_PARAMS_SAVE_RESTORE));
- CopyMem(BootVariableNvData, BootVariableNvDataHob, sizeof (BOOT_VARIABLE_NV_DATA));
- FspUpdRgn->FspmArchUpd.NvsBufferPtr = (VOID *)(UINT32)MrcNvData;
- FspUpdRgn->FspmConfig.VariableNvsBufferPtr = (VOID *)(UINT32)BootVariableNvData;
+ CopyMem(&(MrcNvData->MrcParamsSaveRestore), MrcParamsHob, sizeof (MRC_PARAMS_SAVE_RESTORE));
+ CopyMem(&(MrcNvData->BootVariableNvData), BootVariableNvDataHob, sizeof (BOOT_VARIABLE_NV_DATA));
+ FspUpdRgn->FspmArchUpd.NvsBufferPtr = (VOID *)(UINT32)MrcNvData;
}
}
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