summaryrefslogtreecommitdiff
path: root/Platform
diff options
context:
space:
mode:
authorzwei4 <david.wei@intel.com>2017-04-26 14:08:43 +0800
committerGuo Mang <mang.guo@intel.com>2017-05-09 13:03:15 +0800
commit640308bb7c88850212810f79611455615ed294b7 (patch)
treeec923eefa1ea8250df6111520f157bb432080bc3 /Platform
parentf91a3a850c65cec0cf3dcde733b1f7cfc4604d9c (diff)
downloadedk2-platforms-640308bb7c88850212810f79611455615ed294b7.tar.xz
Add script to build ResetVector.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform')
-rw-r--r--Platform/BroxtonPlatformPkg/BuildBios.bat6
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc2
2 files changed, 7 insertions, 1 deletions
diff --git a/Platform/BroxtonPlatformPkg/BuildBios.bat b/Platform/BroxtonPlatformPkg/BuildBios.bat
index a326d3c640..0ebc5705a7 100644
--- a/Platform/BroxtonPlatformPkg/BuildBios.bat
+++ b/Platform/BroxtonPlatformPkg/BuildBios.bat
@@ -317,6 +317,12 @@ if ErrorLevel 1 goto BldFail
echo Building ResetVector...
set ResetVectorPath=%WORKSPACE%\%PLATFORM_RC_PACKAGE%\Cpu\ResetVector
+
+pushd %ResetVectorPath%\Vtf0
+ nasm.exe %Nasm_Flags% -o Bin\ResetVector.ia32.port80.raw ResetVectorCode.asm
+ python %CORE_PATH%\UefiCpuPkg\ResetVector\Vtf0\Tools\FixupForRawSection.py Bin\ResetVector.ia32.port80.raw
+popd
+
pushd %ResetVectorPath%\Vtf1
nasm.exe %Nasm_Flags% -o Bin\ResetVector.ia32.port80.raw ResetVectorCode.asm
python %CORE_PATH%\UefiCpuPkg\ResetVector\Vtf0\Tools\FixupForRawSection.py Bin\ResetVector.ia32.port80.raw
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
index e8866a0dc7..ff751c164f 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
@@ -152,7 +152,7 @@
DEFINE FSP_IBBL_SIZE = 0x2000
DEFINE BLD_IBBL_SIZE = 0x6000
- DEFINE FSP_IBBM_SIZE = 0x56000
+ DEFINE FSP_IBBM_SIZE = 0x58000
DEFINE BLD_IBBM_SIZE = 0x1E000
DEFINE CAR_BASE_ADDRESS = 0xFEF00000 # @PcdTemporaryRamBase