diff options
| author | Guo Mang <mang.guo@intel.com> | 2016-12-23 14:27:55 +0800 |
|---|---|---|
| committer | Guo Mang <mang.guo@intel.com> | 2016-12-26 19:15:23 +0800 |
| commit | 275a7851a246bf0a86a66768b3fc0f4497d0425d (patch) | |
| tree | 16f4163640291c0bf31e35283c13ea7e0589e37b /Platform | |
| parent | 4642c6c93a23612c31028c7e7f21786076591757 (diff) | |
| download | edk2-platforms-275a7851a246bf0a86a66768b3fc0f4497d0425d.tar.xz | |
BroxtonPlatformPkg: Add FspSupport
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
Diffstat (limited to 'Platform')
10 files changed, 1278 insertions, 0 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf new file mode 100644 index 0000000000..e9b20a452f --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.inf @@ -0,0 +1,91 @@ +## @file
+# Sample to provide FSP platform information related function.
+#
+# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BaseFspWrapperPlatformLibSample
+ MODULE_UNI_FILE = BaseFspWrapperPlatformLibSample.uni
+ FILE_GUID = 7CB6D6ED-5012-4e35-A42E-4C6512085A9E
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = FspWrapperPlatformLib
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ FspPlatformInfoLibSample.c
+
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ UefiCpuPkg/UefiCpuPkg.dec
+ BroxtonFspPkg/BroxtonFspPkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ BroxtonPlatformPkg/Common/SampleCode/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec #override
+ BroxtonPlatformPkg/PlatformPkg.dec
+ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ DebugLib
+ FspWrapperHobProcessLib
+ UefiCpuLib
+ FspWrapperApiLib
+ HobLib
+ FspWrapperPlatformLib
+
+[Ppis]
+ gEfiPeiReadOnlyVariable2PpiGuid ## CONSUMES
+ gDramPolicyPpiGuid ## CONSUMES
+
+[Guids]
+ gEfiSetupVariableGuid ## CONSUMES ## Variable:L"Setup"
+ gEfiAcpiVariableCompatiblityGuid
+
+[Pcd]
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvSecondFspBase ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackBase ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdFspStackSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdFlashFvIBBLSize ## CONSUMES
+ gPlatformModuleTokenSpaceGuid.PcdUpdateFspmUpdFunc
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.uni b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.uni Binary files differnew file mode 100644 index 0000000000..e46420b344 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/BaseFspWrapperPlatformLibSample.uni diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c new file mode 100644 index 0000000000..ac8e42e6dd --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/BaseFspPlatformInfoLibSample/FspPlatformInfoLibSample.c @@ -0,0 +1,304 @@ +/** @file
+ Sample to provide FSP platform information related function.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/FspWrapperApiLib.h>
+#include <Library/PcdLib.h>
+#include <Library/HobLib.h>
+#include <Library/FspCommonLib.h>
+#include <Guid/PlatformInfo.h>
+#include <Guid/AcpiVariable.h>
+#include <Guid/AcpiVariableCompatibility.h>
+#include <Library/FspPlatformInfoLib.h>
+#include <Ppi/DramPolicyPpi.h>
+#include <FspmUpd.h>
+#include <FspsUpd.h>
+#include <BoardFunctionsPei.h>
+
+#define CAR_BASE_ADDR 0xFEF00000
+
+STATIC
+EFI_STATUS
+UpdateSilicionInitUpd (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN FSPS_UPD *FspsUpd
+ )
+{
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Get current boot mode.
+
+ @note At this point, memory is ready, PeiServices are NOT available to use.
+ Platform can get some data from chipset register.
+
+ @return BootMode current boot mode.
+
+**/
+UINT32
+EFIAPI
+GetBootMode (
+ VOID
+ )
+{
+ return BOOT_WITH_FULL_CONFIGURATION;
+}
+
+
+/**
+ Get NVS buffer parameter.
+
+ @note At this point, memory is NOT ready, PeiServices are available to use.
+
+ @return NvsBuffer NVS buffer parameter.
+
+**/
+VOID *
+EFIAPI
+GetNvsBuffer (
+ VOID
+ )
+{
+ return NULL;
+}
+
+
+/**
+ This function overrides the default configurations in the UPD data region.
+ @note At this point, memory is NOT ready, PeiServices are available to use.
+
+ @param[in,out] FspUpdRgnPtr A pointer to the UPD data region data structure.
+
+ @return FspUpdRgnPtr A pointer to the UPD data region data structure.
+
+**/
+VOID *
+EFIAPI
+UpdateFspUpdConfigs (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN OUT VOID *FspUpdRgnPtr
+ )
+{
+ FSP_INFO_HEADER *pFspHeader = NULL;
+ UINT32 FspUpdRgnSize;
+ FSPM_UPD *FspmUpd = NULL;
+ EFI_BOOT_MODE BootMode;
+ UINT64 StackSize;
+ EFI_PHYSICAL_ADDRESS StackBase;
+ UPDATE_FSPM_UPD_FUNC UpdateFspmUpdFunc;
+
+ DEBUG ((DEBUG_INFO, "UpdateFspUpdConfigs\n"));
+ if (NULL == FspUpdRgnPtr)
+ return NULL;
+
+ if (PcdGet32 (PcdFlashFvSecondFspBase) == 0) {
+ pFspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvFspBase));
+ } else {
+ pFspHeader = FspFindFspHeader (PcdGet32 (PcdFlashFvSecondFspBase));
+ }
+ DEBUG ((DEBUG_INFO, "pFspHeader = %x\n", pFspHeader));
+ if (NULL == pFspHeader) {
+ return NULL;
+ }
+
+ DEBUG ((DEBUG_INFO, "pFspHeader->CfgRegionOffset = %08x\n", pFspHeader->CfgRegionOffset));
+ FspUpdRgnSize = pFspHeader->CfgRegionSize;
+ CopyMem (FspUpdRgnPtr, (void *) (pFspHeader->ImageBase + pFspHeader->CfgRegionOffset), FspUpdRgnSize);
+ FspmUpd = (FSPM_UPD *)FspUpdRgnPtr;
+ DEBUG ((DEBUG_INFO, "GetFspFspmUpdDataPointer - 0x%x\n", FspmUpd));
+
+ FspmUpd->FspmConfig.SerialDebugPortDevice = 2;
+ FspmUpd->FspmConfig.SerialDebugPortType = 0;// Skip the serial port init since we already did it
+ FspmUpd->FspmConfig.SerialDebugPortStrideSize = 2;
+ FspmUpd->FspmConfig.SerialDebugPortAddress = 0;
+ FspmUpd->FspmConfig.PreMemGpioTableEntryNum = 0;
+ FspmUpd->FspmConfig.PreMemGpioTablePtr = 0;
+
+ FspmUpd->FspmArchUpd.BootLoaderTolumSize = GetBootLoaderTolumSize ();
+ DEBUG((DEBUG_INFO, "BootLoaderTolumSize - 0x%x\n", FspmUpd->FspmArchUpd.BootLoaderTolumSize));
+
+ PeiServicesGetBootMode (&BootMode);
+ FspmUpd->FspmArchUpd.BootMode = (UINT8) BootMode;
+ DEBUG((DEBUG_INFO, "BootMode - 0x%x\n", FspmUpd->FspmArchUpd.BootMode));
+
+ GetStackInfo (BootMode, FALSE, &StackSize, &StackBase);
+ DEBUG ((DEBUG_INFO, "StackBase - 0x%x\n", StackBase));
+ DEBUG ((DEBUG_INFO, "StackSize - 0x%x\n", StackSize));
+ FspmUpd->FspmArchUpd.StackBase = (VOID *) (UINTN) StackBase;
+ FspmUpd->FspmArchUpd.StackSize = (UINTN) StackSize;
+
+ DEBUG ((DEBUG_INFO, "***** Calling UpdateFspmUpd ***** \n"));
+ UpdateFspmUpdFunc = (UPDATE_FSPM_UPD_FUNC) (UINTN) PcdGet64 (PcdUpdateFspmUpdFunc);
+ UpdateFspmUpdFunc(PeiServices, (FSPM_UPD *) FspmUpd);
+
+ return (VOID *) FspmUpd;
+}
+
+
+/**
+ Get BootLoader Tolum size.
+
+ @note At this point, memory is NOT ready, PeiServices are available to use.
+
+ @return BootLoader Tolum size.
+
+**/
+UINT32
+EFIAPI
+GetBootLoaderTolumSize (
+ VOID
+ )
+{
+ return 0;
+}
+
+
+/**
+ Get TempRamExit parameter.
+
+ @note At this point, memory is ready, PeiServices are available to use.
+
+ @return TempRamExit parameter.
+
+**/
+VOID *
+EFIAPI
+GetTempRamExitParam (
+ VOID
+ )
+{
+ return NULL;
+}
+
+
+/**
+ Get FspSiliconInit parameter.
+
+ @note At this point, memory is ready, PeiServices are available to use.
+
+ @return FspSiliconInit parameter.
+
+**/
+VOID *
+EFIAPI
+GetFspSiliconInitParam (
+ VOID
+ )
+{
+ return 0;
+}
+
+
+/**
+ Get S3 PEI memory information.
+
+ @note At this point, memory is ready, and PeiServices are available to use.
+ Platform can get some data from SMRAM directly.
+
+ @param[out] S3PeiMemSize PEI memory size to be installed in S3 phase.
+ @param[out] S3PeiMemBase PEI memory base to be installed in S3 phase.
+
+ @return If S3 PEI memory information is got successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+GetS3MemoryInfo (
+ OUT UINT64 *S3PeiMemSize,
+ OUT EFI_PHYSICAL_ADDRESS *S3PeiMemBase
+ )
+{
+ ACPI_VARIABLE_SET *AcpiVariableSet;
+ EFI_PEI_HOB_POINTERS GuidHob;
+ EFI_PHYSICAL_ADDRESS *AcpiVariableAddress;
+ UINTN AcpiVarHobSize;
+
+ GuidHob.Raw = GetHobList ();
+ AcpiVariableAddress = NULL;
+ AcpiVarHobSize = 0;
+
+ if (GuidHob.Raw != NULL) {
+ if ((GuidHob.Raw = GetNextGuidHob (&gEfiAcpiVariableCompatiblityGuid, GuidHob.Raw)) != NULL) {
+ AcpiVariableAddress = GET_GUID_HOB_DATA (GuidHob.Guid);
+ AcpiVarHobSize = GET_GUID_HOB_DATA_SIZE (GuidHob.Guid);
+ }
+ }
+
+ DEBUG ((DEBUG_INFO, "InstallS3Memory() read AcpiVariableAddress\n"));
+ if (AcpiVariableAddress != NULL) {
+ DEBUG ((DEBUG_INFO, "0x%08x\n",(UINT32) ((UINTN) AcpiVariableAddress)));
+ DEBUG ((DEBUG_INFO, "* 0x%08x\n",(UINT32) ((UINTN) *AcpiVariableAddress)));
+ AcpiVariableSet = (ACPI_VARIABLE_SET *) ((UINTN) *AcpiVariableAddress);
+ *S3PeiMemSize = (UINTN) (AcpiVariableSet->AcpiReservedMemorySize);
+ *S3PeiMemBase = (UINTN) (AcpiVariableSet->AcpiReservedMemoryBase);
+ } else {
+ AcpiVariableSet = NULL;
+ DEBUG ((DEBUG_INFO, " is NULL\n"));
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Get stack information according to boot mode.
+
+ @note If BootMode is BOOT_ON_S3_RESUME or BOOT_ON_FLASH_UPDATE,
+ this stack should be in some reserved memory space.
+
+ @note If FspInitDone is TRUE, memory is ready, but no PeiServices there.
+ Platform can get some data from SMRAM directly.
+ @note If FspInitDone is FALSE, memory is NOT ready, but PeiServices are available to use.
+ Platform can get some data from variable via VariablePpi.
+
+ @param[in] BootMode Current boot mode.
+ @param[in] FspInitDone If FspInit is called.
+ @param[out] StackSize Stack size to be used in PEI phase.
+ @param[out] StackBase Stack base to be used in PEI phase.
+
+ @return If Stack information is got successfully.
+**/
+EFI_STATUS
+EFIAPI
+GetStackInfo (
+ IN UINT32 BootMode,
+ IN BOOLEAN FspInitDone,
+ OUT UINT64 *StackSize,
+ OUT EFI_PHYSICAL_ADDRESS *StackBase
+ )
+{
+ *StackBase = PcdGet32 (PcdFspStackBase);
+ *StackSize = PcdGet32 (PcdFspStackSize);
+
+ if (BootMode == BOOT_ON_S3_RESUME) {
+ if (!FspInitDone) {
+ } else {
+ }
+ } else if (BootMode == BOOT_ON_FLASH_UPDATE) {
+ if (!FspInitDone) {
+ } else {
+ }
+ }
+
+ return EFI_SUCCESS;
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.c b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.c new file mode 100644 index 0000000000..4474eafaf8 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.c @@ -0,0 +1,58 @@ +/** @file
+ Dxe library function to reset the system from FSP wrapper.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiDxe.h>
+#include <Library/BaseLib.h>
+#include <Library/UefiRuntimeServicesTableLib.h>
+#include <Library/HeciMsgLib.h>
+#include <FspEas.h>
+
+/**
+ Perform platform related reset in FSP wrapper.
+
+ @param[in] ResetType The type of reset the platform has to perform.
+
+ @return Will reset the system based on Reset status provided.
+
+**/
+VOID
+EFIAPI
+CallFspWrapperResetSystem (
+ IN UINT32 ResetType
+ )
+{
+ EFI_RESET_TYPE EfiResetType;
+
+ switch (ResetType) {
+ case FSP_STATUS_RESET_REQUIRED_COLD:
+ EfiResetType = EfiResetCold;
+ break;
+ case FSP_STATUS_RESET_REQUIRED_WARM:
+ EfiResetType = EfiResetWarm;
+ break;
+ case FSP_STATUS_RESET_REQUIRED_3:
+ EfiResetType = EfiResetShutdown;
+ break;
+ case FSP_STATUS_RESET_REQUIRED_5:
+ HeciSendResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ CpuDeadLoop();
+ break;
+ default:
+ return;
+ }
+ gRT->ResetSystem (EfiResetType, EFI_SUCCESS, 0, NULL);
+ CpuDeadLoop();
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.inf b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.inf new file mode 100644 index 0000000000..637e786eb9 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/DxeFspWrapperPlatformResetLib/DxeFspWrapperPlatformResetLib.inf @@ -0,0 +1,70 @@ +## @file
+# Provide Dxe FSP wrapper platform reset related function.
+#
+# Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = DxeFspWrapperPlatformResetLib
+ FILE_GUID = C176048B-EF9C-4BE2-A464-26F00C551EAA
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = FspWrapperPlatformResetLib
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ DxeFspWrapperPlatformResetLib.c
+
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+
+[LibraryClasses]
+ BaseMemoryLib
+ UefiRuntimeServicesTableLib
+ HeciMsgLib
+
+[Ppis]
+
+
+[Guids]
+
+
+[Pcd]
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/FspHobProcessLib.c b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/FspHobProcessLib.c new file mode 100644 index 0000000000..499e5fc051 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/FspHobProcessLib.c @@ -0,0 +1,454 @@ +/** @file
+ Null instance of Platform Sec Lib.
+
+ Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+
+#include <Library/PeiServicesLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Library/BaseLib.h>
+#include <Library/DebugLib.h>
+#include <Library/BaseMemoryLib.h>
+#include <Library/HobLib.h>
+#include <Library/PcdLib.h>
+#include <Library/FspPlatformInfoLib.h>
+#include <Library/FspCommonLib.h>
+
+#include <Guid/MemoryTypeInformation.h>
+#include <Ppi/Capsule.h>
+#include <Guid/SmramMemoryReserve.h>
+#include <Guid/GuidHobFspEas.h>
+#include <Guid/AcpiS3Context.h>
+#include <Guid/VariableFormat.h>
+#include <Guid/PlatformCpuInfo.h>
+#include <Private/CpuInitDataHob.h>
+#include <SiPolicyHob.h>
+#include <Private/Guid/ScPolicyHobGuid.h>
+#include <FspmUpd.h>
+
+extern EFI_GUID gScDeviceTableHobGuid;
+extern EFI_GUID gEfiBootMediaHobGuid;
+extern EFI_GUID gEfiIfwiDnxRequestHobGuid;
+extern EFI_GUID gPeiAcpiCpuDataGuid;
+
+EFI_GUID gReservedMemoryResourceHobTsegGuid = {0xd038747c, 0xd00c, 0x4980, {0xb3, 0x19, 0x49, 0x01, 0x99, 0xa4, 0x7d, 0x55}};
+EFI_GUID gDummyGuid = { 0x00000000, 0xb74c, 0x4f11, {0x8c, 0x03, 0x41, 0x86, 0x65, 0x53, 0x28, 0x31}};
+
+//
+// Additional pages are used by DXE memory manager.
+// It should be consistent between RetrieveRequiredMemorySize() and GetPeiMemSize()
+//
+#define PEI_ADDITIONAL_MEMORY_SIZE (16 * EFI_PAGE_SIZE)
+
+/**
+ Get the mem size in memory type infromation table.
+
+ @param[in] PeiServices PEI Services table.
+
+ @return the mem size in memory type infromation table.
+
+**/
+UINT64
+GetMemorySizeInMemoryTypeInformation (
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ EFI_STATUS Status;
+ EFI_PEI_HOB_POINTERS Hob;
+ EFI_MEMORY_TYPE_INFORMATION *MemoryData;
+ UINT8 Index;
+ UINTN TempPageNum;
+
+ MemoryData = NULL;
+ Status = (*PeiServices)->GetHobList (PeiServices, (VOID **) &Hob.Raw);
+ while (!END_OF_HOB_LIST (Hob)) {
+ if (Hob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION &&
+ CompareGuid (&Hob.Guid->Name, &gEfiMemoryTypeInformationGuid)) {
+ MemoryData = (EFI_MEMORY_TYPE_INFORMATION *) (Hob.Raw + sizeof (EFI_HOB_GENERIC_HEADER) + sizeof (EFI_GUID));
+ break;
+ }
+
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ if (MemoryData == NULL) {
+ return 0;
+ }
+
+ TempPageNum = 0;
+ for (Index = 0; MemoryData[Index].Type != EfiMaxMemoryType; Index++) {
+ //
+ // Accumulate default memory size requirements
+ //
+ TempPageNum += MemoryData[Index].NumberOfPages;
+ }
+
+ return TempPageNum * EFI_PAGE_SIZE;
+}
+
+
+/**
+ Get the mem size need to be reserved in PEI phase.
+
+ @param[in] PeiServices PEI Services table.
+
+ @return the mem size need to be reserved in PEI phase.
+
+**/
+UINT64
+RetrieveRequiredMemorySize (
+ IN EFI_PEI_SERVICES **PeiServices
+ )
+{
+ UINT64 Size;
+
+ Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
+
+ return Size + PEI_ADDITIONAL_MEMORY_SIZE;
+}
+
+
+/**
+ Get the mem size need to be consumed and reserved in PEI phase.
+
+ @param[in] PeiServices PEI Services table.
+ @param[in] BootMode Current boot mode.
+
+ @return the mem size need to be consumed and reserved in PEI phase.
+
+**/
+UINT64
+GetPeiMemSize (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN UINT32 BootMode
+ )
+{
+ UINT64 Size;
+ UINT64 MinSize;
+
+ if (BootMode == BOOT_IN_RECOVERY_MODE) {
+ return PcdGet32 (PcdPeiRecoveryMinMemSize);
+ }
+
+ Size = GetMemorySizeInMemoryTypeInformation (PeiServices);
+
+ if (BootMode == BOOT_ON_FLASH_UPDATE) {
+ //
+ // Maybe more size when in CapsuleUpdate phase ?
+ //
+ MinSize = PcdGet32 (PcdPeiMinMemSize);
+ } else {
+ MinSize = PcdGet32 (PcdPeiMinMemSize);
+ }
+
+ return MinSize + Size + PEI_ADDITIONAL_MEMORY_SIZE;
+}
+
+
+/**
+ BIOS process FspBobList for Memory Resource Descriptor.
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+ @return If platform process the FSP hob list successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FspHobProcessForMemoryResource (
+ IN VOID *FspHobList
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ UINT64 LowMemorySize;
+ UINT64 FspMemorySize;
+ EFI_PHYSICAL_ADDRESS FspMemoryBase;
+ EFI_PHYSICAL_ADDRESS PeiMemBase;
+ EFI_PHYSICAL_ADDRESS Tolum;
+ UINT64 S3PeiMemSize;
+ EFI_PHYSICAL_ADDRESS S3PeiMemBase;
+ BOOLEAN FoundFspMemHob;
+ EFI_STATUS Status;
+ EFI_BOOT_MODE BootMode;
+ EFI_PEI_SERVICES **PeiServices;
+ FSPM_UPD *FspmUpd;
+
+ PeiServices = (EFI_PEI_SERVICES **) GetPeiServicesTablePointer ();
+
+ PeiServicesGetBootMode (&BootMode);
+
+ PeiMemBase = 0;
+ Tolum = 0;
+ LowMemorySize = 0;
+ FspMemorySize = 0;
+ FspMemoryBase = 0;
+ FoundFspMemHob = FALSE;
+
+ FspmUpd = (FSPM_UPD *) GetFspMemoryInitUpdDataPointer ();
+
+ //
+ // Parse the hob list from fsp
+ // Report all the memory resource hob.
+ //
+ Hob.Raw = (UINT8 *) (UINTN) FspHobList;
+ DEBUG ((DEBUG_INFO, "FspHobList - 0x%x\n", FspHobList));
+
+ while ((Hob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, Hob.Raw)) != NULL) {
+ DEBUG ((DEBUG_INFO, "\nResourceType: 0x%x\n", Hob.ResourceDescriptor->ResourceType));
+ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) ||
+ (Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED)) {
+ DEBUG ((DEBUG_INFO, "ResourceAttribute: 0x%x\n", Hob.ResourceDescriptor->ResourceAttribute));
+ DEBUG ((DEBUG_INFO, "PhysicalStart: 0x%lx\n", Hob.ResourceDescriptor->PhysicalStart));
+ DEBUG ((DEBUG_INFO, "ResourceLength: 0x%lx\n", Hob.ResourceDescriptor->ResourceLength));
+ DEBUG ((DEBUG_INFO, "Owner: %g\n\n", &Hob.ResourceDescriptor->Owner));
+ }
+
+ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY) &&
+ (Hob.ResourceDescriptor->PhysicalStart < BASE_4GB)) {
+ if (Tolum <(Hob.ResourceDescriptor->PhysicalStart+Hob.ResourceDescriptor->ResourceLength)){
+ Tolum = Hob.ResourceDescriptor->PhysicalStart+Hob.ResourceDescriptor->ResourceLength;
+ }
+ }
+ if ((Hob.ResourceDescriptor->ResourceType == EFI_RESOURCE_MEMORY_RESERVED) // Found the low memory length below 4G
+ && (Hob.ResourceDescriptor->PhysicalStart >= BASE_1MB)
+ && (Hob.ResourceDescriptor->PhysicalStart + Hob.ResourceDescriptor->ResourceLength <= BASE_4GB)
+ && (CompareGuid (&Hob.ResourceDescriptor->Owner, &gFspReservedMemoryResourceHobGuid))) {
+ FoundFspMemHob = TRUE;
+ FspMemoryBase = Hob.ResourceDescriptor->PhysicalStart;
+ FspMemorySize = Hob.ResourceDescriptor->ResourceLength;
+ DEBUG ((DEBUG_INFO, "Find fsp mem hob, base 0x%lx, len 0x%lx\n", FspMemoryBase, FspMemorySize));
+ }
+
+ //
+ // Report the resource hob
+ //
+ BuildResourceDescriptorHob (
+ Hob.ResourceDescriptor->ResourceType,
+ Hob.ResourceDescriptor->ResourceAttribute,
+ Hob.ResourceDescriptor->PhysicalStart,
+ Hob.ResourceDescriptor->ResourceLength
+ );
+
+ Hob.Raw = GET_NEXT_HOB (Hob);
+ }
+
+ if (!FoundFspMemHob) {
+ DEBUG((DEBUG_INFO, "Didn't find the fsp used memory information.\n"));
+ }
+
+ DEBUG ((DEBUG_INFO, "LowMemorySize: 0x%x.\n", LowMemorySize));
+ DEBUG ((DEBUG_INFO, "FspMemoryBase: 0x%x.\n", FspMemoryBase));
+ DEBUG ((DEBUG_INFO, "FspMemorySize: 0x%x.\n", FspMemorySize));
+
+ if (BootMode == BOOT_ON_S3_RESUME) {
+
+ S3PeiMemBase = 0;
+ S3PeiMemSize = 0;
+ Status = GetS3MemoryInfo (&S3PeiMemSize, &S3PeiMemBase);
+ ASSERT_EFI_ERROR (Status);
+ DEBUG ((DEBUG_INFO, "S3 memory %lx - %lxh bytes\n", S3PeiMemBase, S3PeiMemSize));
+
+ //
+ // Make sure Stack and PeiMemory are not overlap
+ //
+ Status = PeiServicesInstallPeiMemory (
+ S3PeiMemBase,
+ S3PeiMemSize
+ );
+ ASSERT_EFI_ERROR (Status);
+ } else {
+ PeiMemBase = Tolum - BASE_128MB;
+ Status = PeiServicesInstallPeiMemory (
+ PeiMemBase,
+ BASE_128MB
+ );
+ ASSERT_EFI_ERROR (Status);
+ }
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ Dump FSP SMBIOS memory info HOB
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+**/
+VOID
+DumpFspSmbiosMemoryInfoHob (
+ IN VOID *FspHobList
+ )
+{
+ EFI_PEI_HOB_POINTERS Hob;
+ FSP_SMBIOS_MEMORY_INFO *FspSmbiosMemoryInfo = NULL;
+ UINT8 ChannelIndex;
+ UINT8 DimmIndex;
+
+ Hob.Raw = (VOID *)FspHobList;
+ if (Hob.Raw != NULL) {
+ if ((Hob.Raw = GetNextGuidHob (&gFspSmbiosMemoryInfoHobGuid, Hob.Raw)) != NULL) {
+ FspSmbiosMemoryInfo = GET_GUID_HOB_DATA (Hob.Guid);
+ }
+ }
+ if (FspSmbiosMemoryInfo != NULL) {
+ DEBUG ((DEBUG_INFO, "\nFspSmbiosMemoryInfo\n"));
+ DEBUG ((DEBUG_INFO, " |-> Revision : %d\n", FspSmbiosMemoryInfo->Revision));
+ DEBUG ((DEBUG_INFO, " |-> MemoryType : %d\n", FspSmbiosMemoryInfo->MemoryType));
+ DEBUG ((DEBUG_INFO, " |-> DataWidth : %d\n", FspSmbiosMemoryInfo->DataWidth));
+ DEBUG ((DEBUG_INFO, " |-> MemoryFrequencyInMHz : %d\n", FspSmbiosMemoryInfo->MemoryFrequencyInMHz));
+ DEBUG ((DEBUG_INFO, " |-> ErrorCorrectionType : %d\n", FspSmbiosMemoryInfo->ErrorCorrectionType));
+ DEBUG ((DEBUG_INFO, " |-> ChannelCount : %d\n", FspSmbiosMemoryInfo->ChannelCount));
+ DEBUG ((DEBUG_INFO, " |-> ChannelInfo\n"));
+ for (ChannelIndex = 0; ChannelIndex < FspSmbiosMemoryInfo->ChannelCount; ChannelIndex++) {
+ {
+ CHANNEL_INFO *ChannelInfo;
+
+ ChannelInfo = &FspSmbiosMemoryInfo->ChannelInfo[ChannelIndex];
+ DEBUG ((DEBUG_INFO, " |-> ChannelId : %d\n", ChannelInfo->ChannelId));
+ DEBUG ((DEBUG_INFO, " |-> DimmCount : %d\n", ChannelInfo->DimmCount));
+ DEBUG ((DEBUG_INFO, " |-> DimmInfo\n"));
+ for (DimmIndex = 0; DimmIndex < MAX_DIMMS_NUM; DimmIndex++) {
+ {
+ DIMM_INFO *DimmInfo;
+
+ DimmInfo = &FspSmbiosMemoryInfo->ChannelInfo[ChannelIndex].DimmInfo[DimmIndex];
+ if (ChannelIndex < (MAX_CHANNELS_NUM - 1)) {
+ DEBUG((DEBUG_INFO, " | |-> DimmId : %d\n", DimmInfo->DimmId));
+ DEBUG((DEBUG_INFO, " | |-> SizeInMb : %d\n", DimmInfo->SizeInMb));
+ } else {
+ DEBUG((DEBUG_INFO, " |-> DimmId : %d\n", DimmInfo->DimmId));
+ DEBUG((DEBUG_INFO, " |-> SizeInMb : %d\n", DimmInfo->SizeInMb));
+ }
+ }
+ }
+ }
+ }
+ DEBUG((DEBUG_INFO, "\n"));
+ }
+}
+
+
+/**
+ Process FSP HOB list
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+**/
+VOID
+ProcessFspHobList (
+ IN VOID *FspHobList
+)
+{
+ EFI_PEI_HOB_POINTERS FspHob;
+ EFI_PEI_HOB_POINTERS DxeHob;
+ BOOLEAN TransferFlag;
+
+ //
+ // Get the HOB list for processing
+ //
+ FspHob.Raw = (VOID *)FspHobList;
+
+ //
+ // Collect memory ranges
+ //
+ while (!END_OF_HOB_LIST (FspHob)) {
+ TransferFlag = FALSE;
+ if (FspHob.Header->HobType == EFI_HOB_TYPE_GUID_EXTENSION) {
+ if (CompareGuid(&FspHob.Guid->Name, &gScDeviceTableHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gScPolicyHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gSiPolicyHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gFspNonVolatileStorageHobGuid)) {
+ DEBUG ((DEBUG_INFO, "Transfer Memory Config Data HOB!\n"));
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gEfiBootMediaHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gEfiIfwiDnxRequestHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gPeiAcpiCpuDataGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gEfiSmmPeiSmramMemoryReserveGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gCpuInitDataHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gSmbiosProcessorInfoHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gSmbiosCacheInfoHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gFspSmbiosMemoryInfoHobGuid)) {
+ TransferFlag = TRUE;
+ } else if (CompareGuid(&FspHob.Guid->Name, &gEfiGraphicsInfoHobGuid)) {
+ TransferFlag = TRUE;
+ DEBUG ((DEBUG_INFO, "Found Graphics Info Hob\n"));
+ }
+
+ }
+
+ if (TransferFlag) {
+ DEBUG ((DEBUG_INFO, "FSP Extended GUID HOB: {%g} HobLength = %x\n", &(FspHob.Guid->Name), FspHob.Header->HobLength));
+ DxeHob.Raw = BuildGuidDataHob(&FspHob.Guid->Name, GET_GUID_HOB_DATA(FspHob.Raw), GET_GUID_HOB_DATA_SIZE(FspHob.Raw));
+ }
+ FspHob.Raw = GET_NEXT_HOB (FspHob);
+ }
+}
+
+
+/**
+ BIOS process FspBobList for other data (not Memory Resource Descriptor).
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+ @return If platform process the FSP hob list successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FspHobProcessForOtherData (
+ IN VOID *FspHobList
+ )
+{
+ ProcessFspHobList (FspHobList);
+
+ return EFI_SUCCESS;
+}
+
+
+/**
+ BIOS process FspBobList.
+
+ @param[in] FspHobList Pointer to the HOB data structure produced by FSP.
+
+ @return If platform process the FSP hob list successfully.
+
+**/
+EFI_STATUS
+EFIAPI
+FspHobProcess (
+ IN VOID *FspHobList
+ )
+{
+ EFI_STATUS Status;
+
+ Status = FspHobProcessForMemoryResource (FspHobList);
+ if (EFI_ERROR (Status)) {
+ return Status;
+ }
+ Status = FspHobProcessForOtherData (FspHobList);
+
+ return Status;
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.inf b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.inf new file mode 100644 index 0000000000..7d4b1b49fd --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.inf @@ -0,0 +1,124 @@ +## @file
+# Implement Process Fsp Hob.
+#
+# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiFspHobProcessLib
+ MODULE_UNI_FILE = PeiFspHobProcessLib.uni
+ FILE_GUID = C7B7070B-E5A8-4b86-9110-BDCA1095F496
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = FspWrapperHobProcessLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ FspHobProcessLib.c
+
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ IntelFrameworkPkg/IntelFrameworkPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+ BroxtonFspPkg/BroxtonFspPkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+ IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+ BroxtonPlatformPkg/PlatformPkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+ BroxtonSiPkg/BroxtonSiPrivate.dec
+
+[LibraryClasses]
+ BaseLib
+ BaseMemoryLib
+ HobLib
+ DebugLib
+ FspWrapperPlatformLib
+ PeiServicesLib
+ PeiServicesTablePointerLib
+ FspCommonLib
+
+[Pcd]
+ ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize
+
+ ## CONSUMES
+ gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize
+
+[Guids]
+ ## PRODUCES ## HOB
+ gFspReservedMemoryResourceHobGuid
+
+ ## SOMETIMES_CONSUMES
+ ## PRODUCES ## HOB
+ gEfiMemoryTypeInformationGuid
+
+ ## PRODUCES ## HOB
+ gEfiSmmPeiSmramMemoryReserveGuid
+
+ ## SOMETIMES_CONSUMES ## HOB
+ ## SOMETIMES_PRODUCES ## HOB
+ gCpuInitDataHobGuid
+
+ ## SOMETIMES_CONSUMES ## Guid
+ gEfiVariableGuid
+
+ ## SOMETIMES_CONSUMES ## Guid
+ gEfiAcpiVariableGuid
+
+ ## SOMETIMES_CONSUMES ## Guid
+ gFspNonVolatileStorageHobGuid
+
+ ## SOMETIMES_CONSUMES ## HOB
+ ## SOMETIMES_PRODUCES ## HOB
+ gScDeviceTableHobGuid
+ ## SOMETIMES_CONSUMES ## HOB
+ ## SOMETIMES_PRODUCES ## HOB
+ gScPolicyHobGuid
+ ## SOMETIMES_CONSUMES ## HOB
+ ## SOMETIMES_PRODUCES ## HOB
+ gSiPolicyHobGuid ##
+ gPeiAcpiCpuDataGuid ## UNDEFINED
+ gEfiBootMediaHobGuid
+ gEfiIfwiDnxRequestHobGuid
+
+ ## PRODUCES ## HOB
+ gSmbiosProcessorInfoHobGuid
+ gSmbiosCacheInfoHobGuid
+ gFspSmbiosMemoryInfoHobGuid
+ gEfiGraphicsInfoHobGuid
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.uni b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.uni Binary files differnew file mode 100644 index 0000000000..53ace56c00 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspHobProcessLib/PeiFspHobProcessLib.uni diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.c b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.c new file mode 100644 index 0000000000..76cc0e7cc1 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.c @@ -0,0 +1,108 @@ +/** @file
+ Pei library function to reset the system from FSP wrapper.
+
+ Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+
+ This program and the accompanying materials
+ are licensed and made available under the terms and conditions of the BSD License
+ which accompanies this distribution. The full text of the license may be found at
+ http://opensource.org/licenses/bsd-license.php.
+
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <PiPei.h>
+#include <FspEas.h>
+#include <Library/HeciMsgLib.h>
+#include <ScRegs/RegsPcu.h>
+#include <Library/IoLib.h>
+
+/**
+ Perform platform related reset in FSP wrapper.
+
+ @param[in] ResetType The type of reset the platform has to perform.
+
+ @return Will reset the system based on Reset status provided.
+
+**/
+VOID
+EFIAPI
+CallFspWrapperResetSystem (
+ IN UINT32 ResetType
+ )
+{
+ UINT8 Reset;
+ UINT16 AcpiBaseAddr;
+ UINT16 Data16;
+ UINT32 Data32;
+
+ switch (ResetType) {
+ case FSP_STATUS_RESET_REQUIRED_COLD:
+ Reset = IoRead8 (R_RST_CNT);
+ Reset &= 0xF1;
+ Reset |= 0xE;
+ IoWrite8 (R_RST_CNT, Reset);
+ break;
+ case FSP_STATUS_RESET_REQUIRED_WARM:
+ Reset = IoRead8 (R_RST_CNT);
+ Reset &= 0xF1;
+ Reset |= 0x6;
+ IoWrite8 (R_RST_CNT, Reset);
+ break;
+ case FSP_STATUS_RESET_REQUIRED_3:
+ //
+ // Read ACPI Base Address
+ //
+ AcpiBaseAddr = (UINT16) PcdGet16 (PcdScAcpiIoPortBaseAddress);
+
+ //
+ // Then, GPE0_EN should be disabled to avoid any GPI waking up the system from S5
+ //
+ Data16 = 0;
+ IoWrite16 (
+ (UINTN) (AcpiBaseAddr + R_ACPI_GPE0a_EN),
+ (UINT16) Data16
+ );
+
+ //
+ // Secondly, PwrSts register must be cleared
+ //
+ // Write a "1" to bit[8] of power button status register at
+ // (ABASE + R_ACPI_PM1_STS) to clear this bit
+ //
+ Data16 = B_ACPI_PM1_STS_PWRBTN;
+ IoWrite16 (
+ (UINTN) (AcpiBaseAddr + R_ACPI_PM1_STS),
+ (UINT16) Data16
+ );
+
+ //
+ // Finally, transform system into S5 sleep state
+ //
+ Data32 = IoRead32 ((UINTN) (AcpiBaseAddr + R_ACPI_PM1_CNT));
+
+ Data32 = (UINT32) ((Data32 & ~(B_ACPI_PM1_CNT_SLP_TYP + B_ACPI_PM1_CNT_SLP_EN)) | V_ACPI_PM1_CNT_S5);
+
+ IoWrite32 (
+ (UINTN) (AcpiBaseAddr + R_ACPI_PM1_CNT),
+ (UINT32) Data32
+ );
+
+ Data32 = Data32 | B_ACPI_PM1_CNT_SLP_EN;
+
+ IoWrite32 (
+ (UINTN) (AcpiBaseAddr + R_ACPI_PM1_CNT),
+ (UINT32) Data32
+ );
+ break;
+ case FSP_STATUS_RESET_REQUIRED_5:
+ HeciSendResetRequest (CBM_RR_REQ_ORIGIN_BIOS_POST, CBM_HRR_GLOBAL_RESET);
+ break;
+ default:
+ return;
+ }
+ CpuDeadLoop();
+}
+
diff --git a/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.inf b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.inf new file mode 100644 index 0000000000..bdba2da2b2 --- /dev/null +++ b/Platform/BroxtonPlatformPkg/Common/FspSupport/Library/PeiFspWrapperPlatformResetLib/PeiFspWrapperPlatformResetLib.inf @@ -0,0 +1,69 @@ +## @file
+# Provide FSP wrapper platform reset related function.
+#
+# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>
+#
+# This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php.
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+##
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = PeiFspWrapperPlatformResetLib
+ FILE_GUID = B1EB436F-9188-4A54-A28C-F019A64ED9EA
+ MODULE_TYPE = BASE
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = FspWrapperPlatformResetLib
+
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+# VALID_ARCHITECTURES = IA32 X64
+#
+
+################################################################################
+#
+# Sources Section - list of files that are required for the build to succeed.
+#
+################################################################################
+
+[Sources]
+ PeiFspWrapperPlatformResetLib.c
+
+
+################################################################################
+#
+# Package Dependency Section - list of Package files that are required for
+# this module.
+#
+################################################################################
+
+[Packages]
+ MdePkg/MdePkg.dec
+ BroxtonSiPkg/BroxtonSiPkg.dec
+ IntelFsp2Pkg/IntelFsp2Pkg.dec
+
+[LibraryClasses]
+ IoLib
+ BaseLib
+ HeciMsgLib
+
+[Ppis]
+
+[Guids]
+
+[Pcd]
+ gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress ## CONSUMES
+
|