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authorzwei4 <david.wei@intel.com>2017-03-17 14:13:22 +0800
committerzwei4 <david.wei@intel.com>2017-03-17 16:40:52 +0800
commit586516662b87a116fc098d52761f12a8cd144953 (patch)
tree6026f70722b14435e9e02cb0e3bdd666cb173f01 /Platform
parent00df813708684661a416c9f401241c62987a61f6 (diff)
downloadedk2-platforms-586516662b87a116fc098d52761f12a8cd144953.tar.xz
Enable Processor Power Management.
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 <david.wei@intel.com>
Diffstat (limited to 'Platform')
-rw-r--r--Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi6
-rw-r--r--Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi6
-rw-r--r--Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc2
3 files changed, 7 insertions, 7 deletions
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi
index 81c19bcd31..b2bafa979c 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/Cpu.vfi
@@ -1,7 +1,7 @@
// /** @file
// CPU Setup formset.
//
-// Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -64,8 +64,8 @@ form formid = CPU_CONFIGURATION_FORM_ID,
oneof varid = Setup.ActiveProcessorCores,
prompt = STRING_TOKEN(STR_ACTIVE_PROCESSOR_CORES_PROMPT),
help = STRING_TOKEN(STR_ACTIVE_PROCESSOR_CORES_HELP),
- option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED;
- option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = MANUFACTURING | DEFAULT | RESET_REQUIRED;
endoneof;
grayoutif TRUE;
diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi
index e54fc46dd5..fe6ba6814a 100644
--- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi
+++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/CpuPower.vfi
@@ -1,7 +1,7 @@
// /** @file
// CPU Power Setup formset.
//
-// Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -64,9 +64,9 @@ form formid = CPU_PWR_CONFIGURATION_FORM_ID,
oneof varid = Setup.MaxPkgCState,
prompt = STRING_TOKEN(STR_MAX_PKG_CSTATE_SUPPORT_PROMPT),
help = STRING_TOKEN(STR_MAX_PKG_CSTATE_STATE_SUPPORT_HELP),
- option text = STRING_TOKEN(STR_MAX_PKG_CSTATE_C2), value = 2, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_MAX_PKG_CSTATE_C2), value = 2, flags = RESET_REQUIRED;
option text = STRING_TOKEN(STR_MAX_PKG_CSTATE_C1), value = 1, flags = RESET_REQUIRED;
- option text = STRING_TOKEN(STR_MAX_PKG_CSTATE_C0), value = 0, flags = RESET_REQUIRED;
+ option text = STRING_TOKEN(STR_MAX_PKG_CSTATE_C0), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED;
endoneof;
endif;
diff --git a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
index 47bb9200be..e8866a0dc7 100644
--- a/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
+++ b/Platform/BroxtonPlatformPkg/PlatformDsc/Defines.dsc
@@ -67,7 +67,7 @@
DEFINE SHELL_ENABLE = TRUE
DEFINE ME_ENABLE = TRUE
DEFINE DTS_ENABLE = FALSE
- DEFINE PPM_ENABLE = FALSE
+ DEFINE PPM_ENABLE = TRUE
DEFINE SPI_SERIAL_OUT = FALSE # MAX3110 SPI UART for EFI debug message out.Verified on pure VP 2.1.2.
DEFINE SPI_POST_CODE = FALSE # Max6950 SPI UART for POST code.Verified on pure VP 2.1.2.
DEFINE CHARGING_ENABLE = TRUE