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author | Alan Ott <alan@softiron.com> | 2017-08-20 15:33:34 -0400 |
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committer | Leif Lindholm <leif.lindholm@linaro.org> | 2017-08-21 18:00:20 +0100 |
commit | 03159ba83bd6b01843bd42ffec0e3c3e6fb12429 (patch) | |
tree | 4548eb87d45cf39ffcb8ad93f6eb8c2e3d126f7b /Readme.md | |
parent | 4b89d86fee1e9929c306cbb5f57db39353e52191 (diff) | |
download | edk2-platforms-03159ba83bd6b01843bd42ffec0e3c3e6fb12429.tar.xz |
Silicon/AMD/Styx: Use PcdSataPortMode properly for two controllers
The previous implementation used only the lower bits for both the first
and second SATA controller, when the upper bits should have been used for
the second SATA controller.
Also ASSERT that SataChPerSerdes is 2, because the even/odd logic doesn't
work if it's not.
Signed-off-by: Alan Ott <alan@softiron.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Readme.md')
0 files changed, 0 insertions, 0 deletions