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authorEric Dong <eric.dong@intel.com>2016-11-16 13:49:50 +0800
committerStar Zeng <star.zeng@intel.com>2016-11-21 15:37:54 +0800
commitb54946e0fcbea3a63d9a7cd17877eef6657a3860 (patch)
tree341fa5c126cd949220618e35fd641b9fbf462ae7 /SecurityPkg/SecurityPkg.dec
parent132b73dd5cd823cad0af030d44a977f8a9f3aa0a (diff)
downloadedk2-platforms-b54946e0fcbea3a63d9a7cd17877eef6657a3860.tar.xz
SecurityPkg: Add DxeTcgPhysicalPresenceStorageLib.
Tcg Physical Presence spec defined some actions used for storage device. Add Dxe version library to handles these actions. Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Eric Dong <eric.dong@intel.com>
Diffstat (limited to 'SecurityPkg/SecurityPkg.dec')
-rw-r--r--SecurityPkg/SecurityPkg.dec9
1 files changed, 9 insertions, 0 deletions
diff --git a/SecurityPkg/SecurityPkg.dec b/SecurityPkg/SecurityPkg.dec
index dab332ab4e..7b71795e25 100644
--- a/SecurityPkg/SecurityPkg.dec
+++ b/SecurityPkg/SecurityPkg.dec
@@ -77,6 +77,11 @@
#
Tcg2PpVendorLib|Include/Library/TcgPpVendorLib.h
+ ## @libraryclass Provides support for TCG Physical Presence Interface (PPI) specification
+ # >= 96 && < 128 Vendor Specific PPI Operation.
+ #
+ TcgPhysicalPresenceStorageLib|Include/Library/TcgPhysicalPresenceStorageLib.h
+
## @libraryclass Handle TPM 2.0 physical presence request from OS.
#
Tcg2PhysicalPresenceLib|Include/Library/Tcg2PhysicalPresenceLib.h
@@ -146,6 +151,10 @@
# Include/Guid/Tcg2PhysicalPresenceData.h
gEfiTcg2PhysicalPresenceGuid = { 0xaeb9c5c1, 0x94f1, 0x4d02, { 0xbf, 0xd9, 0x46, 0x2, 0xdb, 0x2d, 0x3c, 0x54 }}
+ ##
+ # Include/Guid/Tcg2PhysicalPresenceData.h
+ gEfiTcgPhysicalPresenceStorageGuid = { 0x2EBE3E34, 0xB3CD, 0x471A, { 0xBF, 0x87, 0xB3, 0xC6, 0x6E, 0xE0, 0x74, 0x9A}}
+
## GUID used for form browser, password credential and provider identifier.
# Include/Guid/PwdCredentialProviderHii.h
gPwdCredentialProviderGuid = { 0x78b9ec8b, 0xc000, 0x46c5, { 0xac, 0x93, 0x24, 0xa0, 0xc1, 0xbb, 0x0, 0xce }}