summaryrefslogtreecommitdiff
path: root/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
diff options
context:
space:
mode:
authorJaben Carsey <jaben.carsey@intel.com>2014-01-10 22:34:13 +0000
committerjcarsey <jcarsey@6f19259b-4bc3-4df7-8a09-765794883524>2014-01-10 22:34:13 +0000
commit9f7f0697b7dcada75704f2c54b816cf79448010b (patch)
tree6305effbe29590c5c0a4d42cc4c0189ed2f53e25 /ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
parente1c9edd6b6ea5e78f02e382b254de40cf708d20c (diff)
downloadedk2-platforms-9f7f0697b7dcada75704f2c54b816cf79448010b.tar.xz
ShellPkg: add the last PCIe extended capability decodings
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jaben Carsey <jaben.carsey@intel.com> Reviewed-by: Erik Bjorge <erik.c.bjorge@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15097 6f19259b-4bc3-4df7-8a09-765794883524
Diffstat (limited to 'ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c')
-rw-r--r--ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c231
1 files changed, 222 insertions, 9 deletions
diff --git a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
index a539bb568c..6c333ca2f9 100644
--- a/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
+++ b/ShellPkg/Library/UefiShellDebug1CommandsLib/Pci.c
@@ -5043,6 +5043,220 @@ PrintInterpretedExtendedCompatibilityAer (
}
/**
+ Function to interpret and print out the multicast structure
+
+ @param[in] HeaderAddress The Address of this capability header.
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.
+ @param[in] PciExpressCapPtr The address of the PCIe capabilities structure.
+**/
+EFI_STATUS
+EFIAPI
+PrintInterpretedExtendedCompatibilityMulticast (
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,
+ IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr
+ )
+{
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST *Header;
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST*)HeaderAddress;
+
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_MULTICAST),
+ gShellDebug1HiiHandle,
+ Header->MultiCastCapability,
+ Header->MulticastControl,
+ Header->McBaseAddress,
+ Header->McReceiveAddress,
+ Header->McBlockAll,
+ Header->McBlockUntranslated,
+ Header->McOverlayBar
+ );
+
+ DumpHex (
+ 4,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_MULTICAST),
+ (VOID *) (HeaderAddress)
+ );
+
+ return (EFI_SUCCESS);
+}
+
+/**
+ Function to interpret and print out the virtual channel and multi virtual channel structure
+
+ @param[in] HeaderAddress The Address of this capability header.
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.
+**/
+EFI_STATUS
+EFIAPI
+PrintInterpretedExtendedCompatibilityVirtualChannel (
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress
+ )
+{
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY *Header;
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC *CapabilityItem;
+ UINT32 ItemCount;
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY*)HeaderAddress;
+
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_VC_BASE),
+ gShellDebug1HiiHandle,
+ Header->ExtendedVcCount,
+ Header->PortVcCapability1,
+ Header->PortVcCapability2,
+ Header->VcArbTableOffset,
+ Header->PortVcControl,
+ Header->PortVcStatus
+ );
+ for (ItemCount = 0 ; ItemCount < Header->ExtendedVcCount ; ItemCount++) {
+ CapabilityItem = &Header->Capability[ItemCount];
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_VC_ITEM),
+ gShellDebug1HiiHandle,
+ ItemCount+1,
+ CapabilityItem->VcResourceCapability,
+ CapabilityItem->PortArbTableOffset,
+ CapabilityItem->VcResourceControl,
+ CapabilityItem->VcResourceStatus
+ );
+ }
+
+ DumpHex (
+ 4,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_VC) + (Header->ExtendedVcCount - 1) * sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_VIRTUAL_CHANNEL_CAPABILITY),
+ (VOID *) (HeaderAddress)
+ );
+
+ return (EFI_SUCCESS);
+}
+
+/**
+ Function to interpret and print out the resizeable bar structure
+
+ @param[in] HeaderAddress The Address of this capability header.
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.
+**/
+EFI_STATUS
+EFIAPI
+PrintInterpretedExtendedCompatibilityResizeableBar (
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress
+ )
+{
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR *Header;
+ UINT32 ItemCount;
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR*)HeaderAddress;
+
+ for (ItemCount = 0 ; ItemCount < (UINT32)GET_NUMBER_RESIZABLE_BARS(Header) ; ItemCount++) {
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_RESIZE_BAR),
+ gShellDebug1HiiHandle,
+ ItemCount+1,
+ Header->Capability[ItemCount].ResizableBarCapability,
+ Header->Capability[ItemCount].ResizableBarControl
+ );
+ }
+
+ DumpHex (
+ 4,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),
+ (UINT32)GET_NUMBER_RESIZABLE_BARS(Header) * sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_RESIZABLE_BAR_ENTRY),
+ (VOID *) (HeaderAddress)
+ );
+
+ return (EFI_SUCCESS);
+}
+
+/**
+ Function to interpret and print out the TPH structure
+
+ @param[in] HeaderAddress The Address of this capability header.
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.
+**/
+EFI_STATUS
+EFIAPI
+PrintInterpretedExtendedCompatibilityTph (
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress
+ )
+{
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH *Header;
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH*)HeaderAddress;
+
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_TPH),
+ gShellDebug1HiiHandle,
+ Header->TphRequesterCapability,
+ Header->TphRequesterControl
+ );
+ DumpHex (
+ 8,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)Header->TphStTable - (UINT8*)HeadersBaseAddress),
+ GET_TPH_TABLE_SIZE(Header),
+ (VOID *)Header->TphStTable
+ );
+
+ DumpHex (
+ 4,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH) + GET_TPH_TABLE_SIZE(Header) - sizeof(UINT16),
+ (VOID *) (HeaderAddress)
+ );
+
+ return (EFI_SUCCESS);
+}
+
+/**
+ Function to interpret and print out the secondary PCIe capability structure
+
+ @param[in] HeaderAddress The Address of this capability header.
+ @param[in] HeadersBaseAddress The address of all the extended capability headers.
+ @param[in] PciExpressCapPtr The address of the PCIe capabilities structure.
+**/
+EFI_STATUS
+EFIAPI
+PrintInterpretedExtendedCompatibilitySecondary (
+ IN CONST PCI_EXP_EXT_HDR *HeaderAddress,
+ IN CONST PCI_EXP_EXT_HDR *HeadersBaseAddress,
+ IN CONST PCIE_CAP_STURCTURE *PciExpressCapPtr
+ )
+{
+ CONST PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE *Header;
+ Header = (PCI_EXPRESS_EXTENDED_CAPABILITIES_SECONDARY_PCIE*)HeaderAddress;
+
+ ShellPrintHiiEx(
+ -1, -1, NULL,
+ STRING_TOKEN (STR_PCI_EXT_CAP_SECONDARY),
+ gShellDebug1HiiHandle,
+ Header->LinkControl3,
+ Header->LaneErrorStatus
+ );
+ DumpHex (
+ 8,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)Header->EqualizationControl - (UINT8*)HeadersBaseAddress),
+ PCIE_CAP_MAX_LINK_WIDTH(PciExpressCapPtr->LinkCap),
+ (VOID *)Header->EqualizationControl
+ );
+
+ DumpHex (
+ 4,
+ EFI_PCIE_CAPABILITY_BASE_OFFSET + ((UINT8*)HeaderAddress - (UINT8*)HeadersBaseAddress),
+ sizeof(PCI_EXPRESS_EXTENDED_CAPABILITIES_TPH) - sizeof(Header->EqualizationControl) + PCIE_CAP_MAX_LINK_WIDTH(PciExpressCapPtr->LinkCap),
+ (VOID *) (HeaderAddress)
+ );
+
+ return (EFI_SUCCESS);
+}
+
+/**
Display Pcie extended capability details
@param[in] HeadersBaseAddress The address of all the extended capability headers.
@@ -5094,26 +5308,25 @@ PrintPciExtendedCapabilityDetails(
case PCI_EXPRESS_EXTENDED_CAPABILITY_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION_ID:
return PrintInterpretedExtendedCompatibilityECEA(HeaderAddress, HeadersBaseAddress);
break;
-/**
case PCI_EXPRESS_EXTENDED_CAPABILITY_VIRTUAL_CHANNEL_ID:
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTI_FUNCTION_VIRTUAL_CHANNEL_ID:
- ASSERT(FALSE);
+ return PrintInterpretedExtendedCompatibilityVirtualChannel(HeaderAddress, HeadersBaseAddress);
break;
case PCI_EXPRESS_EXTENDED_CAPABILITY_MULTICAST_ID:
-// use PCIE_CAP_DEVICEPORT_TYPE(PciExpressCapPtr->PcieCapReg) == 0100b, 0101b, or 0110b
- ASSERT(FALSE);
+ //
+ // should only be present if PCIE_CAP_DEVICEPORT_TYPE(PciExpressCapPtr->PcieCapReg) == 0100b, 0101b, or 0110b
+ //
+ return PrintInterpretedExtendedCompatibilityMulticast(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);
break;
case PCI_EXPRESS_EXTENDED_CAPABILITY_RESIZABLE_BAR_ID:
- ASSERT(FALSE);
+ return PrintInterpretedExtendedCompatibilityResizeableBar(HeaderAddress, HeadersBaseAddress);
break;
case PCI_EXPRESS_EXTENDED_CAPABILITY_TPH_ID:
- ASSERT(FALSE);
+ return PrintInterpretedExtendedCompatibilityTph(HeaderAddress, HeadersBaseAddress);
break;
case PCI_EXPRESS_EXTENDED_CAPABILITY_SECONDARY_PCIE_ID:
- // use PciExpressCapPtr link capabilities register
- ASSERT(FALSE);
+ return PrintInterpretedExtendedCompatibilitySecondary(HeaderAddress, HeadersBaseAddress, PciExpressCapPtr);
break;
-//**/
default:
ShellPrintEx (-1, -1,
L"Unknown PCIe extended capability ID (%04xh). No interpretation available.\r\n",