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| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-10-15 09:44:20 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2017-10-15 23:25:13 +0100 |
| commit | 4b75f2a85e1b1b852a0e8476ca2ab78ca59ca77f (patch) | |
| tree | 413dae667ac5a349890f94c6dbfae31a3fcb923a /Silicon/AMD/Styx/AcpiTables/Iort.c | |
| parent | a3877da646af4ce50d1b6be65969dd405383a3cf (diff) | |
| download | edk2-platforms-4b75f2a85e1b1b852a0e8476ca2ab78ca59ca77f.tar.xz | |
Silicon/AMD/Styx: update SMMU id to MMU-401
The IORT spec has been updated to include more specific defines for the
MMU-401, which supports more page sizes than the generic SMMU v1. Note
that this requires an OS that understands these new definitions.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Diffstat (limited to 'Silicon/AMD/Styx/AcpiTables/Iort.c')
| -rw-r--r-- | Silicon/AMD/Styx/AcpiTables/Iort.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Silicon/AMD/Styx/AcpiTables/Iort.c b/Silicon/AMD/Styx/AcpiTables/Iort.c index 80872773ba..370e71e136 100644 --- a/Silicon/AMD/Styx/AcpiTables/Iort.c +++ b/Silicon/AMD/Styx/AcpiTables/Iort.c @@ -84,7 +84,7 @@ typedef struct { }, \
Base, \
Size, \
- EFI_ACPI_IORT_SMMUv1v2_MODEL_v1, \
+ EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU401, \
EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK, \
FIELD_OFFSET(EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE, \
SMMU_NSgIrpt), \
|